System and method for performance aware dynamic uncore frequency scaling

Abstract

Methods and systems are described which are directed to an Uncore Frequency Scaling Module (UFSM). The UFSM is a NUMA aware method to efficiently control the uncore frequency of a socket, or multiple uncore frequency domains with a socket, considering traffic from remote sockets. UFSM can consider the setup with heterogeneous workloads running on different cores. Certain embodiments can aim to save power without impacting the performance of heterogeneous critical workloads. Certain UFSM embodiments can take into account e.g., the IPC and memory bandwidth of the critical applications, among other parameters or metrics, hence allowing the system to run on a lower power state for best-effort applications.

Description

SYSTEM AND METHOD FOR PERFORMANCE AWARE DYNAMIC UNCORE FREQUENCY SCALINGCROSS REFERENCE TO RELATED INFORMATION

[0001] This application claims the benefit of United States of America priority application No. 63 / 556,029 filed on February 21, 2024, titled “System and Method for Performance Aware Dynamic Uncore Frequency Scaling.”TECHNICAL FIELD

[0002] The present disclosure generally relates to systems and methods for uncore frequency scaling.BACKGROUND

[0003] Modern processors typically have multiple CPU (central processing unit) cores in one package or chip. At the same time the server motherboards have multiple sockets each of which can host a multicore processor chip / package. Figure 1 shows the architecture of a multisocket system. The newer hardware architecture design divides processor chips into two components: core and uncore. A core component is typically composed of the computation units(CPU cores) and core’s private caches (LI and L2). The uncore part mainly consists of the last level cache (LLC), integrated memory controllers, Ultra Path Interconnect (UPI) and other important components. Existing research has shown that memory controllers and LLC can account for up to 27% of the total power consumption of the chip. See, e.g., Cheng, Hsiang-Yun, et al."Core vs. Uncore: The Heart of Darkness," Proceedings of the 52nd Annual Design AutomationConference, 2015, available at, https: / / doi.org / 10.1145 / 2744769,2747916. Processors provide various knobs like Dynamic Voltage and Frequency Scaling (DVFS), Idle states, Running Average Power Limit (RAPL), etc., which can be used to improve the power efficiency of the system. See, e.g., Le Sueur, Etienne, and Gernot Heiser. "Dynamic Voltage and Frequency Scaling: The Laws of Diminishing Returns," Proceedings of the 2010 International Conference on Power AwareComputing and Systems, 2010, available at,MinimumComplete Tutorial of CPU Power Management, C-states and P-states, available at, https: / / metebalci.com / blog / a-minimum-complete-tutorial-of-i-management-c-states- and-p-states / ; Running Average Power Limit Energy Reporting, available at, https: / / www.intel.com / content / www / us / en / developer / articles / technical / software-security- guidance / advisory-guidance / running-average-power-limit-energy-;.html. Moreover, modern processors decouple the core and uncore frequency domains. The uncore has a separate frequency domain which can be controlled or adjusted to improve the power efficiency.

[0004] Uncore frequency scaling allows you to increase or decrease the uncore frequency dynamically. The Linux kernel provides the sysfs interface and Model Specific Registers (MSRs) to control the uncore frequency of each socket. See, e.g., Intel Uncore Frequency Scaling — The Linux Kernel documentation, available at, https : / / docs . kernel . or g / admin-scaling.html. The uncore frequency has an effect on the socket power consumption. The higher the uncore frequency, the higher the socket power consumption and vice-versa. Prior research works have shown that uncore frequency scaling can be used to save a significant amount of power without impacting the performance of workloads. See, e.g., Gholkar, Neha, Frank Mueller, and Barry Rountree, “Uncore power scavenger: A runtime for uncore power conservation on hpc systems,” Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis, 2019, available at, https: / / doi.org / 10.1145 / 3295500.3356150; Andre, Etienne, et al., "DUF: Dynamic Uncore Frequency scaling to reduce power consumption," Concurrency and Computation: Practice and Experience 34.3 (2022): e6580, available at https: / / doi.org / 10.1002 / cpe.6580; Xiao, Baonan, Jianfeng Yang, and Xianxian Qi, "Imitation Learning-Based Performance-Power Trade-Off Uncore Frequency Scaling Policy for Multicore System," Sensors 23.3 (2023): 1449, available at https: / / www.mdpi.com / 2098448. The methods base their solution in the fact that the CPU intensive workloads are not impacted by the changes in the uncore frequency, in Gholkar for example. At the same time, a single application can have a CPU intensive phase and a memory intensive phase. Hence, the uncore frequency would be dynamically adjusted to best align with the current working conditions. The existing methods attempt to dynamically identify the changes in the phases and scale the uncore frequency accordingly. There are predominantly two types of techniques to control the uncore frequency as described in Xiao: feedback-based single-step policies and machine learning-based policies.

[0005] There currently exist certain challenges to the prior art identified above. For example, current solutions are limited to homogeneous setups. The existing works proposed solutions for homogeneous settings where all the cores are running the same application. In real setups, multiple application might be running simultaneously in a single server and each application might have different processing requirements. In such heterogeneous setting, various applications might have different Instructions Per Cycle (IPC) and Memory Bandwidth (MBW) at different point in time. Hence, a heterogeneity aware solution is needed. Current solutions also lack NUMA awareness. The existing solutions don’t take Non-Uniform Memory Access (NUMA) effect into account. Recent hardware allows setting uncore frequency of different sockets separately. If an application’s memory access requests are served from another NUMA node’s memory, lowering the uncore frequency of one socket might impact the workload running on a different socket. Furthermore, current solutions involve inefficient hardware-based uncore frequency scaling. The current hardware supports automatic uncore frequency scaling. However, the approach used by hardware vendors sets the uncore frequency to the maximum value on a slight change in load. Setting uncore frequency to the maximum value might be beneficial for the performance but it leads to higher power consumption even when there is an opportunity to save power without impacting the performance. Current solutions are also sensitive to transient changes. Existing single step feedback-based solutions act as soon as they detect changes in the observed metrics. If there is sudden short-lived change in load of the application, quick reaction to it might lead to either loss in performance or increase in power consumption. Finally, current solutions are agnostic to classes of application. A real system might have applications with different service requirements. There might be critical applications which do not tolerate performance degradation and there can be best-effort applications which can tolerate compromised performance resulting in higher power savings.SUMMARY

[0006] One embodiment under the present disclosure comprises a computer- implemented method for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components. Steps include: receiving one or more initial conditions from a user, the one or more initial conditions identifying one or more target applications and corresponding computing resources to be dedicated to the one or more targetapplications; periodically collecting one or more metrics from the processor chip; periodically creating a signal defining an uncore frequency based at least in part on the one or more metrics and the one or more initial conditions, wherein the signal is configured to not degrade the quality of service of the one or more target applications; and periodically applying the uncore frequency to the one or more uncore components.

[0007] Another possible embodiment under the present disclosure is a computer- implemented method for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components. Steps include: periodically monitoring IPC and MBW; calculating one or more changes in the IPC and BW for one or more critical applications; and implementing one or more uncore frequency scaling decisions based at least in part on the one or more changes.

[0008] Another possible embodiment under the present disclosure is a computer- implemented method for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components, the method performed by control logic comprising an UFSM. Steps include: setting an uncore frequency to a maximum value; measuring, in each of one or more sampling intervals, IPC and MBW of one or more critical applications; taking a maximum IPC among all measured IPC; taking a maximum MBW among all measured MBW; taking, for one or more best-effort applications, a sum of all measured MBW; tracking a SP for both IPC and MBW, wherein SP is a measure of a SMA of window size, at any point of time, and SP can be used to track the last SMA where the uncore frequency was updated, and the SP acts as a reference point to take decision on whether to increase or decrease the uncore frequency, wherein the SP is computed for the one or more critical applications and the one or more best effort applications. Further steps include; periodically computing a delta of the IPC and MBW, wherein the delta indicates change since the uncore frequency was adjusted; characterized in that; the control logic has three states: Max Uncore, Actuate and Balanced; the control logic starts with setting the uncore frequency to a maximum and continuously monitors changes in the IPC and MBW; the control logic switches from one state to another based on observed changes in IPC and MBW; the Max Uncore state comprises the state where it runs at the maximum uncore frequency; the Actuate state is the state where the module decreases the uncore frequency to save power; the Balanced state is the state where the uncore frequency cannot be decreased without degrading performance; the delta cannot always be exactly zero, such that a delta within apredetermined threshold (e.g., a range ±5%) is considered to be zero for taking a state transition decision; and the uncore frequency is scaled-up or scaled-down by a user-specified parameter.

[0009] Another possible embodiment under the present disclosure is a method for manipulating a current state of a device object. Steps include: allocating memory for a device object corresponding to that device object definition, wherein the device object corresponding to that device object definition comprises a command queue; and allocating a corresponding thread to execute instructions to: track a current state of the device object corresponding to that device object definition; when the current state of the device object corresponding to that device object definition is the same as a state specified in that device object definition, execute one or more operations specified for a command specified for the current state of the device object in that device object definition; and determine whether to update the current state of the device object corresponding to that device object definition based on presence and priority of a command in the command queue comprised by the device object corresponding to that device object definition.

[0010] A further embodiment comprises an UFSM for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components. The UFSM comprises: a metrics monitor configured to periodically collect one or more metrics related to one or more critical applications within the processor chip; control logic configured to periodically receive the one or more metrics from the metrics monitor and to receive one or more initial conditions from a user, the control logic further configured to periodically create a signal defining an uncore frequency based at least in part on the one or more metrics and the one or more initial conditions; and a frequency scalar configured to periodically receive the signal from the control logic and further configured to periodically apply the uncore frequency to the one or more uncore components.

[0011] This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used as an indication of the scope of the claimed subject matter.BRIEF DESCRIPTION OF THE DRAWINGS

[0012] For a more complete understanding of the present disclosure, reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:

[0013] Fig. 1 illustrates an architecture of a dual socket system;

[0014] Fig. 2 illustrates an example of a single step feedback based dynamic uncore frequency scaling module under the present disclosure;

[0015] Fig. 3 illustrates an embodiment under the present disclosure of a UFSM running per socket;

[0016] Fig. 4 illustrates an example of control logic of the UFSM under the present disclosure;

[0017] Fig. 5 illustrates an example of UFSM design for systems which have common uncore frequency for all sockets under the present disclosure;

[0018] Fig. 6 illustrates a flow-chart of a method embodiment under the present disclosure;

[0019] Fig. 7 illustrates a flow-chart of a method embodiment under the present disclosure;

[0020] Fig. 8 illustrates a flow-chart of a method embodiment under the present disclosure;

[0021] Fig. 9 illustrates a flow-chart of a method embodiment under the present disclosure;

[0022] Fig. 10 shows a schematic of a communication system embodiment under the present disclosure;

[0023] Fig. 11 shows a schematic of a user equipment embodiment under the present disclosure;

[0024] Fig. 12 shows a schematic of a network node embodiment under the present disclosure;

[0025] Fig. 13 shows a schematic of a host embodiment under the present disclosure;

[0026] Fig. 14 shows a schematic of a virtualization environment embodiment under the present disclosure; and

[0027] Fig. 15 shows a schematic representation of an embodiment of communication amongst nodes, hosts, and user equipment under the present disclosure.DETAILED DESCRIPTION

[0028] Before describing various embodiments of the present disclosure in detail, it is to be understood that this disclosure is not limited to the parameters of the particularly exemplified systems, methods, apparatus, products, processes, and / or kits, which may, of course, vary. Thus, while certain embodiments of the present disclosure will be described in detail, with reference to specific configurations, parameters, components, elements, etc., the descriptions are illustrative and are not to be construed as limiting the scope of the claimed embodiments. In addition, the terminology used herein is for the purpose of describing the embodiments and is not necessarily intended to limit the scope of the claimed embodiments.

[0029] As described above, there currently exist certain challenges to the prior art identified above. For example, current solutions are limited to homogeneous setups, hence, a heterogeneity aware solution is needed. Current solutions also lack NUMA awareness. The existing solutions also fail to take Non-Uniform Memory Access (NUMA) effect into account. Recent hardware allows setting uncore frequency of different sockets (or different uncore frequency domains within sockets) separately. Current solutions also involve inefficient hardwarebased uncore frequency scaling. Current solutions are also sensitive to transient changes. Finally, current solutions are agnostic to classes of application. A real system might have applications with different service requirements.

[0030] Certain aspects of the disclosure and their embodiments may provide solutions to these or other challenges. Embodiments include methods and systems directed to an Uncore Frequency Scaling Module (UFSM). The UFSM is a NUMA aware method to efficiently control the uncore frequency of a socket (or uncore frequency domain within a socket with multiple uncore frequency domains) considering traffic from remote sockets. UFSM can consider the setup with heterogeneous workloads running on different cores. Certain embodiments aim to save power without impacting the performance of the heterogeneous critical workloads. Certain UFSM embodiments can take into account the IPC and memory bandwidth of the critical applications only, hence allowing the system to run on a lower power state for best-effort applications. Certain embodiments can limit the memory bandwidth usage of best-effort application to reduce theirinterference with the critical application. Certain embodiments can maintain a moving average of the past IPC and Memory bandwidth readings to avoid adjusting the frequency for the transient decrease in workload. This allows the system to carefully decrease the uncore frequency without impacting the performance of the critical workloads.

[0031] Embodiments under the present disclosure include a feedback-based single- step method to dynamically control the uncore frequency in order to save power without impacting critical application’s performance. System embodiments include a feedback loop-based UFSM which dynamically scales the uncore frequency based on e.g., observed system metrics. Benefits and features of various embodiments can include:• Users can specify as input which applications are critical and which are best effort. UFSM can take this input into account to take frequency scaling decision. Users can also specify the maximum uncore frequency (b umax) for the best effort applications (b umax is the percent of maximum uncore frequency at which the system runs when no critical workloads are scheduled on the system).• UFSM can restrict the memory bandwidth (MBW) usage of the best-effort application to reduce their impact on critical applications’ performance. The user can specify be limit which is the maximum allowable bandwidth for best effort applications.• UFSM can periodically monitor the Instructions Per-Cycle (IPC), Local Memory Bandwidth (LMBW) and Remote Memory Bandwidth (RMBW) of the critical applications. The sampling period ts can be specified by the user. For most systems it is assumed that the critical applications are pinned to specific cores. Hence, monitoring the IPC and MBW of the specific cores will give the IPC and MBW of critical applications. Similarly, one can monitor the bandwidth of the cores running the best-effort applications to get the MBW of best-effort applications .• UFSM can also monitor the remote memory bandwidth (RMBW) of the applications to take NUMA aware decisions. The remote memory bandwidth is the measure of the memory read / write traffic from application hosted on another socket to a particular socket.• UFSM can maintain a reading window Wn of the previous n reading samples (of both IPC and memory bandwidth) for each application.• UFSM can take the scaling decision to increase or decrease the uncore frequency based on the IPC and MBW readings of the current sample and the Simple Moving Average (SMA) of the previous readings (stored in the reading window (Wn)) when uncore frequency was adjusted. The frequency can be increased or decreased by the scaling factor (SCAL FAC) specified by the user.• UFSM can be based on the feedback loop mechanism, it evaluates impact of the decision taken in the previous iteration then takes the next decision on the current system conditions (values of the observed metrics).

[0032] Certain embodiments may provide one or more of the following technical advantages. Certain embodiments can allow for power savings without impacting the performance by dynamically adjusting the uncore frequency. Certain embodiments can result in higher power savings compared to the default hardware-based uncore frequency scaling. Certain embodiments can work in a heterogeneous setup where multiple applications are running in a single server, e.g., embodiments can consider multiple critical applications to set the uncore frequency. Embodiments can support throttling the best effort applications to further increase the power saving benefits. Certain embodiments can work without requiring inputs from the applications and can work transparently. Certain embodiments can support NUMA aware scaling of the uncore frequency. Embodiments can consider historical readings to set the uncore frequency to prevent scaling up and scaling down on transient load changes. Embodiments can also be integrated in a cloud set-up at a node-level and can achieve overall net power savings, hence reducing the cost of operations.

[0033] Figure 2 shows one embodiment under the present disclosure of an architecture of a UFSM-based system 200. UFSM 250 can comprise three components: (i) control logic 210, (ii) frequency scalar 225 and, (iii) metrics monitor 220. Control logic 210 is the main component of the proposed embodiment. Control logic 210 starts with the initial conditions 205 specified by e.g., a user / system administrator. Initial conditions 205 can include e.g.:• the maximum uncore frequency (MAX FREQ);• the minimum uncore frequency (MIN FREQ);• scaling factor (SCAL FAC);• the sampling rate (ts);• uncore frequency value for best effort applications (b umax);• memory bandwidth limit for best-effort applications (be limit);the reading window size (Wn); set of critical applications (C); or• set of best effort applications (B).

[0034] Control logic 210 sends a signal to the frequency scalar 225, which is responsible for setting the uncore frequency specified by control logic 210. Metrics monitor 220 can periodically collect per application metrics from the system, which can include, e.g., Instructions Per Cycle (IPC), Local Memory Bandwidth (LMBW) and Remote Memory Bandwidth (RMBW). Metrics monitor 220 is connected back to control logic 210 to form the feedback loop. System 230 can comprise other components in a multi-socket system, such as system 3 of Figure 1. An instance of UFSM 200 can run on each of multiple sockets.

[0035] Figure 3 shows an embodiment of a multi-socket system 400 under the present disclosure. Figure 3 illustrates example interactions of UFSMs 410, 420 that are running per multiple uncore frequency domains (such as multiple uncore frequency domains per socket), with sockets 480, 490. Sockets 480, 490 in some embodiments can instead be considered as separate uncore frequency domains. UFSM 410, 420 collects metrics e.g., only for critical applications. Each socket’s 480, 490 UFSM 410, 420 has the visibility of metrics (RMBW) of critical applications running on the different sockets 480, 490. To get the statistics of the critical applications running on each socket 480, 490 there is a global metric monitor 450 to read the metrics. Global metric monitor 450 collects metric data from all the sockets 480, 490 and each socket 480, 490 has a separate control logic 434, 442 and frequency scalar 432, 444. Control logic 434, 442 of each socket 480, 490 can take decisions based on the metrics observed from the critical applications. Frequency scalar 432, 444 adjusts the socket’s 480, 490 uncore frequency based on the values supplied by control logic 434, 442. When system 400 is running only best-effort (BE) applications, the UFSMs 410, 420 can set the uncore frequency to a user-specified frequency b umax (e.g., b umax can be any frequency between Minimum and Maximum uncore frequency, such as less than or equal to 50% of maximum value to save power).

[0036] In order to limit the memory bandwidth of the set of best-effort applications (B), memory bandwidth allocation technologies like Intel RDT can be used. See, e.g., Herdrich, Andrew, et al., “Introduction to Memory Bandwidth Allocation,” available at https: / / www.intel.com / content / www / us / en / developer / articles / technical / introduction-to-memory- bandwidth-allocation.html Limiting the memory bandwidth of best-effort applications reducestheir interference with critical applications as memory bandwidth is a shared resource. UFSM can do that by taking the input be limit from the user (be limit is the percentage of the total available bandwidth that user want to allocate to best-effort applications).

[0037] Figure 4 shows an example flow embodiment of the control logic of a UFSM (e.g., UFSM 410, 420 of Figure 3). In the description below reference is made to the equations listed in Table 1 :Table 1

[0038] This describes the working of the UFSM embodiment shown in Figure 4. At the start of the module the control logic sets the uncore frequency to the maximum value (MAX FREQ). In each sampling interval UFSM measures the IPC and MBW (EMBW and RMBW) of all the critical applications and takes the maximum value among all the measured values (Equation 1 and 2). The equation considers both the local bandwidth and remote bandwidth of the critical applications. The local bandwidth represents the memory traffic to the same socket as the one used by the application, whereas remote bandwidth represents the memory traffic from the applications running on the remote sockets. For the best-effort applications, UFSM takes the sum of all the measured bandwidth (Equation 3) as best-effort applications has an upper limit on the total bandwidth usage (be limit).

[0039] The module keeps track of a parameter called Set Point (SP) for both IPC and MBW. Set Point is the measure of the Simple Moving Average (SMA) of window size Wn (SMA of previous Wn readings) at any point of time. Set point can be used to track the last SMA(of IPC and MBW) where the uncore frequency was updated. The set point acts as a reference point to take decision on whether to increase or decrease the uncore frequency. Equation 4, Equation 5 and Equation 6 shows the set point values of IPC and MBW respectively. The set point is computed for both critical applications (CSP) and best effort applications (BSP).

[0040] The control logic periodically computes the delta (A) of the IPC, and MBW (including LMBW and RMBW). Delta is the difference between the current reading (IPC or MBW) and the last set point. The Equation 7, Equation 8 and Equation 9 shows how different deltas are computed. The delta indicates how far the current readings are from the point where the uncore frequency was adjusted. In each iteration, Equation 7 computes the delta of the current IPC value with the last set point (Equation 4). Like Equation 7, Equation 8 computes the delta of the memory bandwidth (CMBW) for the critical applications. Equation 9 computes the delta of the memory bandwidth of best-effort applications (BMBW). Memory bandwidth is a shared resource. In a set up where both critical and best effort applications are running on same machines, the changes in bandwidth of best-effort application might impact the bandwidth of critical application. Hence ABMBW should be computed to track the effects of changes in bandwidth of best-effort applications.

[0041] The control logic has three states: Max Uncore, Actuate and Balanced. The system starts with maximum uncore frequency and continuously monitors the changes in the IPC and memory bandwidth. The system can switch from one state to another based on the observed values of AIPC, ACMBW and ABMBW. Figure 4 shows how the UFSM module switches states between various states. The system starts with the Max Uncore state where it runs at the maximum uncore frequency. Actuate state is the state where the module decreases the uncore frequency to save power. Balanced represents the state of the system when one cannot decrease the uncore frequency without degrading the performance.

[0042] Heuristic 1, shown in Table 2, shows the detailed working of the UFSM heuristic shown in Figure 4. Note that the delta cannot always be exactly zero, so a delta within an appropriate range (e.g., ±5%) can be considered to be zero for taking the state transition decision.

[0043] The uncore frequency is scaled-up or scaled-down by an amount SCAL FAC which is the user-specified parameter.Table 2: Heuristic 1

[0044] Table 3 shows possible configurable parameters of the system. The best value of some of these parameters may need to be determined experimentally in some cases.Table 3: List of configurable parameters of UFSM,

[0045] One can also consider the bandwidth to the LLC to take scaling decisions. However, at any point of time, the traffic to memory bandwidth will likely be considerably higher compared to LLC as LLC is smaller in size and is shared among multiple cores. Hence, it is better to take scaling decisions on the basis of memory bandwidth. The equations 10 and 12, shown in Table 4, can be used along with the existing Equations 1 to 9 to consider LLC bandwidth to take uncore frequency scaling decisions. The LLCBW denotes the bandwidth of each core to the LLC.Table 4

[0046] Some systems do not allow decoupling of the uncore frequencies of different sockets, e.g. all sockets run with the same uncore frequency. Figure 5 shows the possible design for system 800 which features common uncore frequency for both the sockets 860, 870. In this design there is a single instance of UFSM 850 runs for all the sockets 860, 870. Control logic 840 takes the scaling decision based on the metrics of critical applications running on all thesockets detected by metric monitor 830 and frequency scalar 820 sets the uncore frequency which is applicable to all sockets 860, 870. Equation 1 to 9 can be used directly in this setup.

[0047] A possible method embodiment under the present disclosure is shown in Figure 6. Method 1200 comprises a computer-implemented method for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components. Step 1210 is receiving one or more initial conditions from a user, the one or more initial conditions identifying one or more target applications and corresponding computing resources to be dedicated to the one or more target applications. Step 1220 is periodically collecting one or more metrics from the processor chip. Step 1230 is periodically creating a signal defining an uncore frequency based at least in part on the one or more metrics and the one or more initial conditions, wherein the signal is configured to not degrade the quality of service of the one or more target applications. Step 1240 is periodically applying the uncore frequency to the one or more uncore components. Method 1200 can comprise multiple variations and embodiments and / or additional and / or alternative steps.

[0048] Another possible embodiment under the present disclosure is shown in Figure 7. Method 1400 is a computer-implemented method for scaling uncore frequency within a processor chip comprising one or more components and one or more uncore components. Step 1410 is periodically monitoring IPC and MBW. Step 1420 is calculating one or more changes in the IPC and BW for one or more critical applications. Step 1430 is implementing one or more uncore frequency scaling decisions based at least in part on the one or more changes. Method 1400 can comprise multiple variations and embodiments and / or additional and / or alternative steps.

[0049] Another possible embodiment under the present disclosure is shown in Figure 8. Method 1600 is a computer-implemented method for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components, the method performed by control logic comprising an UFSM. Step 1610 is setting an uncore frequency to a maximum value. Step 1620 is measuring, in each of one or more sampling intervals, IPC and MBW of one or more critical applications. Step 1630 is taking a maximum IPC among all measured IPC. Step 1640 is taking a maximum MBW among all measured MBW. Step 1650 is taking, for one or more best-effort applications, a sum of all measured MBW. Step 1660 is tracking a SP for both IPC and MBW, wherein SP is a measure of a SMA of window size, at any point of time, and SP can be used to track the last SMA where the uncore frequency was updated, and theSP acts as a reference point to take decision on whether to increase or decrease the uncore frequency, wherein the SP is computed for the one or more critical applications and the one or more best effort applications. Step 1670 is periodically computing a delta of the IPC and MBW, wherein the delta indicates change since the uncore frequency was adjusted; characterized in that; the control logic has three states: Max Uncore, Actuate and Balanced; the control logic starts with setting the uncore frequency to a maximum and continuously monitors changes in the IPC and MBW; the control logic switches from one state to another based on observed changes in IPC and MBW; the Max Uncore state comprises the state where it runs at the maximum uncore frequency; the Actuate state is the state where the module decreases the uncore frequency to save power; the Balanced state is the state where the uncore frequency cannot be decreased without degrading performance; the delta cannot always be exactly zero, such that a delta within a predetermined threshold (e.g., a range ±5%) is considered to be zero for taking a state transition decision; and the uncore frequency is scaled-up or scaled-down by a user-specified parameter. Method 1600 can comprise multiple variations and embodiments and / or additional and / or alternative steps.

[0050] Another possible embodiment under the present disclosure is shown in Figure 9. Method 1800 is a method for manipulating a current state of a device object. Step 1810 is allocating memory for a device object corresponding to that device object definition, wherein the device object corresponding to that device object definition comprises a command queue. Step 1820 is allocating a corresponding thread to execute instructions to:• Track, at 1830, a current state of the device object corresponding to that device object definition;• when the current state of the device object corresponding to that device object definition is the same as a state specified in that device object definition, execute, at 1840, one or more operations specified for a command specified for the current state of the device object in that device object definition; and• determine, at 1850, whether to update the current state of the device object corresponding to that device object definition based on presence and priority of a command in the command queue comprised by the device object corresponding to that device object definition.

[0051] Method 1800 can comprise multiple variations and embodiments and / or additional and / or alternative steps.Additional Embodiments

[0052] Figure 10 shows an example of a communication system 2100 in accordance with some embodiments. In the example, the communication system 2100 includes a telecommunication network 2102 that includes an access network 2104, such as a RAN, and a core network 2106, which includes one or more core network nodes 2108. The access network 2104 includes one or more access network nodes, such as network nodes 2110a and 2110b (one or more of which may be generally referred to as network nodes 2110), or any other similar 3rd Generation Partnership Project (3GPP) access node or non-3GPP access point. The network nodes 2110 facilitate direct or indirect connection of UE, such as by connecting UEs 2112a, 2112b, 2112c, and 2112d (one or more of which may be generally referred to as UEs 2112) to the core network 2106 over one or more wireless connections.

[0053] Example wireless communications over a wireless connection include transmitting and / or receiving wireless signals using electromagnetic waves, radio waves, infrared waves, and / or other types of signals suitable for conveying information without the use of wires, cables, or other material conductors. Moreover, in different embodiments, the communication system 1100 may include any number of wired or wireless networks, network nodes, UEs, and / or any other components or systems that may facilitate or participate in the communication of data and / or signals whether via wired or wireless connections. The communication system 2100 may include and / or interface with any type of communication, telecommunication, data, cellular, radio network, and / or other similar type of system.

[0054] The UEs 2112 may be any of a wide variety of communication devices, including wireless devices arranged, configured, and / or operable to communicate wirelessly with the network nodes 2110 and other communication devices. Similarly, the network nodes 2110 are arranged, capable, configured, and / or operable to communicate directly or indirectly with the UEs 2112 and / or with other network nodes or equipment in the telecommunication network 2102 to enable and / or provide network access, such as wireless network access, and / or to perform other functions, such as administration in the telecommunication network 2102.

[0055] In the depicted example, the core network 2106 connects the network nodes 2110 to one or more hosts, such as host 2116. These connections may be direct or indirect via one or more intermediary networks or devices. In other examples, network nodes may be directlycoupled to hosts. The core network 2106 includes one more core network nodes (e.g., core network node 2108) that are structured with hardware and software components. Features of these components may be substantially similar to those described with respect to the UEs, network nodes, and / or hosts, such that the descriptions thereof are generally applicable to the corresponding components of the core network node 2108. Example core network nodes include functions of one or more of a Mobile Switching Center (MSC), Mobility Management Entity (MME), Home Subscriber Server (HSS), Access and Mobility Management Function (AMF), Session Management Function (SMF), Authentication Server Function (AUSF), Subscription Identifier De-concealing function (SIDF), Unified Data Management (UDM), Security Edge Protection Proxy (SEPP), Network Exposure Function (NEF), and / or a User Plane Function (UPF).

[0056] The host 2116 may be under the ownership or control of a service provider other than an operator or provider of the access network 2104 and / or the telecommunication network 2102, and may be operated by the service provider or on behalf of the service provider. The host 2116 may host a variety of applications to provide one or more service. Examples of such applications include live and pre-recorded audio / video content, data collection services such as retrieving and compiling data on various ambient conditions detected by a plurality of UEs, analytics functionality, social media, functions for controlling or otherwise interacting with remote devices, functions for an alarm and surveillance center, or any other such function performed by a server.

[0057] As a whole, the communication system 2100 of Figure 10 enables connectivity between the UEs, network nodes, and hosts. In that sense, the communication system may be configured to operate according to predefined rules or procedures, such as specific standards that include, but are not limited to: Global System for Mobile Communications (GSM); Universal Mobile Telecommunications System (UMTS); Long Term Evolution (LTE), and / or other suitable 2G, 3G, 4G, 5G standards, or any applicable future generation standard (e.g., 6G); wireless local area network (WLAN) standards, such as the Institute of Electrical and Electronics Engineers (IEEE) 802.11 standards (WiFi); and / or any other appropriate wireless communication standard, such as the Worldwide Interoperability for Microwave Access (WiMax), Bluetooth, Z- Wave, Near Field Communication (NFC) ZigBee, LiFi, and / or any low-power wide-area network (LPWAN) standards such as LoRa and Sigfox.

[0058] In some examples, the telecommunication network 2102 is a cellular network that implements 3GPP standardized features. Accordingly, the telecommunications network 2102 may support network slicing to provide different logical networks to different devices that are connected to the telecommunication network 2102. For example, the telecommunications network 2102 may provide Ultra Reliable Low Latency Communication (URLLC) services to some UEs, while providing Enhanced Mobile Broadband (eMBB) services to other UEs, and / or Massive Machine Type Communication (mMTC) / Massive loT services to yet further UEs.

[0059] In some examples, the UEs 2112 are configured to transmit and / or receive information without direct human interaction. For instance, a UE may be designed to transmit information to the access network 2104 on a predetermined schedule, when triggered by an internal or external event, or in response to requests from the access network 2104. Additionally, a UE may be configured for operating in single- or multi-RAT or multi-standard mode. For example, a UE may operate with any one or combination of Wi-Fi, NR (New Radio) and LTE, i.e. being configured for multi-radio dual connectivity (MR-DC), such as E-UTRAN (Evolved-UMTS Terrestrial Radio Access Network) New Radio - Dual Connectivity (EN-DC).

[0060] In the example, the hub 2114 communicates with the access network 2104 to facilitate indirect communication between one or more UEs (e.g., UE 2112c and / or 2112d) and network nodes (e.g., network node 2110b). In some examples, the hub 2114 may be a controller, router, content source and analytics, or any of the other communication devices described herein regarding UEs. For example, the hub 2114 may be a broadband router enabling access to the core network 2106 for the UEs. As another example, the hub 2114 may be a controller that sends commands or instructions to one or more actuators in the UEs. Commands or instructions may be received from the UEs, network nodes 2110, or by executable code, script, process, or other instructions in the hub 2114. As another example, the hub 2114 may be a data collector that acts as temporary storage for UE data and, in some embodiments, may perform analysis or other processing of the data. As another example, the hub 2114 may be a content source. For example, for a UE that is a VR headset, display, loudspeaker or other media delivery device, the hub 2114 may retrieve VR assets, video, audio, or other media or data related to sensory information via a network node, which the hub 2114 then provides to the UE either directly, after performing local processing, and / or after adding additional local content. In still another example, the hub 2114 actsas a proxy server or orchestrator for the UEs, in particular in if one or more of the UEs are low energy loT devices.

[0061] The hub 2114 may have a constant / persistent or intermittent connection to the network node 2110b. The hub 2114 may also allow for a different communication scheme and / or schedule between the hub 2114 and UEs (e.g., UE 2112c and / or 2112d), and between the hub 2114 and the core network 2106. In other examples, the hub 2114 is connected to the core network 2106 and / or one or more UEs via a wired connection. Moreover, the hub 2114 may be configured to connect to an M2M service provider over the access network 1104 and / or to another UE over a direct connection. In some scenarios, UEs may establish a wireless connection with the network nodes 2110 while still connected via the hub 2114 via a wired or wireless connection. In some embodiments, the hub 2114 may be a dedicated hub - that is, a hub whose primary function is to route communications to / from the UEs from / to the network node 2110b. In other embodiments, the hub 2114 may be a non-dedicated hub - that is, a device which is capable of operating to route communications between the UEs and network node 2110b, but which is additionally capable of operating as a communication start and / or end point for certain data channels.

[0062] Figure 11 shows a UE 2200 in accordance with some embodiments. As used herein, a UE refers to a device capable, configured, arranged and / or operable to communicate wirelessly with network nodes and / or other UEs. Examples of a UE include, but are not limited to, a smart phone, mobile phone, cell phone, voice over IP (VoIP) phone, wireless local loop phone, desktop computer, personal digital assistant (PDA), wireless cameras, gaming console or device, music storage device, playback appliance, wearable terminal device, wireless endpoint, mobile station, tablet, laptop, laptop-embedded equipment (LEE), laptop-mounted equipment (LME), smart device, wireless customer-premise equipment (CPE), vehicle-mounted or vehicle embedded / integrated wireless device, etc. Other examples include any UE identified by the 3rd Generation Partnership Project (3GPP), including a narrow band internet of things (NB-IoT) UE, a machine type communication (MTC) UE, and / or an enhanced MTC (eMTC) UE.

[0063] A UE may support device-to-device (D2D) communication, for example by implementing a 3 GPP standard for sidelink communication, Dedicated Short-Range Communication (DSRC), vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), or vehicle-to- everything (V2X). In other examples, a UE may not necessarily have a user in the sense of a humanuser who owns and / or operates the relevant device. Instead, a UE may represent a device that is intended for sale to, or operation by, a human user but which may not, or which may not initially, be associated with a specific human user (e.g., a smart sprinkler controller). Alternatively, a UE may represent a device that is not intended for sale to, or operation by, an end user but which may be associated with or operated for the benefit of a user (e.g., a smart power meter).

[0064] The UE 2200 includes processing circuitry 2202 that is operatively coupled via a bus 2204 to an input / output interface 2206, a power source 2208, a memory 2210, a communication interface 2212, and / or any other component, or any combination thereof. Certain UEs may utilize all or a subset of the components shown in Figure 10. The level of integration between the components may vary from one UE to another UE. Further, certain UEs may contain multiple instances of a component, such as multiple processors, memories, transceivers, transmitters, receivers, etc.

[0065] The processing circuitry 2202 is configured to process instructions and data and may be configured to implement any sequential state machine operative to execute instructions stored as machine- readable computer programs in the memory 2210. The processing circuitry 2202 may be implemented as one or more hardware-implemented state machines (e.g., in discrete logic, field-programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), etc.); programmable logic together with appropriate firmware; one or more stored computer programs, general-purpose processors, such as a microprocessor or digital signal processor (DSP), together with appropriate software; or any combination of the above. For example, the processing circuitry 2202 may include multiple central processing units (CPUs).

[0066] In the example, the input / output interface 2206 may be configured to provide an interface or interfaces to an input device, output device, or one or more input and / or output devices. Examples of an output device include a speaker, a sound card, a video card, a display, a monitor, a printer, an actuator, an emitter, a smartcard, another output device, or any combination thereof. An input device may allow a user to capture information into the UE 2200. Examples of an input device include a touch-sensitive or presence-sensitive display, a camera (e.g., a digital camera, a digital video camera, a web camera, etc.), a microphone, a sensor, a mouse, a trackball, a directional pad, a trackpad, a scroll wheel, a smartcard, and the like. The presencesensitive display may include a capacitive or resistive touch sensor to sense input from a user. A sensor may be, for instance, an accelerometer, a gyroscope, a tilt sensor, a force sensor, amagnetometer, an optical sensor, a proximity sensor, a biometric sensor, etc., or any combination thereof. An output device may use the same type of interface port as an input device. For example, a Universal Serial Bus (USB) port may be used to provide an input device and an output device.

[0067] In some embodiments, the power source 2208 is structured as a battery or battery pack. Other types of power sources, such as an external power source (e.g., an electricity outlet), photovoltaic device, or power cell, may be used. The power source 2208 may further include power circuitry for delivering power from the power source 2208 itself, and / or an external power source, to the various parts of the UE 2200 via input circuitry or an interface such as an electrical power cable. Delivering power may be, for example, for charging of the power source 2208. Power circuitry may perform any formatting, converting, or other modification to the power from the power source 2208 to make the power suitable for the respective components of the UE 2200 to which power is supplied.

[0068] The memory 2210 may be or be configured to include memory such as random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic disks, optical disks, hard disks, removable cartridges, flash drives, and so forth. In one example, the memory 2210 includes one or more application programs 2214, such as an operating system, web browser application, a widget, gadget engine, or other application, and corresponding data 2216. The memory 2210 may store, for use by the UE 2200, any of a variety of various operating systems or combinations of operating systems.

[0069] The memory 2210 may be configured to include a number of physical drive units, such as redundant array of independent disks (RAID), flash memory, USB flash drive, external hard disk drive, thumb drive, pen drive, key drive, high-density digital versatile disc (HD- DVD) optical disc drive, internal hard disk drive, Blu-Ray optical disc drive, holographic digital data storage (HDDS) optical disc drive, external mini-dual in-line memory module (DIMM), synchronous dynamic random access memory (SDRAM), external micro-DIMM SDRAM, smartcard memory such as tamper resistant module in the form of a universal integrated circuit card (UICC) including one or more subscriber identity modules (SIMs), such as a USIM and / or ISIM, other memory, or any combination thereof. The UICC may for example be an embedded UICC (eUICC), integrated UICC (iUICC) or a removable UICC commonly known as ‘SIM card.’The memory 2210 may allow the UE 2200 to access instructions, application programs and the like, stored on transitory or non-transitory memory media, to off-load data, or to upload data. An article of manufacture, such as one utilizing a communication system may be tangibly embodied as or in the memory 2210, which may be or comprise a device-readable storage medium.

[0070] The processing circuitry 2202 may be configured to communicate with an access network or other network using the communication interface 2212. The communication interface 2212 may comprise one or more communication subsystems and may include or be communicatively coupled to an antenna 2222. The communication interface 2212 may include one or more transceivers used to communicate, such as by communicating with one or more remote transceivers of another device capable of wireless communication (e.g., another UE or a network node in an access network). Each transceiver may include a transmitter 2218 and / or a receiver 2220 appropriate to provide network communications (e.g., optical, electrical, frequency allocations, and so forth). Moreover, the transmitter 2218 and receiver 2220 may be coupled to one or more antennas (e.g., antenna 2222) and may share circuit components, software or firmware, or alternatively be implemented separately.

[0071] In the illustrated embodiment, communication functions of the communication interface 2212 may include cellular communication, Wi-Fi communication, LPWAN communication, data communication, voice communication, multimedia communication, short-range communications such as Bluetooth, near-field communication, location-based communication such as the use of the global positioning system (GPS) to determine a location, another like communication function, or any combination thereof. Communications may be implemented in according to one or more communication protocols and / or standards, such as IEEE 802.11, Code Division Multiplexing Access (CDMA), Wideband Code Division Multiple Access (WCDMA), GSM, LTE, New Radio (NR), UMTS, WiMax, Ethernet, transmission control protocol / internet protocol (TCP / IP), synchronous optical networking (SONET), Asynchronous Transfer Mode (ATM), QUIC, Hypertext Transfer Protocol (HTTP), and so forth.

[0072] Regardless of the type of sensor, a UE may provide an output of data captured by its sensors, through its communication interface 2212, via a wireless connection to a network node. Data captured by sensors of a UE can be communicated through a wireless connection to a network node via another UE. The output may be periodic (e.g., once every 15 minutes if it reports the sensed temperature), random (e.g., to even out the load from reportingfrom several sensors), in response to a triggering event (e.g., when moisture is detected an alert is sent), in response to a request (e.g., a user initiated request), or a continuous stream (e.g., a live video feed of a patient).

[0073] As another example, a UE comprises an actuator, a motor, or a switch, related to a communication interface configured to receive wireless input from a network node via a wireless connection. In response to the received wireless input the states of the actuator, the motor, or the switch may change. For example, the UE may comprise a motor that adjusts the control surfaces or rotors of a drone in flight according to the received input or to a robotic arm performing a medical procedure according to the received input.

[0074] A UE, when in the form of an Internet of Things (loT) device, may be a device for use in one or more application domains, these domains comprising, but not limited to, city wearable technology, extended industrial application and healthcare. Non-limiting examples of such an loT device are a device which is or which is embedded in: a connected refrigerator or freezer, a TV, a connected lighting device, an electricity meter, a robot vacuum cleaner, a voice controlled smart speaker, a home security camera, a motion detector, a thermostat, a smoke detector, a door / window sensor, a flood / moisture sensor, an electrical door lock, a connected doorbell, an air conditioning system like a heat pump, an autonomous vehicle, a surveillance system, a weather monitoring device, a vehicle parking monitoring device, an electric vehicle charging station, a smart watch, a fitness tracker, a head-mounted display for Augmented Reality (AR) or Virtual Reality (VR), a wearable for tactile augmentation or sensory enhancement, a water sprinkler, an animal- or item-tracking device, a sensor for monitoring a plant or animal, an industrial robot, an Unmanned Aerial Vehicle (UAV), and any kind of medical device, like a heart rate monitor or a remote controlled surgical robot. A UE in the form of an loT device comprises circuitry and / or software in dependence of the intended application of the loT device in addition to other components as described in relation to the UE 2200 shown in Figure 10.

[0075] As yet another specific example, in an loT scenario, a UE may represent a machine or other device that performs monitoring and / or measurements, and transmits the results of such monitoring and / or measurements to another UE and / or a network node. The UE may in this case be an M2M device, which may in a 3 GPP context be referred to as an MTC device. As one particular example, the UE may implement the 3 GPP NB-IoT standard. In other scenarios, a UE may represent a vehicle, such as a car, a bus, a truck, a ship and an airplane, or other equipmentthat is capable of monitoring and / or reporting on its operational status or other functions associated with its operation.

[0076] In practice, any number of UEs may be used together with respect to a single use case. For example, a first UE might be or be integrated in a drone and provide the drone’s speed information (obtained through a speed sensor) to a second UE that is a remote controller operating the drone. When the user makes changes from the remote controller, the first UE may adjust the throttle on the drone (e.g. by controlling an actuator) to increase or decrease the drone’s speed. The first and / or the second UE can also include more than one of the functionalities described above. For example, a UE might comprise the sensor and the actuator, and handle communication of data for both the speed sensor and the actuators.

[0077] Figure 12 shows a network node 3300 in accordance with some embodiments. As used herein, network node refers to equipment capable, configured, arranged and / or operable to communicate directly or indirectly with a UE and / or with other network nodes or equipment, in a telecommunication network. Examples of network nodes include, but are not limited to, access points (APs) (e.g., radio access points), base stations (BSs) (e.g., radio base stations, Node Bs, evolved Node Bs (eNBs) and NR NodeBs (gNBs)).

[0078] Base stations may be categorized based on the amount of coverage they provide (or, stated differently, their transmit power level) and so, depending on the provided amount of coverage, may be referred to as femto base stations, pico base stations, micro base stations, or macro base stations. A base station may be a relay node or a relay donor node controlling a relay. A network node may also include one or more (or all) parts of a distributed radio base station such as centralized digital units and / or remote radio units (RRUs), sometimes referred to as Remote Radio Heads (RRHs). Such remote radio units may or may not be integrated with an antenna as an antenna integrated radio. Parts of a distributed radio base station may also be referred to as nodes in a distributed antenna system (DAS).

[0079] Other examples of network nodes include multiple transmission point (multi-TRP) 5G access nodes, multi-standard radio (MSR) equipment such as MSRBSs, network controllers such as radio network controllers (RNCs) or base station controllers (BSCs), base transceiver stations (BTSs), transmission points, transmission nodes, multi-cell / multicast coordination entities (MCEs), Operation and Maintenance (O&M) nodes, Operations SupportSystem (OSS) nodes, Self-Organizing Network (SON) nodes, positioning nodes (e.g., Evolved Serving Mobile Location Centers (E-SMLCs)), and / or Minimization of Drive Tests (MDTs).

[0080] The network node 3300 includes a processing circuitry 3302, a memory 3304, a communication interface 3306, and a power source 3308. The network node 3300 may be composed of multiple physically separate components (e.g., a NodeB component and a RNC component, or a BTS component and a BSC component, etc.), which may each have their own respective components. In certain scenarios in which the network node 3300 comprises multiple separate components (e.g., BTS and BSC components), one or more of the separate components may be shared among several network nodes. For example, a single RNC may control multiple NodeBs. In such a scenario, each unique NodeB and RNC pair, may in some instances be considered a single separate network node. In some embodiments, the network node 1300 may be configured to support multiple radio access technologies (RATs). In such embodiments, some components may be duplicated (e.g., separate memory 3304 for different RATs) and some components may be reused (e.g., a same antenna 3310 may be shared by different RATs). The network node 3300 may also include multiple sets of the various illustrated components for different wireless technologies integrated into network node 1300, for example GSM, WCDMA, LTE, NR, WiFi, Zigbee, Z-wave, LoRaWAN, Radio Frequency Identification (RFID) or Bluetooth wireless technologies. These wireless technologies may be integrated into the same or different chip or set of chips and other components within network node 1300.

[0081] The processing circuitry 3302 may comprise a combination of one or more of a microprocessor, controller, microcontroller, central processing unit, digital signal processor, application-specific integrated circuit, field programmable gate array, or any other suitable computing device, resource, or combination of hardware, software and / or encoded logic operable to provide, either alone or in conjunction with other network node 3300 components, such as the memory 3304, to provide network node 3300 functionality.

[0082] In some embodiments, the processing circuitry 3302 includes a system on a chip (SOC). In some embodiments, the processing circuitry 3302 includes one or more of radio frequency (RF) transceiver circuitry 3312 and baseband processing circuitry 3314. In some embodiments, the radio frequency (RF) transceiver circuitry 3312 and the baseband processing circuitry 3314 may be on separate chips (or sets of chips), boards, or units, such as radio units anddigital units. In alternative embodiments, part or all of RF transceiver circuitry 3312 and baseband processing circuitry 3314 may be on the same chip or set of chips, boards, or units.

[0083] The memory 3304 may comprise any form of volatile or non-volatile computer-readable memory including, without limitation, persistent storage, solid-state memory, remotely mounted memory, magnetic media, optical media, random access memory (RAM), readonly memory (ROM), mass storage media (for example, a hard disk), removable storage media (for example, a flash drive, a Compact Disk (CD) or a Digital Video Disk (DVD)), and / or any other volatile or non-volatile, non-transitory device-readable and / or computer-executable memory devices that store information, data, and / or instructions that may be used by the processing circuitry 3302. The memory 3304 may store any suitable instructions, data, or information, including a computer program, software, an application including one or more of logic, rules, code, tables, and / or other instructions capable of being executed by the processing circuitry 3302 and utilized by the network node 3300. The memory 3304 may be used to store any calculations made by the processing circuitry 3302 and / or any data received via the communication interface 3306. In some embodiments, the processing circuitry 3302 and memory 3304 is integrated.

[0084] The communication interface 3306 is used in wired or wireless communication of signaling and / or data between a network node, access network, and / or UE. As illustrated, the communication interface 3306 comprises port(s) / terminal(s) 3316 to send and receive data, for example to and from a network over a wired connection. The communication interface 3306 also includes radio front-end circuitry 3318 that may be coupled to, or in certain embodiments a part of, the antenna 3310. Radio front-end circuitry 3318 comprises filters 3320 and amplifiers 3322. The radio front-end circuitry 3318 may be connected to an antenna 3310 and processing circuitry 3302. The radio front-end circuitry may be configured to condition signals communicated between antenna 3310 and processing circuitry 3302. The radio front-end circuitry 3318 may receive digital data that is to be sent out to other network nodes or UEs via a wireless connection. The radio front-end circuitry 3318 may convert the digital data into a radio signal having the appropriate channel and bandwidth parameters using a combination of filters 3320 and / or amplifiers 3322. The radio signal may then be transmitted via the antenna 3310. Similarly, when receiving data, the antenna 3310 may collect radio signals which are then converted into digital data by the radio front-end circuitry 3318. The digital data may be passed to the processingcircuitry 3302. In other embodiments, the communication interface may comprise different components and / or different combinations of components.

[0085] In certain alternative embodiments, the network node 3300 does not include separate radio front-end circuitry 3318, instead, the processing circuitry 3302 includes radio frontend circuitry and is connected to the antenna 3310. Similarly, in some embodiments, all or some of the RF transceiver circuitry 3312 is part of the communication interface 3306. In still other embodiments, the communication interface 3306 includes one or more ports or terminals 3316, the radio front-end circuitry 3318, and the RF transceiver circuitry 3312, as part of a radio unit (not shown), and the communication interface 3306 communicates with the baseband processing circuitry 3314, which is part of a digital unit (not shown).

[0086] The antenna 3310 may include one or more antennas, or antenna arrays, configured to send and / or receive wireless signals. The antenna 3310 may be coupled to the radio front-end circuitry 3318 and may be any type of antenna capable of transmitting and receiving data and / or signals wirelessly. In certain embodiments, the antenna 3310 is separate from the network node 3300 and connectable to the network node 3300 through an interface or port.

[0087] The antenna 3310, communication interface 3306, and / or the processing circuitry 3302 may be configured to perform any receiving operations and / or certain obtaining operations described herein as being performed by the network node. Any information, data and / or signals may be received from a UE, another network node and / or any other network equipment. Similarly, the antenna 3310, the communication interface 3306, and / or the processing circuitry 3302 may be configured to perform any transmitting operations described herein as being performed by the network node. Any information, data and / or signals may be transmitted to a UE, another network node and / or any other network equipment.

[0088] The power source 3308 provides power to the various components of network node 3300 in a form suitable for the respective components (e.g., at a voltage and current level needed for each respective component). The power source 3308 may further comprise, or be coupled to, power management circuitry to supply the components of the network node 3300 with power for performing the functionality described herein. For example, the network node 3300 may be connectable to an external power source (e.g., the power grid, an electricity outlet) via an input circuitry or interface such as an electrical cable, whereby the external power source supplies power to power circuitry of the power source 3308. As a further example, the power source 3308 maycomprise a source of power in the form of a battery or battery pack which is connected to, or integrated in, power circuitry. The battery may provide backup power should the external power source fail.

[0089] Embodiments of the network node 3300 may include additional components beyond those shown in Figure 12 for providing certain aspects of the network node’s functionality, including any of the functionality described herein and / or any functionality necessary to support the subject matter described herein. For example, the network node 3300 may include user interface equipment to allow input of information into the network node 3300 and to allow output of information from the network node 3300. This may allow a user to perform diagnostic, maintenance, repair, and other administrative functions for the network node 3300.

[0090] Figure 13 is a block diagram of a host 4400, which may be an embodiment of the host 2116 of Figure 10, in accordance with various aspects described herein. As used herein, the host 4400 may be or comprise various combinations hardware and / or software, including a standalone server, a blade server, a cloud-implemented server, a distributed server, a virtual machine, container, or processing resources in a server farm. The host 4400 may provide one or more services to one or more UEs.

[0091] The host 4400 includes processing circuitry 4402 that is operatively coupled via a bus 4404 to an input / output interface 4406, a network interface 4408, a power source 4410, and a memory 4412. Other components may be included in other embodiments. Features of these components may be substantially similar to those described with respect to the devices of previous figures, such as Figures 11 and 12, such that the descriptions thereof are generally applicable to the corresponding components of host 4400.

[0092] The memory 4412 may include one or more computer programs including one or more host application programs 4414 and data 4416, which may include user data, e.g., data generated by a UE for the host 4400 or data generated by the host 4400 for a UE. Embodiments of the host 4400 may utilize only a subset or all of the components shown. The host application programs 4414 may be implemented in a container-based architecture and may provide support for video codecs (e.g., Versatile Video Coding (WC), High Efficiency Video Coding (HEVC), Advanced Video Coding (AVC), MPEG, VP9) and audio codecs (e.g., FLAC, Advanced Audio Coding (AAC), MPEG, G.711), including transcoding for multiple different classes, types, or implementations of UEs (e.g., handsets, desktop computers, wearable display systems, heads-updisplay systems). The host application programs 4414 may also provide for user authentication and licensing checks and may periodically report health, routes, and content availability to a central node, such as a device in or on the edge of a core network. Accordingly, the host 4400 may select and / or indicate a different host for over-the-top services for a UE. The host application programs 4414 may support various protocols, such as the HTTP Live Streaming (HLS) protocol, Real-Time Messaging Protocol (RTMP), Real-Time Streaming Protocol (RTSP), Dynamic Adaptive Streaming over HTTP (MPEG-DASH), etc.

[0093] Figure 14 is a block diagram illustrating a virtualization environment 5500 in which functions implemented by some embodiments may be virtualized. In the present context, virtualizing means creating virtual versions of apparatuses or devices which may include virtualizing hardware platforms, storage devices and networking resources. As used herein, virtualization can be applied to any device described herein, or components thereof, and relates to an implementation in which at least a portion of the functionality is implemented as one or more virtual components. Some or all of the functions described herein may be implemented as virtual components executed by one or more virtual machines (VMs) implemented in one or more virtual environments 5500 hosted by one or more of hardware nodes, such as a hardware computing device that operates as a network node, UE, core network node, or host. Further, in embodiments in which the virtual node does not require radio connectivity (e.g., a core network node or host), then the node may be entirely virtualized.

[0094] Applications 5502 (which may alternatively be called software instances, virtual appliances, network functions, virtual nodes, virtual network functions, etc.) are run in the virtualization environment 5500 to implement some of the features, functions, and / or benefits of some of the embodiments disclosed herein.

[0095] Hardware 5504 includes processing circuitry, memory that stores software and / or instructions executable by hardware processing circuitry, and / or other hardware devices as described herein, such as a network interface, input / output interface, and so forth. Software may be executed by the processing circuitry to instantiate one or more virtualization layers 5506 (also referred to as hypervisors or virtual machine monitors (VMMs)), provide VMs 5508a and 5508b (one or more of which may be generally referred to as VMs 5508), and / or perform any of the functions, features and / or benefits described in relation with some embodiments described herein.The virtualization layer 5506 may present a virtual operating platform that appears like networking hardware to the VMs 5508.

[0096] The VMs 5508 comprise virtual processing, virtual memory, virtual networking or interface and virtual storage, and may be run by a corresponding virtualization layer 5506. Different embodiments of the instance of a virtual appliance 5502 may be implemented on one or more of VMs 5508, and the implementations may be made in different ways. Virtualization of the hardware is in some contexts referred to as network function virtualization (NFV). NFV may be used to consolidate many network equipment types onto industry standard high volume server hardware, physical switches, and physical storage, which can be located in data centers, and customer premise equipment.

[0097] In the context of NFV, a VM 5508 may be a software implementation of a physical machine that runs programs as if they were executing on a physical, non-virtualized machine. Each of the VMs 5508, and that part of hardware 5504 that executes that VM, be it hardware dedicated to that VM and / or hardware shared by that VM with others of the VMs, forms separate virtual network elements. Still in the context of NFV, a virtual network function is responsible for handling specific network functions that run in one or more VMs 5508 on top of the hardware 5504 and corresponds to the application 5502.

[0098] Hardware 5504 may be implemented in a standalone network node with generic or specific components. Hardware 5504 may implement some functions via virtualization. Alternatively, hardware 5504 may be part of a larger cluster of hardware (e.g., such as in a data center or CPE) where many hardware nodes work together and are managed via management and orchestration 5510, which, among others, oversees lifecycle management of applications 5502. In some embodiments, hardware 5504 is coupled to one or more radio units that each include one or more transmitters and one or more receivers that may be coupled to one or more antennas. Radio units may communicate directly with other hardware nodes via one or more appropriate network interfaces and may be used in combination with the virtual components to provide a virtual node with radio capabilities, such as a radio access node or a base station. In some embodiments, some signaling can be provided with the use of a control system 5512 which may alternatively be used for communication between hardware nodes and radio units.

[0099] Figure 15 shows a communication diagram of a host 6602 communicating via a network node 6604 with a UE 6606 over a partially wireless connection in accordance withsome embodiments. Example implementations, in accordance with various embodiments, of the UE (such as a UE 2112a of Figure 10 and / or UE 2200 of Figure 11), network node (such as network node 2110a of Figure 10 and / or network node 3300 of Figure 12), and host (such as host 2116 of Figure 10 and / or host 4400 of Figure 13) discussed in the preceding paragraphs will now be described with reference to Figure 15.[000100] Like host 4400, embodiments of host 6602 include hardware, such as a communication interface, processing circuitry, and memory. The host 6602 also includes software, which is stored in or accessible by the host 6602 and executable by the processing circuitry. The software includes a host application that may be operable to provide a service to a remote user, such as the UE 6606 connecting via an over-the-top (OTT) connection 6650 extending between the UE 6606 and host 6602. In providing the service to the remote user, a host application may provide user data which is transmitted using the OTT connection 6650.[000101] The network node 6604 includes hardware enabling it to communicate with the host 6602 and UE 6606. The connection 6660 may be direct or pass through a core network (like core network 2106 of Figure 10) and / or one or more other intermediate networks, such as one or more public, private, or hosted networks. For example, an intermediate network may be a backbone network or the Internet.[000102] The UE 6606 includes hardware and software, which is stored in or accessible by UE 6606 and executable by the UE’s processing circuitry. The software includes a client application, such as a web browser or operator-specific “app” that may be operable to provide a service to a human or non-human user via UE 6606 with the support of the host 6602. In the host 6602, an executing host application may communicate with the executing client application via the OTT connection 6650 terminating at the UE 6606 and host 6602. In providing the service to the user, the UE's client application may receive request data from the host's host application and provide user data in response to the request data. The OTT connection 6650 may transfer both the request data and the user data. The UE's client application may interact with the user to generate the user data that it provides to the host application through the OTT connection 6650.[000103] The OTT connection 6650 may extend via a connection 6660 between the host 6602 and the network node 6604 and via a wireless connection 6670 between the network node 6604 and the UE 6606 to provide the connection between the host 6602 and the UE 6606.The connection 6660 and wireless connection 6670, over which the OTT connection 6650 may be provided, have been drawn abstractly to illustrate the communication between the host 6602 and the UE 1606 via the network node 6604, without explicit reference to any intermediary devices and the precise routing of messages via these devices.[000104] As an example of transmitting data via the OTT connection 6650, in step 6608, the host 6602 provides user data, which may be performed by executing a host application. In some embodiments, the user data is associated with a particular human user interacting with the UE 6606. In other embodiments, the user data is associated with a UE 6606 that shares data with the host 6602 without explicit human interaction. In step 6610, the host 6602 initiates a transmission carrying the user data towards the UE 6606. The host 6602 may initiate the transmission responsive to a request transmitted by the UE 6606. The request may be caused by human interaction with the UE 6606 or by operation of the client application executing on the UE 6606. The transmission may pass via the network node 6604, in accordance with the teachings of the embodiments described throughout this disclosure. Accordingly, in step 6612, the network node 6604 transmits to the UE 6606 the user data that was carried in the transmission that the host 6602 initiated, in accordance with the teachings of the embodiments described throughout this disclosure. In step 6614, the UE 6606 receives the user data carried in the transmission, which may be performed by a client application executed on the UE 6606 associated with the host application executed by the host 6602.[000105] In some examples, the UE 6606 executes a client application which provides user data to the host 6602. The user data may be provided in reaction or response to the data received from the host 6602. Accordingly, in step 6616, the UE 6606 may provide user data, which may be performed by executing the client application. In providing the user data, the client application may further consider user input received from the user via an input / output interface of the UE 6606. Regardless of the specific manner in which the user data was provided, the UE 6606 initiates, in step 6618, transmission of the user data towards the host 6602 via the network node 6604. In step 6620, in accordance with the teachings of the embodiments described throughout this disclosure, the network node 6604 receives user data from the UE 6606 and initiates transmission of the received user data towards the host 6602. In step 6622, the host 6602 receives the user data carried in the transmission initiated by the UE 6606.[000106] One or more of the various embodiments improve the performance of OTT services provided to the UE 6606 using the OTT connection 6650, in which the wireless connection 6670 forms the last segment. More precisely, the teachings of these embodiments may improve the data rate, latency, and / or power consumption and thereby provide benefits such as reduced user waiting time, relaxed restriction on file size, improved content resolution, better responsiveness, and / or extended battery lifetime.[000107] In an example scenario, factory status information may be collected and analyzed by the host 6602. As another example, the host 6602 may process audio and video data which may have been retrieved from a UE for use in creating maps. As another example, the host 6602 may collect and analyze real-time data to assist in controlling vehicle congestion (e.g., controlling traffic lights). As another example, the host 6602 may store surveillance video uploaded by a UE. As another example, the host 6602 may store or control access to media content such as video, audio, VR or AR which it can broadcast, multicast or unicast to UEs. As other examples, the host 6602 may be used for energy pricing, remote control of non-time critical electrical load to balance power generation needs, location services, presentation services (such as compiling diagrams etc. from data collected from remote devices), or any other function of collecting, retrieving, storing, analyzing and / or transmitting data.[000108] In some examples, a measurement procedure may be provided for the purpose of monitoring data rate, latency and other factors on which the one or more embodiments improve. There may further be an optional network functionality for reconfiguring the OTT connection 6650 between the host 6602 and UE 6606, in response to variations in the measurement results. The measurement procedure and / or the network functionality for reconfiguring the OTT connection may be implemented in software and hardware of the host 6602 and / or UE 6606. In some embodiments, sensors (not shown) may be deployed in or in association with other devices through which the OTT connection 6650 passes; the sensors may participate in the measurement procedure by supplying values of the monitored quantities exemplified above, or supplying values of other physical quantities from which software may compute or estimate the monitored quantities. The reconfiguring of the OTT connection 6650 may include message format, retransmission settings, preferred routing etc.; the reconfiguring need not directly alter the operation of the network node 6604. Such procedures and functionalities may be known and practiced in the art. In certain embodiments, measurements may involve proprietary UE signalingthat facilitates measurements of throughput, propagation times, latency and the like, by the host 6602. The measurements may be implemented in that software causes messages to be transmitted, in particular empty or ‘dummy’ messages, using the OTT connection 6650 while monitoring propagation times, errors, etc.[000109] Although the computing devices described herein (e.g., UEs, network nodes, hosts) may include the illustrated combination of hardware components, other embodiments may comprise computing devices with different combinations of components. It is to be understood that these computing devices may comprise any suitable combination of hardware and / or software needed to perform the tasks, features, functions and methods disclosed herein. Determining, calculating, obtaining or similar operations described herein may be performed by processing circuitry, which may process information by, for example, converting the obtained information into other information, comparing the obtained information or converted information to information stored in the network node, and / or performing one or more operations based on the obtained information or converted information, and as a result of said processing making a determination. Moreover, while components are depicted as single boxes located within a larger box, or nested within multiple boxes, in practice, computing devices may comprise multiple different physical components that make up a single illustrated component, and functionality may be partitioned between separate components. For example, a communication interface may be configured to include any of the components described herein, and / or the functionality of the components may be partitioned between the processing circuitry and the communication interface. In another example, non-computationally intensive functions of any of such components may be implemented in software or firmware and computationally intensive functions may be implemented in hardware.[000110] In certain embodiments, some or all of the functionality described herein may be provided by processing circuitry executing instructions stored on in memory, which in certain embodiments may be a computer program product in the form of a non-transitory computer-readable storage medium. In alternative embodiments, some or all of the functionality may be provided by the processing circuitry without executing instructions stored on a separate or discrete device-readable storage medium, such as in a hard-wired manner. In any of those particular embodiments, whether executing instructions stored on a non-transitory computer- readable storage medium or not, the processing circuitry can be configured to perform thedescribed functionality. The benefits provided by such functionality are not limited to the processing circuitry alone or to other components of the computing device, but are enjoyed by the computing device as a whole, and / or by end users and a wireless network generally.[000111] It will be appreciated that computer systems are increasingly taking a wide variety of forms. In this description and in the claims, the terms “controller,” “computer system,” or “computing system” are defined broadly as including any device or system — or combination thereof — that includes at least one physical and tangible processor and a physical and tangible memory capable of having thereon computer-executable instructions that may be executed by a processor. By way of example, not limitation, the term “computer system” or “computing system,” as used herein is intended to include personal computers, desktop computers, laptop computers, tablets, hand-held devices (e.g., mobile telephones, PDAs, pagers), microprocessor-based or programmable consumer electronics, minicomputers, mainframe computers, multi-processor systems, network PCs, distributed computing systems, datacenters, message processors, routers, switches, and even devices that conventionally have not been considered a computing system, such as wearables (e.g., glasses).[000112] The computing system also has thereon multiple structures often referred to as an “executable component.” For instance, the memory of a computing system can include an executable component. The term “executable component” is the name for a structure that is well understood to one of ordinary skill in the art in the field of computing as being a structure that can be software, hardware, or a combination thereof. For instance, when implemented in software, one of ordinary skill in the art would understand that the structure of an executable component may include software objects, routines, methods, and so forth, that may be executed by one or more processors on the computing system, whether such an executable component exists in the heap of a computing system, or whether the executable component exists on computer-readable storage media. The structure of the executable component exists on a computer-readable medium in such a form that it is operable, when executed by one or more processors of the computing system, to cause the computing system to perform one or more functions, such as the functions and methods described herein. Such a structure may be computer-readable directly by a processor — as is the case if the executable component were binary. Alternatively, the structure may be structured to be interpretable and / or compiled — whether in a single stage or in multiple stages — so as to generate such binary that is directly interpretable by a processor.[000113] The terms “component,” “service,” “engine,” “module,” “control,” “generator,” or the like may also be used in this description. As used in this description and in this case, these terms — whether expressed with or without a modifying clause — are also intended to be synonymous with the term “executable component” and thus also have a structure that is well understood by those of ordinary skill in the art of computing.[000114] In terms of computer implementation, a computer is generally understood to comprise one or more processors or one or more controllers, and the terms computer, processor, and controller may be employed interchangeably. When provided by a computer, processor, or controller, the functions may be provided by a single dedicated computer or processor or controller, by a single shared computer or processor or controller, or by a plurality of individual computers or processors or controllers, some of which may be shared or distributed. Moreover, the term “processor” or “controller” also refers to other hardware capable of performing such functions and / or executing software, such as the example hardware recited above.[000115] In general, the various exemplary embodiments may be implemented in hardware or special purpose chips, circuits, software, logic, or any combination thereof. For example, some aspects may be implemented in hardware, while other aspects may be implemented in firmware or software which may be executed by a controller, microprocessor, or other computing device, although the disclosure is not limited thereto. While various aspects of the exemplary embodiments of this disclosure may be illustrated and described as block diagrams, flow charts, or using some other pictorial representation, it is well understood that these blocks, apparatus, systems, techniques, or methods described herein may be implemented in, as nonlimiting examples, hardware, software, firmware, special purpose circuits or logic, general purpose hardware or controller or other computing devices, or some combination thereof.[000116] While not all computing systems require a user interface, in some embodiments a computing system includes a user interface for use in communicating information from / to a user. The user interface may include output mechanisms as well as input mechanisms. The principles described herein are not limited to the precise output mechanisms or input mechanisms as such will depend on the nature of the device. However, output mechanisms might include, for instance, speakers, displays, tactile output, projections, holograms, and so forth. Examples of input mechanisms might include, for instance, microphones, touchscreens,projections, holograms, cameras, keyboards, stylus, mouse, or other pointer input, sensors of any type, and so forth.

Claims

CLAIMSWhat is claimed is:

1. A computer-implemented method (1200) for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components, the method comprising: receiving (1210) one or more initial conditions from a user, the one or more initial conditions identifying one or more target applications and corresponding computing resources to be dedicated to the one or more target applications; periodically collecting (1220) one or more metrics from the processor chip; periodically creating (1230) a signal defining an uncore frequency based at least in part on the one or more metrics and the one or more initial conditions, wherein the signal is configured to not degrade the quality of service of the one or more target applications; and periodically applying (1240) the uncore frequency to the one or more uncore components.

2. The method of claim 1, wherein the one or more metrics are related to at least one of: the one or more target applications; an uncore frequency; the one or more core components; the one or more uncore components; a memory power consumption; one or more memory-related metrics; one or more per-core metrics; one or more per-application metrics; one or more uncore frequency domain metrics; one or more socket metrics; one or more performance metrics of the processor chip.

3. The method of claim 1 or 2, wherein the one or more initial conditions include at least one of: one or more configurable parameters; one or more maximum uncore frequencies; one or more minimum uncore frequencies; one or more scaling factors; a sampling rate; one or more maximum uncore frequency values for one or more best effort applications; one or more memory bandwidth limits for the one or more best effort applications; one or more reading window sizes; a set of target applications; a set of best effort applications; one or more user-specified maximum uncore frequency values for one or more best effort applications.

4. The method of any of claims 1 to 3, wherein the one or more metrics only relate to one or more critical applications.

5. The method of any of claims 1 to 4, wherein the one or more metrics comprise one or more of: Instructions Per Cycle, IPC; Local Memory Bandwidth, LMBW; Remote Memory Bandwidth, RMBW.

6. The method of any of claims 1 to 5, wherein if only best effort applications are being performed, then the uncore frequency is set to a user-specified frequency.

7. The method of any of claims 1 to 6, wherein the uncore frequency is set according to the following heuristic:wherein the delta cannot always be exactly zero, so a delta within ±5% can be consideredzero for a state transition decision; and wherein the uncore frequency is scaled-up or scaled-down by a user-specified parameter.

8. The method according to any of claims 1 to 7, wherein the processor chip comprises one or more uncore frequency domains, and each of the one or more uncore frequency domains can be operated with their own unique uncore frequency.

9. A computer-implemented method (1400) for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components, the method comprising: periodically monitoring (1410) Instructions Per Cycle, IPC, and Memory Bandwidth, MBW; calculating (1420) one or more changes in the IPC and BW for one or more critical applications; implementing (1430) one or more uncore frequency scaling decisions based at least in part on the one or more changes.

10. The method of claim 9, wherein the periodically monitoring comprises monitoring at least one of: one or more per-core metrics; one or more per-application metrics.

11. The method of any of claims 9 to 10, further comprising initially operating the processor chip according to one or more initial conditions.

12. The method of claim 11, wherein the one or more initial conditions include at least one of: one or more configurable parameters; one or more maximum uncore frequencies; one or more minimum uncore frequencies; one or more scaling factors; a sampling rate; one or more maximum uncore frequency values for one or more best effort applications; one or more memory bandwidth limits for the one or more best effort applications; one or more reading window sizes; a set of target applications; a set of best effort applications; one or more user-specified maximum uncore frequency values for one or more best effort applications.

13. The method of any of claims 9 to 12, wherein BW comprises at least one of: Local Memory Bandwidth, LMBW; Remote Memory Bandwidth, RMBW.

14. The method according to any of claims 9 to 13, wherein the processor chip comprises one or more uncore frequency domains, and each of the one or more uncore frequency domains can be operated with their own unique uncore frequency.

15. A computer- implemented method (1600) for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components, the method performed by control logic comprising an uncore frequency scaling module, UFSM (250), the method comprising: setting (1610) an uncore frequency to a maximum value; measuring (1620), in each of one or more sampling intervals, Instructions Per Cycle, IPC, and Memory Bandwidth, MBW, of one or more critical applications; taking (1630) a maximum IPC among all measured IPC; taking (1640) a maximum MBW among all measured MBW; taking (1650), for one or more best-effort applications, a sum of all measured MBW; tracking (1660) a Set Point, SP, for both IPC and MBW, wherein SP is a measure of a Simple Moving Average, SMA, of window size, at any point of time, and SP can be used to track the last SMA where the uncore frequency was updated, and the SP acts as a reference point to take decision on whether to increase or decrease the uncore frequency, wherein the SP is computed for the one or more critical applications and the one or more best effort applications; periodically computing (1670) a delta of the IPC and MBW, wherein the delta indicates change since the uncore frequency was adjusted; wherein; the control logic has three states: Max Uncore, Actuate and Balanced; the control logic starts with setting the uncore frequency to a maximum and continuously monitors changes in the IPC and MBW; the control logic switches from one state to another based on observed changes in IPC and MBW; the Max Uncore state comprises the state where it runs at the maximum uncorefrequency; the Actuate state is the state where the module decreases the uncore frequency to save power the Balanced state is the state where the uncore frequency cannot be decreased without degrading performance; the delta cannot always be exactly zero, such that a delta within a predetermined threshold is considered to be zero for taking a state transition decision; and the uncore frequency is scaled-up or scaled-down by a user-specified parameter.

16. A method (1800) for manipulating a current state of a device object, comprising: allocating (1810) memory for a device object corresponding to that device object definition, wherein the device object corresponding to that device object definition comprises a command queue; allocating (1820) a corresponding thread to execute instructions to: track (1830) a current state of the device object corresponding to that device object definition; when the current state of the device object corresponding to that device object definition is the same as a state specified in that device object definition, execute (1840) one or more operations specified for a command specified for the current state of the device object in that device object definition; and determine (1850) whether to update the current state of the device object corresponding to that device object definition based on presence and priority of a command in the command queue comprised by the device object corresponding to that device object definition.

17. The method of claim 16, wherein: each device object definition inherits from a module class definition; and each data object defined by a definition that inherits from the module class definition: is a state machine having states comprising; a Max Uncore state; an Actuate state; anda Balanced state; and comprises a command queue.

18. An uncore frequency scaling module, UFSM (250), for scaling uncore frequency within a processor chip comprising one or more core components and one or more uncore components, comprising: a metrics monitor (220) configured to periodically collect one or more metrics related to one or more critical applications within the processor chip; control logic (210) configured to periodically receive the one or more metrics from the metrics monitor and to receive one or more initial conditions from a user, the control logic further configured to periodically create a signal defining an uncore frequency based at least in part on the one or more metrics and the one or more initial conditions; and a frequency scalar (225) configured to periodically receive the signal from the control logic and further configured to periodically apply the uncore frequency to the one or more uncore components.

19. The UFSM of claim 18, wherein the one or more initial conditions include at least one of: one or more configurable parameters; one or more maximum uncore frequencies; one or more minimum uncore frequencies; one or more scaling factors; a sampling rate; one or more maximum uncore frequency values for one or more best effort applications; one or more memory bandwidth limits for the one or more best effort applications; one or more reading window sizes; a set of target applications; a set of best effort applications; one or more user-specified maximum uncore frequency values for one or more best effort applications.

20. The UFSM of claim 18 or 19, wherein the one or more metrics comprise at least one of: one or more per-core metrics; one or more per-application metrics; Instructions Per Cycle, IPC; Focal Memory Bandwidth, LMBW; Remote Memory Bandwidth, RMBW.

21. The UFSM of any of claims 18 to 20, wherein the control logic is further configured to initially operate according to the one or more initial conditions.

22. The UFSM of any of claims 18 to 21, wherein when running only best effort applications, then the control logic is configured to set the uncore frequency to a user-specified frequency.

23. The UFSM of claim 22 wherein the user-specified frequency is less than or equal to a user- defined value to save power.

24. A system (2200) for scaling processor frequency, comprising: processing circuitry (2202); and a memory (2210), the memory containing instructions executable by the processing circuitry whereby the system is operative to perform any of the steps of any of claims 1 to 17.

25. A non-transitory computer-readable storage medium (2210, 3304) having stored thereon instructions executable by processing circuitry to perform any of claims 1 to 17.

26. A user equipment (2200) for scaling processor frequency, comprising: processing circuitry (2202) configured to perform any of the steps of any of claims 1 to 17; and power supply circuitry (2208) configured to supply power to the processing circuitry.

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