Display device and method for manufacturing same

Abstract

A display device (50) comprises: a base substrate (10); a TFT layer (30) that is provided on the base substrate (10) and that has first metal layers (18a, 18b, 18c, 18d, 18e) made of a first metal material; and a light-emitting element layer (40) that is provided on the TFT layer (30) and that has a plurality of light-emitting elements in which a first electrode (31), a light-emitting function layer (33), and a second electrode (34) are laminated in the stated order, corresponding to a plurality of sub-pixels constituting a display region (D). Side surfaces of the first metal layers (18a, 18b, 18c, 18d, 18e) are provided with oxide films of the first metal material.

Description

Display device and manufacturing method thereof

[0001] The present invention relates to a display device and a manufacturing method thereof.

[0002] In recent years, self-luminous organic electroluminescence (EL) display devices using organic electroluminescence (EL) elements have been attracting attention as a display device that can replace liquid crystal display devices. Here, the organic EL element includes a first electrode provided as an anode, a second electrode provided as a cathode, and an organic EL layer provided between the first electrode and the second electrode.

[0003] For example, Patent Document 1 discloses an organic EL display panel in which a single-layer region consisting of only a reflective metal film is provided in a lower electrode corresponding to the first electrode, and a metal oxide film derived from the metal material that constitutes the reflective metal film is provided on the surface of the reflective metal film in the single-layer region, thereby achieving pixel separation.

[0004] International Publication No. 2012 / 014252

[0005] An organic EL display device includes, for example, a resin substrate, a TFT layer provided on the resin substrate and having a plurality of thin film transistors (hereinafter also referred to as "TFTs") arranged thereon, and an organic EL element layer provided on the TFT layer and having a plurality of organic EL elements arranged thereon. In the organic EL display device, stray light and reflected light emitted from each organic EL element in the organic EL element layer may be further reflected by wiring or the like of the TFT layer and may enter the TFTs constituting the TFT layer, thereby potentially changing the characteristics of the TFTs.

[0006] The present invention has been made in view of the above points, and an object of the present invention is to suppress multiple reflections in the TFT layer and thereby suppress changes in the characteristics of the TFT.

[0007] In order to achieve the above object, the display device of the present invention is a display device comprising a base substrate, a thin-film transistor layer provided on the base substrate and having a first metal layer made of a first metal material, and a light-emitting element layer provided on the thin-film transistor layer and having a plurality of light-emitting elements, each having a first electrode, a light-emitting functional layer, and a second electrode stacked in that order, corresponding to a plurality of sub-pixels constituting a display area, and is characterized in that an oxide film of the first metal material is provided on the side of the first metal layer.

[0008] According to the present invention, it is possible to suppress reflection in the TFT layer and to suppress changes in the characteristics of the TFT.

[0009] FIG. 1 is a plan view showing a schematic configuration of an organic EL display device according to a first embodiment of the present invention. FIG. 2 is a plan view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 3 is a cross-sectional view of a display region of the organic EL display device according to the first embodiment of the present invention. FIG. 4 is an equivalent circuit diagram of a TFT layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 5 is a cross-sectional view showing the cross-sectional structures of a first metal layer and a fourth metal layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 6 is a cross-sectional view showing the cross-sectional structures of modified examples of the first metal layer and the fourth metal layer constituting the organic EL display device according to the first embodiment of the present invention. FIG. 7 is a cross-sectional view of an organic EL layer constituting the organic EL display device according to the first embodiment of the present invention.

[0010] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. However, the present invention is not limited to the following embodiments.

[0011] First Embodiment FIGS. 1 to 7 illustrate a first embodiment of a display device and a manufacturing method thereof according to the present invention. In the following embodiments, an organic EL display device including organic EL elements is exemplified as a display device including light-emitting elements. FIG. 1 is a plan view showing a schematic configuration of an organic EL display device 50 according to this embodiment. FIGS. 2 and 3 are a plan view and a cross-sectional view of a display region D of the organic EL display device 50. FIG. 4 is an equivalent circuit diagram of a TFT layer 30 constituting the organic EL display device 50. FIG. 5 is a cross-sectional view showing a cross-sectional structure Sa of the first metal layer and the fourth metal layer constituting the organic EL display device 50. FIG. 6 is a cross-sectional view showing a cross-sectional structure Sb of a modified example of the first metal layer and the fourth metal layer constituting the organic EL display device 50. FIG. 7 is a cross-sectional view of an organic EL layer 33 constituting the organic EL display device 50.

[0012] 1 , the organic EL display device 50 includes, for example, a rectangular display area D for displaying an image, and a frame area F provided in a frame shape around the display area D. Note that, although the present embodiment illustrates a rectangular display area D, this rectangular shape also includes, for example, a substantially rectangular shape with arc-shaped sides, arc-shaped corners, or a shape with a notch in one of the sides.

[0013] In the display region D, a plurality of sub-pixels P are arranged in a matrix as shown in Fig. 2. In the display region D, for example, a sub-pixel P having a red light-emitting region Er for displaying red, a sub-pixel P having a green light-emitting region Eg for displaying green, and a sub-pixel P having a blue light-emitting region Eb for displaying blue are provided adjacent to each other as shown in Fig. 2. In the display region D, one pixel is configured by, for example, three adjacent sub-pixels P having the red light-emitting region Er, the green light-emitting region Eg, and the blue light-emitting region Eb.

[0014] A terminal portion T is provided to extend in one direction (the X direction in FIG. 1) at the end of the frame region F on the positive side in the Y direction in FIG. 1. In addition, in the frame region F, as shown in FIG. 1, a folding portion B is provided between the display region D and the terminal portion T to extend in one direction (the X direction in FIG. 1), and can be folded, for example, 180 degrees (in a U-shape) with the X direction in the drawing as the folding axis.

[0015] As shown in FIG. 3, the organic EL display device 50 includes a resin substrate 10 provided as a base substrate, a TFT layer 30 provided on the resin substrate 10, an organic EL element layer 40 provided as a light-emitting element layer on the TFT layer 30, and a sealing film 45 provided on the organic EL element layer 40.

[0016] The resin substrate 10 is made of, for example, polyimide resin.

[0017] As shown in FIG. 3 , the TFT layer 30 includes a base coat film 11 provided on a resin substrate 10, a first TFT 9a (see FIG. 4 ), a second TFT 9b (see FIG. 4 ), a third TFT 9c (see FIG. 4 ), a fourth TFT 9d, a fifth TFT 9e (see FIG. 4 ), a sixth TFT 9f, a seventh TFT 9g (see FIG. 4 ), and a capacitor 9h provided on the base coat film 11 for each subpixel P, and a first planarization film 19 and a second planarization film 21 provided on each of the first TFT 9a to each of the seventh TFTs 9g and each capacitor 9h. Here, in the TFT layer 30, as shown in FIG. 2 , a plurality of gate lines 14g are provided in the display region D so as to extend parallel to each other in the X direction in the drawing. Furthermore, in the TFT layer 30, as shown in FIG. 2 , a plurality of light-emitting control lines 14e are provided in the display region D so as to extend parallel to each other in the X direction in the drawing. 2, the TFT layer 30 is provided with a plurality of initialization power supply lines 16i extending parallel to one another in the X direction in the drawing. Note that, as shown in FIG. 2, each light-emitting control line 14e is provided adjacent to each gate line 14g and each initialization power supply line 16i. Also, as shown in FIG. 2, the TFT layer 30 is provided with a plurality of source lines 18f extending parallel to one another in the Y direction in the drawing in the display region D. Also, as shown in FIG. 1, the TFT layer 30 is provided with power supply lines 20a arranged in a lattice pattern in the display region D. 3, the TFT layer 30 includes a base coat film 11, a semiconductor layer 12a (12b), a gate insulating film 13, a gate electrode 14a (14b) formed as a second metal layer made of a second metal material, a first interlayer insulating film 15 formed as a first inorganic insulating film, a capacitance electrode 16c formed as a third metal layer made of a third metal material, a second interlayer insulating film 17 formed as a second inorganic insulating film, a first terminal electrode 18a (18c) formed as a first metal layer made of a first metal material, a second terminal electrode 18b (18d) and a connection wiring 18e, a first planarization film 19, a power line 20a and a relay electrode 20b formed as a fourth metal layer made of a fourth metal material, and a second planarization film 21, which are stacked in this order on a resin substrate 10. The gate lines 14g and the light-emitting control lines 14e are formed as the second metal layer. The initialization power line 16i is formed as the third metal layer.Each source line 18f is formed as a first metal layer.

[0018] The base coat film 11, the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17 are each composed of a single layer or a multilayer film of an inorganic insulating film such as silicon nitride, silicon oxide, or silicon oxynitride.

[0019] The first TFT 9a to the seventh TFT 9g each include a first terminal electrode (see circled number 1 in Figure 4) and a second terminal electrode (see circled number 2 in Figure 4) that are spaced apart from each other, and a gate electrode for controlling conduction between the first terminal electrode and the second terminal electrode.

[0020] The first TFT 9a is provided as an initialization TFT, and as shown in FIG. 4 , in each subpixel P, its gate electrode is electrically connected to a corresponding gate line 14g, its first terminal electrode is electrically connected to a gate electrode 14a of a capacitor 9h (described later), and its second terminal electrode is electrically connected to a corresponding initialization power supply line 16i. Here, the first TFT 9a is configured to initialize the voltage applied to the gate electrode of the fourth TFT 9d by applying the voltage of the initialization power supply line 16i to the capacitor 9h. The first terminal electrode of the first TFT 9a is electrically connected to the gate line 14g that is scanned immediately before the gate line 14g electrically connected to the gate electrodes of the second TFT 9b, the third TFT 9c, and the seventh TFT 9g.

[0021] 4, the second TFT 9b is provided as a compensation TFT, and in each subpixel P, its gate electrode is electrically connected to the corresponding gate line 14g, its first terminal electrode is electrically connected to the gate electrode of the fourth TFT 9d, and its second terminal electrode is electrically connected to the second terminal electrode of the fourth TFT 9d. Here, the second TFT 9b is configured to bring the fourth TFT 9d into a diode-connected state in response to selection of the gate line 14g, thereby compensating for the threshold voltage of the fourth TFT 9d.

[0022] 4, in each subpixel P, the third TFT 9c has a gate electrode electrically connected to the corresponding gate line 14g, a first terminal electrode electrically connected to the corresponding source line 18f, and a second terminal electrode electrically connected to the first terminal electrode of the fourth TFT 9d. Here, the third TFT 9c is configured to apply the voltage of the source line 18f to the first terminal electrode of the fourth TFT 9d in response to the selection of the gate line 14g.

[0023] 4, in each subpixel P, the fourth TFT 9d is provided as a drive TFT, and its gate electrode is electrically connected to the first terminal electrodes of the first TFT 9a and the second TFT 9b, its first terminal electrode is electrically connected to the second terminal electrodes of the third TFT 9c and the fifth TFT 9e, and its second terminal electrode is electrically connected to the second terminal electrode of the second TFT 9b and the first terminal electrode of the sixth TFT 9f. Here, the fourth TFT 9d is configured to apply a drive current corresponding to a voltage applied between its gate electrode and its first terminal electrode to the first terminal electrode of the sixth TFT 9f.

[0024] Specifically, as shown in FIG. 3 , the fourth TFT 9d includes a semiconductor layer 12a, a gate insulating film 13, a gate electrode 14a, a first interlayer insulating film 15, a second interlayer insulating film 17, a first terminal electrode 18a, and a second terminal electrode 18b, which are sequentially disposed on a base coat film 11. The semiconductor layer 12a is made of polysilicon, such as low-temperature polysilicon (LTPS), and is formed in an island shape on the base coat film 11 as shown in FIG. 3 . The semiconductor layer 12a includes a channel region and first and second conductor regions sandwiching the channel region. As shown in FIG. 3 , the gate insulating film 13 is disposed so as to cover the semiconductor layer 12a. As shown in FIG. 3 , the gate electrode 14a is disposed on the gate insulating film 13 so as to overlap the channel region of the semiconductor layer 12a. As shown in FIG. 3 , the first interlayer insulating film 15 and the second interlayer insulating film 17 are sequentially disposed so as to cover the gate electrode 14a. As shown in FIG. 3, the first terminal electrode 18a and the second terminal electrode 18b are electrically connected to the first conductor region and the second conductor region of the semiconductor layer 12a, respectively, through contact holes formed in the stacked film of the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17.

[0025] 4, in each subpixel P, the fifth TFT 9e has a gate electrode electrically connected to the corresponding light-emission control line 14e, a first terminal electrode electrically connected to the power supply line 20a, and a second terminal electrode electrically connected to the first terminal electrode of the fourth TFT 9d. Here, the fifth TFT 9e is configured to apply the voltage of the power supply line 20a to the first terminal electrode of the fourth TFT 9d in accordance with the selection of the light-emission control line 14e.

[0026] 4, in each sub-pixel P, the sixth TFT 9f has a gate electrode electrically connected to a corresponding emission control line 14e, a first terminal electrode electrically connected to a second terminal electrode of the fourth TFT 9d, and a second terminal electrode electrically connected to a first electrode 31 of an organic EL element 35 (described later). Here, the sixth TFT 9f is configured to apply the drive current to the organic EL element 35 in accordance with the selection of the emission control line 14e.

[0027] Specifically, as shown in FIG. 3 , the sixth TFT 9f includes a semiconductor layer 12b, a gate insulating film 13, a gate electrode 14b, a first interlayer insulating film 15, a second interlayer insulating film 17, a first terminal electrode 18c, and a second terminal electrode 18d, which are sequentially disposed on a base coat film 11. Like the semiconductor layer 12a, the semiconductor layer 12b is made of, for example, polysilicon and is formed in an island shape on the base coat film 11 as shown in FIG. 3 . The semiconductor layer 12b includes a channel region and first and second conductor regions sandwiching the channel region. As shown in FIG. 3 , the gate insulating film 13 is disposed so as to cover the semiconductor layer 12b. As shown in FIG. 3 , the gate electrode 14b is disposed on the gate insulating film 13 so as to overlap the channel region of the semiconductor layer 12b. As shown in FIG. 3 , the first interlayer insulating film 15 and the second interlayer insulating film 17 are sequentially disposed so as to cover the gate electrode 14b. 3, the first terminal electrode 18c and the second terminal electrode 18d are provided on the second interlayer insulating film 17 so as to be spaced apart from each other. As shown in FIG. 3, the first terminal electrode 18c and the second terminal electrode 18d are electrically connected to the first conductor region and the second conductor region of the semiconductor layer 12b, respectively, through contact holes formed in the stacked film of the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17. The first TFT 9a, the second TFT 9b, the third TFT 9c, the fifth TFT 9e, and the seventh TFT 9g have substantially the same configuration as the sixth TFT 9f.

[0028] 4, in each pixel P, the seventh TFT 9g has a gate electrode electrically connected to the corresponding gate line 14g, a first terminal electrode electrically connected to the organic EL element 35, and a second terminal electrode electrically connected to the corresponding initialization power supply line 16i. Here, the seventh TFT 9g is configured to reset the charge accumulated in the first electrode 31 of the organic EL element 35 in response to the selection of the gate line 14g.

[0029] Although the first to seventh TFTs 9a to 9g are illustrated as top-gate TFTs in this embodiment, the first to seventh TFTs 9a to 9g may be bottom-gate TFTs. Furthermore, although the first to seventh TFTs 9a to 9g are illustrated as having semiconductor layers made of polysilicon in this embodiment, the first to seventh TFTs 9a to 9g may be illustrated as having semiconductor layers made of oxide semiconductors, such as In—Ga—Zn—O. Furthermore, the first to seventh TFTs 9a to 9g may be configured as hybrid structures, each including a TFT having a semiconductor layer made of polysilicon and a TFT having a semiconductor layer made of oxide semiconductor.

[0030] 3 , the capacitor 9h includes a gate electrode 14a, a first interlayer insulating film 15 provided on the gate electrode 14a, and a capacitance electrode 16c provided on the first interlayer insulating film 15 so as to overlap the gate electrode 14a in a planar view. In each subpixel P, the gate electrode 14a of the capacitor 9h is integrally formed with the gate electrode 14a of the fourth TFT 9d, thereby electrically connecting the capacitor 9h to the gate electrode 14a of the fourth TFT 9d. The capacitor 9h is also electrically connected to the first terminal electrodes of the first TFT 9a and the second TFT 9b via a connection wiring 18e, and the capacitance electrode 16c is electrically connected to the power supply line 20a. The capacitor 9h is configured to store the voltage of the corresponding source line 18f when the corresponding gate line 14g is in a selected state, and to maintain the stored voltage, thereby maintaining the voltage applied to the gate electrode of the fourth TFT 9d when the corresponding gate line 14g is in a non-selected state.

[0031] The first planarization film 19 and the second planarization film 21 have flat surfaces in the display region D, and are made of an organic resin material such as polyimide resin, acrylic resin, or polysiloxane resin.

[0032] In the TFT layer 30, the first metal layer (first terminal electrodes 18a and 18c, second terminal electrodes 18b and 18d, connection wiring 18e, source line 18f, etc.) and the fourth metal layer (power line 20a, relay electrode 20b, etc.) have a cross-sectional structure Sa (see Figure 5).

[0033] As shown in Fig. 5, the cross-sectional structure Sa is composed of a laminated film including a lower layer film 61 made of a titanium-based metal material (such as a titanium film or a titanium alloy film), a middle layer film 62 made of an aluminum-based metal material (such as an aluminum film or an aluminum alloy film), and an upper layer film 63 made of a titanium-based metal material (such as a titanium film or a titanium alloy film). As shown in Fig. 5, an oxide film 61a made of titanium oxide is provided on the side surface of the lower layer film 61. Also, as shown in Fig. 5, an oxide film 62a made of aluminum oxide is provided on the side surface of the middle layer film 62. Also, as shown in Fig. 5, an oxide film 63a made of titanium oxide is provided on the side surface and top surface of the upper layer film 63.

[0034] Although the cross-sectional structure Sa is illustrated in this embodiment, a cross-sectional structure Sb as shown in FIG. 6 may also be used. Specifically, the cross-sectional structure Sb is formed of a single-layer film 64, and an oxide film 64a of the metal material constituting the single-layer film 64 is provided on the side and upper surfaces of the single-layer film 64. Here, by performing the first ashing step and the second ashing step described below, the thickness of the oxide film 64a provided on the side of the single-layer film 64 (e.g., about 40 nm) is made larger than the thickness of the oxide film 64a provided on the upper surface of the single-layer film 64 (e.g., about 20 nm). This makes the oxide film on the side where diffused reflection is likely to occur relatively thicker, thereby further suppressing diffused reflection. The single-layer film may be formed of, for example, an aluminum film, a titanium film, a copper film, a tungsten film, a molybdenum film, a silver film, or an alloy film thereof.

[0035] Furthermore, in this embodiment and its variant examples, a configuration in which an oxide film is provided on the side and top surface of the first metal layer and the side and top surface of the fourth metal layer is exemplified, but the oxide film may be provided only on the side surfaces of the first metal layer and the fourth metal layer.

[0036] Furthermore, in this embodiment and its modified examples, a configuration in which an oxide film is provided on the first metal layer and the fourth metal layer has been exemplified, but an oxide film may also be provided on the second metal layer (gate electrodes 14a and 14b, gate line 14g, light-emitting control line 14e, etc.) and the third metal layer (capacitive electrode 16c, initialization power supply line 16i).

[0037] Furthermore, in this embodiment and its modified example, a configuration has been exemplified in which an oxide film is evenly provided on the first metal layer and the fourth metal layer arranged in the display area D, but an oxide film may also be provided mainly on the first TFT 9a, the second TFT 9b, the fourth TFT 9d and the first metal layer and the fourth metal layer arranged in their vicinity, whose characteristics are easily affected by the incidence of light.

[0038] The organic EL element layer 40 includes a plurality of first electrodes 31, an edge cover 32, a plurality of organic EL layers 33, and a second electrode 34, which are provided in this order on the TFT layer 30. Here, in each subpixel P, as shown in Fig. 3 , the first electrode 31, the organic EL layer 33, and the second electrode 34 are laminated in this order to form an organic EL element 35 (see Fig. 4 ) provided as a light-emitting element.

[0039] As shown in FIG. 3 , the plurality of first electrodes 31 are provided in a matrix on the second planarization film 21a so as to correspond to the plurality of subpixels P. Here, in each subpixel P, the first electrode 31 is electrically connected to the second terminal electrode 18d of the sixth TFT 9f via a contact hole formed in the first planarization film 19, a relay electrode 20b, and a contact hole formed in the second planarization film 21, as shown in FIG. 3 . The first electrode 31 is provided as an anode and has the function of injecting holes (positive holes) into the organic EL layer 33. It is preferable that the first electrode 31 be formed of a material with a large work function in order to improve the efficiency of hole injection into the organic EL layer 33. Here, examples of materials constituting the first electrode 31 include metal materials such as silver (Ag), aluminum (Al), vanadium (V), cobalt (Co), nickel (Ni), tungsten (W), gold (Au), titanium (Ti), ruthenium (Ru), manganese (Mn), indium (In), ytterbium (Yb), lithium fluoride (LiF), platinum (Pt), palladium (Pd), molybdenum (Mo), iridium (Ir), and tin (Sn). Examples of materials constituting the first electrode 31 include astatine (At) / astatine oxide (AtO ２ The first electrode 31 may be made of an alloy of tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), indium zinc oxide (IZO), or another conductive oxide. The first electrode 31 may be formed by stacking multiple layers made of the above materials. Examples of compound materials with a large work function include indium tin oxide (ITO) and indium zinc oxide (IZO).

[0040] 3, the edge cover 32 is provided in a lattice pattern common to the plurality of sub-pixels P so as to cover the peripheral edge of each first electrode 31. Here, examples of materials constituting the edge cover 32 include organic resin materials such as polyimide resin, acrylic resin, and polysiloxane resin.

[0041] 3, the plurality of organic EL layers 33 are disposed on each first electrode 31, and are provided in a matrix as a plurality of light-emitting functional layers so as to correspond to the plurality of sub-pixels P. Here, each organic EL layer 33 includes a hole injection layer 1, a hole transport layer 2, a light-emitting layer 3, an electron transport layer 4, and an electron injection layer 5, which are provided in this order on the first electrode 31, as shown in FIG.

[0042] The hole injection layer 1 is also called an anode buffer layer, and has the function of bringing the energy levels of the first electrode 31 and the organic EL layer 33 closer to each other, thereby improving the efficiency of hole injection from the first electrode 31 to the organic EL layer 33. Examples of materials constituting the hole injection layer 1 include triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, phenylenediamine derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, and stilbene derivatives.

[0043] The hole transport layer 2 has a function of improving the efficiency of transporting holes from the first electrode 31 to the organic EL layer 33. Examples of materials constituting the hole transport layer 2 include porphyrin derivatives, aromatic tertiary amine compounds, styrylamine derivatives, polyvinylcarbazole, poly-p-phenylenevinylene, polysilane, triazole derivatives, oxadiazole derivatives, imidazole derivatives, polyarylalkane derivatives, pyrazoline derivatives, pyrazolone derivatives, phenylenediamine derivatives, arylamine derivatives, amine-substituted chalcone derivatives, oxazole derivatives, styrylanthracene derivatives, fluorenone derivatives, hydrazone derivatives, stilbene derivatives, hydrogenated amorphous silicon, hydrogenated amorphous silicon carbide, zinc sulfide, and zinc selenide.

[0044] The light-emitting layer 3 is a region into which holes and electrons are injected from the first electrode 31 and the second electrode 34, respectively, and where the holes and electrons recombine when a voltage is applied between the first electrode 31 and the second electrode 34. The light-emitting layer 3 is made of a material with high luminous efficiency. Examples of materials that can be used for the light-emitting layer 3 include metal oxinoid compounds (8-hydroxyquinoline metal complexes), naphthalene derivatives, anthracene derivatives, diphenylethylene derivatives, vinylacetone derivatives, triphenylamine derivatives, butadiene derivatives, coumarin derivatives, benzoxazole derivatives, oxadiazole derivatives, oxazole derivatives, benzimidazole derivatives, thiadiazole derivatives, benzothiazole derivatives, styryl derivatives, styrylamine derivatives, bisstyrylbenzene derivatives, trisstyrylbenzene derivatives, perylene derivatives, perinone derivatives, aminopyrene derivatives, pyridine derivatives, rhodamine derivatives, aquidin derivatives, phenoxazone, quinacridone derivatives, rubrene, poly-p-phenylenevinylene, and polysilane.

[0045] The electron transport layer 4 has a function of efficiently transferring electrons to the light-emitting layer 3. Examples of materials constituting the electron transport layer 4 include organic compounds such as oxadiazole derivatives, triazole derivatives, benzoquinone derivatives, naphthoquinone derivatives, anthraquinone derivatives, tetracyanoanthraquinodimethane derivatives, diphenoquinone derivatives, fluorenone derivatives, silole derivatives, and metal oxinoid compounds.

[0046] The electron injection layer 5 has a function of bringing the energy levels of the second electrode 34 and the organic EL layer 33 closer to each other and improving the efficiency of electron injection from the second electrode 34 to the organic EL layer 33, and this function makes it possible to reduce the driving voltage of the organic EL element. The electron injection layer 5 is also called a cathode buffer layer. Here, examples of materials constituting the electron injection layer 5 include lithium fluoride (LiF), magnesium fluoride (MgF ２ ), calcium fluoride (CaF ２ ), strontium fluoride (SrF ２ ), barium fluoride (BaF ２inorganic alkali compounds such as aluminum oxide (Al ２ O ３ ), strontium oxide (SrO), etc.

[0047] The second electrode 34 is provided on the plurality of organic EL layers 33 so as to be common to the plurality of subpixels P, i.e., so as to cover each of the organic EL layers 33 and the edge cover 32, as shown in FIG. 3 . The second electrode 34 is provided as a cathode and has the function of injecting electrons into the organic EL layer 33. In addition, the second electrode 34 is preferably made of a material with a small work function in order to improve the efficiency of electron injection into the organic EL layer 33. Here, examples of materials that can be used to form the second electrode 34 include silver (Ag), aluminum (Al), vanadium (V), calcium (Ca), titanium (Ti), yttrium (Y), sodium (Na), manganese (Mn), indium (In), magnesium (Mg), lithium (Li), ytterbium (Yb), and lithium fluoride (LiF). The second electrode 34 may be made of, for example, magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), or astatine (At) / astatine oxide (AtO ２ The second electrode 34 may be formed of an alloy such as lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), or lithium fluoride (LiF) / calcium (Ca) / aluminum (Al). The second electrode 34 may be formed of a conductive oxide such as tin oxide (SnO), zinc oxide (ZnO), indium tin oxide (ITO), or indium zinc oxide (IZO). The second electrode 34 may be formed by stacking multiple layers made of the above materials. Examples of materials with a low work function include magnesium (Mg), lithium (Li), lithium fluoride (LiF), magnesium (Mg) / copper (Cu), magnesium (Mg) / silver (Ag), sodium (Na) / potassium (K), lithium (Li) / aluminum (Al), lithium (Li) / calcium (Ca) / aluminum (Al), and lithium fluoride (LiF) / calcium (Ca) / aluminum (Al).

[0048] 3 , the sealing film 45 is provided so as to cover the second electrode 34, and includes a first inorganic sealing film 41, an organic sealing film 42, and a second inorganic sealing film 43 laminated in this order on the second electrode 34, and has the function of protecting the organic EL layer 33 of each organic EL element 35 from moisture and oxygen. Here, the first inorganic sealing film 41 and the second inorganic sealing film 43 are made of inorganic insulating films such as silicon nitride films, silicon oxide films, and silicon oxynitride films. Furthermore, the organic sealing film 42 is made of an organic resin material such as acrylic resin, epoxy resin, silicone resin, polyurea resin, parylene resin, polyimide resin, and polyamide resin.

[0049] In the organic EL display device 50 configured as described above, in each subpixel P, when the corresponding light-emitting control line 14e is first selected and deactivated, the organic EL element 35 enters a non-light-emitting state. In this non-light-emitting state, the corresponding gate line 14g (electrically connected to the first TFT 9a) is selected, and a gate signal is input to the first TFT 9a via the gate line 14g, turning the first TFT 9a on. The voltage of the corresponding initialization power line 16i is applied to the capacitor 9h, and the fourth TFT 9d is turned on. As a result, the charge in the capacitor 9h is discharged, and the voltage applied to the gate electrode 14a of the fourth TFT 9d is initialized. Next, the corresponding gate line 14g (electrically connected to the second TFT 9b, the third TFT 9c, and the seventh TFT 9g) is selected and activated, turning on the second TFT 9b and the third TFT 9c. A predetermined voltage corresponding to a source signal transmitted via the corresponding source line 18f is written to the capacitor 9h via the diode-connected fourth TFT 9d. At the same time, the seventh TFT 9g is turned on, and an initialization signal is applied to the first electrode 31 of the organic EL element 35 via the corresponding initialization power supply line 16i, resetting the charge accumulated in the first electrode 31. Thereafter, the corresponding light-emission control line 14e is selected, turning on the fifth TFT 9e and the sixth TFT 9f. A drive current corresponding to the voltage applied to the gate electrode 14a of the fourth TFT 9d is supplied from the corresponding power supply line 20a to the organic EL element 35. In this way, in the organic EL display device 50, the organic EL element 35 emits light at a brightness corresponding to the drive current in each sub-pixel P, thereby displaying an image.

[0050] Next, a description will be given of a method for manufacturing the organic EL display device 50 of this embodiment. The method for manufacturing the organic EL display device 50 of this embodiment includes a TFT layer forming step, an organic EL element layer forming step, and a sealing film forming step.

[0051] <TFT Layer Forming Process> First, for example, an inorganic insulating film (having a thickness of about 500 nm) such as a silicon oxide film is formed on a resin substrate 10 formed on a glass substrate by a plasma CVD (Chemical Vapor Deposition) method, thereby forming a base coat film 11.

[0052] Next, an amorphous silicon film (about 50 nm thick) is formed by plasma CVD over the entire substrate on which the base coat film 11 has been formed, and the amorphous silicon film is crystallized by laser annealing or the like to form a semiconductor film of polysilicon film, and then the semiconductor film is patterned to form semiconductor layers 12 a and 12 b, etc.

[0053] Thereafter, an inorganic insulating film (with a thickness of about 100 nm) such as a silicon oxide film is formed over the entire substrate on which the semiconductor layer 12a and the like are formed, for example, by plasma CVD, to form a gate insulating film 13 so as to cover the first semiconductor layer 12a and the like.

[0054] Furthermore, a molybdenum film (about 250 nm thick) or the like is formed, for example, by sputtering, over the entire substrate on which the gate insulating film 13 is formed, and then the metal film is patterned to form a second metal layer including gate electrodes 14a and 14b, gate line 14g, light-emitting control line 14e, etc.

[0055] Subsequently, the semiconductor layers 12a and 12b are doped with impurity ions using the gate electrodes 14a and 14b as masks, thereby forming a channel region, a first conductor region, and a second conductor region in the semiconductor layers 12a and 12b, respectively.

[0056] Thereafter, an inorganic insulating film (with a thickness of about 100 nm) such as a silicon oxide film is formed, for example, by plasma CVD, over the entire substrate in which the channel region, the first conductor region, and the second conductor region are formed in the semiconductor layers 12a and 12b, thereby forming a first interlayer insulating film 15.

[0057] Furthermore, a molybdenum film (about 250 nm thick) or the like is formed, for example, by sputtering, over the entire substrate on which the first interlayer insulating film 15 is formed, and then the metal film is patterned to form a third metal layer, such as the capacitance electrode 16 c and the initialization power line 16 i.

[0058] Subsequently, an inorganic insulating film (about 500 nm thick) such as a silicon oxide film is formed by, for example, plasma CVD over the entire substrate on which the capacitance electrode 16c and the like are formed, thereby forming a second interlayer insulating film 17.

[0059] Thereafter, appropriate contact holes are formed in the gate insulating film 13, the first interlayer insulating film 15, and the second interlayer insulating film 17, and then, for example, a titanium film (thickness: about 30 nm), an aluminum film (thickness: about 300 nm), and a titanium film (thickness: about 30 nm) are deposited in this order by a sputtering method to form a metal laminate film, and then the metal laminate film is patterned to form first metal layers such as the source line 18f, the first terminal electrodes 18a and 18c, and the second terminal electrodes 18b and 18d.

[0060] Here, when forming the first metal layer and the fourth metal layer described later, a resist pattern R (see FIG. 5) is first formed on a metal laminate film in which a titanium film, an aluminum film, and another titanium film are formed in this order, and then the metal laminate film exposed from the resist pattern R is removed by dry etching to form the first metal layer (fourth metal layer). ２ Gas and CF ４ / O ２ The side surfaces of the first metal layer (fourth metal layer) exposed from the resist pattern R are oxidized by ashing using plasma of a mixed gas or the like (first ashing step). After that, the resist pattern R is peeled off, and then, for example, O ２ Gas and CF ４ / O ２ The upper and side surfaces of the first metal layer (fourth metal layer) are oxidized by ashing using plasma of a mixed gas or the like (second ashing step), whereby oxide films 61a and 62a are formed on the side surfaces of the lower layer film 61 and the middle layer film 62, respectively, and an oxide film 63a is formed on the upper and side surfaces of the upper layer film 63, as shown in FIG.

[0061] Furthermore, a polyimide-based photosensitive resin film (about 2 μm thick) is applied to the entire substrate on which the source lines 18 f and the like are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form a first planarization film 19 having contact holes.

[0062] Next, a titanium film (thickness: about 30 nm), an aluminum film (thickness: about 300 nm), and a titanium film (thickness: about 30 nm) are sequentially deposited by, for example, a sputtering method over the entire substrate on which the first planarization film 19 has been formed, to form a metal laminate film, and then the metal laminate film is patterned to form a fourth metal layer such as a power line 20 a and a relay electrode 20 b.

[0063] Finally, a polyimide-based photosensitive resin film (about 2 μm thick) is applied to the entire substrate on which the power supply lines 20 a and the like are formed, for example, by spin coating or slit coating, and then the applied film is pre-baked, exposed to light, developed, and post-baked to form a second planarization film 21 having contact holes.

[0064] In this manner, the TFT layer 30 can be formed.

[0065] <Organic EL element layer forming process> On the surface of the second planarization film 21 of the TFT layer 30 formed in the TFT layer forming process, a first electrode 31, an edge cover 32, an organic EL layer 33 (hole injection layer 1, hole transport layer 2, light-emitting layer 3, electron transport layer 4, electron injection layer 5), and a second electrode 34 are formed by a well-known method, thereby forming an organic EL element layer 40.

[0066] <Sealing film forming process> First, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is formed on the surface of the organic EL element layer 40 formed in the organic EL element layer forming process using a mask by plasma CVD to form a first inorganic sealing film 41.

[0067] Subsequently, an organic resin material such as an acrylic resin is deposited by, for example, an inkjet method on the surface of the substrate on which the first inorganic sealing film 41 has been formed, to form an organic sealing film 42 .

[0068] Then, using a mask, an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a silicon oxynitride film is deposited by plasma CVD on the substrate surface on which the organic sealing film 42 has been formed, thereby forming a second inorganic sealing film 43, thereby forming a sealing film 45.

[0069] Finally, a protective sheet (not shown) is attached to the surface of the substrate on which the sealing film 45 is formed, and then laser light is irradiated from the glass substrate side of the resin substrate 10 to peel the glass substrate from the underside of the resin substrate 10, and further a protective sheet (not shown) is attached to the underside of the resin substrate 10 from which the glass substrate has been peeled.

[0070] In this manner, the organic EL display device 50 of this embodiment can be manufactured.

[0071] As described above, according to the organic EL display device 50 and its manufacturing method of this embodiment, the oxide films 61a, 62b, and 63a are provided on the side and top surfaces of the first metal layer, such as the first terminal electrode 18a, and the side and top surfaces of the fourth metal layer, such as the power supply line 20a. Therefore, the oxide films 61a, 62b, and 63a can suppress reflections of light emitted from the organic EL layer 33 of the organic EL element 35, such as stray light and reflected light, which are caused by the first electrode 31 and the second electrode 34. This suppresses multiple reflections within the TFT layer 30, thereby suppressing light from entering the first TFT 9a to the seventh TFT 9g and suppressing changes in the characteristics of the first TFT 9a to the seventh TFT 9g. Therefore, by suppressing multiple reflections in the TFT layer 30, changes in the characteristics of the first TFT 9a to the seventh TFT 9g can be suppressed.

[0072] Furthermore, the organic EL display device 50 and its manufacturing method of this embodiment include a first ashing step of ashing the side surfaces of the first metal layer (fourth metal layer) and a second ashing step of ashing the top surface and side surfaces of the first metal layer (fourth metal layer), so that the thickness of the oxide film formed on the side surfaces of the first metal layer (fourth metal layer) can be easily made larger than the thickness of the oxide film formed on the top surface of the first metal layer (fourth metal layer). As a result, the oxide film on the side surfaces, where diffuse reflection is likely to occur, becomes relatively thick, further suppressing diffuse reflection.

[0073] Other Embodiments In the above embodiment, the organic EL layer has been exemplified as having a five-layer laminate structure of a hole injection layer, a hole transport layer, a light-emitting layer, an electron transport layer, and an electron injection layer. However, the organic EL layer may have a three-layer laminate structure of, for example, a hole injection layer / hole transport layer, a light-emitting layer, and an electron transport layer / electron injection layer.

[0074] In addition, in the above embodiment, an organic EL display device in which the first electrode is an anode and the second electrode is a cathode is exemplified, but the present invention can also be applied to an organic EL display device in which the stacked structure of the organic EL layer is reversed, and the first electrode is a cathode and the second electrode is an anode.

[0075] Furthermore, in the above embodiment, an organic EL display device has been described as an example of a display device. However, the present invention can be applied to a display device including a plurality of light-emitting elements driven by current, and can be applied to, for example, a display device including QLEDs (Quantum-dot light emitting diodes), which are light-emitting elements using a quantum dot-containing layer.

[0076] As described above, the present invention is useful for flexible display devices.

[0077] D Display area P Sub-pixel R Resist pattern 10 Resin substrate (base substrate) 14a, 14b Gate electrode (second metal layer) 14e Emission control line (second metal layer) 14g Gate line (second metal layer) 15 First interlayer insulating film (first inorganic insulating film) 16c Capacitor electrode (third metal layer) 16i Initialization power supply line (third metal layer) 17 Second interlayer insulating film (second inorganic insulating film) 18a, 18c First terminal electrode (first metal layer) 18b, 18d Second terminal electrode (first metal layer) 18e (first metal layer) 18f Source line (first metal layer) 19 First planarization film 20a Power supply line (fourth metal layer) 20b (fourth metal layer) 30 TFT layer (thin film transistor layer) 31 First electrode 33 Organic EL layer (organic electroluminescence layer, light-emitting functional layer) 34 Second electrode 35 Organic EL element (light-emitting element) 40 Organic EL element layer (light-emitting element layer) 45 Sealing film 50 Organic EL display device 61 Lower layer film 61a, 62a, 63a, 64a Oxide film 62 Middle layer film 63 Upper layer film 64 Single layer film

Claims

1. A display device comprising: a base substrate; a thin film transistor layer provided on the base substrate and having a first metal layer made of a first metal material; and a light emitting element layer provided on the thin film transistor layer and having a plurality of light emitting elements, each having a first electrode, a light emitting functional layer, and a second electrode laminated in that order, corresponding to a plurality of sub-pixels constituting a display area, wherein an oxide film of the first metal material is provided on a side surface of the first metal layer.

2. A display device according to claim 1, wherein the first metal layer is formed from a laminated film of a lower layer film made of a titanium-based metal material, a middle layer film made of an aluminum-based metal material, and an upper layer film made of a titanium-based metal material.

3. A display device according to claim 1, wherein the first metal layer is formed of a single layer film made of the first metal material, the oxide film is also provided on the upper surface of the first metal layer, and the film thickness of the oxide film provided on the side surface of the first metal layer is greater than the film thickness of the oxide film provided on the upper surface of the first metal layer.

4. A display device according to any one of claims 1 to 3, wherein the thin film transistor layer is formed by laminating in order a second metal layer made of a second metal material, a first inorganic insulating film, a third metal layer made of a third metal material, a second inorganic insulating film, the first metal layer, a planarizing film made of an organic resin material, and a fourth metal layer made of a fourth metal material, and an oxide film of the fourth metal material is provided on the side of the fourth metal layer.

5. The display device according to any one of claims 1 to 4, further comprising a sealing film provided on the light emitting element layer.

6. The display device according to any one of claims 1 to 5, wherein the light-emitting functional layer is an organic electroluminescence layer.

7. A method for manufacturing a display device according to any one of claims 1 to 6, comprising a first ashing step of forming the first metal layer by patterning using a resist pattern, and then ashing the side surfaces of the first metal layer exposed from the resist pattern to form an oxide film of the first metal material.

8. A method for manufacturing a display device according to claim 7, further comprising a second ashing step of, after removing the resist pattern, ashing the top and side surfaces of the first metal layer to form an oxide film of the first metal material.

Images