Communication method and apparatus

Abstract

The present application relates to the technical field of communications, and provides a communication method and apparatus, for use in achieving hardware simplification, power consumption reduction and performance gain. The method comprises: a first apparatus acquires a first encoded bit sequence, performs interleaving on the first encoded bit sequence to obtain a second encoded bit sequence, and modulates the second encoded bit sequence into an encoded symbol sequence, thereby sending the encoded symbol sequence. The interleaving is interleaving determined from among at least two types of interleaving on the basis of encoded information of the first encoded bit sequence.

Description

Communication method and device

[0001] This application claims priority to the Chinese patent application filed with the State Intellectual Property Office on March 22, 2024, with application number 202410341282.5 and application name “Communication Method and Device”, the entire contents of which are incorporated by reference into this application. Technical Field

[0002] The present application relates to the field of communications, and in particular to a communication method and device. Background Art

[0003] Low-density parity check (LDPC) is a channel coding scheme very close to the Shannon line, with good performance and low complexity. It has been identified by the 3rd Generation Partnership Project (3GPP) as the 5G data channel coding scheme.

[0004] Specifically, the 5G standard stipulates that after LDPC encoding, rate matching is performed to obtain the bit sequence e (length E) to be transmitted. Interleaving is required to obtain the bit sequence f to be modulated, which is then modulated and transmitted. At this time, taking QAM64 as an example, Qm=6, with three energy levels. After row and column interleaving, columns 3 to 13 of the systematic bits can be assigned to bits 1 and 2 of QAM, which are the two bits with the highest energy. Columns 14 to 22 of the systematic bits and columns 1 and 2 of the core parity bits are mapped to bits 3 and 4 of QAM, which are the two bits with the second highest energy. Columns 3 and 4 of the core parity bits and the entire portion of the extended parity bits to be transmitted are mapped to bits 5 and 6 of QAM, which are the two bits with the lowest energy.

[0005] However, the hardware implementation of interleaving is complex and can easily become a bottleneck in system throughput. How to strike a balance between hardware simplification, power consumption reduction, and performance gain is a current research issue. Summary of the Invention

[0006] The embodiments of the present application provide a communication method and apparatus to achieve hardware simplification, power consumption reduction, and performance gain.

[0007] To achieve the above objectives, this application adopts the following technical solutions:

[0008] In a first aspect, a communication method is provided, which is applied to a first device, that is, the method can be executed by the first device, or by a module (such as a processor, chip, or chip system, etc.) applied to the first device, or by a logical node, logical module, or software that can realize all or part of the functions of the first device. For the convenience of description, the following description takes the method executed by the first device as an example, and the method includes: the first device obtains a first coded bit sequence, performs interleaving on the first coded bit sequence to obtain a second coded bit sequence, and modulates the second coded bit sequence into a coded symbol sequence, thereby sending the coded symbol sequence. The interleaving is an interleaving determined from at least two interleavings based on the coding information of the first coded bit sequence.

[0009] Based on the methods described in the first and second aspects, the first device, as a transmitter, can determine an interleaving scheme that matches the encoding information of the first coded bit sequence from at least two interleaving schemes. Correspondingly, the second device, as a receiver, can also perform deinterleaving using the same logic as the transmitter. In this way, the interleaving and deinterleaving schemes can be dynamically adjusted based on the encoding situation. For example, when the encoding rate is high, a simpler interleaving scheme can be selected, such as simplified row-column interleaving, simplified reverse row-column interleaving, or even no interleaving, to achieve hardware simplification, reduce power consumption, and avoid complexity bottlenecks. Conversely, when the encoding rate is low, a relatively complex interleaving scheme can be selected, such as row-column interleaving, reverse row-column interleaving, or multi-stage interleaving, to ensure performance gains. This allows for a balance between hardware simplification, power consumption reduction, and performance gains.

[0010] In one possible design, the at least two interleavings include at least two of a first type of interleaving, a second type of interleaving, or a third type of interleaving, and the at least two interleavings differ in at least one of the following: the number of interleavings or the number of interleaving groups.

[0011] Optionally, the first type of interleaving includes at least one of the following: row-column interleaving, reverse row-column interleaving, or multi-stage interleaving. That is, the first type of interleaving is used to improve performance. For example, because different base graphs have different degree distributions, their interleaving schemes that can improve performance are different. Therefore, the interleaver can be screened according to the base graph to ensure performance gain. Additionally, row-column interleaving and reverse row-column interleaving can also be implemented in hardware. Without changing the hardware, row-column interleaving and reverse row-column interleaving can be achieved by changing the order of writing to the circular buffer.

[0012] Furthermore, multi-level interleaving includes a combination of quasi-cyclic QC-level interleaving and row-column interleaving, or a combination of QC-level interleaving and reverse-order row-column interleaving. In other words, QC-level interleaving is combined with row-column interleaving or reverse-order row-column interleaving to achieve structural interleaving, further improving performance gains. For example, QC-level interleaving refers to interleaving the coded sequence at the granularity of the lifting factor, or in other words, interleaving the coded sequence at the granularity of the lifting factor. In this process, the columns of the base graph correspond to the Zc columns of a cyclically shifted sub-block during the lifting process.

[0013] Optionally, the second type of interleaving includes at least one of the following: simplified row-column interleaving, simplified reverse row-column interleaving, or simplified multi-level interleaving. That is, the second type of interleaving is a simplified interleaving scheme that reduces complexity while ensuring performance as much as possible. For example, since different code rates have different degrees of dependence on the interleaver, different simplification schemes can be used, so it is necessary to screen the interleaver according to the coding code rate.

[0014] Furthermore, row-column interleaving corresponds to simplified row-column interleaving, reverse row-column interleaving corresponds to simplified reverse row-column interleaving, and multi-level interleaving corresponds to simplified multi-level interleaving. That is, simplified row-column interleaving is a simplification of row-column interleaving, simplified reverse row-column interleaving is a simplification of reverse row-column interleaving, and simplified multi-level interleaving is a simplification of multi-level interleaving. If the first type of interleaving is row-column interleaving, then the second type of interleaving is simplified row-column interleaving; or, if the first type of interleaving is reverse row-column interleaving, then the second type of interleaving is simplified reverse row-column interleaving; or, if the first type of interleaving is multi-level interleaving, then the second type of interleaving is simplified multi-level interleaving, so that in subsequent encoding, if the first device uses row-column interleaving or its corresponding simplified form for encoding in a certain code rate range, then the first device generally does not use reverse row-column interleaving or its corresponding simplified form in any other code rate range.

[0015] For example, the coded bit sequence used for the second type of interleaving includes the number of groups X for the second type of interleaving, where X<R, R is the number of energy levels contained in a modulation symbol, and both X and R are positive integers. The number of bits mapped to each modulation symbol from the coded bit sequence after the second type of interleaving is Qm bits, the Qm bits come from the X groups, at least two of the Qm bits come from the same group of the X groups, and the relative positions of the at least two bits in the coded bit sequence used for the second type of interleaving and the coded bit sequence after the simplified interleaving remain unchanged. In this way, hardware implementation can be taken into account. Without changing the hardware, by reducing the number of interleaving groups, row-column interleaving and simplified row-column interleaving, as well as reverse row-column interleaving and simplified reverse row-column interleaving, can be achieved respectively.

[0016] Optionally, the third type of interleaving includes non-interleaving, or no interleaving, that is, not performing interleaving on the to-be-transmitted bit sequence e, so as to reduce complexity to the greatest extent. Of course, non-interleaving can also be considered as a type of simplified interleaving.

[0017] In one possible design, the coding information includes a coding rate, and the coding rate matches a rate corresponding to one of the at least two interleavings.

[0018] Optionally, at least two types of interleaving correspond to different code rate intervals, and the different code rate intervals are open intervals and closed intervals respectively. The coding code rate is in the code rate interval corresponding to one of the at least two interleavings. The specific corresponding relationship is that as the code rate increases, the implementation complexity of the interleaving can be gradually reduced to avoid complexity bottlenecks as much as possible.

[0019] For example, different code rate intervals include, in order from small to large code rates: a first code rate interval and a second code rate interval. The first code rate interval corresponds to the first type of interleaving, and the second code rate interval corresponds to the second type of interleaving. The first code rate interval is a closed interval, and the second code rate interval is an open interval, or the first code rate interval is an open interval, and the second code rate interval is a closed interval. For example, the first code rate interval corresponds to row-column interleaving, and the second code rate interval corresponds to simplified row-column interleaving; or the first code rate interval corresponds to reverse row-column interleaving, and the second code rate interval corresponds to simplified reverse row-column interleaving. Its characteristics are that an interleaving method that improves performance is used at low code rates to balance performance and overhead, and a simplified interleaving method is used at high code rates to reduce overhead.

[0020] For example, different code rate intervals include, in order from smallest to largest code rate: a first code rate interval, a second code rate interval, and a third code rate interval. The first code rate interval corresponds to the first type of interleaving, the second code rate interval corresponds to the second type of interleaving, and the third code rate interval corresponds to the third type of interleaving. The first code rate interval is a closed interval, the second code rate interval and the third code rate interval are open intervals, or the first code rate interval and the second code rate interval are open intervals, and the third code rate interval is a closed interval. For example, the first code rate interval corresponds to row-column interleaving, the second code rate interval corresponds to simplified row-column interleaving, and the third code rate interval corresponds to no interleaving. Its characteristics are that low code rates use an interleaving method that improves performance to balance performance and overhead, medium and high code rates use a simplified interleaving method to reduce overhead, and the highest code rate does not interleave to further reduce overhead.

[0021] For example, the different code rate intervals, in ascending order of code rate, include: the first code rate interval, the second code rate interval, the third code rate interval, and the fourth code rate interval. The first code rate interval corresponds to the third type of interleaving, the second code rate interval corresponds to the first type of interleaving, the third code rate interval corresponds to the second type of interleaving, and the fourth code rate interval corresponds to the third type of interleaving. The first code rate interval is a closed interval, while the second, third, and fourth code rate intervals are open intervals, or the first, second, and third code rate intervals are open intervals, while the fourth code rate interval is a closed interval. For example, the first code rate interval corresponds to no interleaving, the second code rate interval corresponds to row-column interleaving, the third code rate interval corresponds to simplified row-column interleaving, and the fourth code rate interval corresponds to no interleaving. Interleaving is performed at the lowest code rate to avoid redundancy, interleaving is performed at low code rates to improve performance and balance performance and overhead, simplified interleaving is performed at medium and high code rates to reduce overhead, and no interleaving is performed at the highest code rate to further reduce overhead.

[0022] In one possible design, the coding information includes a coding rate, at least two interlaces correspond to a rate threshold, and a magnitude relationship between the coding rate and the rate threshold is used to determine one interlace from the at least two interlaces.

[0023] Optionally, the code rate threshold is at least one of the following: the code rate of the core matrix in the base matrix, or the highest code rate of the modulation and coding scheme MCS. The specific method is not limited and can be selected according to actual conditions.

[0024] For example, the code rate threshold includes a first code rate threshold; if the encoding code rate is less than or equal to the first code rate threshold, one interleaving is determined from at least two interleavings as the first type of interleaving; if the encoding code rate is greater than the first code rate threshold, one interleaving is determined from at least two interleavings as the second type of interleaving. The specific implementation is similar to the above-mentioned code rate range. Please refer to it for understanding and will not be repeated here.

[0025] For example, the code rate threshold includes a first code rate threshold and a second code rate threshold, and the first code rate threshold is less than the second code rate threshold; if the coding code rate is less than or equal to the first code rate threshold, then one interleaving is determined from at least two interleavings as a first type of interleaving; if the coding code rate is greater than the first code rate threshold and the coding code rate is less than or equal to the second code rate threshold, then one interleaving is determined from at least two interleavings as a second type of interleaving; if the coding code rate is greater than the second code rate threshold, then one interleaving is determined from at least two interleavings as a third type of interleaving. The specific implementation is similar to the above-mentioned code rate range. Please refer to it for understanding and will not be repeated here.

[0026] For example, the code rate threshold includes a first code rate threshold, a second code rate threshold and a third code rate threshold, the first code rate threshold is less than the second code rate threshold, and the second code rate threshold is less than the third code rate threshold; if the coding code rate is less than or equal to the first code rate threshold, then one interleaving is determined to be the third type of interleaving from at least two interleavings; if the coding code rate is greater than the first code rate threshold and the coding code rate is less than or equal to the second code rate threshold, then one interleaving is determined to be the first type of interleaving from at least two interleavings; if the coding code rate is greater than the second code rate threshold and the coding code rate is less than or equal to the third code rate threshold, then one interleaving is determined to be the second type of interleaving from at least two interleavings; if the coding code rate is greater than the third code rate threshold, then one interleaving is determined to be the third type of interleaving from at least two interleavings. The specific implementation is similar to the above-mentioned code rate range, please refer to it for understanding and will not be repeated here.

[0027] In one possible design, the encoding information further includes an encoding code length, and the encoding code length matches a code length corresponding to one of the at least two interleavings.

[0028] Optionally, in different code length intervals, a code length interval where the encoding code length is located corresponds to at least two types of interleaving, and different code length intervals correspond to different interleavings, or at least two types of interleavings correspond to different code length intervals respectively. The specific selection can be flexibly made according to actual conditions and is not specifically limited.

[0029] Furthermore, the code length rates of different code length intervals include, from small to large: a first code length interval and a second code length interval. The first code length interval corresponds to a first type of interleaving, and the second code length interval corresponds to a second type of interleaving. That is, in order from small to large code length, the complexity of the interleaving corresponding to different code length intervals increases to ensure performance gain.

[0030] In one possible design, the Qm corresponding to the coded information matches the Qm corresponding to one of the at least two interleaving schemes, where Qm is the number of bits mapped to each modulation symbol. Similar to the coding rate, a higher Qm can reduce the corresponding interleaving complexity, balancing performance and overhead.

[0031] In one possible design, the base matrix corresponding to the encoded information in different basis matrices corresponds to one of at least two interleaving schemes, with different base matrices corresponding to different interleaving schemes. Selecting interleaving schemes based on the base graph allows compatibility with existing protocol content, requiring minimal protocol changes, while only designing coding schemes tailored to new scenarios and requirements.

[0032] In a possible design scheme, the coding information also includes at least one of the following: information on the modulation order, an identifier of the MCS, or the number of rows and columns of the matrix. That is, the above-mentioned code rate threshold can also be replaced by being implemented by this at least one item.

[0033] In a second aspect, a communication method is provided, which is applied to a second device. That is, the method can be executed by the second device, or by a module (such as a processor, chip, or chip system) applied to the second device. It can also be implemented by a logical node, logical module, or software that can implement all or part of the functions of the second device. For ease of description, the following description uses the method executed by the second device as an example. The method includes: the second device receives first information, deinterleaves the first information, obtains information to be decoded, and then decodes the information to be decoded. Deinterleaving corresponds to interleaving, and interleaving is an interleaving determined from at least two interleavings based on the coded information corresponding to the information to be decoded.

[0034] In one possible design, the at least two interleavings include at least two of a first type of interleaving, a second type of interleaving, or a third type of interleaving, and the at least two interleavings differ in at least one of the following: the number of interleavings or the number of interleaving groups.

[0035] Optionally, the first type of interleaving includes at least one of the following: row-column interleaving, reverse row-column interleaving, or multi-level interleaving.

[0036] Furthermore, the multi-level interleaving includes a combination of quasi-cyclic structure QC-level interleaving and row-column interleaving, or a combination of QC-level interleaving and reverse order row-column interleaving.

[0037] Optionally, the second type of interleaving includes at least one of the following: simplified row-column interleaving, simplified reverse row-column interleaving, or simplified multi-level interleaving.

[0038] Furthermore, row-column interleaving corresponds to simplified row-column interleaving, reverse row-column interleaving corresponds to simplified reverse row-column interleaving, and multi-level interleaving corresponds to simplified multi-level interleaving. If the first type of interleaving is row-column interleaving, then the second type of interleaving is simplified row-column interleaving; or, if the first type of interleaving is reverse row-column interleaving, then the second type of interleaving is simplified reverse row-column interleaving; or, if the first type of interleaving is multi-level interleaving, then the second type of interleaving is simplified multi-level interleaving.

[0039] For example, a coded bit sequence used for the second type of interleaving includes the number X of groups for the second type of interleaving, where X<R, R is the number of energy levels contained in a modulation symbol, and both X and R are positive integers; the number of bits mapped to each modulation symbol from the coded bit sequence after the second type of interleaving is Qm bits, the Qm bits come from the X groups, at least two bits of the Qm bits come from the same group of the X groups, and the relative positions of the at least two bits in the coded bit sequence used for the second type of interleaving and the coded bit sequence after the simplified interleaving remain unchanged.

[0040] Optionally, the third type of interleaving includes non-interleaving.

[0041] In one possible design, the coding information includes a coding rate, and the coding rate matches a rate corresponding to one of the at least two interleavings.

[0042] Optionally, at least two interleavings correspond to different code rate intervals, respectively. The different code rate intervals are open intervals and closed intervals, respectively. The encoding code rate is within the code rate interval corresponding to one of the at least two interleavings.

[0043] For example, different code rate intervals include, in ascending order of code rate, a first code rate interval and a second code rate interval. The first code rate interval corresponds to the first type of interleaving, and the second code rate interval corresponds to the second type of interleaving. Alternatively, the first code rate interval is an open interval and the second code rate interval is a closed interval.

[0044] For example, the different rate intervals include, in ascending order of rate, a first rate interval, a second rate interval, and a third rate interval. The first rate interval corresponds to the first type of interleaving, the second rate interval corresponds to the second type of interleaving, and the third rate interval corresponds to the third type of interleaving. The first rate interval is a closed interval, and the second and third rate intervals are open intervals, or the first and second rate intervals are open intervals, and the third rate interval is a closed interval.

[0045] For example, different code rate intervals include, in descending order of code rate, a first code rate interval, a second code rate interval, a third code rate interval, and a fourth code rate interval. The first code rate interval corresponds to the third type of interleaving, the second code rate interval corresponds to the first type of interleaving, the third code rate interval corresponds to the second type of interleaving, and the fourth code rate interval corresponds to the third type of interleaving. The first code rate interval is a closed interval, and the second, third, and fourth code rate intervals are open intervals, or the first, second, and third code rate intervals are open intervals, and the fourth code rate interval is a closed interval.

[0046] In one possible design, the coding information includes a coding rate, at least two interlaces correspond to a rate threshold, and a magnitude relationship between the coding rate and the rate threshold is used to determine one interlace from the at least two interlaces.

[0047] Optionally, the code rate threshold is at least one of the following: a code rate of a core matrix in a base matrix, or a maximum code rate of a modulation and coding scheme MCS.

[0048] For example, the code rate threshold includes a first code rate threshold; if the encoding code rate is less than or equal to the first code rate threshold, one interleaving is determined from at least two interleavings as the first type of interleaving; if the encoding code rate is greater than the first code rate threshold, one interleaving is determined from at least two interleavings as the second type of interleaving.

[0049] For example, the code rate threshold includes a first code rate threshold and a second code rate threshold, and the first code rate threshold is less than the second code rate threshold; if the coding code rate is less than or equal to the first code rate threshold, then one interleaving is determined from at least two interleavings as the first type of interleaving; if the coding code rate is greater than the first code rate threshold and the coding code rate is less than or equal to the second code rate threshold, then one interleaving is determined from at least two interleavings as the second type of interleaving; if the coding code rate is greater than the second code rate threshold, then one interleaving is determined from at least two interleavings as the third type of interleaving.

[0050] For example, the code rate threshold includes a first code rate threshold, a second code rate threshold and a third code rate threshold, the first code rate threshold is less than the second code rate threshold, and the second code rate threshold is less than the third code rate threshold; if the coding code rate is less than or equal to the first code rate threshold, then one interleaving is determined from at least two interleavings as the third type of interleaving; if the coding code rate is greater than the first code rate threshold and the coding code rate is less than or equal to the second code rate threshold, then one interleaving is determined from at least two interleavings as the first type of interleaving; if the coding code rate is greater than the second code rate threshold and the coding code rate is less than or equal to the third code rate threshold, then one interleaving is determined from at least two interleavings as the second type of interleaving; if the coding code rate is greater than the third code rate threshold, then one interleaving is determined from at least two interleavings as the third type of interleaving.

[0051] In one possible design, the encoding information further includes an encoding code length, and the encoding code length matches a code length corresponding to one of the at least two interleavings.

[0052] Optionally, in different code length intervals, a code length interval where the encoding code length is located corresponds to at least two interleavings, and different code length intervals correspond to different interleavings, or at least two interleavings correspond to different code length intervals.

[0053] Furthermore, the code length rates of different code length intervals include, from small to large, a first code length interval and a second code length interval. The first code length interval corresponds to a first type of interleaving, and the second code length interval corresponds to a second type of interleaving.

[0054] In one possible design, Qm corresponding to the coded information matches Qm corresponding to one of the at least two interleavings, where Qm is the number of bits mapped to each modulation symbol.

[0055] In one possible design, in different basis matrices, the basis matrix corresponding to the encoded information corresponds to one of the at least two interleavings, and different basis matrices correspond to different interleavings.

[0056] In a possible design, the coding information further includes at least one of the following: information on a modulation order, an identifier of an MCS, or the number of rows and columns of a matrix.

[0057] It can be understood that the technical effects of the method described in the second aspect can also refer to the relevant introduction of the method described in the first aspect above, and will not be repeated here.

[0058] According to a third aspect, a communication device is provided, comprising a module for executing the method described in any one of the first to second aspects.

[0059] In one possible design solution, the communication device described in the third aspect may further include a transceiver. The transceiver may be a transceiver circuit or an interface circuit. The transceiver may be used for the communication device described in the third aspect to communicate with other communication devices.

[0060] In one possible design, the communication device described in the third aspect may further include a memory. The memory may be integrated with the processor or provided separately. The memory may be used to store instructions related to the method of any one of the first and second aspects.

[0061] In an embodiment of the present application, the communication device described in the third aspect may be a terminal or a network device, or a chip (system) or other parts or components that can be set in the terminal or network device, or a device that includes the terminal or network device.

[0062] It can be understood that the technical effects of the device described in the third aspect can also refer to the relevant introduction of the method in any of the first to second aspects above, and will not be repeated here.

[0063] In a fourth aspect, a communication device is provided, comprising: a processor coupled to a memory, the processor configured to execute instructions stored in the memory, so that the communication device executes the method described in any one of the first to second aspects.

[0064] In one possible design solution, the communication device described in the fourth aspect may further include a transceiver. The transceiver may be a transceiver circuit or an interface circuit. The transceiver may be used for the communication device described in the fourth aspect to communicate with other communication devices.

[0065] In an embodiment of the present application, the communication device described in the fourth aspect can be the terminal or network device described in any one of the first to second aspects, or a chip (system) or other parts or components that can be set in the terminal or network device, or a device that includes the terminal or network device.

[0066] In addition, the technical effects of the communication device described in the fourth aspect can refer to the technical effects of the methods described in any one of the first aspect to the second aspect, and will not be repeated here.

[0067] In a fifth aspect, a communication device is provided, comprising: a processor and a memory; the memory is used to store instructions, and when the processor executes the instructions, the communication device executes the method described in any one of the first to second aspects.

[0068] In one possible design solution, the communication device described in the fifth aspect may further include a transceiver. The transceiver may be a transceiver circuit or an interface circuit. The transceiver may be used for the communication device described in the second aspect to communicate with other communication devices.

[0069] In an embodiment of the present application, the communication device described in the fifth aspect can be the terminal or network device described in any one of the first to second aspects, or a chip (system) or other parts or components that can be set in the terminal or network device, or a device that includes the terminal or network device.

[0070] In addition, the technical effects of the communication device described in the fifth aspect can refer to the technical effects of the methods described in any one of the first aspect to the second aspect, and will not be repeated here.

[0071] In a sixth aspect, a chip is provided, comprising: a controller and an interface circuit, wherein the controller is used to interact with other devices through the interface circuit to execute the method described in any one of the first to second aspects.

[0072] In a seventh aspect, a communication system is provided, comprising a first device for executing the method described in the first aspect and a second device for executing the method described in the second aspect.

[0073] In an eighth aspect, a computer-readable storage medium is provided, which includes a computer program or instruction stored therein. When the computer program or instruction is executed, the method described in any one of the first to second aspects is executed.

[0074] In a ninth aspect, a computer program product is provided, comprising a computer program or instructions, which, when executed, enables the method described in any one of the first to second aspects to be executed. BRIEF DESCRIPTION OF THE DRAWINGS

[0075] FIG1 is a schematic diagram showing the structure of a base matrix corresponding to the NR LDPC code check matrix;

[0076] FIG2 is a schematic diagram of an application scenario of LDPC coding;

[0077] FIG3 is a schematic diagram of the architecture of a communication system according to an embodiment of the present application;

[0078] FIG4 is a second schematic diagram of the architecture of the communication system provided in an embodiment of the present application;

[0079] FIG5 is a third schematic diagram of the architecture of the communication system provided in an embodiment of the present application;

[0080] FIG6 is a flow chart of a communication method according to an embodiment of the present application;

[0081] FIG7 is a schematic diagram of a simulation of a communication method provided in an embodiment of the present application;

[0082] FIG8 is a first structural diagram of a communication device provided in an embodiment of the present application;

[0083] FIG9 is a second structural diagram of the communication device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0084] The technical solutions of the embodiments of the present application can be applied to various communication systems, such as wireless network (Wi-Fi) systems, vehicle to everything (V2X) communication systems, device-to-device (D2D) communication systems, Internet of Vehicles communication systems, fourth-generation (4G) mobile communication systems, such as long-term evolution (LTE) systems, world-wide interoperability for microwave access (WiMAX) communication systems, fifth-generation (5G) mobile communication systems, such as new radio (NR) systems, and future communication systems, such as 5.5G and sixth-generation (6G) mobile communication systems.

[0085] For ease of understanding, the technical terms involved in this application are first introduced below.

[0086] 1. Low density parity check (LDPC) code:

[0087] LDPC codes are a channel coding scheme that closely approximates the Shannon line, offering high performance and low complexity. They have been selected by the Third Generation Partnership Project (3GPP) as the 5G data channel coding scheme. LDPC codes are linear block codes defined by a sparse matrix H with M rows and N columns. H consists of elements 0 and 1. Since most elements in the matrix are 0, except for a few that are 1, it is called a sparse matrix. This sparse matrix, also known as the LDPC code check matrix, satisfies the following conditions: the ratio of the matrix's row weight (the number of 1s per row) and column weight (the number of 1s per column) to the code length is much less than 1; any two rows (columns) have at most one 1 in common; and the number of linearly independent columns is as large as possible.

[0088] LDPC codes are encoded using a generator matrix or a check matrix. The mainstream LDPC codes have a quasi-cyclic (QC) structure. By setting the translation amount for each block, bad structures such as short loops are avoided and the code distance is improved. Currently, the main decoding algorithms for LDPC codes are min-sum (MS) and belief propagation (BP). In terms of decoding performance, the BP decoding algorithm is better, but it has a large amount of information storage and m c→v The calculation method is complex and not conducive to hardware implementation. Therefore, offset MS (Offset-MS) and standard MS (Normalized-MS) decoding algorithms are commonly used in actual communication systems. The LDPC codes actually used, such as QC-LDPC codes, are a subclass of LDPC codes. The check matrix H of QC-LDPC codes has a cyclic characteristic. QC-LDPC codes expand the base matrix (base graph, BG), or the 1 element in the LDPC base graph, into a cyclic shift matrix. The BG graph model of QC-LDPC codes is BG = (X, Y, F), where X corresponds to the variable, Y corresponds to the check equation, and F is its edge relationship. After the expansion factor is Z c After the QC expansion of the Tanner graph, we get the bipartite graph G = (V, C, E), where V is the variable node, C is the check node, and E is its edge relationship. The number of columns in the corresponding check matrix N = |V| = Z c |X|, the number of check matrix rows M = |C| = Z c |Y|, the number of non-zero elements in the check matrix is ​​|E|=Z|F|.

[0089] For example, Figure 1 shows the structure of the base matrix corresponding to the NR LDPC code parity check matrix. The NR LDPC code base matrices are BG1 and BG2, both of which have a common matrix structure. BG1 is used as an example below; BG2 can be used as a reference for understanding and will not be further described.

[0090] As shown in Figure 1 (a), the base matrix is ​​divided into a high-rate region, an incremental redundancy region, a zero matrix region, and an extended / expanded node region (raptor-like region). In practical applications, the first X rows and Y columns of the base matrix can be truncated. As X and Y increase, the code rate decreases from high to low, gradually expanding the area of ​​the matrix used. This truncated matrix portion can then be expanded to form a check matrix.

[0091] Figure 1(b) shows a possible structure of the basis matrix. As shown in Figure 1(b), A and B together form the core matrix for a high code rate. A corresponds to the information bits to be encoded, and B is a square matrix with a dual-diagonal structure, corresponding to the parity bits for the high code rate. C is an all-zero matrix. E is a unit matrix, corresponding to the parity bits for the low extended code rate. D and E together form a single parity check relationship. The basis matrix has values ​​of 0 and 1, with a value of 0 representing an empty element and a value of 1 representing an edge in the base graph, or an association between the corresponding parity check and the corresponding variable.

[0092] The entire matrix is ​​designed according to the minimum bit rate. When it is necessary to support different bit rates, the upper left area of ​​the matrix is ​​intercepted for use, as shown in Figure 1, where the AB area constitutes the highest bit rate matrix. In the 5G peak throughput scenario (long code length, the number of information in different scenarios, such as 1k~2k, or greater than 8k), it is completely implemented by BG1. The number of columns in part A of BG1 is 22, the number of columns in part B is 4, and the number of puncturing columns is 2. The supported bit rate is 22 / (22+4-2)=11 / 12≈0.917, or a bit rate slightly higher than this can be supported through additional puncturing.

[0093] 2. Interweaving:

[0094] 5G communication protocols support high-order modulation schemes, such as quadrature amplitude modulation (QAM). Under good channel conditions and high bit rates, the transmitted bits are modulated into a high-order symbol and sent. The modulated symbol is then demodulated and decoded by the receiver. In QAM modulation schemes, the multiple bits corresponding to each symbol have different energy levels. For example, in QAM64, each symbol corresponds to log264 = 6 bits, with three different energy levels. By default, bits 1 and 2 are at energy level 1 (the highest energy level), bits 3 and 4 are at energy level 2 (the next highest energy level), and bits 5 and 6 are at energy level 3 (the lowest energy level). In QAM256, each symbol corresponds to log2256 = 8 bits, each corresponding to four energy levels: bits 1 and 2 at energy level 1, bits 3 and 4 at energy level 2, bits 5 and 6 at energy level 3, and bits 7 and 8 at energy level 4, with energy levels decreasing in descending order.

[0095] In the 5G communication protocol, LDPC currently uses a row-column interleaving method to interleave the coded bits to be transmitted. The purpose is to map the LDPC system bits (information bits + core check bits) to the high-energy level bits of QAM as much as possible under QAM modulation. For example, as shown in Figure 2, assuming the LDPC information length is 8448 and the transmission length is 12672, it is an LDPC code with a code rate of 2 / 3. In the NR coding protocol, BG1 coding is used, and the selected block size is 384, so there are 22 information columns. Each column has 384 bits. Because the first two columns are punctured in the NR protocol, the number of check columns is 12672 / 384-(22-2)=13 columns. At this time, there are 4 core check columns and 9 extended check columns, a total of 13 columns are selected as the check bits of this code. After the first two columns are punctured and not sent, there are 20 columns of systematic bits left. Adding 13 columns of parity check columns, we get 33 columns of transmitted columns (e), or the bit sequence e to be sent. Therefore, 22 columns of systematic information columns / 33 columns of transmitted columns = 2 / 3 of the code rate.

[0096] Specifically, the 5G standard stipulates that after LDPC encoding, rate matching is performed to obtain the bit sequence e (length E) to be transmitted. Interleaving is required to obtain the bit sequence f to be modulated, which is then modulated and transmitted. At this time, taking QAM64 as an example, Qm = 6, with 3 energy levels. After row and column interleaving, columns 3 to 13 of the systematic bits can be assigned to bits 1 and 2 of QAM, which are the two bits with the highest energy. Columns 14 to 22 of the systematic bits and columns 1 and 2 of the core parity bits are mapped to bits 3 and 4 of QAM, which are the two bits with the second highest energy. Columns 3 and 4 of the core parity bits, as well as the entire portion of the extended parity bits to be transmitted, are mapped to bits 5 and 6 of QAM, which are the two bits with the lowest energy.

[0097] However, in the row-column interleaving process, although the standard description is simple, the hardware implementation is complex, which will particularly affect the overall decoding rate in future ultra-high throughput scenarios. For example, from the feedback of current chip implementations, it can be seen that when the channel tuning is relatively good and the modulation and coding scheme (MCS) modulation order is high, the LDPC code rate is high, so the number of iterations required is low, the matrix size is small, and the decoding speed is fast. On the contrary, the deinterleaving part, because the MCS modulation order is high, the deinterleaving process is complex and becomes the system throughput bottleneck. In other words, the throughput bottleneck of the entire decoder is transferred from the decoder to the deinterleaving. However, if the deinterleaving speed is improved, a large amount of hardware resources will be consumed.

[0098] In response to the above technical problems, the embodiments of the present application propose the following technical solutions.

[0099] The technical solution in this application will be described below with reference to the accompanying drawings.

[0100] In the embodiment of the present application, "indication" may include direct indication and indirect indication, and may also include explicit indication and implicit indication. The information indicated by a certain information is called information to be indicated. In the specific implementation process, there are many ways to indicate the information to be indicated, such as but not limited to, the information to be indicated can be directly indicated, such as the information to be indicated itself or the index of the information to be indicated. The information to be indicated can also be indirectly indicated by indicating other information, wherein there is an association relationship between the other information and the information to be indicated. It is also possible to indicate only a part of the information to be indicated, while the other parts of the information to be indicated are known or agreed in advance. For example, the indication of specific information can also be achieved by means of the arrangement order of each piece of information agreed in advance (such as specified in the protocol), thereby reducing the indication overhead to a certain extent. At the same time, the common parts of each piece of information can also be identified and indicated uniformly to reduce the indication overhead caused by indicating the same information separately.

[0101] In addition, the specific indication method can also be various existing indication methods, such as but not limited to the above-mentioned indication methods and various combinations thereof. The specific details of the various indication methods can be referred to the prior art and will not be repeated herein. As can be seen from the above, for example, when it is necessary to indicate multiple information of the same type, there may be a situation where the indication methods for different information are different. In the specific implementation process, the required indication method can be selected according to specific needs. The embodiment of the present application does not limit the selected indication method. In this way, the indication method involved in the embodiment of the present application should be understood to cover various methods that can enable the party to be indicated to obtain the information to be indicated.

[0102] It should be understood that the information to be indicated can be sent as a whole or divided into multiple sub-information and sent separately, and the sending period and / or sending time of these sub-information can be the same or different. The specific sending method is not limited in the embodiments of this application. The sending period and / or sending time of these sub-information can be predefined, for example, predefined according to a protocol, or can be configured by the transmitting device by sending configuration information to the receiving device.

[0103] In this application, "sending information" can be understood as one device sending information to another device, or as one logic module within a device sending information to another logic module. For example, "a network device sending information" can be understood as a network device sending information to another device (such as a terminal or other network device), or as logic module 1 within a network device sending information to logic module 2 within the network device.

[0104] In this application, "receiving information" can be understood as one device receiving information from another device, or it can also be understood as a logic module within a device receiving information from another logic module. For example, "a network device receiving information" can be understood as the network device receiving information from another device (such as a terminal or other network device), or it can be understood as logic module 1 in the network device receiving information from logic module 2 in the network device.

[0105] In this application, "sending information to... (e.g., a terminal)" or the related illustrations in the accompanying drawings can be understood as the destination end of the information being the terminal. This can include sending information to the terminal directly or indirectly. "Receiving information from... (e.g., a terminal)" or "receiving information from... (e.g., a terminal)" or "receiving information sent by (e.g., a terminal)", or the related illustrations in the accompanying drawings can be understood as the source end of the information being the terminal, which can include receiving information from the terminal directly or indirectly. The information may be processed as necessary between the source end and the destination end of the information transmission, such as format changes, etc., but the destination end can understand the valid information from the source end. Similar expressions in this application can be understood similarly and will not be repeated here.

[0106] "Pre-definition" or "pre-configuration" can be implemented by pre-saving corresponding codes, tables or other methods that can be used to indicate relevant information in the device, and the embodiments of the present application do not limit the specific implementation method. Among them, "saving" can mean saving in one or more memories. The one or more memories can be set separately or integrated in an encoder or decoder, a processor, or a communication device. The one or more memories can also be partially set separately and partially integrated in a decoder, a processor, or a communication device. The type of memory can be any form of storage medium, and the embodiments of the present application do not limit this.

[0107] The "protocol" involved in the embodiments of the present application may refer to a protocol family in the communication field, a standard protocol with a similar protocol family frame structure, or a related protocol used in future communication systems. The embodiments of the present application do not make specific limitations on this.

[0108] In the embodiments of the present application, descriptions such as "when...", "in the case of...", "if" and "if" all mean that the device will perform corresponding processing under certain objective circumstances. It does not limit the time, nor does it require the device to perform judgment actions when implemented, nor does it mean that there are other limitations.

[0109] In the description of the embodiments of the present application, unless otherwise specified, " / " indicates that the objects associated with each other are in an "or" relationship. For example, A / B can represent A or B. "And / or" in the embodiments of the present application is only a description of the association relationship of the associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. A and B can be singular or plural. In addition, in the description of the embodiments of the present application, unless otherwise specified, "multiple" refers to two or more than two. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple. In addition, in order to facilitate the clear description of the technical solutions of the embodiments of the present application, in the embodiments of the present application, words such as "first" and "second" are used to distinguish between identical or similar items with basically the same functions and effects. Those skilled in the art will understand that words such as "first" and "second" do not limit the quantity and execution order, and words such as "first" and "second" do not necessarily limit differences. At the same time, in the embodiments of the present application, words such as "exemplary" or "for example" are used to indicate examples, illustrations or explanations. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present application should not be interpreted as being more preferred or more advantageous than other embodiments or design. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a concrete way for easy understanding.

[0110] The network architecture and business scenarios described in the embodiments of the present application are intended to more clearly illustrate the technical solutions of the embodiments of the present application, and do not constitute a limitation on the technical solutions provided in the embodiments of the present application. Ordinary technicians in this field will know that with the evolution of network architecture and the emergence of new business scenarios, the technical solutions provided in the embodiments of the present application are also applicable to similar technical problems.

[0111] To facilitate understanding of the embodiments of the present application, a communication system applicable to the embodiments of the present application is first described in detail using a communication system as an example.

[0112] The first device or the second device can be a terminal or a network device (such as an access network device), such as the first device and the second device are both terminals; or the first device is a network device and the second device is a terminal; or the first device is a terminal and the second device is a network device.

[0113] For example, a possible, non-limiting architecture of the communication system can be shown in FIG4 . As shown in FIG4 , the communication system 10 includes a radio access network (RAN) 100 and a core network (CN) 200. RAN 100 includes at least one RAN node (e.g., 110a and 110b in FIG4 , collectively referred to as 110) and at least one terminal (e.g., 120a-120j in FIG4 , collectively referred to as 120). RAN 100 may also include other RAN nodes, such as wireless relay devices and / or wireless backhaul devices (not shown in FIG4 ). Terminal 120 is wirelessly connected to RAN node 110. RAN node 110 is wirelessly or wiredly connected to core network 200. The core network devices in core network 200 and RAN node 110 in RAN 100 can be separate physical devices, or they can be the same physical device that integrates core network logical functions and radio access network logical functions.

[0114] The RAN 100 may be a 3GPP-related cellular system, such as a 4G or 5G mobile communication system, or a future-oriented evolutionary system (such as a 6G mobile communication system). The RAN 100 may also be an open access network (O-RAN or ORAN), a cloud radio access network (CRAN), or a wireless fidelity (WiFi) system. The RAN 100 may also be a communication system that integrates two or more of the above systems.

[0115] RAN node 110, sometimes also referred to as access network equipment, RAN entity, or access node, constitutes part of the communication system and facilitates wireless access for terminals. Multiple RAN nodes 110 in the communication system 10 can be of the same type or different types. In some scenarios, the roles of RAN node 110 and terminal 120 are relative. For example, network element 120i in Figure 4 can be a helicopter or drone, which can be configured as a mobile base station. For terminal 120j accessing the RAN 100 via network element 120i, network element 120i is a base station; however, for base station 110a, network element 120i is a terminal. RAN node 110 and terminal 120 are sometimes referred to as communication devices. For example, network elements 110a and 110b in Figure 4 can be understood as communication devices with base station functionality, and network elements 120a-120j can be understood as communication devices with terminal functionality.

[0116] In one possible scenario, a RAN node may be a base station, an evolved NodeB (eNodeB), an access point (AP), a transmission reception point (TRP), a next generation NodeB (gNB), a next generation base station in a sixth generation (6G) mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system. A RAN node may be a macro base station (such as 110a in FIG4 ), a micro base station or an indoor station (such as 110b in FIG4 ), a relay node or a donor node, or a wireless controller in a CRAN scenario. Optionally, a RAN node may also be a server, a wearable device, a vehicle or an onboard device, etc. For example, an access network device in vehicle to everything (V2X) technology may be a road side unit (RSU). All or part of the functions of the RAN node in this application may also be implemented by software functions running on hardware, or by virtualized functions instantiated on a platform (such as a cloud platform). The RAN node in this application may also be a logical node, a logical module or software that can implement all or part of the RAN node functions.

[0117] In another possible scenario, multiple RAN nodes collaborate to assist the terminal in achieving wireless access, and different RAN nodes respectively implement part of the functions of the base station. For example, the RAN node can be a centralized unit (CU), a distributed unit (DU), a CU-control plane (CP), a CU-user plane (UP), or a radio unit (RU). The CU and DU can be set separately, or they can be included in the same network element, such as a baseband unit (BBU). The RU can be included in a radio frequency device or radio frequency unit, such as a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH).

[0118] In different systems, CU (or CU-CP and CU-UP), DU or RU may also have different names, but those skilled in the art can understand their meanings. For example, in the ORAN system, CU may also be called O-CU (Open CU), DU may also be called O-DU, CU-CP may also be called O-CU-CP, CU-UP may also be called O-CU-UP, and RU may also be called O-RU. For the convenience of description, this application uses CU, CU-CP, CU-UP, DU and RU as examples for description. Any unit of CU (or CU-CP, CU-UP), DU and RU in this application can be implemented by a software module, a hardware module, or a combination of a software module and a hardware module.

[0119] It is understood that the above-mentioned RAN node can be a newly defined name, and RAN node can also be expressed in different ways, such as access node, network device, wireless access node, etc., without limitation. Unless otherwise specified in this application, network device is used to express it.

[0120] A terminal may also be referred to as a terminal device, user equipment (UE), mobile station, mobile terminal, etc. Terminals can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), Internet of Things (IOT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grid, smart furniture, smart office, smart wearable, smart transportation, smart city, etc. A terminal may be a mobile phone, tablet computer, computer with wireless transceiver function, wearable device, vehicle, drone, helicopter, airplane, ship, robot, robotic arm, smart home device, etc. The embodiments of the present application do not limit the device form of the terminal.

[0121] In this communication system, a first device, acting as a transmitter, can determine, based on the encoding information of a first coded bit sequence, an interleave from at least two interleaving schemes that matches the encoding information. Correspondingly, a second device, acting as a receiver, can also perform deinterleaving using the same logic as the transmitter. In this way, the interleaving and deinterleaving schemes can be dynamically adjusted based on the encoding situation. For example, when the encoding rate is high, a simpler interleaving scheme can be selected, such as simplified row-column interleaving, simplified reverse row-column interleaving, or even no interleaving, to simplify hardware, reduce power consumption, and avoid complexity bottlenecks. Conversely, when the encoding rate is low, a relatively complex interleaving scheme can be selected, such as row-column interleaving, reverse row-column interleaving, or multi-stage interleaving, to ensure performance gains. This achieves a balance between hardware simplification, power consumption reduction, and performance gains.

[0122] The communication method and apparatus are further described below in conjunction with the accompanying drawings. It is understandable that the present application uses a network device and a terminal as an example to illustrate the execution subject of the interaction diagram, but the present application does not limit the execution subject of the interaction diagram. For example, the method executed by the network device in the present application can also be executed by a module applied to the network device (such as a chip, a chip system, or a processor, such as a dedicated chip (application specific integrated circuits, ASIC), a programmable chip (field programmable gate array, FPGA), or can be implemented by software (program code in memory)), and can also be implemented by a logical node, logic module or software that can implement all or part of the network device functions. Similarly, the method executed by the terminal in the present application can also be executed by a module applied to the terminal (such as a chip, a chip system, or a processor), and can also be implemented by a logical node, logic module or software that can implement all or part of the terminal functions. As shown in Figure 5, the method of the embodiment of the present application mainly involves source coding and channel coding, channel decoding and source recovery.

[0123] The following will describe the interaction process between network elements / devices in the above communication system in detail through a method embodiment in conjunction with Figure 6. The communication method provided in the embodiment of the present application can be applied to the above communication system and specifically applied to various scenarios mentioned in the above communication system, which will be described in detail below.

[0124] As shown in Figure 6, the process of the communication method is as follows:

[0125] S601: A first device obtains a first coded bit sequence.

[0126] The first coded bit sequence may be a coded bit sequence obtained by encoding the information bit sequence using a coding scheme. The coding scheme may be a coding scheme defined by a communication protocol, such as an existing 5G coding scheme, such as an existing LDPC code coding scheme. For details, please refer to the above-mentioned introduction to LDPC codes, which will not be repeated here. Alternatively, it may be a future new LDPC code coding scheme, or any other possible coding scheme, not limited to LDPC codes.

[0127] For example, the first device can perform source encoding on the information bit sequence according to the above-mentioned coding scheme to obtain a coded bit sequence, which is recorded as a coded bit sequence d. The information bit sequence may or may not include cyclic redundancy check (CRC) bits, and there is no specific limitation. The first device can determine the bit sequence e to be sent, or the sending bit sequence e, that is, the first coded bit sequence based on the coded bit sequence d. For example, there is at least one coded bit sequence d, and each coded bit sequence d can be defined according to a code block (CB), that is, there is a corresponding coded bit sequence d for each CB. The first device can write each coded bit sequence d into a circular buffer (CB) corresponding to the coded bit sequence d in sequence, and filter the bit sequence e to be sent from the circular buffer.

[0128] S602: The first device performs interleaving on the first coded bit sequence to obtain a second coded bit sequence.

[0129] The interleave may be a type of interleave determined from at least two types of interleaves based on the coding information of the first coded bit sequence, denoted as a target interleave. That is, the first device may determine a matching target interleave from at least two types of interleaves based on the coding information of the first coded bit sequence, and perform the target interleave on the first coded bit sequence to obtain an interleaved coded bit sequence, i.e., a second coded bit sequence.

[0130] S603: The first device modulates the second coded bit sequence into a coded symbol sequence.

[0131] The first device may map the second coded bit sequence to a modulation symbol to obtain a coded symbol sequence. For example, the value of Qm represents the number of bits to which each modulation symbol (or symbol) is mapped. The first device may map each Qm bit in the second coded bit sequence to a corresponding modulation symbol to obtain a coded symbol sequence.

[0132] S604: The first device sends a coded symbol sequence, and the second device receives the first information accordingly.

[0133] The coded symbol sequence may be sent in a unicast or broadcast manner, with no specific limitation. Since the coded symbol sequence is subject to interference during air interface transmission, the second device receives not only the coded symbol sequence itself, but the first information to which noise / interference is added by the coded symbol sequence.

[0134] S605: The second device deinterleaves the first information to obtain information to be decoded.

[0135] Deinterleaving corresponds to interleaving. The second device determines that the interleaving logic is consistent with that of the first device. Therefore, the second device can also determine a target interleaving from at least two interleavings based on the coded information corresponding to the information to be decoded, and thereby determine the deinterleaving corresponding to the target interleaving, which is recorded as target deinterleaving.

[0136] S606: The second device decodes the information to be decoded.

[0137] The second device can decode the information to be decoded according to the decoding scheme corresponding to the above-mentioned encoding scheme to obtain an information bit sequence. Similar to the encoding scheme, the decoding scheme can also be an encoding scheme defined by the communication protocol, such as the existing 5G encoding scheme, such as the existing LDPC code decoding scheme. For details, please refer to the relevant introduction to LDPC codes above and will not be repeated here. Alternatively, it can be a new LDPC code decoding scheme in the future, or it can be any other possible decoding scheme, not limited to LDPC codes.

[0138] The following is a detailed introduction to S602:

[0139] Since the first coded bit sequence is obtained by encoding the information bit sequence, the coding information of the first coded bit sequence can also be understood as information related to the coding of the information bit sequence, such as including at least one of the following: coding rate, coding code length, base matrix, QAM order, or scenario, which are introduced below.

[0140] 1) The coding rate can also be called the code rate. Specifically, the code rate refers to the ratio of the number of information bits to the number of bits transmitted (or the number of transmitted bits). For example, if the to-be-transmitted bit sequence e contains 12672 bits, i.e., the transmission length is 12672, which contains 8448 information bits, i.e., the information length is 8448, the coding rate is 8448 / 12672 = 2 / 3. It should be understood that the coding rate can also be replaced by the MCS for easier understanding. The following description will still use the coding rate, but the solution of the embodiment of the present application is also applicable to the implementation using the MCS.

[0141] 2) The QAM order can be either the Qm value or the modulation order. The Qm value corresponds to the modulation order, and the two can be expressed interchangeably. For example, a modulation order of QAM256 corresponds to Qm=8, and a modulation order of QAM64 corresponds to Qm=6. It should be understood that the QAM order can also be expressed as the MCS for ease of understanding. The following description will still use the QAM order, but the solutions of the embodiments of this application are also applicable to implementations using the MCS.

[0142] 3) The encoding code length can also be called the code length, which can specifically be the length of the bit sequence e to be transmitted, such as the 12672 bits mentioned above, or the number of transmission bits corresponding to the symbol after the bit sequence e to be transmitted is modulated, such as the number of bits of the modulated bit sequence f, or the number of transmission bits corresponding to the symbol to which the modulated bit sequence f is mapped. It can be understood that the encoding code length is an example and can also be replaced by the information length, or the information length, which can specifically be the number of all bits contained in the bit sequence e to be transmitted, or the number of information bits therein, such as the 8448 bits mentioned above. The number of information bits can be the number including or excluding CRC bits, and is not distinguished here.

[0143] 4) The base matrix can also be called a base graph, such as the base graph of the LDPC code, which can be specifically BG1 or BG2 mentioned above. The specific implementation can also refer to the relevant introduction mentioned above and will not be repeated here. It can also be a newly defined BG, such as BGX or any other possible naming, without limitation.

[0144] 5) Scenarios are primarily protocol-defined communication scenarios, or service scenarios, such as enhanced mobile broadband (eMBB) scenarios, ultra-high throughput scenarios, ultra-reliable low-latency communications (URLLC) scenarios, or new scenarios. eMBB and high-throughput scenarios are predominant, while URLLC scenarios may not involve high-order modulation and do not require interleaving in most cases. New scenarios can be future communication scenarios defined by the International Telecommunication Union (ITU), such as those with metrics including 200 Gbps, or extremely high bitrate scenarios, such as those with bitrates higher than 22 / 24. They can also be new scenarios derived from eMBB scenarios that have further requirements for throughput and bitrate, but are not specifically restricted.

[0145] The coding information can be pre-configured through signaling (such as signaling of the medium access control / medium access control (MAC) layer or downlink physical layer signal), such as pre-configured by the second device to the first device, or pre-configured by the first device to the second device, or pre-configured by the network side (such as access network equipment) to the first device and the second device respectively. Alternatively, the coding information can also be pre-defined locally in the first device and the second device through a protocol, without the need for dynamic configuration, to save communication overhead. Alternatively, the coding information can also be calculated by the first device and the second device. For example, in a specific implementation, the coding code length can be determined by the first device and the second device according to the frame structure, number of layers and modulation scheme for encoding and sending information bits. The coding rate can be indicated by the above-mentioned signaling, or defined in the MCS table.

[0146] At least two types of interleaving differ in at least one of the following: the number of interleavings, or the number of interleaving groups. The number of interleavings can be understood as the number of times interleaving is performed. The more times interleaving is performed, the greater the overhead, the higher the hardware requirements, and the more likely it is to become a complexity bottleneck, and vice versa. For example, for non-interleaving, the number of interleavings is 0, that is, no interleaving is performed; for row-column interleaving, the number of interleavings is 1, that is, 1 row-column interleaving is performed; for multi-level interleaving, the number of interleavings is 2, such as 1 QC-level interleaving + 1 row-column interleaving. The specific implementation can also refer to the relevant introduction below and will not be repeated here. The number of interleaving groups can refer to the number of groups into which the bit sequence e to be transmitted is divided for interleaving, which can be understood as the granularity of interleaving. The more groups there are, the finer the granularity of interleaving, the greater the overhead, the higher the hardware requirements, and the more likely it is to become a complexity bottleneck, and vice versa.

[0147] The at least two interleavings may include at least two of the first type of interleaving, the second type of interleaving, or the third type of interleaving, which are described below respectively.

[0148] A) The first type of interleaving (or first type of interleaver) can be interleaving used to improve performance. For example, because different base graphs have different degree distributions, different interleaving schemes can improve performance. Therefore, the interleaver can be selected based on the base graph to ensure performance gain. In one possible implementation, the first type of interleaving can include at least one of the following: row-column interleaving, reverse row-column interleaving, or multi-stage interleaving.

[0149] Row-column interleaving is a typical interleaving method. For example, the length of the bit sequence e to be sent is defined as E, which can be expressed as e=e0,e1,…,e E-1 , the interleaved sequence (such as the bit sequence to be modulated f) can be expressed as f = f0, f1, ..., f E-1 , then the pseudo code implementation of row and column interleaving can be expressed by the following formula (1):

[0150] Reverse row-column interleaving is the opposite of row-column interleaving, or the interleaving order is reversed. For example, the length of the bit sequence e to be transmitted is defined as E, which can be expressed as e = e0, e1, ..., e E-1 , the interleaved sequence can be expressed as f=f0,f1,…,f E-1 , then the pseudo code implementation of reverse row and column interleaving can be expressed by the following formula (2):

[0151] It should be understood that reverse row-column interleaving may also be implemented in other ways. For example, the pseudocode implementation of reverse row-column interleaving may be the same as that of row-column interleaving, except that the first device may write the coded bit sequence d into the circular buffer in the reverse order of the row-column interleaving, and perform row-column interleaving on the to-be-transmitted bit sequence e read from the circular buffer. In this case, the result obtained is the result of performing reverse row-column interleaving.

[0152] The purpose of multi-level interleaving is to achieve structural interleaving to further improve performance gains. Structural refers to the correspondence between the bit energy levels in a QAM symbol and the columns of the base image. Implementing this structural interleaving may require multiple interleavings. In other words, multi-level interleaving can be a combination of multiple interleavings. For example, multi-level interleaving can include a combination of QC-level interleaving and row-column interleaving, that is, first performing one QC-level interleaving, and then performing one row-column interleaving, or a combination of QC-level interleaving and reverse row-column interleaving, that is, first performing one QC-level interleaving, and then performing one reverse row-column interleaving, or any other possible combination, and the specific implementation is not limited.

[0153] QC-level interleaving can be viewed as interleaving the columns of the base graph, or interleaving the coded sequence with the lifting factor (or lifting value) as the granularity. During the lifting process, the columns of the base graph correspond to the Zc columns of a cyclic shift sub-block, containing Zc consecutive bits. That is, interleaving is performed in units of Zc consecutive bits, changing the order of the cyclic shift sub-blocks without changing the order between the Zc consecutive bits in each cyclic shift sub-block. For example, the pseudo-code implementation of QC-level interleaving can be expressed as follows:

[0154] In the above formula (3), s can represent a sequence of length s, and s can be the number of columns of the base graph. The i-th element s(i) of the sequence indicates that it will correspond to the i-th column of the base graph at the s(i) position. For example, the number of columns of the base graph is 1, 2, 3, 4, 5, and the sequence s is 3, 4, 5, 2, 1, that is, the order is changed to 3, 4, 5, 2, 1. For example, the 0~Zc-1 elements of the bit sequence e1 are the 2Zc~3Zc-1 elements of the bit sequence e, and the Zc~2Zc-1 elements of the bit sequence e1 are the 3Zc~4Zc-1 elements of the bit sequence e.

[0155] B) Type II interleaving (or Type II interleaver) is a simplified interleaving scheme that minimizes complexity while ensuring optimal performance. For example, different code rates have varying degrees of interleaver dependence, resulting in different simplification schemes. Therefore, it is necessary to select interleavers based on the coding rate. In one possible implementation, Type II interleaving can include at least one of the following: simplified row-column interleaving, simplified reverse-order row-column interleaving, or simplified multi-stage interleaving.

[0156] Simplified row-column interleaving can be a simplification of row-column interleaving, and the specific simplification method can be to reduce the number of groups in row-column interleaving. Similarly, simplified reverse row-column interleaving can be a simplification of reverse row-column interleaving, and the specific simplification method can be to reduce the number of groups in reverse row-column interleaving.

[0157] For example, according to the implementation of the pseudocode above, the number of groups for row-column interleaving or reverse row-column interleaving is Qm. That is, the to-be-transmitted bit sequence e is divided into Qm groups for interleaving. After interleaving, each modulation symbol has Qm bits, and these Qm bits come from the Qm groups. For the second type of interleaving, such as simplified row-column interleaving or simplified reverse row-column interleaving, the coded bit sequence used for the second type of interleaving includes the number of groups X for the second type of interleaving, where X ≤ R, R is the number of energy levels contained in a modulation symbol, and both X and R are positive integers. For example, R = Qm / 2, X = Qm / 2, or X < Qm / 2. In this case, the coded bit sequence after the second type of interleaving is mapped to Qm bits per modulation symbol, and these Qm bits come from X groups. At least two of the Qm bits come from the same group within the X groups, and the relative positions of the at least two bits in the coded bit sequence used for the second type of interleaving and the coded bit sequence after simplified interleaving remain unchanged.

[0158] For example, taking X=Qm / 2 as an example, the QAM symbol is divided into two paths, I and Q, each containing Q m / 2 bits, the energy of each 2 bits is the same, and in the actual interleaving process, these 2 bits can be bundled together for interleaving. The length of the bit sequence e to be sent is defined as E, which can be expressed as e=e0,e1,…,eE-1 , the interleaved sequence can be expressed as f=f0,f1,…,f E-1 , then taking simplified column interleaving as an example, its pseudo code implementation can be expressed by the following formula (4):

[0159] The simplified multi-level interleaving may be QC-level interleaving + simplified row-column interleaving, or QC-level interleaving + simplified reverse-order row-column interleaving, or may be a simplification of QC-level interleaving, that is, reducing the number of groups in the QC-level interleaving.

[0160] In one possible case, row-column interleaving corresponds to simplified row-column interleaving, reverse row-column interleaving corresponds to simplified reverse row-column interleaving, and multi-level interleaving corresponds to simplified multi-level interleaving. That is, simplified row-column interleaving is a simplification of row-column interleaving, simplified reverse row-column interleaving is a simplification of reverse row-column interleaving, and simplified multi-level interleaving is a simplification of multi-level interleaving. For example, if the first type of interleaving is row-column interleaving, the second type of interleaving is simplified row-column interleaving; or, if the first type of interleaving is reverse row-column interleaving, the second type of interleaving is simplified reverse row-column interleaving; or, if the first type of interleaving is multi-level interleaving, the second type of interleaving is simplified multi-level interleaving, so that in subsequent encoding, if the first device uses row-column interleaving or its corresponding simplified form for encoding in a certain code rate range, the first device generally does not use reverse row-column interleaving or its corresponding simplified form in any other code rate range.

[0161] It should also be understood that the above are only some specific implementations of the second type of interleaving and are not intended to be limiting. In the embodiments of the present application, any interleaving method that reduces the number of interleaved groups can be understood as the second type of interleaving in the embodiments of the present application.

[0162] C) The third type of interleaving includes non-interleaving, or no interleaving. This scheme involves not interleaving the transmitted bit sequence e, minimizing complexity. Furthermore, non-interleaving can also be considered a form of simplified interleaving. Therefore, the third type of interleaving and the second type of interleaving can be considered the same. However, for ease of description, the second and third types of interleaving are distinguished in the following description.

[0163] It is understood that the at least two types of interleaving described above can be implemented using the same hardware, or in other words, can be implemented using both hardware. For example, without changing the hardware, row-column interleaving and reverse row-column interleaving can be achieved by changing the order of writing to the circular buffer. Alternatively, row-column interleaving and simplified row-column interleaving, as well as reverse row-column interleaving and simplified reverse row-column interleaving, can be achieved by reducing the number of interleaved groups.

[0164] The above describes the specific implementation of the coding information. The following describes how to select one interleave from at least two interleaves according to the coding information.

[0165] Case 1: Select interleaving according to the coding rate.

[0166] The first device may select a target interleaving from at least two interleavings according to the coding rate of the first coding bit sequence. In this case, the coding rate of the first coding bit sequence matches the rate corresponding to the target interleaving.

[0167] In one possible design scheme, at least two types of interleaving correspond to different code rate intervals, and the different code rate intervals are open intervals and closed intervals, respectively. The coding rate of the first coding bit sequence matches the code rate corresponding to the target interleaving, that is, the coding rate of the first coding bit sequence is in the code rate interval (or segment) corresponding to the target interleaving.

[0168] For example, the protocol can segment the supported encoding bit rates into at least two bit rate intervals, such as (r1, r2], (r2, r3], ..., (r k-1 ,r k ], where k is an integer greater than 1, r i and r i+1 represents the bitrate threshold of the i-th bitrate interval, i is an integer from 1 to k-1, r i <r i+1 , or the i-th bit rate interval can also be [r i ,r i+1 ), the specific forms of open intervals and closed intervals are not restricted. When it comes to minimum or maximum values, all closed intervals may appear. For example, the coding rate range is r1 to r2, and the code rate intervals are divided into 2 segments, such as [r1, r2], (r2, r3], or [r1, r2), [r2, r3]. Each code rate interval can correspond to an interleaver (or interleaver). The specific corresponding relationship is that as the code rate increases, the implementation complexity of the interleaver can be gradually reduced to avoid complexity bottlenecks as much as possible. When the coding rate is lower than a certain threshold, the corresponding interleaver can also be non-interleaver. For example, for a lower code rate, the MCS can be scheduled to Qm=2. At this time, the effects of interleaving and non-interleaving are the same, so interleaving can be omitted.

[0169] Implementation method 1:

[0170] Different code rate intervals, in order from smallest to largest, include: the first code rate interval, the second code rate interval, such as [r1, r2], (r2, r3] or [r1, r2), [r2, r3]. That is, the first code rate interval is a closed interval and the second code rate interval is an open interval, or the first code rate interval is an open interval and the second code rate interval is a closed interval. The first code rate interval corresponds to the first type of interleaving, and the second code rate interval corresponds to the second type of interleaving or the third type of interleaving. For example, the first code rate interval corresponds to row-column interleaving, and the second code rate interval corresponds to simplified row-column interleaving; or the first code rate interval corresponds to reverse row-column interleaving, and the second code rate interval corresponds to simplified reverse row-column interleaving. Its characteristics are that a performance-enhancing interleaving method is used at low code rates to balance performance and overhead, and a simplified interleaving method is used at high code rates to reduce overhead. For example, the first code rate range corresponds to row-column interleaving or reverse row-column interleaving, and the second code rate range corresponds to no interleaving; or the first code rate range corresponds to simplified row-column interleaving or simplified reverse row-column interleaving, and the second code rate range corresponds to no interleaving. Its characteristics are that low code rates use an interleaving method that improves performance to balance performance and overhead, and high code rates do not interleave to reduce overhead.

[0171] As can be seen, for low and medium bit rates, the interleaver is not a system bottleneck, so a better-performing interleaver can be used to balance performance and overhead. For high-throughput requirements at high bit rates, the interleaver implementation needs to be as simple as possible, so simplified interleaving can be used, or interleaving can be omitted to reduce overhead.

[0172] Implementation 2:

[0173] Different code rate intervals include, in order from small to large, the first code rate interval, the second code rate interval, and the third code rate interval, such as [r1, r2], (r2, r3], (r3, r4] or [r1, r2), (r2, r3], [r3, r4], that is, the first code rate interval is a closed interval, the second code rate interval and the third code rate interval are open intervals, or the first code rate interval and the second code rate interval are open intervals, and the third code rate interval is a closed interval. The first code rate interval corresponds to the first type of interleaving, the second code rate interval corresponds to the The second type of interleaving and the third code rate range correspond to the third type of interleaving. For example, the first code rate range corresponds to row-column interleaving, the second code rate range corresponds to simplified row-column interleaving, and the third code rate range corresponds to no interleaving; or the first code rate range corresponds to reverse row-column interleaving, the second code rate range corresponds to simplified reverse row-column interleaving, and the third code rate range corresponds to no interleaving. The characteristics of this method are that low code rates use an interleaving method that improves performance to balance performance and overhead, medium and high code rates use a simplified interleaving method to reduce overhead, and the highest code rate does not use interleaving to further reduce overhead.

[0174] Implementation 3:

[0175] Different code rate intervals include, in order from small to large, the first code rate interval, the second code rate interval, the third code rate interval, and the fourth code rate interval, such as [r1, r2], (r2, r3], (r3, r4], (r4, r5] or [r1, r2), (r2, r3], (r3, r4], [r4, r5], that is, the first code rate interval is a closed interval, the second code rate interval, the third code rate interval and the fourth code rate interval are open intervals, or the first code rate interval, the second code rate interval and the third code rate interval are open intervals, and the fourth code rate interval is a closed interval. The first code rate interval corresponds to the third type of interleaving, the second code rate interval corresponds to the first type of interleaving, and the third code rate interval corresponds to the third type of interleaving. The first rate range corresponds to the second type of interleaving, and the fourth rate range corresponds to the third type of interleaving. For example, the first rate range corresponds to no interleaving, the second rate range corresponds to row-column interleaving, the third rate range corresponds to simplified row-column interleaving, and the fourth rate range corresponds to no interleaving; or the first rate range corresponds to no interleaving, the second rate range corresponds to reverse row-column interleaving, the third rate range corresponds to simplified reverse row-column interleaving, and the fourth rate range corresponds to no interleaving. The characteristics of this method are that interleaving is performed at the lowest rate to avoid redundancy, an interleaving method that improves performance is used at low rates to balance performance and overhead, a simplified interleaving method is used at medium and high rates to reduce overhead, and no interleaving is performed at the highest rate to further reduce overhead.

[0176] It is understood that the various implementations described above can be based on the same base graph. For example, different bit rate designs under the same base graph will correspond to different types of interleaving methods. Furthermore, the above example uses a maximum of four bit rate intervals. In practice, more bit rate intervals can be set based on actual conditions. The specific implementation can follow the solutions of the embodiments of this application and will not be further described here.

[0177] In another possible design scheme, at least two interleavings correspond to a code rate threshold, and the size relationship between the coding code rate and the code rate threshold is used to determine a target interleaving from at least two interleavings. That is, the first device can determine a target interleaving from at least two interleavings based on the size relationship between the coding code rate of the first coding bit sequence and the code rate threshold.

[0178] The code rate threshold is at least one of the following: the code rate of the core matrix in the base matrix, and the maximum code rate of the MCS. For example, the core matrix in the base matrix is ​​the AB region in the base matrix (as shown in Figure 1). It can also be described as the columns of the matrix being information columns and core check columns, and the rows of the matrix being core check rows. Taking BG1 as an example, the number of columns in part A is 22, the number of columns in part B is 4, and the number of puncturing columns is 2. The code rate of this core matrix is ​​22 / (22+4-2)=11 / 12≈0.917. The maximum code rate of the MCS can also be replaced by the maximum code rate specified by the protocol. In addition, the code rate threshold can also be replaced by other thresholds, such as information about the modulation order, such as any value or threshold of the modulation order, or an MCS identifier, such as any ID or ID threshold of the MCS; or the code rate threshold can also be replaced by the number of rows and columns of a matrix, such as the number of rows and columns of an LDPC matrix. For example, if the number of rows of the LDPC matrix is ​​x, the number of information columns is K, and P is the number of puncturing columns, the code rate threshold R=K+x / K+xP.

[0179] There may be one or more bitrate thresholds. In the case of multiple bitrate thresholds, any one of the multiple bitrate thresholds (or the maximum bitrate threshold may be used by default) may be determined according to at least one of the above items, and the remaining bitrate thresholds may be determined independently or defined by the protocol. Alternatively, multiple bitrate thresholds may be predefined by the protocol.

[0180] Implementation A:

[0181] The code rate threshold may include a first code rate threshold. The protocol may define that a code rate less than or equal to the first code rate threshold corresponds to a first type of interleaving, and a code rate greater than the first code rate threshold corresponds to a second type of interleaving. That is, if the coding code rate of the first coding bit sequence is less than or equal to the first code rate threshold, the first device determines a target interleaving from at least two types of interleaving as a first type of interleaving; if the coding code rate of the first coding bit sequence is greater than the first code rate threshold, the first device determines a target interleaving from at least two types of interleaving as a second type of interleaving. At this time, the specific implementation of the first type of interleaving and the second type of interleaving is similar to the above-mentioned implementation method 1, which can be understood by reference and will not be repeated here. Alternatively, the protocol may also define that a code rate less than the first code rate threshold corresponds to a first type of interleaving, and a code rate greater than or equal to the first code rate threshold corresponds to a second type of interleaving, and the specific implementation is not limited.

[0182] Implementation B:

[0183] The code rate threshold may include a first code rate threshold and a second code rate threshold, and the first code rate threshold is smaller than the second code rate threshold.

[0184] The protocol may define that a code rate less than or equal to a first code rate threshold corresponds to a first type of interleaving, a code rate greater than the first code rate threshold and less than or equal to a second code rate threshold corresponds to a second type of interleaving, and a code rate greater than the second code rate threshold corresponds to a third type of interleaving. That is, if the coding code rate of the first coding bit sequence is less than or equal to the first code rate threshold, the first device determines a target interleaving from at least two types of interleaving as the first type of interleaving; if the coding code rate of the first coding bit sequence is greater than the first code rate threshold and less than or equal to the second code rate threshold, the first device determines a target interleaving from at least two types of interleaving as the second type of interleaving; if the coding code rate of the first coding bit sequence is greater than the second code rate threshold, the first device determines a target interleaving from at least two types of interleaving as the third type of interleaving. At this time, the specific implementation of the first type of interleaving, the second type of interleaving, and the third type of interleaving is similar to the above-mentioned implementation method 2, which can be referred to for understanding and will not be repeated here.

[0185] Alternatively, the protocol may define that a rate less than the first rate threshold corresponds to the first type of interleaving, a rate greater than or equal to the first rate threshold and less than the second rate threshold corresponds to the second type of interleaving, and a rate greater than or equal to the second rate threshold corresponds to the third type of interleaving. There is no restriction on the specific implementation.

[0186] Implementation C:

[0187] The code rate threshold may include a first code rate threshold, a second code rate threshold, and a third code rate threshold. The first code rate threshold is smaller than the second code rate threshold, and the second code rate threshold is smaller than the third code rate threshold.

[0188] The protocol may define that a rate less than or equal to the first code rate threshold corresponds to the third type of interleaving, a rate greater than the first code rate threshold and less than or equal to the second code rate threshold corresponds to the first type of interleaving, a rate greater than the second code rate threshold and less than or equal to the third code rate threshold corresponds to the second type of interleaving, and a rate greater than the third code rate threshold corresponds to the third type of interleaving. That is, if the coding rate of the first coding bit sequence is less than or equal to the first coding rate threshold, the first device determines a target interleaving as the third type of interleaving from at least two interleavings; if the coding rate of the first coding bit sequence is greater than the first coding rate threshold and less than or equal to the second coding rate threshold, the first device determines a target interleaving as the first type of interleaving from at least two interleavings; if the coding rate of the first coding bit sequence is greater than the second coding rate threshold and less than or equal to the third coding rate threshold, the first device determines a target interleaving as the second type of interleaving from at least two interleavings; if the coding rate of the first coding bit sequence is greater than the third coding rate threshold, the first device determines a target interleaving as the third type of interleaving from at least two interleavings. At this time, the specific implementation of the first type of interleaving, the second type of interleaving and the third type of interleaving is similar to the above-mentioned implementation method 3, which can be understood by reference and will not be repeated here.

[0189] Alternatively, the protocol may also define that a rate less than the first rate threshold corresponds to the third type of interleaving, a rate greater than or equal to the first rate threshold and less than or equal to the second rate threshold corresponds to the first type of interleaving, a rate greater than or equal to the second rate threshold and less than the third rate threshold corresponds to the second type of interleaving, and a rate greater than or equal to the third rate threshold corresponds to the third type of interleaving.

[0190] It can be understood that the above is an example of up to 3 bit rate thresholds. In practice, more bit rate thresholds can be set according to actual conditions. The specific implementation can follow the solution of the embodiment of the present application, which will not be repeated here.

[0191] Case 2: Select interleaving according to the QAM order.

[0192] Taking the QAM order represented by Qm as an example, Qm is the number of bits mapped to each modulation symbol. The value of Qm is similar to the coding rate described above, with lower Qm levels corresponding to lower coding rates and higher Qm levels corresponding to higher coding rates. The first device can select a target interleave from at least two interleavings based on the Qm corresponding to the coding information of the first coded bit sequence, where the Qm corresponding to the coding information matches the Qm corresponding to the target interleave.

[0193] At least two types of interleaving correspond to different levels or values ​​of Qm. For example, the values ​​of Qm may include a first value and a second value, where the first value is smaller than the second value. The protocol may define a first Qm value corresponding to a first type of interleaving, and a second Qm value corresponding to a second type of interleaving, such as Qm = 4 corresponding to row-column interleaving or reverse row-column interleaving, and Qm = 6 corresponding to simplified row-column interleaving or simplified reverse row-column interleaving. For another example, the values ​​of Qm may include, in ascending order, the first, second, and third values. The protocol may define a first Qm value corresponding to a first type of interleaving, a second Qm value corresponding to a second type of interleaving, and a third Qm value corresponding to a third type of interleaving, such as Qm = 4 corresponding to row-column interleaving or reverse row-column interleaving, Qm = 6 corresponding to simplified row-column interleaving or simplified reverse row-column interleaving, and Qm = 8 corresponding to no interleaving. For another example, the values ​​of Qm may include, in ascending order, the first, second, third, and fourth values. The protocol can define Qm as the first value corresponding to the third type of interleaving, Qm as the second value corresponding to the first type of interleaving, Qm as the third value corresponding to the second type of interleaving, and Qm as the fourth value corresponding to the third type of interleaving, such as Qm=2 corresponds to no interleaving, Qm=4 corresponds to row-column interleaving or reverse row-column interleaving, Qm=6 corresponds to simplified row-column interleaving or simplified reverse row-column interleaving, and Qm=8 corresponds to no interleaving.

[0194] It can be seen that the relationship between the value of Qm and interleaving is similar to the relationship between the code rate threshold and interleaving. The principle can also be understood by referring to the above situation 1, and will not be repeated here.

[0195] It should also be understood that the above-mentioned interleaving determined by the coding rate and QAM order can also be implemented based on the MCS. For example, since the MCS table identifier (ID) corresponds to the coding rate and modulation order, and the modulation order corresponds to Qm, the above scheme can also be replaced by determining the corresponding target interleaving based on the MCS ID. In addition, since the principles of determining interleaving based on the coding rate and QAM order are similar, Case 1 and Case 2 can be implemented interchangeably.

[0196] Case 3: Select interleaving according to the encoding code length.

[0197] Among them, selecting interleaving according to the coding code length can be implemented independently, or can also be combined with selecting interleaving according to the coding code rate, that is, Case 1 and Case 3 can be implemented in combination, which are introduced below respectively.

[0198] 1) Independent implementation:

[0199] The first device may determine a target interlace from the at least two interlaces based on the encoding code length of the first encoding bit sequence, i.e., the encoding code length matches the code length corresponding to one of the at least two interlaces. The at least two interlaces correspond to different code length intervals, where the different code length intervals are open intervals and closed intervals, respectively. The encoding code length of the first encoding bit sequence matches the code length corresponding to the target interlace, i.e., the encoding code length of the first encoding bit sequence is within the code length interval (or segment) corresponding to the target interlace.

[0200] For example, the protocol may segment the supported encoding code lengths into at least two code length intervals, such as (k1, k2], (k2, k3], ..., (k t-1 ,k t ], where t is an integer greater than 1, k j and k j+1 represents the code rate threshold of the jth code length interval, j is an integer from 1 to t-1, k j <k j+1 , or the jth code length interval can also be [k j ,k j+1 ), the specific form of open intervals and closed intervals is not restricted. When it comes to the minimum or maximum value, all closed intervals may appear. For example, the range of the encoding code length is k1 to k2, and the code length interval is divided into 2 segments, such as [k1, k2], (k2, k3], or [k1, k2), [k2, k3]. In this case, k2 can be k2=K max / 2, or k2 = K max / 3, or k2 = K max / 4, or the above values ​​rounded up / down. Similarly, when the code length interval is divided into multiple segments, the thresholds of different code length intervals can be K max / Round up / down the value of x, where x is a positive integer greater than or equal to 2.

[0201] Each code length interval can correspond to a type of interleaver (or interleaver). Specifically, the complexity of the interleaver (or interleaver implementation) increases with increasing code length. That is, the complexity of the interleaver (or interleaver implementation) corresponding to different code length intervals increases in ascending order of code length to ensure performance gains. For example, the code length ratios of different code length intervals, in ascending order, include: a first code length interval and a second code length interval. The first code length interval corresponds to the first type of interleaver, and the second code length interval corresponds to the second type of interleaver.

[0202] 2) Combined implementation:

[0203] When the encoding code length is segmented, different code length intervals correspond to different interleavings. Within the different code length intervals, a code length interval containing the encoding code length of the first encoding bit sequence can correspond to the at least two aforementioned interleavings. Thus, the first device can further determine a target interleaving from the at least two interleavings based on the encoding code rate of the first encoding bit sequence.

[0204] For example, taking the jth code length interval [k j ,k j+1 ), the jth code length interval corresponds to the jth code rate threshold Its main features are It can gradually decrease as j increases, such as If the jth code length interval can correspond to multiple code rate thresholds, such as and Then the value of each bit rate threshold can gradually decrease as j increases, such as Or it could be If the encoding code length of the first encoding bit sequence is in the jth code length interval, the first device can determine a target interleaving from at least two interleavings based on the code rate threshold corresponding to the jth code length interval. The specific implementation principle can refer to the relevant introduction of the above situation 1 and will not be repeated here.

[0205] It is understandable that in the case of combined implementation, there may also be some code rate thresholds that do not change with the change of the code length interval, such as the code rate threshold r of non-interleaving. The code rate threshold r can remain unchanged and does not change with the change of the code length interval, such as r i =r j , holds true for any i, j. This approach has the advantage of maintaining good performance without losing performance as the code length changes.

[0206] It can also be understood that the benefit of combined implementation is that the performance gain brought by interleaving and the area reduction gain brought by simplified interleaving can be balanced under various coding code lengths and coding code rates, so that the hardware efficiency in each case is very high, and the rules can be flexibly changed according to the specific throughput indicators and performance requirements of the scenario.

[0207] Case 4: Select interleaving according to the basis matrix (base graph).

[0208] At least two types of interleaving correspond to different base matrices, such as NR's BG1 and BG2 correspond to the first type of interleaving, such as row-column interleaving or reverse row-column interleaving, and BGX corresponds to the second type of interleaving, such as simplified row-column interleaving or simplified reverse row-column interleaving. Alternatively, BGX can also be replaced with other names, such as new BG, BG3, BG4, etc., without specific limitation. In this way, the first device can determine a target interleaving from at least two types of interleaving according to the base matrix corresponding to the first coded bit sequence. Alternatively, Case 4 can also be implemented in combination with Cases 1-3 above, such as BG1 and BG2 correspond to the interleaving method of the prior art, and BGX corresponds to the solution of the embodiment of the present application. Specifically, Cases 1-3 can be used for implementation, which will not be repeated here.

[0209] Case 5: Select interleaving according to the scenario.

[0210] At least two types of interleaving correspond to different scenarios, such as the first type of interleaving corresponding to the eMBB scenario, such as row-column interleaving or reverse row-column interleaving; the second type of interleaving or the third type of interleaving corresponding to the high-throughput scenario, such as simplified row-column interleaving, simplified reverse row-column interleaving, or no interleaving; and the third type of interleaving corresponding to the URLLC scenario. Therefore, the first device can determine a target interleaving corresponding to the scenario corresponding to the first coded bit sequence, such as the service scenario corresponding to the service to which the first coded bit sequence belongs.

[0211] It's understandable that scenarios 5 and 4 can also be combined, such as using the new BGX encoding scheme for high-throughput scenarios. Furthermore, selecting interleaving schemes based on basemaps and scenarios allows compatibility with existing protocol content, requiring minimal protocol changes and requiring only targeted encoding scheme design for new scenarios and requirements.

[0212] The following are the simulation results corresponding to the solution of the embodiment of this application:

[0213] The impact of code rate on interleaver:

[0214] As shown in Figure 7, the horizontal axis represents the signal-to-noise ratio (SNR), and the vertical axis represents the block error rate (BLER). The message length is 8448, and the code rates from top left to bottom right are 22 / 24, 22 / 25, ..., 22 / 31, respectively. QAM256, the number of iterations is 4, and row-column interleaving is used for good performance, while non-interleaving is used for poor performance. It can be seen that at peak rate, the performance loss from non-interleaving is very small. At this code rate, removing the interleaver can bring area and power gains. However, as the code rate decreases, the base graph degree distribution becomes more irregular, and the gains from interleaving gradually increase, even though interleaving introduces additional complexity.

[0215] In summary, the first device, as a transmitter, can determine an interleaving scheme that matches the coding information from at least two interleaving schemes based on the coding information of the first coded bit sequence. Correspondingly, the second device, as a receiver, can also execute the same logic as the transmitter to perform deinterleaving. In this way, the interleaving scheme and the deinterleaving scheme can be dynamically adjusted according to the coding situation. For example, when the coding rate is high, a relatively simple interleaving scheme can be selected, such as simplified row-column interleaving, simplified reverse row-column interleaving, or even no interleaving, to achieve hardware simplification, power consumption reduction, and avoid complexity bottlenecks; conversely, when the coding rate is low, a relatively complex interleaving scheme can be selected, such as row-column interleaving, reverse row-column interleaving, or multi-level interleaving, to ensure performance gain. In this way, hardware simplification, power consumption reduction, and performance gain can be achieved.

[0216] The communication method provided in the embodiment of the present application is described in detail above in conjunction with Figures 6 and 7. The communication device for executing the communication method provided in the embodiment of the present application is described in detail below in conjunction with Figures 8 and 9.

[0217] Figure 8 is a structural diagram of a communication device according to an embodiment of the present application. As shown in Figure 8 , the communication device 800 includes a transceiver module 801 and a processing module 802. For ease of illustration, Figure 8 only shows the main components of the communication device.

[0218] In one possible embodiment, the communication device 800 can be applied to the first device in the above-mentioned communication method to perform the functions of the above-mentioned first device. For example, the transceiver module 801 can implement the transceiver function of the first device, and the processing module 802 can implement other functions of the first device in addition to the transceiver function.

[0219] In another possible embodiment, the communication device 800 can be applied to the second device in the above-mentioned communication method to perform the functions of the above-mentioned second device. For example, the transceiver module 801 can implement the transceiver function of the second device, and the processing module 802 can implement other functions of the second device in addition to the transceiver function.

[0220] Optionally, the transceiver module 801 may include a sending module (not shown in FIG8 ) and a receiving module (not shown in FIG8 ). The sending module is used to implement the sending function of the communication device 800 , and the receiving module is used to implement the receiving function of the communication device 800 .

[0221] Optionally, the communication device 800 may further include a storage module (not shown in FIG8 ) storing a program or instruction. When the processing module 802 executes the program or instruction, the communication device 800 may perform the functions of the method shown in FIG6 .

[0222] It can be understood that the communication device 800 can be a network device, a chip (system) or other parts or components that can be set in the network device, or a device that includes a network device. This application does not limit this.

[0223] In addition, the technical effects of the communication device 800 can refer to the technical effects of the above-mentioned communication method, which will not be repeated here.

[0224] Figure 9 is a second structural diagram of a communication device provided in an embodiment of the present application. Exemplarily, the communication device may be a terminal, or a chip (system) or other component or assembly that can be provided in a terminal. As shown in Figure 9, the communication device 900 may include a processor 901. Optionally, the communication device 900 may further include a memory 902 and / or a transceiver 903. The processor 901 is coupled to the memory 902 and the transceiver 903, such as by a communication bus.

[0225] The following is a detailed introduction to the various components of the communication device 900 in conjunction with FIG9 :

[0226] The processor 901 is the control center of the communication device 900 and can be a single processor or a collective term for multiple processing elements. For example, the processor 901 can be one or more central processing units (CPUs), an application specific integrated circuit (ASIC), or one or more integrated circuits configured to implement the embodiments of the present application, such as one or more digital signal processors (DSPs) or one or more field programmable gate arrays (FPGAs).

[0227] Optionally, the processor 901 may execute various functions of the communication device 900 , such as executing the communication method shown in FIG. 6 , by running or executing a software program stored in the memory 902 and calling data stored in the memory 902 .

[0228] In a specific implementation, as an embodiment, the processor 901 may include one or more CPUs, such as CPU0 and CPU1 shown in FIG. 9 .

[0229] In a specific implementation, as an embodiment, the communication device 900 may also include multiple processors, such as the processor 901 and the processor 904 shown in FIG9 . Each of these processors may be a single-core processor (single-CPU) or a multi-core processor (multi-CPU). The processor herein may refer to one or more devices, circuits, and / or processing cores for processing data (e.g., computer program instructions).

[0230] The memory 902 is used to store the software program for executing the solution of the present application, and the execution is controlled by the processor 901. The specific implementation method can refer to the above method embodiment and will not be repeated here.

[0231] Optionally, the memory 902 can be a read-only memory (ROM) or other type of static storage device that can store static information and instructions, a random access memory (RAM) or other type of dynamic storage device that can store information and instructions, or an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compact disc, laser disc, optical disc, digital versatile disc, Blu-ray disc, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto. The memory 902 can be integrated with the processor 901 or exist independently and be coupled to the processor 901 through the interface circuit of the communication device 900 (not shown in Figure 9). This embodiment of the present application does not specifically limit this.

[0232] Transceiver 903 is used for communication with other communication devices. For example, if communication device 900 is a terminal, transceiver 903 can be used to communicate with a network device or another terminal device. For another example, if communication device 900 is a network device, transceiver 903 can be used to communicate with a terminal or another network device.

[0233] Optionally, the transceiver 903 may include a receiver and a transmitter (not shown separately in FIG9 ), wherein the receiver is used to implement a receiving function, and the transmitter is used to implement a sending function.

[0234] Optionally, the transceiver 903 may be integrated with the processor 901 or exist independently and be coupled to the processor 901 through an interface circuit (not shown in FIG. 9 ) of the communication device 900 . This embodiment of the present application does not specifically limit this.

[0235] It is understandable that the structure of the communication device 900 shown in FIG9 does not constitute a limitation on the communication device, and an actual communication device may include more or fewer components than shown in the figure, or combine certain components, or arrange the components differently.

[0236] In addition, the technical effects of the communication device 900 can refer to the technical effects of the methods described in the above method embodiments, and will not be repeated here.

[0237] It should be understood that the processor in the embodiments of the present application may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0238] It should also be understood that the memory in the embodiments of the present application may be a volatile memory or a non-volatile memory, or may include both volatile and non-volatile memories. Among them, the non-volatile memory may be a read-only memory (ROM), a programmable read-only memory (PROM), an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), or a flash memory. The volatile memory may be a random access memory (RAM), which is used as an external cache. By way of example and not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous DRAM (SDRAM), double data rate SDRAM (DDR SDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0239] The above embodiments can be implemented in whole or in part by software, hardware (such as circuits), firmware or any other combination. When implemented using software, the above embodiments can be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, the process or function described in the embodiment of the present application is generated in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions can be transmitted from one website, computer, server or data center to another website, computer, server or data center via a wired (such as infrared, wireless, microwave, etc.) method. The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device such as a server or data center that contains one or more available media sets. The available medium can be a magnetic medium (for example, a floppy disk, a hard disk, a tape), an optical medium (for example, a DVD), or a semiconductor medium. The semiconductor medium can be a solid-state drive.

[0240] It should be understood that the term "and / or" as used herein simply describes a relationship between associated objects, indicating that three possible relationships exist. For example, "A and / or B" can represent: A alone, A and B together, or B alone. A and B can be singular or plural. Furthermore, the character " / " as used herein generally indicates an "or" relationship between the associated objects, but it may also indicate an "and / or" relationship. For specific understanding, please refer to the context.

[0241] In this application, "at least one" means one or more, and "plurality" means two or more. "At least one of the following" or similar expressions refers to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or plural.

[0242] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0243] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0244] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0245] In the several embodiments provided in this application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely schematic. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0246] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0247] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0248] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0249] The above description is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of this application. Therefore, the scope of protection of this application should be based on the scope of protection of the claims.

Claims

1. A communication method, characterized in that: Applied to a first device, the method includes: The first device obtains a first coded bit sequence; The first device performs interleaving on the first coded bit sequence to obtain a second coded bit sequence, wherein the interleaving is an interleaving determined from at least two interleavings according to coding information of the first coded bit sequence; The first device modulates the second coded bit sequence into a coded symbol sequence; The first device transmits the coded symbol sequence.

2. A communication method, characterized in that: Applied to the second device, the method includes: The second device receives the first information; The second device performs deinterleaving on the first information to obtain information to be decoded, wherein the deinterleaving corresponds to the interleaving, and the interleaving is an interleaving determined from at least two interleavings according to the coding information corresponding to the information to be decoded; The second device decodes the information to be decoded.

3. The method according to claim 1 or 2, characterized in that The at least two interlaces include at least two interlaces of a first type of interlace, a second type of interlace, or a third type of interlace, and the at least two interlaces are different in at least one of the following: the number of interlaces or the number of groups of interlaces.

4. The method according to claim 3, characterized in that The first type of interleaving includes at least one of the following: row-column interleaving, reverse row-column interleaving, or multi-level interleaving.

5. The method according to claim 4, characterized in that The multi-level interleaving includes a combination of quasi-cyclic structure QC-level interleaving and row-column interleaving, or a combination of QC-level interleaving and reverse order row-column interleaving.

6. The method according to claim 5, characterized in that The QC-level interleaving refers to interleaving the coding sequence with the lifting factor as the granularity.

7. The method according to any one of claims 4 to 6, characterized in that The second type of interleaving includes at least one of the following: simplified row-column interleaving, simplified reverse-order row-column interleaving, or simplified multi-level interleaving.

8. The method according to claim 7, characterized in that If the first type of interleaving is row-column interleaving, the second type of interleaving is simplified row-column interleaving; or, if the first type of interleaving is reverse row-column interleaving, the second type of interleaving is simplified reverse row-column interleaving; or, if the first type of interleaving is multi-level interleaving, the second type of interleaving is simplified multi-level interleaving.

9. The method according to claim 7 or 8, characterized in that The coded bit sequence used for the second type of interleaving includes the number X of groups for the second type of interleaving, where X<R, R is the number of energy levels contained in a modulation symbol, and both X and R are positive integers. The number of bits mapped to each modulation symbol from the coded bit sequence after the second type of interleaving is Qm bits, the Qm bits come from the X groups, at least two of the Qm bits come from the same group of the X groups, and the relative positions of the at least two bits in the coded bit sequence used for the second type of interleaving and the coded bit sequence after the simplified interleaving remain unchanged.

10. The method according to any one of claims 3 to 9, characterized in that The third type of interleaving includes non-interleaving.

11. The method according to any one of claims 3 to 10, characterized in that The coding information includes a coding rate, and the coding rate matches a coding rate corresponding to one of the at least two interleavings.

12. The method according to claim 11, characterized in that The at least two interleavings correspond to different code rate intervals, respectively. The different code rate intervals are open intervals and closed intervals, respectively. The encoding code rate is located in the code rate interval corresponding to one of the at least two interleavings.

13. The method according to claim 12, characterized in that The different code rate intervals include, in order from small to large code rate, a first code rate interval and a second code rate interval. The first code rate interval corresponds to the first type of interleaving, and the second code rate interval corresponds to the second type of interleaving.

14. The method according to claim 12, characterized in that The different code rate intervals include, in order from small to large, a first code rate interval, a second code rate interval, and a third code rate interval. The first code rate interval corresponds to the first type of interleaving, the second code rate interval corresponds to the second type of interleaving, and the third code rate interval corresponds to the third type of interleaving.

15. The method according to any one of claims 3 to 10, characterized in that The coding information includes a coding rate, the at least two interleavings correspond to a rate threshold, and a magnitude relationship between the coding rate and the rate threshold is used to determine one interleaving from the at least two interleavings.

16. The method according to claim 15, characterized in that The code rate threshold is at least one of the following: the code rate of the core matrix in the base matrix, or the highest code rate of the modulation and coding scheme MCS.

17. The method according to claim 15 or 16, characterized in that The code rate threshold includes a first code rate threshold; if the encoding code rate is less than or equal to the first code rate threshold, one interleaving from the at least two interleavings is determined to be the first type of interleaving; if the encoding code rate is greater than the first code rate threshold, one interleaving from the at least two interleavings is determined to be the second type of interleaving.

18. The method according to claim 15 or 16, characterized in that The code rate threshold includes a first code rate threshold and a second code rate threshold, and the first code rate threshold is less than the second code rate threshold; if the encoding code rate is less than or equal to the first code rate threshold, one interleaving is determined from the at least two interleavings as the first type of interleaving; if the encoding code rate is greater than the first code rate threshold and the encoding code rate is less than or equal to the second code rate threshold, one interleaving is determined from the at least two interleavings as the second type of interleaving; if the encoding code rate is greater than the second code rate threshold, one interleaving is determined from the at least two interleavings as the third type of interleaving.

19. The method according to claim 15 or 16, characterized in that The code rate threshold includes a first code rate threshold, a second code rate threshold and a third code rate threshold, the first code rate threshold is less than the second code rate threshold, and the second code rate threshold is less than the third code rate threshold; if the encoding code rate is less than or equal to the first code rate threshold, one interleaving is determined from the at least two interleavings as the third type of interleaving; if the encoding code rate is greater than the first code rate threshold and the encoding code rate is less than or equal to the second code rate threshold, one interleaving is determined from the at least two interleavings as the first type of interleaving; if the encoding code rate is greater than the second code rate threshold and the encoding code rate is less than or equal to the third code rate threshold, one interleaving is determined from the at least two interleavings as the second type of interleaving; if the encoding code rate is greater than the third code rate threshold, one interleaving is determined from the at least two interleavings as the third type of interleaving.

20. The method according to any one of claims 3 to 19, characterized in that The encoding information further includes an encoding code length, and the encoding code length matches a code length corresponding to one of the at least two interleavings.

21. The method according to claim 20, characterized in that In different code length intervals, a code length interval where the encoding code length is located corresponds to the at least two interleavings, and the different code length intervals respectively correspond to different interleavings.

22. The method according to claim 20, characterized in that The at least two interleaving operations correspond to different code length intervals respectively.

23. The method according to claim 21 or 22, characterized in that The different code length intervals and code length rates include, in descending order: a first code length interval and a second code length interval, the first code length interval corresponds to the first type of interleaving, and the second code length interval corresponds to the second type of interleaving.

24. The method according to any one of claims 3 to 23, characterized in that The Qm corresponding to the coding information matches the Qm corresponding to one of the at least two interleavings, where Qm is the number of bits mapped to each modulation symbol.

25. The method according to any one of claims 3 to 24, characterized in that In different base matrices, the base matrix corresponding to the coding information corresponds to one of the at least two interleavings, and the different base matrices correspond to different interleavings.

26. The method according to any one of claims 1 to 25, characterized in that The coding information further includes at least one of the following: information on the modulation order, an identifier of the MCS, or the number of rows and columns of the matrix.

27. A communication device, characterized in that: The apparatus comprises: a module for performing the method according to any one of claims 1-26.

28. A communication device, characterized in that: The communication device comprises: a processor coupled to a memory; the memory is used to store computer instructions, and when the processor executes the instructions, the communication device executes the method according to any one of claims 1 to 26.

29. The communication device according to claim 28, wherein: Also includes: The memory.

30. The communication device according to claim 28 or 29, characterized in that A transceiver is also included for the communication device to communicate with other communication devices.

31. A communication system, characterized in that: The system includes at least one of the following: a first device for performing the method according to any one of claims 1, 3-26, and a second device for performing the method according to any one of claims 2-26.

32. A computer-readable storage medium, characterized in that The computer-readable storage medium includes a computer program or instructions, and when the computer program or instructions are executed on a computer, the method according to any one of claims 1 to 26 is implemented.

33. A computer program product, characterized in that The method comprises a computer program or instructions, which, when executed, enables the method according to any one of claims 1 to 26 to be implemented.

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