Modulation symbol processing methods, first communication node, second communication node, and medium
By modulating and processing M/2 first data to generate M first complex modulation symbols, and utilizing technical means such as data repetition, reordering, and cyclic shift, the peak-to-average ratio of the modulation symbols is reduced, thereby solving the problem in the existing technology that it is difficult to meet the requirements of high coverage and low power consumption terminals, and achieving a lower peak-to-average ratio and better communication effects.
Patent Information
- Application Number
- PCT/CN2024/140670
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-04-15
- Filing Date
- 2024-12-19
- Publication Date
- 2025-10-23
AI Technical Summary
Existing modulation methods are unlikely to meet the needs of future communication systems with higher coverage requirements or more restricted device design. Especially in the terahertz frequency band, the peak-to-average power ratio (PAPR) is unlikely to meet the requirements of low-power and low-cost terminals.
By modulating M/2 first data into M first complex modulation symbols and processing these symbols to reduce their peak-to-average ratio, the specific method includes operations such as data repetition, reordering, cyclic shift and complex coefficient multiplication to ensure that there is a correlation between the symbols to reduce phase changes.
It achieves a lower peak-to-average ratio, meets communication scenarios with higher coverage requirements or more restricted device design, and supports low-cost and low-power terminal devices.
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Figure CN2024140670_23102025_PF_FP_ABST
Abstract
Description
Modulation symbol processing method, first communication node, second communication node and medium TECHNICAL FIELD
[0001] The present application relates to the technical field of communication, for example, to a modulation symbol processing method, a first communication node, a second communication node and a medium. BACKGROUND
[0002] Future communication systems not only need to improve transmission rate, but also need to support more different types of terminals. In order to better support low-cost and low-power terminals, it is necessary to consider designing signals with low peak-to-average power ratio (PAPR). In addition, in the terahertz scenario, due to the non-ideal nature of devices, it is also necessary to transmit signals with low peak-to-average power ratio.
[0003] However, the peak-to-average ratio of the current modulation method still cannot meet the requirements of higher coverage or more limited device design scenarios. SUMMARY
[0004] The present application provides a modulation symbol processing method, a first communication node, a second communication node and a medium.
[0005] In a first aspect, the embodiments of the present application provide a modulation symbol processing method, comprising:
[0006] modulating M / 2 first data into M first complex modulation symbols, wherein M is an integer greater than or equal to 2, M / 2 first complex modulation symbols are determined by one first data, and M / 2 first complex modulation symbols are determined by two first data;
[0007] processing the M first complex modulation symbols.
[0008] In a second aspect, the embodiments of the present application provide a modulation symbol processing method, comprising:
[0009] obtaining M fourth complex modulation symbols generated by M / 2 first data, wherein M is an integer greater than or equal to 2, M / 2 fourth complex modulation symbols are determined by one first data, and M / 2 fourth complex modulation symbols are determined by two first data;
[0010] processing the M fourth complex modulation symbols.
[0011] In a third aspect, the embodiments of the present application provide a first communication node, comprising:
[0012] one or more processors;
[0013] a storage device for storing one or more programs;
[0014] When the one or more programs are executed by the one or more processors, the one or more processors are caused to implement the modulation symbol processing method according to the first aspect of the present application.
[0015] In a fourth aspect, the embodiments of the present application provide a second communication node, comprising:
[0016] one or more processors;
[0017] a storage device configured to store one or more programs;
[0018] When the one or more programs are executed by the one or more processors, the one or more processors are caused to implement the modulation symbol processing method according to the second aspect of the present application.
[0019] In a fifth aspect, the embodiments of the present application provide a storage medium, which stores a computer program, and the computer program is executed by a processor to implement any of the methods according to the embodiments of the present application.
[0020] More details of the above embodiments and other aspects of the present application and implementation manners thereof are provided in the following description and claims. DETAILED DESCRIPTION
[0021] Fig. 1 is a flow diagram of a modulation symbol processing method according to an embodiment of the present application;
[0022] Fig. 2 is a structural diagram of a communication system according to an embodiment of the present application;
[0023] Fig. 3a is a flow diagram of another modulation symbol processing method according to an embodiment of the present application;
[0024] Fig. 3b is an implementation diagram of real part and imaginary part merging and power normalization at a receiving side according to an embodiment of the present application;
[0025] Fig. 3c is another implementation diagram of real part and imaginary part merging and power normalization at a receiving side according to an embodiment of the present application;
[0026] Fig. 4 is a flow diagram of a communication signal generation and transmission method according to an embodiment of the present application;
[0027] Fig. 5 is a flow diagram of another communication signal generation and transmission method according to an embodiment of the present application;
[0028] Fig. 6 is a flow diagram of another communication signal generation and transmission method according to an embodiment of the present application;
[0029] Fig. 7 is an implementation diagram of reordering according to an embodiment of the present application;
[0030] FIG. 8 is a schematic diagram illustrating another implementation of reordering according to an embodiment of the present application;
[0031] FIG. 9 is a schematic diagram illustrating a method of generating and transmitting a communication signal according to an embodiment of the present application;
[0032] FIG. 10 is a schematic diagram illustrating an implementation of real and imaginary interpolation according to an embodiment of the present application;
[0033] FIG. 11 is a schematic diagram illustrating another implementation of real and imaginary interpolation according to an embodiment of the present application;
[0034] FIG. 12 is a schematic diagram illustrating a structure of a modulation symbol processing apparatus according to an embodiment of the present application;
[0035] FIG. 13 is a schematic diagram illustrating another structure of a modulation symbol processing apparatus according to an embodiment of the present application;
[0036] FIG. 14 is a schematic diagram illustrating a structure of a first communication node according to an embodiment of the present application;
[0037] FIG. 15 is a schematic diagram illustrating a structure of a second communication node according to an embodiment of the present application. DETAILED DESCRIPTION
[0038] To make the objects, technical solutions and advantages of the present application clearer, the embodiments of the present application will be described in detail below with reference to the accompanying drawings. It should be explained that the embodiments in the present application and the features in the embodiments can be combined with each other in any manner without conflict.
[0039] The steps shown in the flowcharts of the accompanying drawings can be executed in a computer system such as a set of computer-executable instructions. Moreover, although the logical order is shown in the flowcharts, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0040] The terms "first", "second", and the like in the present application are used to distinguish similar objects, and do not necessarily have to describe a specific order or sequence.
[0041] The communication standard supports binary phase shift keying (BPSK) and π / 2-binary phase shift keying (π / 2-BPSK), where π / 2-BPSK can make the peak-to-average ratio lower when using a discrete Fourier transform spread-orthogonal frequency division multiplexing (DFT-s-OFDM) waveform for transmission. In BPSK modulation, a data bit (also referred to as bit data) b(i) generates a modulation symbol d(i) according to the following formula:
[0042] Each modulation symbol can select two phases. The generation formula of π / 2-BPSK is as follows:
[0043] At this time, each modulation symbol is still selected from two phases, but the difference is that the modulation symbol is rotated according to the bit position. Compared with BPSK, the even modulation symbol of π / 2-BPSK is unchanged, and the odd modulation symbol is rotated by 90 degrees. Multiplying by the imaginary number j corresponds to rotating 90 degrees on the complex plane. This difference makes the phase change of π / 2-BPSK smaller, so that the peak-to-average ratio is lower. However, the peak-to-average ratio of π / 2-BPSK is still difficult to meet the requirements of higher coverage or more limited device design scenarios, and a modulation method with a lower peak-to-average ratio needs to be designed. The present application proposes a new modulation method that can effectively reduce the peak-to-average ratio of the transmitted signal, thereby better supporting various related applications in the future.
[0044] In an example embodiment, FIG. 1 is a flowchart of a modulation symbol processing method provided by an embodiment of the present application. The modulation symbol processing method can be applied to a case of processing a modulation symbol, such as a case of modulating a modulation symbol. The modulation symbol processing method can be executed by a modulation symbol processing apparatus, which can be implemented by software and / or hardware and integrated on a first communication node. The first communication node can be a communication node that generates a modulation symbol, such as a first complex modulation symbol, such as a terminal device. The first communication node can be a transmission side of the modulation symbol.
[0045] FIG. 2 is a structural diagram of a communication system provided by an embodiment of the present application. The first communication node 1 and the second communication node 2 can transmit a communication signal. The communication signal can be generated based on first data required to be transmitted between the first communication node 1 and the second communication node 2.
[0046] In one embodiment, the application provides a modulation symbol processing method, comprising: modulating M / 2 first data into M first complex modulation symbols; and processing the M first complex modulation symbols.
[0047] As shown in FIG. 1, the modulation symbol processing method provided by the application comprises the following steps:
[0048] S110, modulating M / 2 first data into M first complex modulation symbols, wherein M is an integer greater than or equal to 2, M / 2 first complex modulation symbols are determined by one first data, and M / 2 first complex modulation symbols are determined by two first data.
[0049] The first data can be data to be transmitted by a first communication node, and the first communication node can be a communication node that needs to send the first data. The first data can be uncoded data, or can be coded data such as channel coded data. The first complex modulation symbol can be a modulation symbol after modulation of the first data. The first data can be first bit data (also referred to as first data bits), and the bit data is also referred to as data bits, which can be identified by bit. The first bit data can be data composed of one bit by one bit.
[0050] The operation can modulate M / 2 first data b(k) into M first complex modulation symbols d(i), wherein k=0, 1,..., M / 2-1, and i=0, 1,..., M-1.
[0051] The embodiment can modulate M / 2 first data to obtain M first complex modulation symbols, and the specific means is not limited. The processing of M / 2 first data can be performed first to generate more data, and then modulation is performed. Alternatively, M / 2 first data can be directly modulated to generate M first complex modulation symbols. For example, the modulation can be based on and modulating corresponding complex modulation symbols, i=0, 1,..., M-1, and a total of M first complex modulation symbols are modulated.
[0052] In one embodiment, an even bit first complex modulation symbol is generated according to one first data, and an odd bit first complex modulation symbol is generated according to two first data.
[0053] In one embodiment, an odd bit first complex modulation symbol is generated according to one first data, and an even bit first complex modulation symbol is generated according to two first data.
[0054] In one embodiment, the M / 2 first data are repeated, then reordered, and finally modulated into M first complex modulation symbols. When repeating the first data, each first data can be repeated in turn, and the repeated data is placed after the repeated data. For example, if the first data include b(0), b(l), b(2), b(3), and the process of repeating twice is performed, b(0) is repeated first, and the repeated data is placed after b(0), resulting in b(0), b(0). Then the subsequent first data are repeated in turn to obtain the final repeated data, b(0), b(0), b(l), b(l), b(2), b(2), b(3), b(3). The number of times of repetition is not limited here, and can be at least twice, such as twice, three times, four times, five times, six times, etc.
[0055] The means of reordering is not limited and can include one or more operations of cyclic shift and exchange. The reordering can be performed using the method of cyclic shift, such as cyclic shift of one bit to the left of the repeated data. After this operation, a communication signal with very low peak-to-average ratio can be obtained. When performing the exchange operation, the exchanged bits can be determined based on the number of times of repetition. For example, when the number of times of repetition is four, the 4n+2 bit and the 4n+3 bit can be exchanged.
[0056] In one embodiment, the operation can first modulate the M / 2 first data to obtain M / 2 second complex modulation symbols, then recombine based on d'(k) and d'((k+1)mod M / 2) to obtain third complex modulation symbols, d'(k) being the kth second complex modulation symbol. The third complex modulation symbols and the second complex modulation symbols are summarized to obtain M first complex modulation symbols. In the process of summarizing the third complex modulation symbols and the second complex modulation symbols, the position of the third complex modulation symbols is not limited, and can be between the second complex modulation symbols, after all the second complex modulation symbols, or before all the second complex modulation symbols.
[0057] In one embodiment, after determining the third complex modulation symbols, the determined third complex modulation symbols can be inserted between the second complex modulation symbols, and the position of the insertion is not limited. Since the third complex modulation symbols are generated based on the second complex modulation symbols, the third complex modulation symbols can be inserted between the second complex modulation symbols used to generate the third complex modulation symbols.
[0058] For example, the third complex modulation symbols are inserted between d'(k) and d'((k+1)mod M / 2) used to generate the third complex modulation symbols, thereby obtaining the first complex modulation symbols.
[0059] The third complex modulation symbol can be located at an odd bit of the first complex modulation symbol, or located at an even bit of the first complex modulation symbol.
[0060] S120, processing the M first complex modulation symbols.
[0061] The means for processing the first complex modulation symbol is not limited, for example, the first complex modulation symbol can be processed by complex coefficient multiplication, or cyclic shift, or complex coefficient multiplication and cyclic shift operation.
[0062] The cyclic shift can be understood as a circular movement, for example, the low bits removed are placed in the high bits, or the high bits removed are placed in the low bits.
[0063] The direction of the cyclic shift is not limited, for example, it can be a cyclic left shift, or a cyclic right shift. For example, the low bits removed are placed in the high bits of the corresponding modulation symbol. For example, the high bits removed are placed in the low bits of the corresponding modulation symbol.
[0064] In an embodiment, the first complex modulation symbol can be processed to obtain a corresponding communication signal, for example, a first communication signal.
[0065] Discrete Fourier transform (DFT) is performed on M points to obtain frequency domain data of M subcarriers;
[0066] The frequency domain data is mapped to a corresponding subcarrier position;
[0067] Inverse discrete Fourier transform (IFFT) is performed on N points of data carried by the subcarriers to obtain a first communication signal.
[0068] The first communication signal can also be processed as follows:
[0069] A cyclic prefix is added to obtain a second communication signal, and the second communication signal is mixed and transmitted; or,
[0070] A guard interval is added to the first communication signal to obtain a third communication signal, and the third communication signal is mixed and transmitted; or,
[0071] The first communication signal is mixed and transmitted.
[0072] The application provides a modulation symbol processing method, M / 2 first data are modulated into M first complex modulation symbols, and then the first complex modulation symbols are processed. In a traditional modulation mode, each modulation symbol is independent of each other. In the application, there is a certain correlation between the modulation symbols, so as to reduce the phase change between the modulation symbols, and realize low peak-to-average ratio modulation. The application meets the requirements of higher coverage or more limited device design scenarios.
[0073] Based on the above embodiment, a modified embodiment of the above embodiment is proposed. It should be noted that, in order to simplify the description, only the differences from the above embodiment are described in the modified embodiment.
[0074] In one embodiment, modulating the M / 2 first data into M first complex modulation symbols includes:
[0075] Will and generating a corresponding first complex modulation symbol as the real part and the imaginary part, respectively, or as the imaginary part and the real part, respectively;
[0076] Wherein, i=0, 1, ..., M-1, b(k) is the kth first data, and k=0, 1, ..., M / 2-1.
[0077] In the process of modulating the first complex modulation symbol, this embodiment is based on and Modulate the first complex modulation symbol corresponding to the modulation. and respectively as the real part and imaginary part of the corresponding first complex modulation symbol, or as the imaginary part and real part of the corresponding first complex modulation symbol.
[0078] The value of k The same situation The value of k The other cases are not described here.
[0079] In one embodiment, As the real part of the corresponding first complex modulation symbol, as the imaginary part of the corresponding first complex modulation symbol.
[0080] In one embodiment, As the imaginary part of the corresponding first complex modulation symbol, as the real part of the corresponding first complex modulation symbol.
[0081] In the and In the process of using them as real and imaginary parts or as imaginary and real parts respectively, you can directly use and The two parts can be used as the real part and the imaginary part, or as the imaginary part and the real part respectively; or the two parts can be used as the real part and the imaginary part, or as the imaginary part and the real part respectively after the operation. The operation method is not limited here.
[0082] In one embodiment, the and generate the corresponding first complex modulation symbols respectively as real part and imaginary part, including:
[0083] generate the corresponding first complex modulation symbols according to the following formula:
[0084] or,
[0085] generate the corresponding first complex modulation symbols according to the following formula:
[0086] The embodiment can generate the corresponding first complex modulation symbols respectively as real part and imaginary part of and generate the corresponding first complex modulation symbols according to the following formula:
[0087] The embodiment can generate the corresponding first complex modulation symbols respectively as imaginary part and real part of and generate the corresponding first complex modulation symbols according to the following formula:
[0088] In one embodiment, the step of modulating the M / 2 first data into M first complex modulation symbols includes:
[0089] generate the first complex modulation symbols of even number of bits according to one first data, and generate the first complex modulation symbols of odd number of bits respectively as real part and imaginary part or respectively as imaginary part and real part of two first data.
[0090] In the process of generating the first complex modulation symbols, the M / 2 first complex modulation symbols determined by one first data are located at even number of bits, and the M / 2 first complex modulation symbols determined by two first data are located at odd number of bits. In the process of generating the first complex modulation symbols according to two first data, the two first data can be respectively as real part and imaginary part of the corresponding first complex modulation symbols. The two first data can also be respectively as imaginary part and real part of the corresponding first complex modulation symbols.
[0091] In one embodiment, the first complex modulation symbols of even number of bits are generated according to b(k), and the first complex modulation symbols of odd number of bits are generated based on b(k) and b((k+1)mod M / 2).
[0092] In the case of generating the first complex modulation symbols of even number of bits based on b(k), b(k) subjected to different operation processing can be respectively as real part and imaginary part of the corresponding first complex modulation symbols.
[0093] In the case of generating the first complex modulation symbol of odd number of bits based on b(k) and b((k+1)mod M / 2), the operated b(k) and b((k+1)mod M / 2) can be taken as the real part and the imaginary part of the corresponding first complex modulation symbol respectively, or taken as the imaginary part and the real part of the corresponding first complex modulation symbol respectively.
[0094] In one embodiment, the generating the first complex modulation symbol of even number of bits according to the first data, the generating the first complex modulation symbol of odd number of bits according to two first data taken as the real part and the imaginary part or taken as the imaginary part and the real part respectively, comprises:
[0095] The corresponding first complex modulation symbol is generated according to the following formula:
[0096] Or,
[0097] The corresponding first complex modulation symbol is generated according to the following formula:
[0098] In one embodiment, the generating the first complex modulation symbol of even number of bits according to the first data, the generating the first complex modulation symbol of odd number of bits according to two first data taken as the real part and the imaginary part. For example, the corresponding first complex modulation symbol is generated according to the following formula:
[0099] Wherein the two first data are b(k) and b((k+1)mod M / 2). In this example, the operated b(k) is taken as the real part of the corresponding first complex modulation symbol, and the operated b((k+1)mod M / 2) is taken as the imaginary part of the corresponding first complex modulation symbol.
[0100] In one embodiment, the generating the first complex modulation symbol of even number of bits according to the first data, the generating the first complex modulation symbol of odd number of bits according to two first data taken as the imaginary part and the real part. For example, the corresponding first complex modulation symbol is generated according to the following formula:
[0101] Wherein the two first data are b(k) and b((k+1)mod M / 2). In this example, the operated b(k) is taken as the imaginary part of the corresponding first complex modulation symbol, and the operated b((k+1)mod M / 2) is taken as the real part of the corresponding first complex modulation symbol.
[0102] In one embodiment, the modulating the M / 2 first data into M first complex modulation symbols comprises:
[0103] The M / 2 first data are quadruple repeated and reordered to obtain 2M second data;
[0104] The M / 2 first data are modulated in a QPSK manner to obtain M first complex modulation symbols.
[0105] The first data can be quadrupled and reordered in this embodiment. In the process of quadrupling the first data, the quadrupled data can be placed after the data that is quadrupled to ensure that the same data is adjacent. Then the second data is obtained by reordering. In this embodiment, the reordering can be performed by cyclically shifting the quadrupled data bits left or right by at least one bit. For example, the quadrupled data bits are cyclically shifted left or right by at least one bit, and then the data at specific positions is exchanged.
[0106] The second data is then modulated in a QPSK manner to obtain the first complex modulation symbols.
[0107] In one embodiment, the reordering operation is a left cyclic shift by one bit.
[0108] The first data that is quadrupled can be cyclically shifted left by one bit to obtain the second data in this embodiment.
[0109] In one embodiment, the reordering operation is a left cyclic shift by one bit, and the data at specific positions is exchanged.
[0110] The specific positions are not limited here and can be any positions in the data after quadrupling. The specific positions can be associated with the quadrupling multiple. For example, the specific positions can be 4n+2 and 4n+3 in the case of quadrupling.
[0111] The data at the specific positions in the data that is cyclically shifted left by one bit can be exchanged to obtain the second data in this embodiment.
[0112] In one embodiment, the modulation of the M / 2 first data into M first complex modulation symbols includes:
[0113] The M / 2 first data are modulated in a binary phase shift keying (BPSK) manner to obtain M / 2 second complex modulation symbols.
[0114] The real and imaginary parts of the second complex modulation symbols are recombined to obtain M / 2 third complex modulation symbols.
[0115] The third complex modulation symbols are inserted between d'(k) and d'((k+1)mod M / 2) to obtain M first complex modulation symbols, where d'(k) is the kth second complex modulation symbol and d'((k+1)mod M / 2) is the (k+1)mod M / 2th second complex modulation symbol.
[0116] The first data is modulated into complex modulation symbols first, and then the complex modulation symbols are recombined and interpolated to obtain M first complex modulation symbols.
[0117] In the process of recombining the real part and the imaginary part of the second complex modulation symbol, any two second complex modulation symbols can be recombined. In the process of generating the third complex modulation symbol, how to generate M / 2 third complex modulation symbols based on the second complex modulation symbol is not limited, as long as it can be demodulated after being agreed with the receiving side. For example, the corresponding third complex modulation symbol can be generated based on adjacent second complex modulation symbols. The number of adjacent second complex modulation symbols can be at least two, and the number of adjacent second complex modulation symbols can be even. The corresponding third complex modulation symbol can also be generated based on the second complex modulation symbol selected according to a set rule. The set rule can be the second complex modulation symbol at the set position.
[0118] For example, the adjacent second complex modulation symbols can be d'(k) and d'((k+1)mod M / 2). In the process of recombining to obtain the third complex modulation symbol, the real part and the imaginary part of d'(k) and d'((k+1)mod M / 2) can be recombined to obtain the third complex modulation symbol.
[0119] In this embodiment, the third complex modulation symbol is inserted between d'(k) and d'((k+1)mod M / 2), realizing the aggregation of the second complex modulation symbol and the third complex modulation symbol, and obtaining the first complex modulation symbol.
[0120] In one embodiment, the recombination of the real part and the imaginary part of the second complex modulation symbol to obtain M / 2 third complex modulation symbols comprises:
[0121] The imaginary part of d'(k) and the real part of d'((k+1)mod M / 2) are combined to obtain the third complex modulation symbol; or,
[0122] The real part of d'(k) and the imaginary part of d'((k+1)mod M / 2) are combined to obtain the third complex modulation symbol.
[0123] In this embodiment, the imaginary part of d'(k) is used as the third complex modulation symbol obtained by combination, also known as the imaginary part of the corresponding third complex modulation symbol, and the real part of d'((k+1)mod M / 2) is used as the real part of the corresponding third complex modulation symbol.
[0124] The embodiment can also combine the real part of d'(k) as the real part of a third complex modulation symbol, and the imaginary part of d'((k+1)mod M / 2) as the imaginary part of the third complex modulation symbol.
[0125] In one embodiment, the first data is generated by channel coding of third data bits.
[0126] The first data of the embodiment is data generated by channel coding of third data bits (also referred to as third bit data). The embodiment can modulate the channel-coded data to obtain first complex modulation symbols.
[0127] In one embodiment, the processing of the M first complex modulation symbols includes:
[0128] The first complex modulation symbols are multiplied by a complex coefficient, or are cyclically shifted, or are multiplied by a complex coefficient and are cyclically shifted.
[0129] The embodiment can multiply the first complex modulation symbols by a complex coefficient, or cyclically shift the first complex modulation symbols, or multiply the first complex modulation symbols by a complex coefficient and cyclically shift the first complex modulation symbols.
[0130] The processed complex modulation symbols can be further processed to obtain a communication signal transmission.
[0131] The first complex modulation symbols after multiplication by a complex coefficient, or cyclically shifted, or multiplication by a complex coefficient and cyclically shifted, are processed as follows:
[0132] The M first complex modulation symbols are subjected to M-point discrete Fourier transform (DFT) to obtain frequency domain data of M subcarriers;
[0133] The frequency domain data are mapped to corresponding subcarrier positions;
[0134] The data carried by the subcarriers are subjected to N-point inverse discrete Fourier transform (IFFT) to obtain a first communication signal.
[0135] In one embodiment, the processing of the M first complex modulation symbols includes:
[0136] The M first complex modulation symbols are subjected to M-point discrete Fourier transform (DFT) to obtain frequency domain data of M subcarriers;
[0137] The frequency domain data are mapped to corresponding subcarrier positions;
[0138] The data carried by the subcarriers are subjected to N-point inverse discrete Fourier transform (IFFT) to obtain a first communication signal.
[0139] The first communication signal is a time-domain communication signal. In this embodiment, the first complex modulation symbol can be a complex modulation symbol directly generated after modulation, or a first complex modulation symbol obtained after further processing after modulation.
[0140] The first complex modulation symbol is processed by DFT, subcarrier mapping and IFFT to generate the first communication signal.
[0141] The first communication signal can be directly transmitted after mixing, or can be processed and then mixed and transmitted. The processing method is not limited here.
[0142] In one embodiment, the modulation symbol processing method further comprises:
[0143] The first communication signal is added with a cyclic prefix to obtain a second communication signal, and the second communication signal is mixed and transmitted; or
[0144] The first communication signal is added with a guard interval to obtain a third communication signal, and the third communication signal is mixed and transmitted; or
[0145] The first communication signal is mixed and transmitted.
[0146] In this embodiment, the first communication signal can be added with a cyclic prefix, mixed and then transmitted, or the first communication signal can be added with a guard interval, mixed and then transmitted, or the first communication signal can be mixed and then transmitted.
[0147] In one example embodiment, the present application provides a modulation symbol processing method, and Fig. 3a is a flowchart of another modulation symbol processing method provided by an embodiment of the present application. In this embodiment, the modulation symbol processing method is applied to the case of processing a modulation symbol, such as the case of demodulating a complex modulation symbol. The modulation symbol processing method can be executed by a modulation symbol processing device, which can be implemented by software and / or hardware. The modulation symbol processing device can be integrated on a second communication node, which can be a receiving side of a complex modulation symbol, such as a terminal device. The details of this embodiment not described in detail can be referred to the above-mentioned embodiments, which will not be described here.
[0148] As shown in Fig. 3a, the modulation symbol processing method provided by the present application comprises the following steps:
[0149] S310, obtaining M fourth complex modulation symbols generated by M / 2 first data, wherein M is an integer greater than or equal to 2, and M / 2 fourth complex modulation symbols are determined by one first data, and M / 2 fourth complex modulation symbols are determined by two first data.
[0150] The fourth complex modulation symbol can correspond to the first complex modulation symbol at the sending side. The fourth complex modulation symbol can be a modulation symbol obtained after the second communication node processes the received signal, and the processing means is not limited, such as a modulation symbol obtained after the received signal is mixed, CP is removed, N-point FFT is performed, M subcarriers are selected to carry data, frequency domain equalization is performed, and M-point IDFT is performed; or a modulation symbol obtained after the received signal is mixed, CP is removed, N-point FFT is performed, M subcarriers are selected to carry data, frequency domain equalization is performed, and M-point IDFT is performed, and then multiplied by a complex coefficient, or circularly shifted, or multiplied by a complex coefficient and circularly shifted. The above operations are not limited, such as the operation of removing CP can also be the operation of removing GI.
[0151] The M fourth complex modulation symbols of the operation are generated from M / 2 first data, and the M / 2 fourth complex modulation symbols are generated from two first data in the M / 2 first data. The M / 2 fourth complex modulation symbols are generated from one first data in the M / 2 first data.
[0152] S320, processing the M fourth complex modulation symbols.
[0153] After the fourth complex modulation symbol is obtained in the embodiment, the demodulation means for processing the fourth complex modulation symbol can be determined based on the rule for generating the fourth complex modulation symbol, which is not limited here. Taking the fourth complex modulation symbol obtained in the interpolation manner as an example, the fourth complex modulation symbol can be divided, and then the divided complex modulation symbol can be combined and power normalized.
[0154] The modulation symbol processing method provided by the embodiment of the application obtains the fourth complex modulation symbol, processes the fourth complex symbol, and realizes the processing of the complex modulation symbol at the receiving side of the modulation mode shown in FIG. 1 of the application.
[0155] On the basis of the above-mentioned embodiments, variant embodiments of the above-mentioned embodiments are proposed, and it needs to be noted that, in order to make the description brief, only the differences from the above-mentioned embodiments are described in the variant embodiments.
[0156] In one embodiment, the fourth complex modulation symbol is obtained by performing one of the following operations on the fifth complex modulation symbol:
[0157] Multiplying the complex coefficient;
[0158] Circularly shifting;
[0159] Multiplying the complex coefficient and circularly shifting.
[0160] In the embodiment, the fifth complex modulation symbol is multiplied by a complex coefficient to obtain the fourth complex modulation symbol; or the fifth complex modulation symbol is cyclically shifted to obtain the fourth complex modulation symbol; or the fifth complex modulation symbol is multiplied by a complex coefficient and then cyclically shifted to obtain the fourth complex modulation symbol; or the fifth complex modulation symbol is cyclically shifted and then multiplied by a complex coefficient to obtain the fourth complex modulation symbol.
[0161] In one embodiment, the fourth complex modulation symbol comprises a sixth complex modulation symbol and a seventh complex modulation symbol, the seventh complex modulation symbol is a complex modulation symbol obtained by recombining the sixth complex modulation symbol, and the fourth complex modulation symbol is a complex modulation symbol obtained by inserting the seventh complex modulation symbol into the sixth complex modulation symbol.
[0162] The seventh complex modulation symbol is combined into the sixth complex modulation symbol to obtain a combined symbol.
[0163] The combined symbol is power normalized to obtain an eighth complex modulation symbol.
[0164] The eighth complex modulation symbol is demodulated to obtain first data.
[0165] In the application, processing the fourth complex modulation symbol comprises:
[0166] The M fourth complex modulation symbols are divided into two groups of complex modulation symbols according to odd and even positions, and the two groups of complex modulation symbols comprise a seventh complex modulation symbol and a sixth complex modulation symbol.
[0167] The seventh complex modulation symbol is combined into the sixth complex modulation symbol to obtain a combined symbol.
[0168] The combined symbol is power normalized to obtain an eighth complex modulation symbol.
[0169] The eighth complex modulation symbol is demodulated according to BPSK to obtain M / 2 first data.
[0170] The first complex modulation symbol generated by the modulation symbol processing method provided in the embodiments is processed and transmitted, and is received and parsed by a second communication node to obtain a fourth complex modulation symbol.
[0171] The fourth complex modulation symbol is not limited in the way of being divided, for example, the seventh complex modulation symbol is selected from the fourth complex modulation symbol based on the position of the seventh complex modulation symbol inserted to divide the fourth complex modulation symbol into the sixth complex modulation symbol and the seventh complex modulation symbol. The number of complex modulation symbols (for example, the first complex modulation symbol, the second complex modulation symbol, the third complex modulation symbol, the fourth complex modulation symbol, the fifth complex modulation symbol, the sixth complex modulation symbol, the seventh complex modulation symbol, and the eighth complex modulation symbol) in the present application can be at least two.
[0172] In an embodiment, the fourth complex modulation symbol is divided into two groups of complex modulation symbols according to odd bits and even bits, and the complex modulation symbol of the odd bit can be the seventh complex modulation symbol, and the complex modulation symbol of the even bit can be the sixth complex modulation symbol. For example, the complex modulation symbol of the even bit can be the seventh complex modulation symbol, and the complex modulation symbol of the odd bit can be the sixth complex modulation symbol.
[0173] In an embodiment, the sixth complex modulation symbol is obtained by taking even bits of the fourth complex modulation symbol, and the seventh complex modulation symbol is obtained by taking odd bits of the fourth complex modulation symbol.
[0174] In an embodiment, the sixth complex modulation symbol is obtained by taking odd bits of the fourth complex modulation symbol, and the seventh complex modulation symbol is obtained by taking even bits of the fourth complex modulation symbol.
[0175] In the embodiment, the seventh complex modulation symbol is merged into the sixth complex modulation symbol to realize the merging of the seventh complex modulation symbol and the sixth complex modulation symbol, and the merged symbol is obtained after merging.
[0176] The operation is not limited in the way of merging, as long as it corresponds to the way of recombining the complex modulation symbol, for example, the real part and the imaginary part of the seventh complex modulation symbol are merged into the corresponding sixth complex modulation symbol.
[0177] In an embodiment, the real part or the imaginary part of the seventh complex modulation symbol is merged into the real part or the imaginary part of the sixth complex modulation symbol.
[0178] In an embodiment, the sixth complex modulation symbol is merged into the previous seventh complex modulation symbol and the next seventh complex modulation symbol to obtain the merged symbol. The sixth complex modulation symbol can be the sixth complex modulation symbol at the 2k bit, the previous seventh complex modulation symbol can be the seventh complex modulation signal at the (2k-1) mod M bit, and the next seventh complex modulation symbol can be the seventh complex modulation symbol at the 2k+1 bit. Wherein, k=0, 1,..., M / 2-1.
[0179] The eighth complex modulation symbol can be a complex modulation symbol generated after power normalization of the combined symbol.
[0180] The operation of power normalization is not limited here, such as power normalization based on the number of combined real and imaginary parts.
[0181] In one embodiment, the seventh complex modulation symbol is combined to the sixth complex modulation symbol, the real part of the combined symbol includes the real part of the seventh complex modulation symbol and the real part of the sixth complex modulation symbol, so when power normalization is performed, the real part of the seventh complex modulation symbol can be added to the real part of the sixth complex modulation symbol and then divided by 2. The value of the denominator in the division of the added real parts by 2 is determined by the number of real parts included in the combined symbol. For example, if the number of the denominator is equal to the number of the real parts included in the combined symbol, the number can be 2, 4, 6, and so on.
[0182] In one embodiment, the seventh complex modulation symbol is combined to the sixth complex modulation symbol, the imaginary part of the combined symbol includes the imaginary part of the seventh complex modulation symbol and the imaginary part of the sixth complex modulation symbol, so when power normalization is performed, the imaginary part of the seventh complex modulation symbol can be added to the imaginary part of the sixth complex modulation symbol and then divided by 2.
[0183] In one embodiment, the real part of the seventh complex modulation signal at the (2k-1) mod M bit is added to the real part of the sixth complex modulation symbol at the 2k bit and then divided by 2, and the result is taken as the real part of the eighth complex modulation symbol. The imaginary part of the seventh complex modulation symbol at the 2k+1 bit is added to the imaginary part of the sixth complex modulation symbol at the 2k bit and then divided by 2, and the result is taken as the imaginary part of the eighth complex modulation symbol, to obtain the eighth complex modulation symbol.
[0184] In one embodiment, the imaginary part of the seventh complex modulation signal at the (2k-1) mod M bit is added to the imaginary part of the sixth complex modulation symbol at the 2k bit and then divided by 2, and the result is taken as the imaginary part of the eighth complex modulation symbol. The real part of the seventh complex modulation symbol at the 2k+1 bit is added to the real part of the sixth complex modulation symbol at the 2k bit and then divided by 2, and the result is taken as the real part of the eighth complex modulation symbol, to obtain the eighth complex modulation symbol.
[0185] In one embodiment, the real part of the seventh complex modulation symbol is combined to the real part of the previous sixth complex modulation symbol, and the imaginary part of the seventh complex modulation symbol is combined to the imaginary part of the next sixth complex modulation symbol, and it is specified that the 0th bit is the next bit of the (M-1)th bit.
[0186] In one embodiment, the imaginary part of the seventh complex modulation symbol is combined to the imaginary part of the previous sixth complex modulation symbol, and the real part of the seventh complex modulation symbol is combined to the real part of the next sixth complex modulation symbol, and it is specified that the 0th bit is the next bit of the (M-1)th bit.
[0187] The eighth complex modulation symbol is demodulated to obtain first data. The first data can be the data to be transmitted, or the first data can be channel decoded to obtain third data, such as third bit data. The third data can be the data to be transmitted. The third data can be the data obtained by demodulation. The third bit data can be data composed of bits.
[0188] The operation after demodulation can obtain the first data or soft information of the first data. The soft information refers to information related to non-determinacy, probability, or reliability of the data.
[0189] In one embodiment, the fifth complex modulation symbol is divided into two groups of complex modulation symbols, including:
[0190] The even bits of the fifth complex modulation symbol are taken to obtain the sixth complex modulation symbol, and the odd bits of the fifth complex modulation symbol are taken to obtain the seventh complex modulation symbol.
[0191] In this embodiment, the even bits of the fifth complex modulation symbol are taken to obtain the sixth complex modulation symbol, and the odd bits of the fifth complex modulation symbol are taken to obtain the seventh complex modulation symbol. For example, the sixth complex modulation symbol includes d”(k), k=0, 2, 4,..., and the seventh complex modulation symbol includes d”(k), k=1, 3, 5,.... When k is equal to M-1, if M-1 is odd, it is included in the seventh complex modulation symbol, and if M-1 is even, it is included in the sixth complex modulation symbol.
[0192] In one embodiment, the seventh complex modulation symbol is combined onto the sixth complex modulation symbol to obtain a combined symbol, including:
[0193] The seventh complex modulation signal at the (2k-1) mod M bit is combined into the sixth complex modulation symbol at the 2k bit, and the seventh complex modulation symbol at the 2k+1 bit is combined into the sixth complex modulation symbol at the 2k bit.
[0194] Wherein, k=0, 1,..., M / 2-1.
[0195] In this embodiment, the seventh complex modulation signal at the (2k-1) mod M bit and the seventh complex modulation symbol at the 2k+1 bit are combined into the sixth complex modulation symbol at the 2k bit. For example, the real part of the seventh complex modulation signal at the (2k-1) mod M bit and the imaginary part of the seventh complex modulation symbol at the 2k+1 bit are combined into the sixth complex modulation symbol at the 2k bit. For another example, the imaginary part of the seventh complex modulation signal at the (2k-1) mod M bit and the real part of the seventh complex modulation symbol at the 2k+1 bit are combined into the sixth complex modulation symbol at the 2k bit.
[0196] The combining means can be directly adding the corresponding parts. For example, adding the real parts and adding the imaginary parts.
[0197] In one embodiment, the combining of the real part of the seventh complex modulation signal at the (2k-1) mod Mth bit to the real part of the sixth complex modulation symbol at the 2kth bit and the imaginary part of the seventh complex modulation signal at the 2k+1th bit to the imaginary part of the sixth complex modulation symbol at the 2kth bit comprises:
[0198] combining the real part of the seventh complex modulation signal at the (2k-1) mod Mth bit to the real part of the sixth complex modulation symbol at the 2kth bit and the imaginary part of the seventh complex modulation signal at the 2k+1th bit to the imaginary part of the sixth complex modulation symbol at the 2kth bit; or,
[0199] combining the imaginary part of the seventh complex modulation signal at the (2k-1) mod Mth bit to the imaginary part of the sixth complex modulation symbol at the 2kth bit and the real part of the seventh complex modulation signal at the 2k+1th bit to the real part of the sixth complex modulation symbol at the 2kth bit.
[0200] In one embodiment, the combining of the real part of the seventh complex modulation signal at the (2k-1) mod Mth bit to the real part of the sixth complex modulation symbol at the 2kth bit and the imaginary part of the seventh complex modulation signal at the 2k+1th bit to the imaginary part of the sixth complex modulation symbol at the 2kth bit comprises:
[0201] In one embodiment, the fourth complex modulation symbol is generated by the following steps:
[0202] performing N-point FFT on the fourth communication signal to obtain frequency domain data, selecting M frequency domain data carried by M subcarriers from the frequency domain data, and performing M-point IDFT transformation on the M frequency domain data of the M subcarriers to obtain the fourth complex modulation symbol.
[0203] or performing N-point FFT on the fourth communication signal to obtain frequency domain data, and selecting M frequency domain data of M subcarriers from the frequency domain data to obtain the fourth complex modulation symbol.
[0204] In one embodiment, the fourth communication signal corresponds to the first communication signal. The first communication signal is transmitted by the first communication node, and the second communication node receives the fourth communication signal.
[0205] In one embodiment, the fourth communication signal is a communication signal obtained after removing a cyclic prefix from the baseband received signal, or removing a guard interval from the baseband received signal; or the fourth communication signal is the baseband received signal.
[0206] The baseband received signal can be a baseband signal received by the second communication node. The fourth communication signal can be a communication signal obtained after removing a GI from the baseband received signal, or removing a CP from the baseband received signal. The fourth communication signal can also be the baseband received signal.
[0207] In one embodiment, the method for processing modulation symbols further comprises:
[0208] Signal channel decoding the first data to obtain third bit data.
[0209] The first data can be channel encoded data. In this embodiment, the first data can be channel decoded to obtain third bit data, so as to complete data transmission between the first communication node and the second communication node. The third bit data can be data composed of bits, and is a form of the third data.
[0210] In one embodiment, the present application provides a method for receiving and processing a communication signal. First, a received signal is mixed, and then a CP is removed. An N-point FFT is performed on the signal after the CP is removed, and data carried by a corresponding M number of subcarriers is selected and frequency domain equalized. M-point IDFT is performed on the data after the frequency domain equalization, to obtain M received complex modulation symbols, such as a fourth complex modulation symbol. Real and imaginary parts of the M received complex modulation symbols are combined, such as dividing the fourth complex modulation symbol into two groups of complex modulation symbols, the two groups of complex modulation symbols including a sixth complex modulation symbol and a seventh complex modulation symbol, and combining the seventh complex modulation symbol onto the sixth complex modulation symbol to obtain a combined symbol.
[0211] The combining of the real and imaginary parts can be to combine the real and imaginary parts of the M received complex modulation symbols into the real and imaginary parts of M / 2 combined complex modulation symbols. Corresponding to the interpolation method of the above embodiment, the real or imaginary part of the odd bit of the M received complex modulation symbols can be combined into the corresponding even bit (e.g., the seventh complex modulation symbol is combined into the sixth complex modulation symbol), to obtain the M / 2 combined received complex modulation symbols. In addition, power normalization is also needed for the combined complex modulation symbols (i.e., the combined symbols) according to the combination, to obtain the M / 2 power normalized received complex modulation symbols, e.g., the eighth complex modulation symbol. Demodulation is performed on the M / 2 received complex modulation symbols, to obtain reconstructed data bits or soft information, e.g., the first data. If the transmitting side does not use channel coding, the reconstructed data bits are the transmitted data bits. If the transmitting side uses channel coding, further channel decoding is needed for the reconstructed data bits or soft information, to obtain the transmitted data bits.
[0212] After receiving the signal, the embodiment performs mixing, CP removal, N-point FFT, subcarrier selection, frequency domain equalization, real and imaginary part combination, power normalization, and demodulation processing to obtain data bits or soft information.
[0213] In the generation and transmission mode of CP-OFDM, CP is added before mixing and transmission. In future communication systems, the case without adding CP can also be considered. In this case, the CP removal operation is not needed at the receiving end. In addition, if the transmitting end adds GI, the GI removal (i.e., removing GI) operation is needed at the receiving end.
[0214] If the interpolated modulation symbol at the transmitting end is multiplied by a complex coefficient, or is arbitrarily cyclically shifted, the corresponding operation is needed at the receiving end, e.g., multiplying by the inverse of the complex coefficient, or performing the opposite cyclic shift.
[0215] In one embodiment, the application provides a specific implementation method of real part and imaginary part combination and power normalization. The complex modulation symbol before combination is d"(i), i=0, 1,..., M-1. The complex modulation symbol before combination is divided into two groups d"(2k) and d"(2k+1), k=0, 1,..., M / 2-1. In the operation of the transmitting end, it can be found that the real part and the imaginary part of d"(2k+1) are generated by the real part and the imaginary part of d"(2k) remapping. In the receiving side, the real part and the imaginary part of d"(2k+1) need to be combined into d"(2k) to improve the signal-to-noise ratio of the receiving. Figure 3b is a schematic diagram of the implementation of the real part and the imaginary part combination and the power normalization in the receiving side according to an embodiment of the application. Referring to Figure 3b, the imaginary part of the previous bit d"((2k-1) mod M) of d"(2k) is combined into the imaginary part of d"(2k), the real part of the next bit d"(2k+1) of d"(2k) is combined into the real part of d"(2k) (for example, the imaginary part of the seventh complex modulation signal of the (2k-1) mod M bit is combined into the imaginary part of the sixth complex modulation symbol of the 2k bit, the real part of the seventh complex modulation signal of the 2k+1 bit is combined into the real part of the sixth complex modulation symbol of the 2k bit), and the combined result is multiplied by the power normalization coefficient 1 / 2 (i.e. the eighth complex modulation symbol is obtained by implementing the power normalization of the combined symbol), then d"(2k) is restored to the QPSK complex modulation symbol, the QPSK modulation symbol is demodulated, and the transmitted bit data is obtained.
[0216] In one embodiment, the application provides a specific implementation method of real and imaginary part merging and power normalization. The complex modulation symbol before merging is d" (i), i = 0, 1,..., M-1. The complex modulation symbol before merging is divided into two groups d" (2k) and d" (2k+1), k = 0, 1,..., M / 2-1. In the operation of the transmitting end, it can be found that the real and imaginary parts of d" (2k+1) are generated by the real and imaginary parts of d" (2k) remapping. At the receiving side, the real and imaginary parts of d' (2k+1) need to be merged into d' (2k) to improve the signal-to-noise ratio of the received signal. Figure 3c is a schematic diagram of another implementation of real and imaginary part merging and power normalization at the receiving side provided by an embodiment of the application. Referring to Figure 3c, corresponding to the real and imaginary part merging at the receiving side, the real part of the previous bit d" ((2k-1) mod M) of d" (2k) is merged into the real part of d" (2k), the imaginary part of the next bit d" (2k+1) of d" (2k) is merged into the imaginary part of d" (2k) (for example, the real part of the seventh complex modulation signal of the (2k-1) mod M bit is merged into the real part of the sixth complex modulation symbol of the 2k bit, and the imaginary part of the seventh complex modulation signal of the 2k+1 bit is merged into the imaginary part of the sixth complex modulation symbol of the 2k bit), and the merged result is multiplied by the power normalization coefficient 1 / 2, then d" (2k) is restored to a complex modulation symbol, the modulation symbol is demodulated, and the transmitted bit data is obtained.
[0217] The application is exemplarily described below. The modulation symbol processing method provided by the application can be considered as a method of generating and transmitting an extremely low peak-to-average ratio communication signal. The application is exemplarily described as follows:
[0218] In one embodiment, the application provides a method of generating and transmitting a communication signal. It is assumed that M / 2 bit data bits b(k) (such as first data) need to be transmitted, where k = 0, 1, 2,..., M / 2-1. First, b(k) is modulated into M complex modulation symbols d(i) (i.e. first complex modulation symbols) using the following formula, i = 0, 1, 2,..., M-1:
[0219] wherein, Downward rounding symbol. M-point DFT is performed on the M first complex modulation symbols to obtain M transformed precoded complex modulation symbols. The M transformed precoded complex modulation symbols are mapped to corresponding subcarriers, and N-point IFFT is performed on the data carried by the subcarriers to obtain a time-domain communication signal (for example, M-point discrete Fourier transform (DFT) is performed on the M first complex modulation symbols to obtain frequency-domain data of M subcarriers; the frequency-domain data is mapped to corresponding subcarrier positions; and N-point inverse discrete Fourier transform (IFFT) is performed on the data carried by the subcarriers to obtain a first communication signal). A CP is added to the time-domain communication signal, and the time-domain communication signal is mixed to a radio frequency for transmission (for example, a cyclic prefix is added to the first communication signal to obtain a second communication signal, and the second communication signal is mixed and transmitted). In this way, a transmission signal with extremely low peak-to-average ratio can be generated and transmitted.
[0220] FIG. 4 is a flowchart of a method for generating and transmitting a communication signal according to an embodiment of the present application. As shown in FIG. 4, M / 2 data bits b(k) are modulated according to the following formula:
[0221] Then, M-point DFT, subcarrier mapping, N-point IFFT, CP addition, mixing, and transmission are performed to realize communication signal transmission, such as transmission of a second communication signal.
[0222] In one embodiment, M / 2 data bits b(k) are modulated according to the following formula:
[0223] In the generation and transmission mode of DFT-s-OFDM, a CP needs to be added before mixing and transmission. In future communication systems, the case without adding a CP can also be considered. For example, a GI is added before mixing and transmission (for example, a guard interval is added to the first communication signal to obtain a third communication signal, and the third communication signal is mixed and transmitted), or the first communication signal is directly mixed and transmitted.
[0224] In one embodiment, the present application provides a method for generating and transmitting a communication signal. It is assumed that M / 2 data bits b(k) need to be transmitted, where k = 0, 1, 2,..., M / 2-1. First, b(k) is modulated into M complex modulation symbols d(i) (such as first complex modulation symbols) using the following formula:
[0225] wherein, Downward rounding symbol. M-point DFT is performed on the M complex modulation symbols to obtain M transformed and precoded complex modulation symbols. The M transformed and precoded complex modulation symbols are mapped to corresponding subcarriers, and N-point IFFT is performed on the data carried by the subcarriers to obtain a time-domain communication signal (for example, M-point discrete Fourier transform (DFT) is performed on the M first complex modulation symbols to obtain frequency-domain data of M subcarriers; the frequency-domain data is mapped to corresponding subcarrier positions; and N-point inverse discrete Fourier transform (IFFT) is performed on the data carried by the subcarriers to obtain a first communication signal). A CP is added to the time-domain communication signal, and the time-domain communication signal is mixed to a radio frequency for transmission (for example, a cyclic prefix is added to the first communication signal to obtain a second communication signal, and the second communication signal is mixed and transmitted). In this way, a transmission signal with extremely low peak-to-average ratio can be generated and transmitted.
[0226] FIG. 5 is a flowchart of another method for generating and transmitting a communication signal according to an embodiment of the present application. As shown in FIG. 5, M / 2 data bits b(k) are modulated according to the following formula:
[0227] Then, M-point DFT, subcarrier mapping, N-point IFFT, CP addition, mixing, and transmission are performed to realize communication signal transmission, such as transmission of a second communication signal.
[0228] In one embodiment, M / 2 data bits b(k) are modulated according to the following formula:
[0229] In the DFT-s-OFDM generation and transmission mode, a CP needs to be added before mixing and transmission. In future communication systems, the case without adding a CP can also be considered. For example, a guard interval (GI) is added before mixing and transmission (for example, a protection interval is added to the first communication signal to obtain a third communication signal, and the third communication signal is mixed and transmitted), or the first communication signal is directly mixed and transmitted.
[0230] In one embodiment, the present application provides a method for generating and transmitting a communication signal. It is assumed that M / 2 data bits b(k) (for example, first data) need to be transmitted, where k = 0, 1, 2,..., M / 2-1. First, the M / 2 data bits b(k) are quadrupled to obtain 2M repeated data bits. The 2M repeated data bits are reordered (for example, M / 2 first data are quadrupled and reordered to obtain 2M second data) so that the finally generated communication signal has a low peak-to-average ratio property.
[0231] The reordered repeated data bits are subjected to Quadrature Phase Shift Keying (QPSK) modulation to obtain M complex modulation symbols (for example, 2M second data are modulated by QPSK to obtain M first complex modulation symbols). The M complex modulation symbols are subjected to M-point DFT to obtain M transformed and precoded complex modulation symbols. The M transformed and precoded complex modulation symbols are mapped to corresponding subcarriers, and then the data carried by the subcarriers are subjected to N-point IFFT to obtain a time-domain communication signal (for example, the M first complex modulation symbols are subjected to M-point Discrete Fourier Transform (DFT) transformation to obtain frequency-domain data of M subcarriers; the frequency-domain data are mapped to corresponding subcarrier positions; and the data carried by the subcarriers are subjected to N-point Inverse Discrete Fourier Transform (IFFT) to obtain a first communication signal). The time-domain communication signal is added with a CP, and then is subjected to frequency mixing to a radio frequency for transmission (for example, a second communication signal is obtained by adding a cyclic prefix to the first communication signal, and the second communication signal is subjected to frequency mixing and transmission).
[0232] FIG. 6 is a flow diagram of another method for generating and transmitting a communication signal according to an embodiment of the present application. As shown in FIG. 6, M / 2-bit data bits b(k) are subjected to four times repetition, reordering, QPSK modulation, M-point DFT, subcarrier mapping, N-point IFFT, CP addition, frequency mixing and transmission, to realize transmission of a communication signal, for example, a second communication signal.
[0233] In the generation and transmission mode of DFT-s-OFDM, a CP needs to be added before frequency mixing and transmission. In future communication systems, the case without adding a CP can also be considered. For example, a GI is added before frequency mixing and transmission (for example, a third communication signal is obtained by adding a guard interval to the first communication signal, and the third communication signal is subjected to frequency mixing and transmission), or frequency mixing and transmission are directly performed (for example, the first communication signal is subjected to frequency mixing and transmission).
[0234] In one embodiment, the application provides a reordering implementation, and FIG. 7 is a schematic diagram of a reordering implementation provided by an embodiment of the application, which can use a method of cyclic shift to reorder (e.g., the reordering operation is a one-bit left cyclic shift), specifically, a one-bit cyclic shift to the left of the repeated data bits. This operation can obtain a communication signal with an extremely low peak-to-average ratio. Referring to FIG. 7, taking four first data b(0), b(l), b(2), and b(3) as an example, b(0), b(l), b(2), and b(3) are quadrupled to obtain b(0), b(0), b(0), b(0), b(l), b(l), b(l), b(l), b(2), b(2), b(2), b(2), b(3), b(3), b(3), and b(3). Then, a cyclic shift is performed to obtain b(0), b(0), b(0), b(l), b(l), b(l), b(l), b(2), b(2), b(2), b(2), b(3), b(3), b(3), b(3), b(0), i.e., 16 second data.
[0235] In one embodiment, the application provides yet another reordering implementation, and FIG. 8 is a schematic diagram of yet another reordering implementation provided by an embodiment of the application, which can divide the reordering process into two steps, e.g., a one-bit left cyclic shift and a specific position exchange, specifically, the first step is a one-bit cyclic shift to the left of the repeated data bits, and the second step is to exchange the 4n+2th and 4n+3th positions of the repeated data bits after the cyclic shift, where n=0, 1,..., M / 2-1. These two steps can obtain a communication signal with an extremely low peak-to-average ratio. Referring to FIG. 8, taking four first data b(0), b(l), b(2), and b(3) as an example, b(0), b(l), b(2), and b(3) are quadrupled to obtain b(0), b(0), b(0), b(0), b(l), b(l), b(l), b(l), b(2), b(2), b(2), b(2), b(3), b(3), b(3), and b(3). Then, a cyclic shift is performed to obtain b(0), b(0), b(0), b(l), b(l), b(l), b(l), b(2), b(2), b(2), b(2), b(3), b(3), b(3), b(3), b(0), and finally, the 4n+2th and 4n+3th positions are exchanged to obtain b(0), b(0), b(l), b(0), b(l), b(l), b(2), b(l), b(2), b(2), b(3), b(2), b(3), b(3), b(0), b(4), i.e., 16 second data.
[0236] In one embodiment, the present application provides a method for generating and transmitting a communication signal, assuming there are M / 2 data bits b(k) to be transmitted, where k=0, 1, 2,..., M / 2-1. First, the M / 2 data bits b(k) are BPSK modulated to obtain M / 2 initial complex modulation symbols (e.g., the M / 2 data bits are modulated by a binary phase shift keying (BPSK) modulation to obtain M / 2 second complex modulation symbols, where the initial complex modulation symbols are also referred to as the second complex modulation symbols). The BPSK modulation used is a protocol-specified modulation, i.e.
[0237] The M / 2 initial complex modulation symbols are real-imaginary interpolated to obtain M first complex modulation symbols (e.g., the real and imaginary parts of the second complex modulation symbols are recombined to obtain M / 2 third complex modulation symbols, which are inserted between d'(k) and d'((k+1) mod M / 2) to obtain the M first complex modulation symbols).
[0238] The real-imaginary interpolation process is to recombine the real and imaginary parts of the M / 2 initial complex modulation symbols to obtain M / 2 recombined complex modulation symbols, i.e., the third complex modulation symbols, and to insert the M / 2 recombined complex modulation symbols between adjacent two complex modulation symbols in the M / 2 initial complex modulation symbols (i.e., the third complex modulation symbols are inserted between d'(k) and d'((k+1) mod M / 2)), where the M / 2-1th initial complex modulation symbol and the 0th initial complex modulation symbol are also regarded as adjacent two complex modulation symbols. The adjacent complex modulation symbols defined here can be generally denoted as d'(k) and d'((k+1) mod M / 2), k=0, 1,..., M / 2-1.
[0239] The M first complex modulation symbols are subjected to M-point DFT to obtain M transformed and precoded complex modulation symbols. The M transformed and precoded complex modulation symbols are mapped to corresponding subcarriers, and the data carried by the subcarriers are subjected to N-point IFFT to obtain a time-domain communication signal (e.g., the M first complex modulation symbols are subjected to M-point discrete Fourier transform (DFT) to obtain frequency-domain data of M subcarriers; the frequency-domain data are mapped to corresponding subcarrier positions; and the data carried by the subcarriers are subjected to N-point inverse discrete Fourier transform (IFFT) to obtain a first communication signal). A CP is added to the time-domain communication signal, and the time-domain communication signal is mixed to a radio frequency for transmission, e.g., a cyclic prefix is added to the first communication signal to obtain a second communication signal, and the second communication signal is mixed and transmitted.
[0240] FIG. 9 is a flow diagram of a method for generating and transmitting a communication signal according to an embodiment of the present application. Referring to FIG. 9, M / 2 data bits b(k) are BPSK modulated, real and imaginary parts are interpolated, M-point DFT is performed, subcarriers are mapped, N-point IFFT is performed, CP is added, frequency mixing and transmission are performed, and the communication signal is transmitted, such as the transmission of a second communication signal.
[0241] In the generation and transmission of DFT-s-OFDM, CP is added before frequency mixing and transmission. In future communication systems, the case without adding CP can also be considered. For example, GI is added before frequency mixing and transmission, such as adding a guard interval to the first communication signal to obtain a third communication signal, frequency mixing and transmission are performed on the third communication signal, or frequency mixing and transmission are directly performed (such as frequency mixing and transmission are directly performed on the first communication signal).
[0242] In one embodiment, the present application provides a specific implementation of real and imaginary part interpolation. FIG. 10 is a diagram of an implementation of real and imaginary part interpolation according to an embodiment of the present application. Adjacent complex modulation symbols can be generally denoted as d'(k) and d'((k+1)mod M / 2), k = 0, 1,..., M / 2-1. j*Im{d'(k)}+Re{d'((k+1)mod M / 2)} is inserted between adjacent complex modulation symbols (such as a third complex modulation symbol is inserted between d'(k) and d'((k+1)mod M / 2), the third complex modulation symbol is obtained by combining the imaginary part of d'(k) and the real part of d'((k+1)mod M / 2)), where Im{·} is an imaginary part operation, and Re{·} is a real part operation. The advantage of this is that at least one of the real and imaginary parts of adjacent symbols in the complex modulation symbol after interpolation (such as a first complex modulation symbol) is the same, thereby greatly reducing the peak-to-average ratio. Referring to FIG. 10, d'(k) and d'((k+1)mod M / 2) are interpolated in real and imaginary parts, the imaginary part of d'(k) is taken, the real part of d'((k+1)mod M / 2) is taken, and a corresponding third complex modulation symbol is obtained. The third complex modulation symbol is located between d'(k) and d'((k+1)mod M / 2).
[0243] In one embodiment, the present application provides a specific implementation of real and imaginary interpolation. Fig. 11 is a diagram illustrating another implementation of real and imaginary interpolation according to an embodiment of the present application. The adjacent complex modulation symbols can be generally denoted as d'(k) and d'((k+1) mod M / 2), k = 0, 1,..., M / 2-1. The Re{d'(k)} + j*Im{d'((k+1) mod M / 2)} is inserted between d'(k) and d'((k+1) mod M / 2) (e.g., the third complex modulation symbol is inserted between d'(k) and d'((k+1) mod M / 2), and the third complex modulation symbol is obtained by combining the real part of d'(k) and the imaginary part of d'((k+1) mod M / 2)). The benefit of this is that at least one of the real part and the imaginary part of the adjacent symbols in the complex modulation symbol after interpolation (e.g., the first complex modulation symbol) is the same, thereby greatly reducing the peak-to-average ratio. Referring to Fig. 11, d'(k) and d'((k+1) mod M / 2) are interpolated in real and imaginary parts, the imaginary part of d'(k) is taken, and the imaginary part of d'((k+1) mod M / 2) is taken to form the corresponding third complex modulation symbol. The third complex modulation symbol is located between d'(k) and d'((k+1) mod M / 2).
[0244] In one embodiment, the present application provides a processing manner of the first complex modulation symbol. A uniform complex coefficient α can be added to the first complex modulation symbol to uniformly scale and rotate the modulation symbol. In one embodiment, M / 2 first data can be modulated into M first complex modulation symbols multiplied by the complex coefficient by using the following formula:
[0245] From the perspective of power normalization, the modulus of α should be 1. At this time, α can be written as The above formula becomes
[0246] In addition, arbitrary cyclic shift can also be performed. Assuming that the shift value is s, when s > 0, the cyclic shift is to the right, and when s < 0, the cyclic shift is to the left. In one embodiment, M / 2 first data can be modulated into M first complex modulation symbols subjected to cyclic shift by using the following formula:
[0247] The multiplication by the complex coefficient and the cyclic shift can be simultaneously applied to the foregoing embodiments. The generation formula can be changed to
[0248] The embodiment takes a way of modulating M first complex modulation symbols as an example for description. In the present application, all ways of determining the first complex modulation symbols can adopt the way of multiplying the complex coefficients and the cyclic shift for processing.
[0249] In one embodiment, the M / 2 first data are modulated into M first complex modulation symbols multiplied by complex coefficients by the following formula:
[0250] In one embodiment, the M / 2 first data are modulated into M first complex modulation symbols multiplied by complex coefficients by the following formula:
[0251] In one embodiment, the M / 2 first data are modulated into M first complex modulation symbols multiplied by complex coefficients by the following formula:
[0252] In one exemplary embodiment, the present application provides a modulation symbol processing apparatus. FIG. 12 is a structural schematic diagram of a modulation symbol processing apparatus according to an embodiment of the present application. The modulation symbol processing apparatus can be integrated on a first communication node. The modulation symbol processing apparatus comprises:
[0253] The modulation module 1200 is configured to modulate M / 2 first data into M first complex modulation symbols, wherein M is an integer greater than or equal to 2, the M / 2 first complex modulation symbols are determined by one first data, and the M / 2 first complex modulation symbols are determined by two first data.
[0254] The processing module 1210 is configured to process the M first complex modulation symbols.
[0255] The modulation symbol processing apparatus provided by the embodiment is used to implement the modulation symbol processing method of the embodiment shown in FIG. 1. The modulation symbol processing apparatus provided by the embodiment has similar implementation principles and technical effects to the modulation symbol processing method of the embodiment shown in FIG. 1, and thus detailed description is omitted here.
[0256] On the basis of the above-described embodiments, variant embodiments of the above-described embodiments are provided. It should be noted that, in order to make the description brief, only the differences between the variant embodiments and the above-described embodiments are described in the variant embodiments.
[0257] In one embodiment, the modulation module 1200 comprises a generating unit configured to:
[0258] generate corresponding first complex modulation symbols by taking and as the real part and the imaginary part respectively or as the imaginary part and the real part respectively;
[0259] wherein, i=0, 1, …, M-1, b(k) is the kth first data, k=0, 1, …, M / 2-1.
[0260] In one embodiment, the generating unit is specifically configured to:
[0261] The corresponding first complex modulation symbol is generated according to the following formula:
[0262] Or,
[0263] The corresponding first complex modulation symbol is generated according to the following formula:
[0264] In one embodiment, the modulation module 1200 comprises a generating unit configured to:
[0265] The first complex modulation symbol with even bits is generated according to a first data, and the first complex modulation symbol with odd bits is generated by taking two first data as real and imaginary parts or imaginary and real parts respectively.
[0266] In one embodiment, the generating unit is specifically configured to:
[0267] The corresponding first complex modulation symbol is generated according to the following formula:
[0268] Or,
[0269] The corresponding first complex modulation symbol is generated according to the following formula:
[0270] In one embodiment, the modulation module 1200 comprises a first modulation unit configured to:
[0271] The M / 2 first data are quadrupled and reordered to obtain 2M second data;
[0272] The 2M second data are modulated in a QPSK manner to obtain M first complex modulation symbols.
[0273] In one embodiment, the reordering operation is a left circular shift by one bit.
[0274] In one embodiment, the reordering operation is a left circular shift by one bit, and a specific position is exchanged.
[0275] In one embodiment, the modulation module 1200 comprises:
[0276] The second modulation unit is configured to modulate the M / 2 first data in a binary phase shift keying (BPSK) manner to obtain M / 2 second complex modulation symbols.
[0277] a combining unit, configured to recombine real parts and imaginary parts of the second complex modulation symbols to obtain M / 2 third complex modulation symbols;
[0278] an inserting unit, configured to insert the third complex modulation symbols between d'(k) and d'((k+1) mod M / 2) to obtain M first complex modulation symbols, d'(k) being a kth second complex modulation symbol, and d'((k+1) mod M / 2) being a (k+1) mod M / 2th second complex modulation symbol.
[0279] In an embodiment, the combining unit is specifically configured to:
[0280] combine the imaginary part of d'(k) and the real part of d'((k+1) mod M / 2) to obtain the third complex modulation symbol; or
[0281] combine the real part of d'(k) and the imaginary part of d'((k+1) mod M / 2) to obtain the third complex modulation symbol.
[0282] In an embodiment, the first data is generated by channel encoding of third data bits.
[0283] In an embodiment, the processing module 1210 is specifically configured to:
[0284] multiply the first complex modulation symbols by a complex coefficient, or circularly shift, or multiply the first complex modulation symbols by a complex coefficient and circularly shift.
[0285] In an embodiment, the processing module 1210 is specifically configured to:
[0286] perform M-point discrete Fourier transform (DFT) on the M first complex modulation symbols to obtain frequency domain data of M subcarriers;
[0287] map the frequency domain data to corresponding subcarrier positions;
[0288] perform N-point inverse discrete Fourier transform (IFFT) on data carried by the subcarriers to obtain the first communication signal.
[0289] In an embodiment, the modulation symbol processing apparatus further includes a transmitting module configured to:
[0290] add a cyclic prefix to the first communication signal to obtain a second communication signal, and perform frequency mixing and transmission on the second communication signal; or
[0291] add a guard interval to the first communication signal to obtain a third communication signal, and perform frequency mixing and transmission on the third communication signal; or
[0292] Mixing and transmitting the first communication signal.
[0293] In one example embodiment, the embodiment of the present application further provides a modulation symbol processing apparatus, and Fig. 13 is a structural schematic diagram of another modulation symbol processing apparatus provided by the embodiment of the present application. The modulation symbol processing apparatus can be integrated on the second communication node, and the modulation symbol processing apparatus comprises:
[0294] The acquisition module 1300 is configured to acquire M fourth complex modulation symbols generated by M / 2 first data, wherein M is an integer greater than or equal to 2, the M / 2 fourth complex modulation symbols are determined by one first data, and the M / 2 fourth complex modulation symbols are determined by two first data.
[0295] The processing module 1310 is configured to process the M fourth complex modulation symbols.
[0296] The modulation symbol processing apparatus provided by the embodiment of the present application is used to implement the modulation symbol processing method of the embodiment shown in Fig. 3a, and the implementation principle and technical effects of the modulation symbol processing apparatus provided by the embodiment of the present application are similar to those of the modulation symbol processing method of the embodiment shown in Fig. 3a, which will not be described here.
[0297] In one example embodiment, the embodiment of the present application further provides a first communication node, and Fig. 14 is a structural schematic diagram of a first communication node provided by the embodiment of the present application. As shown in Fig. 14, the first communication node provided by the embodiment of the present application comprises one or more processors 141 and a storage device 142. The processor 141 in the first communication node can be one or more, and one processor 141 is taken as an example in Fig. 14. The storage device 142 is used to store one or more programs. The one or more programs are executed by the one or more processors 141, so that the one or more processors 141 implement the modulation symbol processing method as described in the embodiment of the present application.
[0298] The first communication node further comprises a communication device 143, an input device 144 and an output device 145.
[0299] The processor 141, the storage device 142, the communication device 143, the input device 144 and the output device 145 in the first communication node can be connected through a bus or other means, and the connection through the bus is taken as an example in Fig. 14.
[0300] The input device 144 can be used to receive input digital or character information, and generate key signal input related to user settings and function control of the first communication node. The output device 145 can include a display device such as a display screen.
[0301] The communication device 143 can include a receiver and a transmitter. The communication device 143 is configured to perform information receiving and transmitting communication under the control of the processor 141.
[0302] The storage device 142, as a computer readable storage medium, can be configured to store software programs, computer executable programs, and modules, such as program instructions / modules corresponding to the modulation symbol processing method (for example, the modulation module 1200 and the processing module 1210 in the modulation symbol processing device) described in the embodiments of the present application. The storage device 142 can include a program storage area and a data storage area, wherein the program storage area can store an operating system and application programs required by at least one function; the data storage area can store data created according to the use of the first communication node, and the like. In addition, the storage device 142 can include a high-speed random access memory, and can also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state memory device. In some examples, the storage device 142 can further include a memory remotely arranged with respect to the processor 141, and these remote memories can be connected to the first communication node through a network. Examples of the above network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.
[0303] In one example embodiment, the embodiments of the present application also provide a second communication node, and FIG. 15 is a structural schematic diagram of a second communication node provided by the embodiments of the present application. As shown in FIG. 15, the second communication node provided by the present application includes one or more processors 151 and a storage device 152; the processor 151 in the second communication node can be one or more, and FIG. 15 takes one processor 151 as an example; the storage device 152 is configured to store one or more programs; the one or more programs are executed by the one or more processors 151, so that the one or more processors 151 implement the modulation symbol processing method as described in the embodiments of the present application.
[0304] The second communication node further includes a communication device 153, an input device 154, and an output device 155.
[0305] The processor 151, the storage device 152, the communication device 153, the input device 154, and the output device 155 in the second communication node can be connected through a bus or other means, and FIG. 15 takes the connection through the bus as an example.
[0306] The input device 154 can be used to receive input digital or character information, and to generate key signal input related to user settings and function control of the second communication node. The output device 155 can include a display device such as a display screen.
[0307] The communication device 153 can include a receiver and a transmitter. The communication device 153 is configured to perform information receiving and transmitting communication under the control of the processor 151.
[0308] The storage device 152, as a computer readable storage medium, can be configured to store software programs, computer executable programs, and modules, such as program instructions / modules corresponding to the modulation symbol processing method (for example, the acquisition module 1300 and the processing module 1310 in the modulation symbol processing device) described in the embodiments of the present application. The storage device 152 can include a program storage area and a data storage area, wherein the program storage area can store an operating system and application programs required by at least one function; the data storage area can store data created according to the use of the second communication node, and the like. In addition, the storage device 152 can include a high-speed random access memory, and can also include a non-volatile memory, such as at least one magnetic disk storage device, a flash memory device, or other non-volatile solid-state memory device. In some examples, the storage device 152 can further include a memory remotely arranged with respect to the processor 151, and these remote memories can be connected to the second communication node through a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and a combination thereof.
[0309] In one example embodiment, the embodiments of the present application also provide a storage medium storing a computer program, which is executed by a processor to implement any of the methods described in the present application, and the storage medium stores a computer program, which is executed by a processor to implement the modulation symbol processing method described in any of the embodiments of the present application. The modulation symbol processing method applied to the first communication node includes: modulating M / 2 first data into M first complex modulation symbols, wherein M is an integer greater than or equal to 2, M / 2 first complex modulation symbols are determined by one first data, and M / 2 first complex modulation symbols are determined by two first data;
[0310] The M first complex modulation symbols are processed.
[0311] The modulation symbol processing method applied to the second communication node includes: acquiring M fourth complex modulation symbols generated by M / 2 first data, wherein M is an integer greater than or equal to 2, M / 2 fourth complex modulation symbols are determined by one first data, and M / 2 fourth complex modulation symbols are determined by two first data;
[0312] The M fourth complex modulation symbols are processed.
[0313] The computer storage medium of the embodiments of the present application can adopt any combination of one or more computer readable media. The computer readable medium can be a computer readable signal medium or a computer readable storage medium. The computer readable storage medium may, for example, but is not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or apparatus, or any combination thereof. More specific examples (a non-exhaustive list) of the computer readable storage medium include an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM), a flash memory, an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. The computer readable storage medium can be any tangible medium containing or storing a program that can be used by or in connection with an instruction execution system, apparatus or device.
[0314] The computer readable signal medium can include a data signal propagated in a baseband or propagated as a carrier wave in a propagated data signal, in which the computer readable program code is embodied. Such propagated data signal can take a variety of forms, including but not limited to electro-magnetic, optical or any suitable combination thereof. The computer readable signal medium can also be any computer readable medium that is not a storage medium and that can communicate, propagate or transport program for use by or in connection with an instruction execution system, apparatus or device.
[0315] The program code contained on the computer readable medium can be transmitted using any suitable medium, including but not limited to wireless, wire line, optical fiber, radio frequency (RF), or any suitable combination thereof.
[0316] Computer program code for carrying out operations of the present application can be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code can execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer can be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection can be made to an external computer (for example, through the Internet using an Internet Service Provider).
[0317] The specific embodiments described hereinabove are illustrative of specific embodiments of the present application and are not meant to be limiting of the scope of the application.
[0318] Those skilled in the art will appreciate that the term terminal device encompasses any suitable type of wireless user device, such as a mobile phone, a portable data processing apparatus, a portable web browser, or a vehicle-mounted mobile station.
[0319] In general, the various embodiments of the application can be implemented in hardware or special purpose circuits, software, logic or any combination thereof. For example, some aspects can be implemented in hardware, while other aspects can be implemented in
[0320] Embodiments of the application can be implemented by computer program instructions executed by a data processing apparatus of a mobile device, for example in a processor entity, or by hardware, or by a combination of software and hardware. The computer program instructions can be in the form of assembly instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or in any combination of one or more programming languages, written in any combination of one or more of a plurality of programming languages.
[0321] The block diagrams of any logical flow of the present application in the accompanying drawings can represent program steps or can represent interconnected logic circuits, modules, and functions, or can represent a combination of program steps and logic circuits, modules, and functions. The computer program can be stored on a memory. The memory can have any type suitable for the local technical environment and can be implemented using any suitable data storage technology, such as, but not limited to, a random access memory (RAM), a read-only memory (ROM), an optical storage device, and a system (a digital video disc (DVD) or a compact disc (CD)), and the like. The computer readable media can include a non-transitory storage media. The data processor can be of any type suitable for the local technical environment, and can include, but is not limited to, a general purpose computer, a special purpose computer, a microprocessor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field-programmable gate array (FPGA), and a processor based on multi-core processor architecture.
[0322] A detailed description of exemplary embodiments of the present application has been provided above with reference to the accompanying drawings. However, various modifications and alterations of the above embodiments will be apparent to those skilled in the art without departing from the scope of the present application. Thus, the proper scope of the present application will be determined by the following claims.
Claims
1. A method for processing modulation symbols, comprising: modulating M / 2 first data into M first complex modulation symbols, wherein M is an integer greater than or equal to 2, the M / 2 first complex modulation symbols are determined by one first data, and the M / 2 first complex modulation symbols are determined by two first data; processing the M first complex modulation symbols.
2. The method of claim 1, wherein, The modulating M / 2 first data into M first complex modulation symbols comprises: Will and generating corresponding first complex modulation symbols as real and imaginary parts respectively or as imaginary and real parts respectively; wherein i=0, 1, …, M-1, b(k) is the kth first data, and k=0, 1, …, M / 2-1.
3. The method of claim 2, wherein, said generating and generating a corresponding first complex modulation symbol as real and imaginary parts or as imaginary and real parts, respectively, comprises: The corresponding first complex modulation symbol is generated according to the following equation: Or, The corresponding first complex modulation symbol is generated according to the following equation:
4. The method of claim 1, wherein, The modulating M / 2 first data into M first complex modulation symbols comprises: generating even-bit first complex modulation symbols according to one first data, and generating odd-bit first complex modulation symbols by taking two first data as real and imaginary parts respectively or as imaginary and real parts respectively.
5. The method of claim 4, wherein, The generating even-bit first complex modulation symbols according to one first data, and generating odd-bit first complex modulation symbols by taking two first data as real and imaginary parts respectively or as imaginary and real parts respectively comprises: The corresponding first complex modulation symbol is generated according to the following equation: Or, The corresponding first complex modulation symbol is generated according to the following equation:
6. The method of claim 1, wherein, The modulating M / 2 first data into M first complex modulation symbols comprises: repeating and reordering M / 2 first data by four times to obtain 2M second data; modulating the 2M second data in a quadrature phase shift keying manner to obtain M first complex modulation symbols.
7. The method of claim 6, wherein, The reordering operation is a left circular shift by one bit.
8. The method of claim 6, wherein, The reordering operation is a left circular shift by one bit, and a specific position is exchanged.
9. The method of claim 1, wherein, The modulating M / 2 first data into M first complex modulation symbols comprises: modulating M / 2 first data in a binary phase shift keying manner to obtain M / 2 second complex modulation symbols; recombining real and imaginary parts of the second complex modulation symbols to obtain M / 2 third complex modulation symbols; inserting the third complex modulation symbols between d’(k) and d’((k+1)mod M / 2) to obtain M first complex modulation symbols, wherein d’(k) is the kth second complex modulation symbol.
10. The method of claim 9, wherein, The recombining real and imaginary parts of the second complex modulation symbols to obtain M / 2 third complex modulation symbols comprises: combining a real part of d’(k) and an imaginary part of d’((k+1)mod M / 2) to obtain a third complex modulation symbol;Or, combining a real part of d’(k) and an imaginary part of d’((k+1)mod M / 2) to obtain a third complex modulation symbol.
11. The method of claim 1, wherein, The first data is generated by channel coding of third data bits.
12. The method of claim 1, wherein, The processing the M first complex modulation symbols comprises: multiplying the first complex modulation symbols by a complex coefficient, or circularly shifting, or multiplying the first complex modulation symbols by a complex coefficient and circularly shifting.
13. The method of claim 1, wherein, The processing the M first complex modulation symbols comprises: performing M-point discrete Fourier transform (DFT) on the M first complex modulation symbols to obtain frequency domain data of M subcarriers; mapping the frequency domain data to corresponding subcarrier positions. performing N-point inverse discrete Fourier transform (IFFT) on the data carried by the subcarriers to obtain a first communication signal.
14. The method of claim 13, further comprising: adding a cyclic prefix to the first communication signal to obtain a second communication signal, and performing frequency mixing and transmitting the second communication signal; or, adding a guard interval to the first communication signal to obtain a third communication signal, and performing frequency mixing and transmitting the third communication signal; or performing frequency mixing and transmitting the first communication signal.
15. A method for processing modulation symbols, comprising: obtaining M fourth complex modulation symbols generated by M / 2 first data, wherein M is an integer greater than or equal to 2, the M / 2 fourth complex modulation symbols being determined by one first data, and the M / 2 fourth complex modulation symbols being determined by two first data; processing the M fourth complex modulation symbols.
16. A first communication node, comprising: one or more processors; a memory device storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to any one of claims 1-14.
17. A second communication node, comprising: one or more processors; a memory device storing one or more programs; when the one or more programs are executed by the one or more processors, the one or more processors implement the method according to claim 15.
18. A storage medium storing a computer program, the computer program being executed by a processor to implement the method according to any one of claims 1-15.
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