Optical transmitter and control method

The optical transmitter with a bias controller and filtering mechanism addresses the challenge of distinguishing optical intensity fluctuations in burst coherent communication, enabling optimal bias voltage adjustment for stable signal transmission.

WO2025253659A1PCT designated stage Publication Date: 2025-12-11MITSUBISHI ELECTRIC CORP
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Patent Information

Application Number
PCT/JP2024/030115
Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-06-07
Filing Date
2024-08-26
Publication Date
2025-12-11

AI Technical Summary

Technical Problem

Conventional optical transmitters struggle to optimize bias voltage in burst coherent communication due to the inability to distinguish between fluctuations in optical intensity caused by bursting and those induced by a dither signal, leading to malfunctions and incorrect error amplitude detection.

Method used

An optical transmitter with a bias controller that includes a bias application unit, dither application unit, optical intensity detector, synchronous detection circuit, burst pulse filter, and bias voltage calculation circuit, which performs filtering and interpolation/averaging to separate and detect error amplitudes from dither signals during burst formation, enabling optimal bias voltage adjustment.

Benefits of technology

The solution allows for accurate detection of error amplitudes and optimization of bias voltage in burst coherent communication, ensuring stable and effective signal transmission.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention is provided with: a synchronous detection circuit (107) that detects, by performing synchronous detection on a signal indicating the intensity detected by a light intensity detector (106) and a dither signal output by a dither application unit (102), an error amplitude of the intensity due to the dither signal; a burst pulse filter (108) that performs filter processing for interpolating or averaging burst pulses with respect to the error amplitude detected by the synchronous detection circuit (107) when bursting of CW light is enabled; and a bias voltage calculation circuit (109) that controls the bias voltage output by a bias application unit (101) on the basis of the error amplitude after the filter processing by the burst pulse filter (108) when the bursting of the CW light is enabled and on the basis of the error amplitude detected by the synchronous detection circuit (107) when the bursting of the CW light is disabled.
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Description

Optical transmitter and control method

[0001] The present disclosure relates to an optical transmitter capable of bias control in burst coherent communication and a control method.

[0002] In digital coherent communications, a method of multi-level signal generation using an IQ modulator such as QPSK (Quadrature Phase Shift Keying) is used. The IQ modulator is configured by combining a child MZ (Mach-Zehnder) interferometer corresponding to the I signal and the Q signal with a parent MZ interferometer that combines the signals. This IQ modulator is capable of modulating and combining the I and Q components by applying optimal bias voltages to each MZ interferometer (see, for example, Patent Document 1).

[0003] In bias control, a dither signal, which is a minute alternating current (AC) output of about 1 to 10% of the direct current (DC) output corresponding to the bias point applied from the bias application unit to each MZ interferometer, is applied, and the amount of fluctuation in light intensity within that period is obtained by a light intensity detector.The optimal bias voltage is then calculated from the error amplitude obtained by synchronous detection with the dither signal, and the phase condition of the MZ interferometer is set to an optimal value.

[0004] The optical transmitter disclosed in Patent Document 1 assumes a condition in which an optical signal is constantly output. However, when this transmitter is applied to burst coherent communications, which improves receiving sensitivity by bursting optical signals, it cannot distinguish between fluctuations in optical intensity due to bursting and fluctuations in optical intensity due to a dither signal superimposed on a bias voltage. Therefore, this transmitter cannot detect error amplitude in burst coherent communications, which can cause malfunctions.

[0005] International Publication No. 2017-145981

[0006] As described above, in the conventional optical transmitter, when applied to burst coherent communication, it is not possible to realize optimization of the bias voltage.

[0007] The present disclosure has been made to solve the above-mentioned problems, and aims to provide an optical transmitter that enables optimization of the bias voltage even in burst coherent communication.

[0008] an optical transmitter according to the present disclosure, comprising: an IQ modulator that outputs signal light by IQ modulation of CW light in accordance with a modulation signal and a bias voltage; and a bias controller that controls the bias voltage applied to the IQ modulator; the bias controller comprising: a bias application unit that outputs a bias voltage; a dither application unit that outputs a dither signal to be superimposed on a DC component of the bias voltage output by the bias application unit; an optical intensity detector that detects the intensity of the signal light output by the IQ modulator; a synchronous detection circuit that detects an error amplitude of the intensity due to the dither signal by performing synchronous detection on a signal indicating the intensity detected by the optical intensity detector and the dither signal output by the dither application unit; a burst pulse filter that performs filtering processing to interpolate or average between burst pulses on the error amplitude detected by the synchronous detection circuit when burst formation for the CW light is enabled; and a bias voltage calculation circuit that controls the bias voltage output by the bias application unit based on the error amplitude after filtering by the burst pulse filter when burst formation for the CW light is enabled, and based on the error amplitude detected by the synchronous detection circuit when burst formation for the CW light is disabled.

[0009] According to the present disclosure, the above-described configuration makes it possible to optimize the bias voltage even in burst coherent communication.

[0010] 8A and 8B are diagrams illustrating an example of a configuration of an optical transmitter according to a first embodiment. FIG. 8B is a flowchart illustrating an example of bias control by the optical transmitter according to the first embodiment. FIG. 8C is a diagram illustrating an example of a change in optical intensity due to a dither signal when bursting is disabled and an example of an error amplitude detected by the optical transmitter according to the first embodiment. FIG. 8D is a diagram illustrating an example of a change in optical intensity due to a dither signal when bursting is enabled. FIG. 8E is a diagram illustrating an example of a change in optical intensity due to a dither signal when bursting is enabled and an example of an error amplitude detected by the optical transmitter according to the first embodiment. FIG. 8A and 8B are diagrams illustrating an example of a hardware configuration of a bias voltage calculation circuit according to the first and second embodiments.

[0011] Hereinafter, embodiments will be described in detail with reference to the drawings. Embodiment 1. FIG. 1 is a diagram showing an example of the configuration of an optical transmitter according to embodiment 1. The optical transmitter according to embodiment 1 is an optical transmitter capable of burst coherent communication. When the optical transmitter performs burst coherent communication, burst light is input to the optical transmitter as CW light (continuous wave light). This optical transmitter includes, for example, a bias controller 10 and an IQ modulator 20, as shown in FIG. 1.

[0012] The bias controller 10 controls the bias voltage for the IQ modulator 20. The IQ modulator 20 performs IQ modulation on the CW light in accordance with the modulation signal and the bias voltage controlled by the bias controller 10, and outputs the signal light.

[0013] As shown in FIG. 1, the bias controller 10 includes a bias application unit 101, a dither application unit 102, a first adder 103, a second adder 104, a third adder 105, an optical intensity detector 106, a synchronous detection circuit 107, a burst pulse filter 108, and a bias voltage calculation circuit 109.

[0014] The bias application unit 101 outputs a bias voltage to be applied to the IQ modulator 20. The bias application unit 101 changes the bias voltage to be applied to the IQ modulator 20 in accordance with the value of the bias voltage calculated by the bias voltage calculation circuit 109.

[0015] The dither application unit 102 outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101. The dither signal is a minute alternating current (AC) that is approximately 1 to 10% of the DC component of the bias voltage.

[0016] The first adding unit 103 superimposes the dither signal output by the dither applying unit 102 on the bias voltage output by the bias applying unit 101 and outputs the result to an in-phase MZ interferometer 201 (I modulation) described later that the IQ modulator 20 has.

[0017] The second adding unit 104 superimposes the dither signal output by the dither applying unit 102 on the bias voltage output by the bias applying unit 101 and outputs the result to a Quadrature-Phase (quadrature phase) MZ interferometer 202 (Q modulation) described later that the IQ modulator 20 has.

[0018] The third adder 105 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101 and outputs the result to a phase adjustment electrode unit 203 (P shift) described later that the IQ modulator 20 has.

[0019] The optical intensity detector 106 detects the intensity of the signal light output by the IQ modulator 20, thereby detecting fluctuations in the optical intensity due to the dither signal.

[0020] The synchronous detection circuit 107 performs synchronous detection on the signal indicating the intensity detected by the optical intensity detector 106 and the dither signal output by the dither application unit 102, thereby detecting the error amplitude of the intensity due to the dither signal.

[0021] The burst pulse filter 108 acquires information indicating whether bursting is enabled as a register, and when bursting of the CW light is enabled, performs filtering on the error amplitude detected by the synchronous detection circuit 107. In this filtering, the error amplitude is interpolated or averaged between burst pulses.

[0022] At this time, the burst pulse filter 108 first acquires information indicating the burst period and pulse length as a register. The burst period and pulse length indicated by this register are the burst period and pulse length of the CW light, which is the burst light input to the IQ modulator 20. The burst pulse filter 108 then updates the filter based on the acquired register. Then, when bursting of the CW light is effective, the burst pulse filter 108 performs interpolation or averaging between burst pulses using the filter for the error amplitude (synchronous detection output value) detected by the synchronous detection circuit 107.

[0023] When bursting of the CW light is disabled, the signal indicating the error amplitude detected by the synchronous detection circuit 107 passes through the burst pulse filter 108 as is, i.e., no filtering is performed by the burst pulse filter 108.

[0024] The bias voltage calculation circuit 109 controls the bias voltage output by the bias application unit 101 based on the error amplitude after filtering by the burst pulse filter 108 when bursting of the CW light is enabled, and based on the error amplitude (error amplitude not filtered by the burst pulse filter 108) detected by the synchronous detection circuit 107 when bursting of the CW light is disabled. In this case, the bias voltage calculation circuit 109 determines a new DC output as the bias voltage based on, for example, a value obtained by multiplying the error amplitude by the gain and the sign (chirp) of the control direction.

[0025] The IQ modulator 20 has, for example, an In-Phase MZ interferometer 201, a Quadrature-Phase MZ interferometer 202, and a phase adjustment electrode section 203, as shown in FIG.

[0026] The In-Phase MZ interferometer 201 performs I modulation on the CW light in response to the modulation signal and the bias signal controlled by the bias controller 10, and outputs an I signal.

[0027] The quadrature-phase MZ interferometer 202 outputs a Q signal by performing Q modulation on the CW light in accordance with the modulation signal and the bias signal controlled by the bias controller 10 .

[0028] The phase adjustment electrode unit 203 performs phase modulation on the Q signal output by the Quadrature-Phase MZ interferometer 202 in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Then, the I signal output by the In-Phase MZ interferometer 201 and the phase-modulated Q signal output by the phase adjustment electrode unit 203 are multiplexed to form signal light output from the IQ modulator 20.

[0029] Next, an example of bias control by the optical modulator according to the first embodiment shown in FIG. 1 will be described with reference to FIG.

[0030] In an example of bias control by the optical modulator according to the first embodiment shown in FIG. 1, as shown in FIG. 2, first, the bias application unit 101 outputs a bias voltage to be applied to the IQ modulator 20, and the dither application unit 102 outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101 (step ST101).

[0031] Thereafter, the first adder 103 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101, and outputs the result to an in-phase MZ interferometer 201 (described later) included in the IQ modulator 20. The second adder 104 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101, and outputs the result to a quadrature-phase MZ interferometer 202 (described later) included in the IQ modulator 20. The third adder 105 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101, and outputs the result to a phase adjustment electrode unit 203 (described later) included in the IQ modulator 20.

[0032] Next, the IQ modulator 20 performs IQ modulation on the CW light (continuous wave light) in accordance with the modulation signal and the bias voltage controlled by the bias controller 10, and outputs the signal light (step ST102).

[0033] At this time, the In-Phase MZ interferometer 201 outputs an I signal by performing I modulation on the CW light in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Furthermore, the Quadrature-Phase MZ interferometer 202 outputs a Q signal by performing Q modulation on the CW light in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Furthermore, the phase adjustment electrode unit 203 performs phase modulation on the Q signal output by the Quadrature-Phase MZ interferometer 202 in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Then, the I signal output by the In-Phase MZ interferometer 201 and the phase-modulated Q signal output by the phase adjustment electrode unit 203 are multiplexed to form signal light output from the IQ modulator 20.

[0034] Next, the optical intensity detector 106 detects the intensity of the signal light output by the IQ modulator 20, thereby detecting fluctuations in the optical intensity due to the dither signal (step ST103).

[0035] Next, the synchronous detection circuit 107 performs synchronous detection on the signal indicating the intensity detected by the optical intensity detector 106 and the dither signal output by the dither application unit 102, thereby detecting the error amplitude of the intensity due to the dither signal (step ST104).

[0036] Next, the burst pulse filter 108 acquires information indicating whether bursting is enabled or disabled as a register, and determines whether bursting of the CW light is enabled or disabled (step ST105).

[0037] In step ST105, if the burst pulse filter 108 determines that bursting the CW light is effective, it acquires information indicating the burst period and pulse length as a register (step ST106).

[0038] Next, the burst pulse filter 108 updates the filter based on the acquired register (step ST107).

[0039] Next, burst pulse filter 108 performs interpolation or averaging between burst pulses using the filter on the error amplitude (synchronous detection output value) detected by synchronous detection circuit 107 (step ST108).

[0040] On the other hand, if the burst pulse filter 108 determines in step ST105 that bursting of the CW light is invalid, it does not perform filtering and outputs the signal indicating the error amplitude detected by the synchronous detection circuit 107 as is (step ST109).

[0041] Next, the bias voltage calculation circuit 109 controls the bias voltage output by the bias application unit 101 based on the error amplitude after filtering by the burst pulse filter 108 if bursting of the CW light is enabled, or based on the error amplitude detected by the synchronous detection circuit 107 (error amplitude not filtered by the burst pulse filter 108) if bursting of the CW light is disabled (step ST110). At this time, the bias voltage calculation circuit 109 determines a new DC output as the bias voltage based on, for example, a value obtained by multiplying the error amplitude by the gain and the sign of the control direction (chirp).

[0042] Next, the bias applying unit 101 changes the bias voltage to be applied to the IQ modulator 20 in accordance with the value of the bias voltage calculated by the bias voltage calculation circuit 109 (step ST111).

[0043] 3 shows an example of the change in optical intensity due to the dither signal and the error amplitude detected by the optical transmitter according to the first embodiment when bursting of CW light is disabled. As shown in FIG. 3, when bursting of CW light is disabled, that is, when CW light is constantly input, the optical transmitter according to the first embodiment can distinguish the fluctuation in optical intensity due to the dither signal and detect the error amplitude. Therefore, the optical transmitter according to the first embodiment can calculate the optimal bias voltage based on the detected error amplitude.

[0044] On the other hand, Fig. 4 shows an example of the change in optical intensity due to the dither signal when bursting of the CW light is effective. As shown in Fig. 4, when bursting of the CW light is effective, i.e., when the CW light is burst light, conventional optical transmitters cannot distinguish between fluctuations in optical intensity due to bursting and fluctuations in optical intensity due to the dither signal, and therefore cannot correctly detect the error amplitude. Therefore, in the optical transmitter according to the first embodiment, fluctuations in optical intensity due to bursting are removed by filtering using the burst pulse filter 108.

[0045] 5 shows an example of the change in optical intensity due to the dither signal and the error amplitude (after filtering) detected by the optical transmitter according to the first embodiment when bursting of the CW light is enabled. As shown in FIG. 5, even when bursting of the CW light is enabled, i.e., when the CW light is burst light, the optical transmitter according to the first embodiment can distinguish the fluctuation in optical intensity due to the dither signal and detect the error amplitude by performing interpolation or averaging between burst pulses using the burst pulse filter 108. Therefore, the optical transmitter according to the first embodiment can calculate the optimal bias voltage based on the detected error amplitude.

[0046] In this way, the optical transmitter according to the first embodiment is provided with a burst pulse filter 108 that removes the fluctuation in optical intensity due to bursting from the detected value, which contains a mixture of fluctuations in optical intensity due to bursting and fluctuations in optical intensity due to the dither signal. This makes it possible for the optical transmitter according to the first embodiment to detect the error amplitude even in the above-mentioned situation, and to optimize the bias voltage.

[0047] As described above, according to the first embodiment, the optical transmitter includes an IQ modulator 20 that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage, and a bias controller 10 that controls the bias voltage for the IQ modulator 20. The bias controller 10 includes a bias application unit 101 that outputs a bias voltage, a dither application unit 102 that outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101, an optical intensity detector 106 that detects the intensity of the signal light output by the IQ modulator 20, and a signal indicating the intensity detected by the optical intensity detector 106 and the dither signal output by the dither application unit 102. The optical transmitter according to the first embodiment includes a synchronous detection circuit 107 that detects an error amplitude of the intensity due to the dither signal by performing synchronous detection on the dither signal; a burst pulse filter 108 that performs filtering processing to interpolate or average between burst pulses on the error amplitude detected by the synchronous detection circuit 107 when burst formation for the CW light is enabled; and a bias voltage calculation circuit 109 that controls the bias voltage output by the bias application unit 101 based on the error amplitude after filtering by the burst pulse filter 108 when burst formation for the CW light is enabled, and based on the error amplitude detected by the synchronous detection circuit 107 when burst formation for the CW light is disabled. Furthermore, according to the first embodiment, the burst pulse filter 108 updates its filter based on information indicating the burst period and pulse length, and performs filtering processing to interpolate or average between burst pulses using the filter. As a result, the optical transmitter according to the first embodiment can optimize the bias voltage even in burst coherent communication. As a result, the optical transmitter according to the first embodiment enables stable communication.

[0048] Furthermore, according to the first embodiment, the control method is a control method by an optical transmitter including an IQ modulator 20 that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage, and a bias controller 10 that controls the bias voltage for the IQ modulator 20, and the bias controller 10 includes a step in which a bias application unit 101 outputs a bias voltage, a step in which a dither application unit 102 outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101, a step in which an optical intensity detector 106 detects the intensity of the signal light output by the IQ modulator 20, and a step in which a synchronous detection circuit 107 detects the intensity detected by the optical intensity detector 106 ... dither application unit 102. The control method according to the first embodiment includes a step of detecting an error amplitude of the intensity due to the dither signal by performing synchronous detection on the dither signal output by 102, a step of performing filtering processing by burst pulse filter 108 to interpolate or average between burst pulses on the error amplitude detected by synchronous detection circuit 107 when burst formation for CW light is enabled, and a step of controlling a bias voltage output by bias application unit 101 based on the error amplitude after filtering by burst pulse filter 108 when burst formation for CW light is enabled, or based on the error amplitude detected by synchronous detection circuit 107 when burst formation for CW light is disabled. As a result, the control method according to the first embodiment enables optimization of the bias voltage even in burst coherent communication. As a result, the control method according to the first embodiment enables stable communication.

[0049] Second Embodiment Fig. 6 is a diagram showing an example of the configuration of an optical transmitter according to a second embodiment. In the optical transmitter according to the second embodiment shown in Fig. 6, the synchronous detection circuit 107, burst pulse filter 108, and bias voltage calculation circuit 109 of the optical transmitter according to the first embodiment shown in Fig. 1 are changed to a synchronous detection circuit 107b, a burst pulse filter 108b, and a bias voltage calculation circuit 109b. The other configuration examples of the optical transmitter according to the second embodiment shown in Fig. 6 are the same as the configuration example of the optical transmitter according to the first embodiment, so the same reference numerals are used and their description will be omitted.

[0050] The burst pulse filter 108b acquires information indicating whether bursting is enabled as a register, and when bursting of the CW light is enabled, performs filtering on the signal indicating the intensity detected by the optical intensity detector 106. In this filtering, the signal is interpolated or averaged between burst pulses.

[0051] At this time, the burst pulse filter 108b first acquires information indicating the burst period and pulse length as a register. The burst period and pulse length indicated by this register are the burst period and pulse length of the CW light, which is the burst light input to the IQ modulator 20. The burst pulse filter 108b then updates the filter based on the acquired register. Then, when bursting of the CW light is enabled, the burst pulse filter 108b uses the filter to interpolate or average between burst pulses on the signal indicating the intensity detected by the optical intensity detector 106.

[0052] When bursting of the CW light is disabled, the signal indicating the intensity detected by the optical intensity detector 106 passes through the burst pulse filter 108b as is, i.e., no filtering is performed by the burst pulse filter 108b.

[0053] When bursting of the CW light is enabled, the synchronous detection circuit 107b performs synchronous detection on the signal filtered by the burst pulse filter 108b and the dither signal output by the dither application unit 102, and when bursting of the CW light is disabled, the synchronous detection circuit 107b performs synchronous detection on the signal indicating the intensity detected by the optical intensity detector 106 (the signal not filtered by the burst pulse filter 108b) and the dither signal output by the dither application unit 102, thereby detecting the error amplitude of the intensity due to the dither signal.

[0054] Based on the error amplitude detected by the synchronous detection circuit 107b, the bias voltage calculation circuit 109b controls the bias voltage output by the bias application unit 101. At this time, the bias voltage calculation circuit 109b determines a new DC output based on, for example, a value obtained by multiplying the error amplitude by the gain and the sign of the control direction (chirp).

[0055] That is, the synchronous detection circuit 107b and burst pulse filter 108b in the second embodiment are arranged in a reverse order relative to the synchronous detection circuit 107 and burst pulse filter 108 in the first embodiment, and synchronous detection processing is performed after filtering processing.

[0056] Next, an example of bias control by the optical modulator according to the second embodiment shown in FIG. 6 will be described with reference to FIG.

[0057] In an example of bias control by the optical modulator according to the second embodiment shown in FIG. 6, as shown in FIG. 7, first, the bias application unit 101 outputs a bias voltage to be applied to the IQ modulator 20, and the dither application unit 102 outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101 (step ST201).

[0058] Thereafter, the first adder 103 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101, and outputs the result to an in-phase MZ interferometer 201 (described later) included in the IQ modulator 20. The second adder 104 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101, and outputs the result to a quadrature-phase MZ interferometer 202 (described later) included in the IQ modulator 20. The third adder 105 superimposes the dither signal output by the dither application unit 102 on the bias voltage output by the bias application unit 101, and outputs the result to a phase adjustment electrode unit 203 (described later) included in the IQ modulator 20.

[0059] Next, the IQ modulator 20 performs IQ modulation on the CW light (continuous wave light) in accordance with the modulation signal and the bias voltage controlled by the bias controller 10, and outputs the signal light (step ST202).

[0060] At this time, the In-Phase MZ interferometer 201 outputs an I signal by performing I modulation on the CW light in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Furthermore, the Quadrature-Phase MZ interferometer 202 outputs a Q signal by performing Q modulation on the CW light in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Furthermore, the phase adjustment electrode unit 203 performs phase modulation on the Q signal output by the Quadrature-Phase MZ interferometer 202 in accordance with the modulation signal and the bias signal controlled by the bias controller 10. Then, the I signal output by the In-Phase MZ interferometer 201 and the phase-modulated Q signal output by the phase adjustment electrode unit 203 are multiplexed to form signal light output from the IQ modulator 20.

[0061] Next, the optical intensity detector 106 detects the intensity of the signal light output by the IQ modulator 20, thereby detecting fluctuations in the optical intensity due to the dither signal (step ST203).

[0062] Next, the burst pulse filter 108b acquires information indicating whether bursting is enabled or disabled as a register, and determines whether bursting of the CW light is enabled or disabled (step ST204).

[0063] In step ST204, if the burst pulse filter 108b determines that bursting the CW light is effective, it acquires information indicating the burst period and pulse length as a register (step ST205).

[0064] Next, burst pulse filter 108b updates the filter based on the acquired register (step ST206).

[0065] Next, burst pulse filter 108b performs interpolation or averaging between burst pulses using the filter on the signal indicating the intensity detected by optical intensity detector 106 (optical intensity detection value) (step ST207).

[0066] On the other hand, if the burst pulse filter 108b determines in step ST204 that bursting of the CW light is invalid, it does not perform filtering and outputs a signal indicating the intensity detected by the optical intensity detector 106 as is (step ST208).

[0067] Next, if bursting of the CW light is enabled, the synchronous detection circuit 107b performs synchronous detection on the signal filtered by the burst pulse filter 108b and the dither signal output by the dither application unit 102, and if bursting of the CW light is disabled, performs synchronous detection on the signal indicating the intensity detected by the optical intensity detector 106 (the signal not filtered by the burst pulse filter 108b) and the dither signal output by the dither application unit 102, thereby detecting the error amplitude of the intensity due to the dither signal (step ST209).

[0068] Next, based on the error amplitude detected by the synchronous detection circuit 107b, the bias voltage calculation circuit 109b controls the bias voltage output by the bias application unit 101. At this time, the bias voltage calculation circuit 109b determines a new DC output as the bias voltage based on, for example, a value obtained by multiplying the error amplitude by the gain and the sign of the control direction (chirp) (step ST210).

[0069] Next, the bias applying section 101 changes the bias voltage to be applied to the IQ modulator 20 in accordance with the value of the bias voltage calculated by the bias voltage calculation circuit 109b (step ST211).

[0070] In this way, the optical transmitter according to the second embodiment performs synchronous detection by applying the burst pulse filter 108b to the output of the optical power detector 106. As a result, the optical transmitter according to the second embodiment is expected to have the effect of making it easier to detect error amplitude compared to the optical transmitter according to the first embodiment.

[0071] As described above, according to the second embodiment, the optical transmitter includes an IQ modulator 20 that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage, and a bias controller 10 that controls the bias voltage for the IQ modulator 20. The bias controller 10 includes a bias application unit 101 that outputs a bias voltage, a dither application unit 102 that outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101, an optical intensity detector 106 that detects the intensity of the signal light output by the IQ modulator 20, and, when bursting of the CW light is effective, performs interpolation or averaging between burst pulses on the signal indicating the intensity detected by the optical intensity detector 106. The optical transmitter according to the second embodiment includes a burst pulse filter 108b that performs filtering, a synchronous detection circuit 107b that performs synchronous detection on the signal filtered by the burst pulse filter 108b and the dither signal output by the dither application unit 102 when bursting of the CW light is enabled, and a bias voltage calculation circuit 109 that controls the bias voltage output by the bias application unit 101 based on the error amplitude detected by the synchronous detection circuit 107b when bursting of the CW light is disabled, and a bias voltage calculation circuit 109 that controls the bias voltage output by the bias application unit 101 based on the error amplitude detected by the synchronous detection circuit 107b. This enables the optical transmitter according to the second embodiment to optimize the bias voltage even in burst coherent communication. As a result, the optical transmitter according to the second embodiment enables stable communication. Furthermore, the optical transmitter according to the second embodiment makes it easier to detect the error amplitude than the optical transmitter according to the first embodiment.

[0072] Furthermore, according to the second embodiment, the control method is a control method by an optical transmitter including an IQ modulator 20 that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage, and a bias controller 10 that controls the bias voltage for the IQ modulator 20, and the bias controller 10 includes a step in which a bias application unit 101 outputs a bias voltage, a step in which a dither application unit 102 outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit 101, a step in which an optical intensity detector 106 detects the intensity of the signal light output by the IQ modulator 20, and a step in which a burst pulse filter 108b performs a signal indicating the intensity detected by the optical intensity detector 106 when bursting of the CW light is effective. The control method according to the second embodiment includes a step of filtering the burst pulses to interpolate or average them, a step in which the synchronous detection circuit 107b performs synchronous detection on the signal filtered by the burst pulse filter 108b and the dither signal output by the dither application unit 102 when bursting of the CW light is enabled, and a step in which the synchronous detection circuit 107b performs synchronous detection on the signal indicating the intensity detected by the optical intensity detector 106 and the dither signal output by the dither application unit 102 when bursting of the CW light is disabled, thereby detecting an error amplitude of the intensity due to the dither signal, and a step in which the bias voltage calculation circuit 109b controls the bias voltage output by the bias application unit 101 based on the error amplitude detected by the synchronous detection circuit 107b. This makes it possible to optimize the bias voltage even in burst coherent communication. As a result, the control method according to the second embodiment enables stable communication. Furthermore, the control method according to the second embodiment makes it easier to detect the error amplitude than the control method according to the first embodiment.

[0073] Finally, with reference to FIG. 8 , an example of the hardware configuration of the bias voltage calculation circuit 109, 109b according to the first and second embodiments will be described. Hereinafter, an example of the hardware configuration of the bias voltage calculation circuit 109 according to the first embodiment will be described, but the same applies to the example of the hardware configuration of the bias voltage calculation circuit 109b according to the second embodiment. The function of the bias voltage calculation circuit 109 is realized by a processing circuit 51. The processing circuit 51 may be dedicated hardware as shown in FIG. 8A , or may be a CPU (also referred to as a central processing unit, processing device, arithmetic unit, microprocessor, microcomputer, processor, or DSP (Digital Signal Processor)) 52 that executes a program stored in a memory 53 as shown in FIG. 8B .

[0074] When the processing circuitry 51 is dedicated hardware, the processing circuitry 51 may be, for example, a single circuit, a composite circuit, a programmed processor, a parallel programmed processor, an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array), or a combination thereof.

[0075] When the processing circuit 51 is a CPU, the functions of the bias voltage calculation circuit 109 are realized by software, firmware, or a combination of software and firmware. The software and firmware are written as programs and stored in the memory 53. The processing circuit 51 realizes its functions by reading and executing the programs stored in the memory 53. That is, the bias voltage calculation circuit 109 includes the memory 53 for storing programs that, when executed by the processing circuit 51, result in the execution of, for example, the processing shown in FIG. 2 . It can also be said that these programs cause a computer to execute the procedures and methods of the bias voltage calculation circuit 109. Here, examples of the memory 53 include non-volatile or volatile semiconductor memories such as RAM (Random Access Memory), ROM (Read Only Memory), flash memory, EPROM (Erasable Programmable ROM), and EEPROM (Electrically EPROM), magnetic disks, flexible disks, optical disks, compact disks, minidisks, and DVDs (Digital Versatile Discs).

[0076] It should be noted that the functions of the bias voltage calculation circuit 109 may be partially realized by dedicated hardware and partially realized by software or firmware.

[0077] In this way, the processing circuitry 51 can realize each of the above-described functions by hardware, software, firmware, or a combination of these.

[0078] It should be noted that the embodiments may be freely combined, or any of the components in each embodiment may be modified, or any of the components in each embodiment may be omitted.

[0079] The optical transmitter according to the present disclosure enables optimization of the bias voltage even in burst coherent communication, and is suitable for use in optical transmitters capable of bias control in burst coherent communication.

[0080] 10 Bias controller, 20 IQ modulator, 51 Processing circuit, 52 CPU, 53 Memory, 101 Bias application unit, 102 Dither application unit, 103 First addition unit, 104 Second addition unit, 105 Third addition unit, 106 Light intensity detector, 107 Synchronous detection circuit, 108 Burst pulse filter, 109 Bias voltage calculation circuit, 201 In-Phase MZ interferometer, 202 Quadrature-Phase MZ interferometer, 203 Phase adjustment electrode unit.

Claims

1. An IQ modulator that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage; and a bias controller that controls the bias voltage for the IQ modulator, wherein the bias controller comprises: a bias application unit that outputs a bias voltage; a dither application unit that outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit; an optical intensity detector that detects the intensity of the signal light output by the IQ modulator; a synchronous detection circuit that detects the error amplitude of the intensity due to the dither signal by performing synchronous detection on the signal indicating the intensity detected by the optical intensity detector and the dither signal output by the dither application unit; and a burst pulse filter that performs filtering to interpolate or average between burst pulses on the error amplitude detected by the synchronous detection circuit when bursting of the CW light is effective. and a bias voltage calculation circuit that controls the bias voltage output by the bias application unit based on an error amplitude after filtering by the burst pulse filter when bursting of the CW light is enabled, and based on an error amplitude detected by the synchronous detection circuit when bursting of the CW light is disabled.

2. An IQ modulator that outputs signal light by IQ modulation of CW light in accordance with a modulation signal and a bias voltage; and a bias controller that controls the bias voltage for the IQ modulator, wherein the bias controller comprises: a bias application unit that outputs a bias voltage; a dither application unit that outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit; an optical intensity detector that detects the intensity of the signal light output by the IQ modulator; a burst pulse filter that, when bursting of the CW light is enabled, performs filtering to interpolate or average between burst pulses on a signal indicating the intensity detected by the optical intensity detector; and a synchronous detection circuit that, when bursting of the CW light is enabled, performs synchronous detection on the signal after filtering by the burst pulse filter and the dither signal output by the dither application unit, and, when bursting of the CW light is disabled, performs synchronous detection on the signal indicating the intensity detected by the optical intensity detector and the dither signal output by the dither application unit, thereby detecting the error amplitude of the intensity caused by the dither signal. a bias voltage calculation circuit that controls a bias voltage output by the bias application unit based on the error amplitude detected by the synchronous detection circuit.

3. An optical transmitter according to claim 1 or claim 2, characterized in that the burst pulse filter updates the filter based on information indicating the burst period and pulse length, and performs filtering processing such as interpolation or averaging between burst pulses using the filter.

4. A control method for an optical transmitter comprising an IQ modulator that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage, and a bias controller that controls the bias voltage for the IQ modulator, wherein the bias controller comprises: a bias application unit that outputs a bias voltage; a dither application unit that outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit; an optical intensity detector that detects the intensity of the signal light output by the IQ modulator; a synchronous detection circuit that performs synchronous detection on a signal indicating the intensity detected by the optical intensity detector and the dither signal output by the dither application unit to detect an error amplitude of the intensity due to the dither signal; and a burst pulse filter that, when bursting of the CW light is effective, performs filtering processing to interpolate or average between burst pulses on the error amplitude detected by the synchronous detection circuit. a bias voltage calculation circuit controlling the bias voltage output by the bias application unit based on an error amplitude after filtering by the burst pulse filter when bursting of the CW light is enabled, and based on an error amplitude detected by the synchronous detection circuit when bursting of the CW light is disabled.

5. A control method for an optical transmitter comprising an IQ modulator that outputs signal light by performing IQ modulation on CW light in accordance with a modulation signal and a bias voltage, and a bias controller that controls the bias voltage for the IQ modulator, wherein the bias controller comprises: a bias application unit that outputs a bias voltage; a dither application unit that outputs a dither signal to be superimposed on the DC component of the bias voltage output by the bias application unit; an optical intensity detector that detects the intensity of the signal light output by the IQ modulator; and a burst pulse filter that, when bursting of the CW light is effective, performs filtering to interpolate or average between burst pulses on a signal indicating the intensity detected by the optical intensity detector. a step in which a synchronous detection circuit detects an error amplitude of the intensity due to the dither signal by performing synchronous detection on the signal after filtering by the burst pulse filter and the dither signal output by the dither application unit when bursting of the CW light is enabled, and by performing synchronous detection on the signal indicating the intensity detected by the optical intensity detector and the dither signal output by the dither application unit when bursting of the CW light is disabled; and a step in which a bias voltage calculation circuit controls the bias voltage output by the bias application unit based on the error amplitude detected by the synchronous detection circuit.

Citation Information

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