Method and apparatus for wireless communication
By sending indication information to trigger the transmission of parity bit blocks in the wireless communication system and using AI/ML to generate candidate data blocks, the efficiency and latency issues of the HARQ mechanism after the introduction of AI/ML are solved, and more efficient data transmission is achieved.
Patent Information
- Application Number
- PCT/CN2025/101110
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- Priority Date
- 2024-06-17
- Filing Date
- 2025-06-16
- Publication Date
- 2025-12-26
AI Technical Summary
The existing HARQ mechanism cannot fully leverage its advantages after the introduction of AI/ML, resulting in ineffective optimization of transmission efficiency and latency issues.
By receiving data blocks from the data block sequence, sending indication information to trigger the transmission of check bit blocks, and using AI/ML models to generate candidate data blocks, transmission efficiency is improved and processing latency is reduced.
It improves transmission efficiency, reduces air interface overhead and processing latency, while maintaining system compatibility and reducing processing complexity.
Smart Images

Figure CN2025101110_26122025_PF_FP_ABST
Abstract
Description
Method and apparatus for wireless communication TECHNICAL FIELD
[0001] The present application relates to transmission method and apparatus in wireless communication system, and more particularly, to schemes and apparatuses related to data block transmission in wireless communication system. BACKGROUND
[0002] In conventional wireless communication, ARQ (Automatic Repeat reQuest) and HARQ (Hybrid ARQ) are adopted to improve transmission efficiency while meeting QoS (Quality of Service) requirement. The transmitter sends encoded information or data to the receiver for the first time. If the receiver correctly receives the information or data, it feeds back ACK, and the transmitter terminates sending the information or data (or sends new information or data) after receiving the ACK. If the receiver does not correctly receive the information or data, it feeds back NACK, and the transmitter re-sends the information or data after receiving the NACK. The re-sent information or data can use the same redundancy version or different redundancy version.
[0003] Generally, the transmitter appends (usually multiple) CRC (Cyclic Redundancy Check) bits after the information or data, and the receiver determines whether the information or data is correctly received according to the CRC bits.
[0004] In NR (New Radio) system, Distributed CRC is used for DCI (Downlink Control Information) or PBCH (Physical Broadcast Channel), that is, the information / data bits are interleaved with the CRC bits. For each CRC bit embedded in the information / data bits, the information / data bits associated with it are before the CRC bit to achieve the purpose of Early Terminating.
[0005] In NR R(release)18, the research of AI(Artificial Intelligence) / ML(Machine Learning) technology is commissioned to explore its impact on system performance and system design. Compared with the traditional processing method, AI / ML has the characteristics of being based on training and needing to be deployed. According to 3GPP standard TS38.300, AI / ML models and algorithms are beyond the scope of 3GPP(third generation partnership project). SUMMARY
[0006] The applicant found through research that when AI / ML functions are introduced, the existing HARQ mechanism may not be able to fully play the advantages of AI / ML, so there is further optimization space.
[0007] To solve the above problems, the present application discloses a solution. It should be noted that although a large number of embodiments of the present application are developed for AI / ML, the present application is also applicable to other schemes, such as traditional channel decoding schemes. Although the present application specification involves some descriptions of AI / ML models and algorithms, however, the person skilled in the art knows that these descriptions are not necessary or irreplaceable for wireless cellular communication related solutions. In addition, adopting a unified solution for different scenarios(including but not limited to AI / ML-based schemes and traditional channel decoding schemes) also helps to reduce hardware complexity and cost. In the case of no conflict, the embodiments in the first node and the features in the embodiments of the present application can be applied to the second node, and vice versa. In the case of no conflict, the embodiments of the present application and the features in the embodiments can be arbitrarily combined with each other.
[0008] As an embodiment, the explanation of the terms in the present application is based on the definition of the specification agreement TS38 series of 3GPP.
[0009] As an embodiment, the explanation of the terms in the present application is based on the definition of the specification agreement TS28 series of 3GPP.
[0010] The present application discloses a method in a first node used for wireless communication, characterized in that it comprises:
[0011] Receiving at least one data block in a data block sequence, the data block sequence comprising a first data block;
[0012] Sending first indication information;
[0013] Receiving a first check bit block;
[0014] Sending second indication information;
[0015] The first indication information triggers transmission of the first check bit block; generation of the first check bit block depends on the first data block; and the second indication information is used to indicate that the first data block is obtained.
[0016] As an embodiment, compared with retransmission of the data block, transmission of the check bit block can improve transmission efficiency and reduce air interface overhead.
[0017] As an embodiment, compared with traditional HARQ-ACK feedback, cooperation of the first indication information and the second indication information provides greater processing delay for the receiver to obtain the first data block.
[0018] Specifically, according to an aspect of the present application, the above method is characterized in that the at least one data block in the received data block sequence comprises:
[0019] generating at least a first candidate data block;
[0020] wherein the first candidate data block is determined as the first data block.
[0021] The above method allows the first node to generate a candidate of the first data block, which provides a beneficial supplement when correct reception is not possible. The specific generation algorithm can be determined by the first node itself, for example, based on an AI / ML model, or searching within a specific distance from the decoded bit block, etc.
[0022] Specifically, according to an aspect of the present application, the above method is characterized in that the at least first candidate data block comprises a plurality of candidate data blocks, wherein the first check bit block is used to determine the first candidate data block from the plurality of candidate data blocks.
[0023] As an embodiment, the above method makes it possible for the first node to generate a plurality of candidates for the first data block, increasing the probability of obtaining the first data block.
[0024] Specifically, according to an aspect of the present application, the above method is characterized in that the at least one data block in the received data block sequence comprises:
[0025] performing reception on a first wireless channel, and not correctly receiving a first bit block;
[0026] wherein the first bit block of the first wireless channel is a latest transmission of the first data block.
[0027] Typically, each transmission of the first data block is one RV (Redundancy Version) of the first bit block after channel coding; different transmissions of the first data block can use different redundancy versions.
[0028] In the above method, although the first node does not correctly receive the first bit block, the first data block can still be inferred, avoiding the reduction of transmission efficiency caused by retransmission and reducing the delay caused by transmission.
[0029] Specifically, according to an aspect of the present application, the above method is characterized in that it comprises:
[0030] indicating that the first bit block is not correctly received by using a second wireless channel;
[0031] The second wireless channel is located before the transmission time of the first indication information.
[0032] The above aspect and the existing system maintain good compatibility, avoiding the transmitter from discarding the first data block too early.
[0033] Specifically, according to an aspect of the present application, the above method is characterized in that the order of the first data block in the data block sequence depends on the time domain resources occupied by the first wireless channel.
[0034] The above method can save signaling overhead on the one hand; on the other hand, the first node can generate the candidate of the first data block without receiving the sequence number corresponding to the first data block, reducing the processing complexity or processing delay.
[0035] Specifically, according to an aspect of the present application, the above method is characterized in that it comprises:
[0036] receiving first signaling;
[0037] The first signaling indicates a plurality of sequentially arranged time domain resources, and the time domain resources occupied by the first wireless channel are one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
[0038] As an embodiment, the first node in the above aspect is a UE.
[0039] Specifically, according to an aspect of the present application, the above method is characterized in that it comprises:
[0040] sending first signaling;
[0041] The first signaling indicates a plurality of sequentially arranged time domain resources, and the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; and data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
[0042] As an embodiment, the first node in the above aspect is a base station or a network device.
[0043] Specifically, according to an aspect of the present application, the above method is characterized in that any data block in the data block sequence is a PDCP (Packet Data Convergence Protocol) SDU (Service Data Unit).
[0044] The present application discloses a method in a second node used for wireless communication, characterized in that, comprising:
[0045] transmitting at least one data block in a data block sequence, the data block sequence comprising a first data block;
[0046] receiving first indication information;
[0047] transmitting a first check bit block;
[0048] receiving second indication information;
[0049] The first indication information triggers transmission of the first check bit block; generation of the first check bit block depends on the first data block; and the second indication information is used to indicate that the first data block is obtained.
[0050] As an embodiment, the second indication information used to indicate that the first data block is obtained comprises that the second node flushes a buffer storing the first data block.
[0051] As an embodiment, the second indication information used to indicate that the first data block is obtained comprises that the second node stores other data in the buffer storing the first data block.
[0052] As an embodiment, the second indication information used to indicate that the first data block is obtained comprises that the second node clears a retransmission counter, and when the retransmission counter reaches a specific threshold, the second node judges that a radio link failure occurs.
[0053] As an embodiment, the specific threshold is 4.
[0054] As an embodiment, the specific threshold is configurable.
[0055] As one embodiment, in response to receiving the second indication information, the second node stops retransmitting the first data block.
[0056] As one sub-embodiment of the above embodiment, the second node retransmits a data block (e.g., a second data block) other than the first data block in the first bit block.
[0057] In particular, according to one aspect of the present application, the above method is characterized in that the at least one data block in the sequence of data blocks comprises:
[0058] transmitting a first bit block on a first wireless channel;
[0059] wherein the first bit block on the first wireless channel is a latest transmission of the first data block.
[0060] In particular, according to one aspect of the present application, the above method is characterized in that the at least one data block in the sequence of data blocks comprises:
[0061] transmitting a first bit block on a first wireless channel;
[0062] wherein the first bit block on the first wireless channel is a latest (Latest) transmission of the first data block.
[0063] In particular, according to one aspect of the present application, the above method is characterized in that it comprises:
[0064] determining that the first bit block is not correctly received according to a reception on a second wireless channel;
[0065] wherein the second wireless channel is located before a transmission time of the first indication information.
[0066] In particular, according to one aspect of the present application, the above method is characterized in that an order of the first data block in the sequence of data blocks depends on a time domain resource occupied by the first wireless channel.
[0067] In particular, according to one aspect of the present application, the above method is characterized in that it comprises:
[0068] transmitting a first signaling;
[0069] wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel being one of the plurality of sequentially arranged time domain resources; and data blocks in the sequence of data blocks are sequentially transmitted on the plurality of sequentially arranged time domain resources.
[0070] As an embodiment, in the above aspect, the first node is a base station or a network device.
[0071] In particular, according to an aspect of the present application, the above method is characterized in that it comprises:
[0072] receiving first signaling;
[0073] wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; and the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
[0074] As an embodiment, in the above aspect, the first node is a UE.
[0075] In particular, according to an aspect of the present application, the above method is characterized in that any data block in the data block sequence is a PDCP SDU.
[0076] The present application discloses a first node used for wireless communication, characterized in that it comprises:
[0077] a first receiver configured to receive at least one data block in a data block sequence, the data block sequence comprising a first data block;
[0078] a first transmitter configured to transmit first indication information;
[0079] the first receiver is configured to receive a first check bit block;
[0080] the first transmitter is configured to transmit second indication information;
[0081] wherein the first indication information triggers transmission of the first check bit block; generation of the first check bit block depends on the first data block; and the second indication information is used to indicate that the first data block is obtained.
[0082] The present application discloses a second node used for wireless communication, characterized in that it comprises:
[0083] a second transmitter configured to transmit at least one data block in a data block sequence, the data block sequence comprising a first data block;
[0084] a second receiver configured to receive first indication information;
[0085] the second transmitter is configured to transmit a first check bit block;
[0086] the second receiver is configured to receive second indication information;
[0087] The first indication information triggers transmission of the first check bit block; generation of the first check bit block depends on the first data block; and the second indication information is used to indicate that the first data block is obtained. BRIEF DESCRIPTION OF DRAWINGS
[0088] Other features, objects, and advantages of the application will become more apparent from the following detailed description when read in connection with the following accompanying drawings:
[0089] Fig. 1 shows a flowchart of obtaining a first data block according to one embodiment of the present application;
[0090] Fig. 2 shows a schematic diagram of a network architecture according to one embodiment of the present application;
[0091] Fig. 3 shows a schematic diagram of an embodiment of a radio protocol architecture for the user and control planes according to one embodiment of the present application;
[0092] Fig. 4 shows a schematic diagram of a first communication device and a second communication device according to one embodiment of the present application;
[0093] Fig. 5 shows a flowchart of transmission between a first node N1 and a second node N2 according to one embodiment of the present application;
[0094] Fig. 6 shows a schematic diagram of time domain positions of data blocks according to one embodiment of the present application;
[0095] Fig. 7 shows a schematic diagram of a first bit block according to one embodiment of the present application;
[0096] Fig. 8 shows a schematic diagram of a first check bit block according to one embodiment of the present application;
[0097] Fig. 9 shows a schematic diagram of sending second indication information according to one embodiment of the present application;
[0098] Fig. 10 shows a schematic diagram of RAN (Radio Access Network) domain AI / ML function deployment according to one embodiment of the present application;
[0099] Fig. 11 shows a schematic diagram of AI / ML function deployment of a UE according to one embodiment of the present application;
[0100] Fig. 12 shows a schematic diagram of an artificial intelligence or machine learning based processing system according to one embodiment of the present application;
[0101] Fig. 13 shows a flowchart of an artificial intelligence or machine learning based processing according to one embodiment of the present application;
[0102] Figure 14 shows a structural block diagram of a processing device in a first node according to an embodiment of the present application;
[0103] Figure 15 shows a structural block diagram of a processing device in a second node according to an embodiment of the present application. DETAILED DESCRIPTION
[0104] The technical solutions of the present application will be further described in detail below with reference to the accompanying drawings. It should be noted that the embodiments in the present application and the features in the embodiments can be combined with each other arbitrarily without conflict. Based on performance, flexibility, complexity, overhead and compatibility, etc., the person skilled in the art has the motivation to combine the embodiments in different drawings flexibly without conflict, including but not limited to the embodiments in Figure 1 and the embodiments in Figures 5-15, the embodiments in Figure 5 and the embodiments in Figures 6-15, etc.
[0105] Embodiment 1
[0106] Embodiment 1 illustrates a flowchart for determining a target reference signal according to an embodiment of the present application, as shown in Figure 1. In the first node 100 shown in Figure 1, each block represents a step.
[0107] In Embodiment 1, the first node 100 receives at least one data block in a data block sequence in step 101, the data block sequence including a first data block; sends first indication information in step 102; receives a first check bit block in step 103; and sends second indication information in step 104.
[0108] In Embodiment 1, the first indication information triggers the transmission of the first check bit block; the generation of the first check bit block depends on the first data block; and the second indication information is used to indicate that the first data block is obtained.
[0109] As an embodiment, any data block in the data block sequence includes an SDU (Service Data Unit).
[0110] As an embodiment, any data block in the data block sequence is composed of one or more SDUs.
[0111] As an embodiment, the SDU is a PDCP SDU, an RLC SDU, or a MAC SDU.
[0112] As an embodiment, any data block in the data block sequence includes an IP (Internet Protocol) packet.
[0113] As an embodiment, any data block in the sequence of data blocks comprises one or more IP packets.
[0114] As an embodiment, any data block in the sequence of data blocks belongs to inference data.
[0115] As a sub-embodiment of the above-mentioned embodiment, any data block in the sequence of data blocks comprises one or more sub-data, each of which is an input of an ML model (also referred to as an AI model).
[0116] As an embodiment, the first indication information indicates that a bit block (i.e., a first bit block) comprising the first data block is not correctly received, and the bit block comprising the first data block is a transport block (TB) or a MAC PDU.
[0117] As a sub-embodiment of the above-mentioned embodiment, the bit block comprising the first data block comprises CRC bits, and the CRC bits are used to determine that the bit block comprising the first data block is not correctly received.
[0118] As an embodiment, the first check bit block is different from the CRC bits of the first bit block.
[0119] The above-mentioned embodiment is beneficial to design special check bits for the first data block, improve the check performance, or reduce the air interface overhead.
[0120] A feature of the above-mentioned sub-embodiment is that the CRC bits associated with the first data block and the first check bit block are respectively transmitted to the first node in two times of wireless transmission, compared with the traditional check bits and information bits being transmitted in the same transmission, the above-mentioned sub-embodiment provides the possibility of multiple checks, and saves the air interface overhead caused by retransmission.
[0121] How to use the CRC bits to determine whether the corresponding bit block is correctly received is determined by the first node itself, and is usually dependent on the CRC cyclic generator polynomial used to generate the CRC bits. Some common but non-limiting implementation manners for those skilled in the art are introduced below.
[0122] As an embodiment, the CRC bits of the first bit block are output by the first bit block passing a CRC cyclic generator polynomial. A polynomial formed by the first bit block and the CRC bits of the first bit block is divisible by the CRC cyclic generator polynomial over GF(2), i.e., the remainder of the polynomial formed by the first bit block and the CRC bits of the first bit block divided by the CRC cyclic generator polynomial is zero.
[0123] Generally, the CRC bits are composed of multiple binary bits, e.g., 16, 24, or 8, etc. In addition to being used as a whole as in the above embodiment, they can also be used separately. For example, some CRC bits are used for pruning operation in decoding, and some CRC bits are used for check operation.
[0124] In addition, some CRC bits can also be used in the decoding process to check whether the decoded information bits are correct, and if not, the decoding operation is terminated in advance to reduce power consumption or complexity. Such decoding algorithm often needs to interleave the CRC bits and the information bits, such as distributed CRC in NR.
[0125] Typically, the number of bits in the first check bit block is less than the number of bits in the first data block.
[0126] As an embodiment, the first check bit block is composed of 24 bits.
[0127] As an embodiment, the first check bit block is composed of 16 bits.
[0128] As an embodiment, the number of bits in the first check bit block is configurable.
[0129] As an embodiment, the first indication information indicates the number of bits in the first check bit block.
[0130] The above embodiment allows the first node to reasonably select the number of bits in the first check bit block according to the reception condition, balancing the air interface overhead and the check performance.
[0131] As an embodiment, any bit in the first check bit block comes from the first data block.
[0132] As an embodiment, the first check bit block is composed of part of the bits from the first data block.
[0133] As an embodiment, the first check bit block is obtained by scrambling part of the bits from the first data block.
[0134] Compared with the conventional generation algorithm of check bits, the above three embodiments are simpler; especially, the check operation of the receiver is no longer limited to the physical layer, and has greater flexibility.
[0135] As an embodiment, the bits in the first data block are used to generate the first check bit block.
[0136] As an embodiment, the first check bit block is a CRC bit of the first data block.
[0137] As a sub-embodiment of the above embodiment, the first check bit block is an output of the first data block through a CRC cycle generation polynomial. A polynomial constituted by the first data block and the first check bit block can be divided by the CRC cycle generation polynomial on GF(2), that is, the remainder of the polynomial constituted by the first data block and the first check bit block divided by the CRC cycle generation polynomial is zero.
[0138] As a sub-embodiment of the above embodiment, the first check bit block is obtained by scrambling the output of the first data block through a CRC cycle generation polynomial. A polynomial constituted by the first data block and the first check bit block after descrambling can be divided by the CRC cycle generation polynomial on GF(2), that is, the remainder of the polynomial constituted by the first data block and the first check bit block after descrambling divided by the CRC cycle generation polynomial is zero.
[0139] As an embodiment, the CRC cycle generation polynomial used to generate the first check bit block is different from the cycle generation polynomial used to generate the CRC bit of the first data block.
[0140] In addition to the generation method of the CRC bit given in the above embodiments, the first check bit block can also use other check bit generation algorithms, such as parity check bits, Hamming code, etc.
[0141] As an embodiment, the first check bit block is used to determine whether the first data block is obtained.
[0142] As an embodiment, the indication of the second indication information depends on a check, and the check is based on the first check bit block.
[0143] As an embodiment, the at least one data block in the sequence of data blocks does not include the first data block.
[0144] As an embodiment, the first data block not being correctly received is used to trigger the sending of the first indication information.
[0145] As an embodiment, the first node 100 not receiving the first data block from a lower layer is used to trigger the sending of the first indication information.
[0146] As a sub-embodiment of the above embodiment, the higher layer is a MAC sub-layer, and the lower layer is a physical layer.
[0147] As a sub-embodiment of the above embodiment, the higher layer is a RLC sub-layer, and the lower layer is a MAC sub-layer.
[0148] As a sub-embodiment of the above embodiment, the higher layer is a PDCP sub-layer, and the lower layer is a RLC sub-layer.
[0149] As a sub-embodiment of the above embodiment, the higher layer is a NAS (Non-Access Stratum), and the lower layer is a PDCP sub-layer.
[0150] As an embodiment, the second indication information being used to indicate the first data block being correctly received comprises at least one of the following: a receiver of the second indication information determining, according to the second indication information, that the second data block does not need to be retransmitted, flushing a buffer corresponding to the first data block, or discarding the second data block.
[0151] As an embodiment, the second indication information being used to indicate the first data block being correctly received comprises the receiver taking a Legacy operation in case the first data block is correctly received.
[0152] As an embodiment, the second indication information being used to indicate the first data block being correctly received comprises the second indication information indicating that a first PDU (Protocol Data Unit) is correctly received; wherein the first PDU comprises the first data block, or the first data block is encapsulated into the first PDU.
[0153] As an embodiment, the first node is a UE, the first indication information is sent on a PUSCH (Physical Uplink Shared Channel), and the second indication information is sent on a PUCCH (Physical Uplink Control Channel).
[0154] As an embodiment, the first node is a UE, and the first indication information and the second indication information are both transmitted on a PUCCH.
[0155] As an embodiment, the first node is a UE, and the first block of check bits is transmitted on a PDSCH.
[0156] As an embodiment, the first node is a UE, and the first block of check bits is transmitted on a PDCCH.
[0157] The above embodiments can reduce interaction delay, or can save air interface overhead caused by control signaling for scheduling the first block of check bits.
[0158] As an embodiment, the first node is a base station, the first indication information is transmitted on a PDSCH, and the second indication information is transmitted on a PDCCH.
[0159] As an embodiment, the first node is a base station, and the first indication information and the second indication information are both transmitted on a PDCCH.
[0160] As an embodiment, the first node is a base station, and the first block of check bits is transmitted on a PUSCH.
[0161] As an embodiment, the first node is a base station, and the first block of check bits is transmitted on a PUCCH.
[0162] The above embodiments can reduce interaction delay, or can save air interface overhead caused by control signaling for scheduling the first block of check bits.
[0163] As an embodiment, the occupied air interface resource of the first check bit block is implicitly indicated by the first indication information. For example, the occupied time domain resource is the L1th time slot after the time domain resource occupied by the first indication information, where L1 is fixed or configurable. For another example, the occupied carrier is the same as the carrier occupied by the first indication information.
[0164] How the first node 100 obtains the first data block can be determined by the manufacturer or by using AI / ML inference. Some non-limiting embodiments are described below.
[0165] As an embodiment, the first node inputs the correctly received at least one data block into an AI / ML model and obtains the first data block through inference of the AI / ML model.
[0166] As an embodiment, the first node inputs the correctly received at least one data block into an AI / ML model and obtains a plurality of candidates through inference of the AI / ML model, and selects the first data block from the plurality of candidates by using the first check bit block.
[0167] Optionally, in the above two embodiments, the first data block corresponds to a bit block or bit soft information that is not correctly received, which can also be input into the AI / ML model.
[0168] In addition to the AI / ML algorithm, the first node 100 can also use a traditional digital signal processing algorithm, for example, retaining a plurality of decoding output bit blocks as candidates of the first data block in the decoding process, and then selecting the first data block from the plurality of candidates by using the first check bit block.
[0169] Embodiment 2
[0170] Embodiment 2 illustrates a schematic diagram of a network architecture according to an embodiment of the present application, as shown in FIG. 2.
[0171] FIG. 2 illustrates a network architecture 200. The network architecture 200 is a 5G NR (New Radio) / LTE (Long-Term Evolution) / LTE-A (Long-Term Evolution Advanced) system, or the network architecture 200 is a 5G+ network architecture, or the network architecture 200 is a 6G network architecture, or the network architecture 200 is a network architecture adopted in 3GPP future continued evolution; the network architecture 200 can be referred to as 5GS (5G System) / EPS (Evolved Packet System), or the network architecture 200 can be referred to as 6GS (6G System); the network architecture 200 includes a UE (User Equipment) 201, a RAN (Radio Access Network) 202, a core network 210, a HSS (Home Subscriber Server) / UDM (Unified Data Management) 220, and at least one of an Internet service 230. The network architecture 200 can be interconnected with other access networks, but these entities / interfaces are not shown for simplicity. As illustrated, the network architecture 200 provides packet-switched services, however, those skilled in the art will readily appreciate that the various concepts presented throughout this application are amenable to use with networked systems including, but not limited to, other cellular systems that are developed to provide circuit-switched services or other cellular systems. The RAN includes a node 203. The RAN can also include other nodes 204. The node 203 provides user and control plane protocol terminations toward the UE 201. The node 203 can be connected to the other nodes 204 via an Xn interface (e.g., backhaul) / X2 interface. The node 203 can also be referred to as a base station, a base transceiver station, a radio base station, a radio transceiver, a transceiver function, a basic service set (BSS), an extended service set (ESS), a TRP (Transmit Receive Point), or some other suitable terminology. The core network 210 is a 5GC (5G Core Network) / EPC (Evolved Packet Core), or the core network 210 is a 6GC; the node 203 provides an access point to the core network 210 for the UE 201.Examples of UE 201 include cellular phones, smart phones, session initiation protocol (SIP) phones, laptop computers, personal digital assistants (PDAs), satellite radios, non-terrestrial base station communications, satellite mobile communications, global positioning systems, multimedia devices, video devices, digital audio players (e.g., MP3 players), cameras, game consoles, drones, aerial vehicles, narrowband internet of things devices, machine type communication devices, land vehicles, automobiles, wearable devices, or any other similar functional device. Those skilled in the art will also The node 203 is connected by an S1 / NG interface to the core network 210. The core network 210 comprises a MME (Mobility Management Entity) / AMF (Authentication Management Field) / SMF (Session Management Function) 211, further MME / AMF / SMF 214, a S-GW (Service Gateway) / UPF (User Plane Function) 212 and a P-GW (Packet Data Network Gateway) / UPF 213. The MME / AMF / SMF 211 is the control node that processes the signaling between the UE 201 and the core network 210. Generally, the MME / AMF / SMF 211 provides bearer and connection management. All user IP (Internet Protocal) packets are transferred through the S-GW / UPF 212, which itself is connected to the P-GW / UPF 213. The P-GW provides UE IP address allocation as well as other functions. The P-GW / UPF 213 is connected to Internet services 230. The Internet services 230 comprise operator corresponding Internet protocol services, in particular can comprise the Internet, an intranet, an IMS (IP Multimedia Subsystem) and a packet switching service.
[0172] As one embodiment, the first node comprises the UE 201 and the second node comprises the node 203.
[0173] As one embodiment, the second node comprises the UE 201 and the first node comprises the node 203.
[0174] As one embodiment, the wireless link between the UE 201 and the node 203 comprises a cellular network link.
[0175] Embodiment 3
[0176] Embodiment 3 illustrates a schematic diagram of an embodiment of a radio protocol architecture for the user and control planes according to one embodiment of the application, as shown in Figure 3.
[0177] Figure 3 is a schematic diagram illustrating an embodiment of a radio protocol architecture for a user plane 350 and a control plane 300, Figure 3 showing three layers of the radio protocol architecture for the control plane 300 between a first communication node device (UE, gNB or RSU in V2X) and a second communication node device (gNB, UE or RSU in V2X), or between two UEs: Layer 1, Layer 2, and Layer 3. Layer 1 (LI layer) is the lowest layer and implements various PHY (Physical layer) signal processing functions. The LI layer will be referred to as the PHY 301 herein. Layer 2 (L2 layer) 305 is above the PHY 301 and is responsible for the link between the first communication node device and the second communication node device, or between two UEs. The L2 layer 305 includes a MAC (Medium Access Control) sublayer 302, a RLC (Radio Link Control) sublayer 303, and a PDCP (Packet Data Convergence Protocol) sublayer 304, which terminate the functions of the second communication node device. The PDCP sublayer 304 provides multiplexing between different radio bearers and logical channels. The PDCP sublayer 304 also provides security functions, such as ciphering of the data packets, and header compression. The RLC sublayer 303 provides segmentation and reassembly of upper layer data packets, retransmission of lost data packets, and reordering of data packets to compensate for out-of-order reception due to HARQ. The MAC sublayer 302 provides multiplexing between logical and transport channels. The MAC sublayer 302 is also responsible for allocating the various radio resources (e.g., resource blocks) in one cell among the UEs. The MAC sublayer 302 is also responsible for HARQ operations. The RRC (Radio Resource Control) sublayer 306 in Layer 3 (L3 layer) in the control plane 300 is responsible for obtaining radio resources (i.e., radio bearers) and the use of RRC signaling between the second communication node device and the first communication node device for configuring the lower layers. The radio protocol architecture for the user plane 350 includes Layer 1 (LI layer) and Layer 2 (L2 layer), which are substantially the same as the corresponding layers and sublayers in the control plane 300 for the physical layer 351, the PDCP sublayer 354 in the L2 layer 355, the RLC sublayer 353 in the L2 layer 355, and the MAC sublayer 352 in the L2 layer 355 for the first communication node device and the second communication node device, but the PDCP sublayer 354 also provides header compression for upper layer data packets to reduce radio transmission overhead.A SDAP (Service Data Adaptation Protocol) sublayer 356 is also comprised in the L2 layer 355 in the user plane 350, the SDAP sublayer 356 is in charge of mapping between QoS flows and data radio bearers (DRBs) to support the diversity of services. Although not shown, the first communication node device can have several upper layers above the L2 layer 355, including a network layer (e.g., IP layer) that terminates at a P-GW on the network side and an application layer that terminates at the other end of the connection (e.g., a remote UE, a server, etc.).
[0178] As one embodiment, the wireless protocol architecture in FIG. 3 is applicable to the first node.
[0179] As one embodiment, the wireless protocol architecture in FIG. 3 is applicable to the second node.
[0180] As one embodiment, the higher layer in this application refers to the layer above the physical layer.
[0181] As one embodiment, the first signaling is generated at the RRC sublayer 306.
[0182] As one embodiment, the first signaling is generated at the PHY 301 or the PHY 351.
[0183] As one embodiment, the reference signal is generated at the PHY 301 or the PHY 351.
[0184] As one embodiment, the second signal is generated at the MAC sublayer 302 or the MAC sublayer 352.
[0185] As one embodiment, the second signaling is generated at the RRC sublayer 306.
[0186] Embodiment 4
[0187] Embodiment 4 illustrates a schematic diagram of a first communication device and a second communication device according to one embodiment of the present application, as shown in FIG. 4. FIG. 4 is a block diagram of a first communication device 410 and a second communication device 450 that communicate with each other in an access network.
[0188] The first communication device 410 includes a controller / processor 475, a memory 476, a receive processor 470, a transmit processor 416, a multi-antenna receive processor 472, a multi-antenna transmit processor 471, a transmitter / receiver 418, and antennas 420.
[0189] The second communication device 450 includes a controller / processor 459, a memory 460, a data source 467, a transmit processor 468, a receive processor 456, a multi-antenna transmit processor 457, a multi-antenna receive processor 458, a transmitter / receiver 454, and antennas 452.
[0190] In the transmission from the first communication device 410 to the second communication device 450, at the first communication device 410, upper layer packets from a core network are provided to the controller / processor 475. The controller / processor 475 implements functionality of the L2 layer. In the DL (DownLink), the controller / processor 475 provides header compression, ciphering, packet segmentation and reordering, multiplexing between logical and transport channels, and radio resource allocations for the second communication device 450 based on various priority metrics. The controller / processor 475 is also responsible for HARQ operations, retransmission of lost packets, and signaling to the second communication device 450. The transmit processor 416 and the multi-antenna transmit processor 471 implement various signal processing functions for the LI layer (i.e., physical layer). The transmit processor 416 implements coding and interleaving to facilitate forward error correction (FEC) at the second communication device 450, and constellation mapping based on various modulation schemes (e.g., binary phase-shift keying (BPSK), quadrature phase-shift keying (QPSK), M-phase-shift keying (M-PSK), M-quadrature amplitude modulation (M-QAM)). The multi-antenna transmit processor 471 performs digital spatial pre-coding on the coded and modulated symbols, including codebook-based and non-codebook-based pre-coding, and beamforming processing, generating one or more parallel streams. The transmit processor 416 then maps to each parallel stream to subcarriers, multiplexes the modulated symbols with reference signals (e.g., pilot) in time domain and / or frequency domain, and then performs an inverse fast Fourier transform (IFFT) to generate time domain OFDM streams. The multi-antenna transmit processor 471 then performs transmit analog pre-coding / beamforming operations on the time domain multi-carrier symbol streams. Each transmitter 418 converts the baseband multi-carrier symbol streams provided by the multi-antenna transmit processor 471 into radio frequency streams, which are then provided to different antennas 420.
[0191] In transmission from the first communication device 410 to the second communication device 450, at the second communication device 450, each receiver 454 receives a signal through its respective antenna 452. Each receiver 454 recovers information modulated onto an RF carrier and converts the RF stream into a baseband, multicarrier symbol stream to be provided to a receive processor 456. The receive processor 456 and a multiple access receive processor 458 implement various signal processing functions of the Ll layer. The multiple access receive processor 458 performs receive analog precoding / beamforming operations on the baseband, multicarrier symbol stream from the receivers 454. The receive processor 456 converts the baseband, multicarrier symbol stream from the receive analog precoding / beamforming operations from the time domain to the frequency domain using a Fast Fourier Transform (FFT). In the frequency domain, the physical layer data signals and the reference signals are demultiplexed by the receive processor 456, with the reference signals to be used for channel estimation and the data signals to be recovered after multi-antenna detection in the multiple access receive processor 458 for any parallel streams destined to the second communication device 450. The symbols on each parallel stream are demodulated and recovered in the receive processor 456 and generate soft decisions. The receive processor 456 then decodes and de-interleaves the soft decisions to recover the upper layer data and control signals transmitted by the first communication device 410 on the physical channels. The upper layer data and control signals are then provided to a controller / processor 459. The controller / processor 459 implements the functions of the L2 layer. The controller / processor 459 can be associated with a memory 460 that stores program codes and data. The memory 460 can be referred to as a computer-readable medium. In the DL, the controller / processor 459 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover upper layer data packets from the core network. The upper layer data packets are then provided to all protocol layers above the L2 layer. Various control signals can also be provided to the L3 for L3 processing. The controller / processor 459 is also responsible for error detection using an acknowledgement (ACK) and / or negative acknowledgement (NACK) protocol to support HARQ operations.
[0192] In the transmission from the second communication device 450 to the first communication device 410, at the second communication device 450, a data source 467 is used to provide upper layer packets to a controller / processor 459. The data source 467 represents all protocol layers above the L2 layer. Similar to the transmit function described at the first communication device 410 in the DL, the controller / processor 459 implements header compression, ciphering, packet segmentation and reordering, and multiplexing between logical and transport channels based on radio resource allocations for the first communication device 410, implements L2 layer functionality for the user plane and control plane. The controller / processor 459 is also responsible for HARQ operations, retransmission of lost packets, and signaling to the first communication device 410. A transmit processor 468, in conjunction with a multi-antenna transmit processor 457, performs modulation mapping, channel coding processing, digital multi-antenna spatial processing, including codebook-based and non-codebook-based precoding, and beamforming processing, and then the transmit processor 468 creates parallel streams of coded and modulated symbols for the different antenna ports, which are provided to different antennas 452 via separate transmitters 454 after analog precoding / beamforming at the multi-antenna transmit processor 457. Each transmitter 454 then converts the baseband streams into radio frequency signals and transmits the radio frequency signals via the antennas 452.
[0193] In the transmission from the second communication device 450 to the first communication device 410, the functionality at the first communication device 410 is similar to the functionality described in connection with the reception at the second communication device 450 in the transmission from the first communication device 410 to the second communication device 450. Each receiver 418 receives a radio frequency signal through its respective antenna 420, converts the received radio frequency signal into a baseband signal, and provides the baseband signal to a multi-antenna receive processor 472 and a receive processor 470. The receive processor 470 and the multi-antenna receive processor 472, in conjunction with the controller / processor 475, implement the functionality of the L1 layer. For the DL, the controller / processor 475 can be associated with a memory 476 that stores program codes and data. The memory 476 can be referred to as a computer-readable medium. The controller / processor 475 provides demultiplexing between transport and logical channels, packet reassembly, deciphering, header decompression, control signal processing to recover upper layer packets from the second communication device 450. Upper layer packets from the controller / processor 475 can be provided to a core network. The controller / processor 475 is also responsible for error detection using an ACK and / or NACK protocol to support HARQ operations.
[0194] As one embodiment, the second communication device 450 comprises: at least one processor and at least one memory including a computer program code; the at least one memory and the computer program code are configured to, with the at least one processor, cause the second communication device 450 to perform at least the following: receive at least one data block in a sequence of data blocks, the sequence of data blocks comprising a first data block; send first indication information; receive a first block of check bits; send second indication information; wherein the first indication information triggers transmission of the first block of check bits; the first block of check bits is generated dependent on the first data block; the second indication information is used to indicate that the first data block is obtained.
[0195] As one embodiment, the second communication device 450 comprises: a memory storing a computer readable program of instructions which, when executed by at least one processor, causes actions comprising: receiving at least one data block in a sequence of data blocks, the sequence of data blocks comprising a first data block; sending first indication information; receiving a first block of check bits; sending second indication information; wherein the first indication information triggers transmission of the first block of check bits; the first block of check bits is generated dependent on the first data block; the second indication information is used to indicate that the first data block is obtained.
[0196] As one embodiment, the first communication device 410 comprises: at least one processor and at least one memory including a computer program code; the at least one memory and the computer program code are configured to, with the at least one processor, cause the first communication device 410 to perform at least the following: send at least one data block in a sequence of data blocks, the sequence of data blocks comprising a first data block; receive first indication information; send a first block of check bits; receive second indication information; wherein the first indication information triggers transmission of the first block of check bits; the first block of check bits is generated dependent on the first data block; the second indication information is used to indicate that the first data block is obtained.
[0197] As one embodiment, the first communication device 410 comprises: a memory storing a computer readable program of instructions which, when executed by at least one processor, causes actions comprising: sending at least one data block in a sequence of data blocks, the sequence of data blocks comprising a first data block; receiving first indication information; sending a first block of check bits; receiving second indication information; wherein the first indication information triggers transmission of the first block of check bits; the first block of check bits is generated dependent on the first data block; the second indication information is used to indicate that the first data block is obtained.
[0198] As an embodiment, the first node in the present application comprises the second communication device 450, and the second node in the present application comprises the first communication device 410.
[0199] As an embodiment, part or all of {the antenna 452, the receiver 454, the receiving processor 456, the multi-antenna receiving processor 458, the controller / processor 459, the memory 460} are used to receive at least one data block in the data block sequence; part or all of {the antenna 420, the transmitter 418, the transmitting processor 416, the multi-antenna transmitting processor 471, the controller / processor 475} are used to transmit at least one data block in the data block sequence.
[0200] As an embodiment, part or all of {the controller / processor 459, the memory 460, the data source 467} are used to obtain the first data block.
[0201] As an embodiment, part or all of {the antenna 420, the receiver 418, the receiving processor 470, the multi-antenna receiving processor 472, the controller / processor 475, the memory 476} are used to receive the first indication information and the second indication information; part or all of {the antenna 452, the transmitter 454, the transmitting processor 468, the multi-antenna transmitting processor 457, the controller / processor 459, the memory 460, the data source 467} are used to transmit the first indication information and the second indication information.
[0202] As an embodiment, the second node in the present application comprises the second communication device 450, and the first node in the present application comprises the first communication device 410.
[0203] Embodiment 5
[0204] Embodiment 5 illustrates a transmission flow chart between the first node N1 and the second node N2 according to an embodiment of the present application; as shown in FIG. 5. In FIG. 5, the second node N1 and the first node N2 are communication nodes for transmission through an air interface. In FIG. 5, the step S102 and the steps in the block F0 are optional respectively. It should be noted that the time sequence of the step S102 in FIG. 5 is only one specific implementation, and the relative sequence between the step S102 and other steps can be adjusted without conflict, for example, the step S102 can occur after the step S103, or after the step S104.
[0205] For the second node N2, the first signaling is sent in step S200; at least one data block in a data block sequence is sent in step S201, the data block sequence comprising the first data block; the first indication information is received in step S202; the first check bit block is sent in step S203; the second indication information is received in step S204;
[0206] For the first node N1, the first signaling is received in step S100; the at least one data block in the data block sequence is received in step S101; at least a first candidate data block is generated in step S102, wherein the first candidate data block is judged as the first data block; the first indication information is sent in step S103; the first check bit block is received in step S104; the second indication information is sent in step S105;
[0207] In embodiment 5, the first indication information triggers the transmission of the first check bit block; the generation of the first check bit block depends on the first data block; the second indication information is used to indicate that the first data block is obtained. The first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel being one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources in order.
[0208] It should be noted that in FIG. 5, the first signaling is sent by the second node N2 to the first node N1, so that the second node N2 can schedule the first node N1; especially suitable for the scenario that the second node N2 is a base station and the first node N1 is a UE.
[0209] Optionally, although not described in FIG. 5, the first signaling can also be sent by the first node N1 to the second node N2, so that the first node N1 can schedule the second node N2; especially suitable for the scenario that the second node N2 is a UE and the first node N1 is a base station.
[0210] As an embodiment, the second node N2 sends the first data block in step S201, and the first node N1 does not correctly receive the first data block in step S101.
[0211] As an embodiment, the second node N2 transmits the first bit block on the first wireless channel in the step S201; wherein the first bit block of the first wireless channel is the latest transmission of the first data block (i.e. no retransmission of the first data block occurs between the first wireless channel and the first indication information); the first node N1 performs receiving on the first wireless channel in the step S101, and does not correctly receive the first bit block.
[0212] Generally, the first node N1 fails to correctly receive the first bit block, and thus cannot obtain the first data block; in the above embodiment, the first node N1 obtains the first data block under the premise of failing to correctly receive the first bit block, and thus improves the spectrum efficiency or system capacity. The above embodiment can be combined with the following sub-embodiments.
[0213] As a sub-embodiment of the above embodiment, the first bit block includes at least part of the bits in the first data block.
[0214] As a sub-embodiment of the above embodiment, the generation of the first check bit block does not depend on the bits in the first bit block and outside the first data block.
[0215] As a sub-embodiment of the above embodiment, the first node N1 transmits the first indication information as a response to the incorrect reception of the first bit block.
[0216] As a sub-embodiment of the above embodiment, the first node N1 generates at least a first candidate data block as a response to the incorrect reception of the first bit block.
[0217] As an embodiment, the first node is a UE, and the transmission channel to which the first wireless channel is mapped is a DL-SCH (DownLink Shared Channel).
[0218] As an embodiment, the first node is a UE, and the first wireless channel is a PDSCH (Physical Downlink Shared Channel).
[0219] As an embodiment, the first node is a base station, and the transmission channel to which the first wireless channel is mapped is a UL-SCH (UpLink Shared Channel).
[0220] As an embodiment, the first node is a base station, and the first wireless channel is a PUSCH (Physical Uplink Shared Channel).
[0221] As an embodiment, the first signaling schedules multiple channels, and the multiple channels respectively occupy the multiple time-domain resources arranged in sequence in the time domain, and the first wireless channel is one of the multiple channels.
[0222] As an embodiment, the first signaling is RRC signaling.
[0223] As an embodiment, the first signaling is SPS (Semi-persistent Scheduling) DCI (Downlink Control Information).
[0224] As an embodiment, the generation of the at least first candidate data block depends on the at least one data block, and the at least one data block does not include the first data block.
[0225] Unlike the conventional scheme, in the above embodiment, the candidate of the first data block is obtained according to other data blocks different from the first data block, which is especially suitable for the inference of an AI / ML model or application layer data (or SDU transparently delivered to a higher layer). Further, since the AI / ML model is used for inference, the inference result can be associated with a probability; under the condition that the associated probability is greater than a certain threshold, the AI / ML model can infer multiple candidate results, and then select one from the multiple candidate results according to the first check bit block.
[0226] From the above analysis, as an embodiment, the at least first candidate data block includes multiple candidate data blocks; wherein the first check bit block is used to determine the first candidate data block from the multiple candidate data blocks.
[0227] The scheme of selecting the first candidate data block according to the first check bit block depends on the generation manner of the first check bit block. The first node N1 can perform a check on each candidate data block in the multiple candidate data blocks to determine whether each candidate data block passes the check. Generally, there is not more than one candidate data block in the multiple candidate data blocks that can pass the check of the first check bit block; if there is a candidate data block that passes the check of the first check bit block, the first node N1 selects this candidate data block as the first candidate data block.
[0228] In a very small probability, if there are more than one candidate data block that can pass the check of the first check bit block, the first node N1 can consider that the first data block is not obtained, or determine the first candidate data block according to the associated probability, or pass the more than one candidate data block to the upper layer, and the first candidate data block is selected by the upper layer.
[0229] For a given candidate data block, the specific check algorithm is implemented or determined by the manufacturer of the first node N1, and the related embodiments given in Embodiment 1 can be referred to.
[0230] Typically, the wireless channel occupied by the first check bit block is a channel other than the plurality of channels scheduled by the first signaling.
[0231] As an embodiment, one or more data blocks in the at least one data block are transmitted after the first data block.
[0232] As an embodiment, the generation of at least the first candidate data block is performed at the PDCP layer.
[0233] As an embodiment, the generation of at least the first candidate data block is performed at the NAS.
[0234] As an embodiment, the incorrect reception of the first bit block means that the first bit block is not correctly decoded at the physical layer.
[0235] As an embodiment, the incorrect reception of the first bit block means that the first bit block is not passed to the higher layer by the physical layer.
[0236] As an embodiment, the first bit block is a TB (Transport Block).
[0237] As an embodiment, the first bit block is a CBG (Code Block Group).
[0238] As an embodiment, the first bit block includes at least part of the bits in the first data block.
[0239] As an embodiment, the first bit block further includes at least part of the bits in the second data block.
[0240] As an embodiment, the first bit block further includes at least part of the bits in the first data header associated with the first data block.
[0241] As an embodiment, the CRC bits of the first bit block are transmitted on the first wireless channel.
[0242] As an embodiment, the first check bit block is only used for checking the first data block, different from the CRC bits of the first data block.
[0243] As an embodiment, the first node N1 is the first node in the present application, and the second node N2 is the second node in the present application.
[0244] As an embodiment, the air interface between the second node U1 and the first node U2 includes a wireless interface between a base station device and a user equipment.
[0245] As an embodiment, the second node N2 and the first node N1 are a base station and a UE (user equipment) respectively.
[0246] As an embodiment, the second node N2 and the first node N1 are a UE and a base station respectively.
[0247] As an embodiment, the second node N2 and the first node N1 are both user equipment.
[0248] As an embodiment, the second node N2 is a serving cell maintenance base station of the first node N1.
[0249] Embodiment 6
[0250] Embodiment 6 illustrates a schematic diagram of the time domain position of a data block according to an embodiment of the present application, as shown in FIG. 6.
[0251] In embodiment 6, …, time domain resource #(k-1), time domain resource #k, time domain resource #(k+1), …, are a plurality of sequentially arranged time domain resources; wherein the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources, and the first data block is transmitted in time domain resource #k.
[0252] As an embodiment, at least one time domain resource of the plurality of sequentially arranged time domain resources exists in the time interval between the transmission time of the second indication information and the reception time (i.e. time domain resource #k) of the first data block; for example, the transmission time of the second indication information is the second time in FIG. 6.
[0253] As an embodiment, at least one time domain resource of the plurality of sequentially arranged time domain resources exists in the time interval between the transmission time of the first indication information and the reception time (i.e. time domain resource #k) of the first data block; for example, the transmission time of the first indication information is the second time in FIG. 6; and the generation of the first check bit block depends on the first indication information.
[0254] One advantage of the above two embodiments is that the first node is allowed to obtain the first data block based on data blocks after the first data block, which improves the accuracy of the first data block; especially suitable for inference of AI / ML models.
[0255] As an embodiment, the first indication information indicates the number of bits included in the first check bit block.
[0256] As an embodiment, the first indication information indicates parameters used to generate the first check bit block, such as a generating polynomial, an initialization sequence of a shift register, etc.
[0257] As an embodiment, the first indication information is sent only when the first node fails to correctly receive the first data block on the wireless channel in the time domain resource #k.
[0258] As an embodiment, the first indication information is a HARQ-ACK bit, or the first indication information is a NACK.
[0259] The above embodiments utilize existing HARQ-ACK feedback, maintaining good compatibility, but unlike the prior art, NACK does not trigger retransmission of the first bit block, saving air interface overhead and improving transmission efficiency.
[0260] As an alternative solution to the above embodiments, the first node indicates that the first bit block is not correctly received using a second wireless channel; wherein the second wireless channel is located before the sending time of the first indication information; for example, the first indication information is located at the second time in FIG. 6, and the second wireless channel is located at the first time in FIG. 6. Correspondingly, the second node determines that the first bit block is not correctly received according to the reception on the second wireless channel.
[0261] As an embodiment, the first node indicating that the first bit block is not correctly received using a second wireless channel means that the first node sends a HARQ-ACK on the second wireless channel to indicate that the first bit block is not correctly received. Correspondingly, the second node determines that the first bit block is not correctly received according to the received HARQ-ACK on the second wireless channel.
[0262] As an embodiment, the first node indicating the first block of bits is not correctly received by using the second wireless channel means that the first node determines whether to perform wireless transmission on the second wireless channel according to whether the first block of bits is correctly received; for example, when the first block of bits is correctly received, an ACK is sent on the second wireless channel, otherwise no wireless transmission is performed on the second wireless channel. Correspondingly, the second node determines whether the first block of bits is correctly received according to whether a wireless signal is detected on the second wireless channel.
[0263] One advantage of introducing the second wireless channel is that the transmitter can be informed as soon as possible to reserve the first block of bits, which is beneficial for scheduling of the transmitter; in addition, it is also beneficial for the first block of check bits to be generated earlier, reducing processing delay.
[0264] As an embodiment, the first node is a UE, and each of the plurality of sequentially arranged time domain resources is a PDSCH occasion.
[0265] As an embodiment, the first node is a base station, and each of the plurality of sequentially arranged time domain resources is a PUSCH occasion.
[0266] As an embodiment, each of the plurality of sequentially arranged time domain resources includes a plurality of multicarrier symbols.
[0267] As an embodiment, the multicarrier symbol is an OFDM (Orthogonal Frequency Division Multiplexing) symbol.
[0268] As an embodiment, the multicarrier symbol is a DFT-S-OFDM (Discrete Fourier Transform Spread OFDM) symbol.
[0269] As an embodiment, the multicarrier symbol is an FBMC (Filter Bank Multi Carrier) symbol.
[0270] As an embodiment, the multicarrier symbol includes a CP (Cyclic Prefix).
[0271] Embodiment 7
[0272] Embodiment 7 illustrates a schematic diagram of the first block of bits of an embodiment of the present application, as shown in FIG. 7.
[0273] In Embodiment 7, the first bit block includes a first data header, a first data block, a second data block, etc.
[0274] It is to be noted that FIG. 7 does not limit the relative arrangement of different components in the first bit block, but only describes the types of information included in the first bit block.
[0275] As an embodiment, the first bit block is delivered to the physical layer by the MAC layer, and the CRC bits (as shown in FIG. 7) of the first bit block are added in the physical layer.
[0276] As an embodiment, the first data header is a MAC subheader, and the first data header and the first data block belong to one MAC subPDU.
[0277] As a sub-embodiment of the above embodiment, the second data block and the first data block belong to the same MAC subPDU, and the second data block does not belong to the data block sequence.
[0278] In the above sub-embodiment, the first data block and the second data block can be a PDCP SDU respectively, or the first data block is a PDCP SDU and the second data block is a PDCP PDU.
[0279] As an embodiment, the first data block is not segmented in the RLC layer.
[0280] As a sub-embodiment of the above embodiment, the first data block is not encrypted, scrambled, etc. in the PDCP layer.
[0281] The above embodiment and sub-embodiment can ensure that the first data block is delivered to a lower layer (such as the MAC layer) in a transparent mode, which is beneficial for reasoning or obtaining the first data block in the lower layer, and reduces processing complexity and processing delay.
[0282] Optionally, the first bit block further includes a second data header, the first data header and the first data block belong to one MAC subPDU, and the second data header and the second data block belong to another MAC subPDU.
[0283] As an embodiment, in response to receiving the second indication information, the second node stops retransmitting the first data block.
[0284] As a sub-embodiment of the above embodiment, the second node retransmits data blocks (such as the second data block) in the first bit block other than the first data block.
[0285] In the above embodiments and sub-embodiments, the second node performs different retransmission operations for different data blocks of a MAC PDU; compared with the existing retransmission operation with MAC PDU as the smallest unit, the above embodiments and sub-embodiments can improve transmission efficiency.
[0286] Example 8
[0287] Example 8 illustrates a schematic diagram of the first parity bit block of an embodiment of this application, as shown in Figure 8.
[0288] In Example 8, A0, A1, A2, A3, ..., A Q These Q+1 bits form the first data block.
[0289] As an example, the q bits in the first data block, i.e., A i1 A i2 A i3 , ..., A iq This forms the first check bit block.
[0290] As an example, the q bits in the first data block, i.e., A i1 A i2 A i3 , ..., A iq The scrambling code forms the first parity bit block. The scrambling sequence can be the identifier of the first node, or a service identifier, RNTI (Radio Network Temporary Identifier), etc.
[0291] As an example, the first indication information is used to determine the q bits from the first data block.
[0292] As an example, the first indication information is used to determine the q.
[0293] Example 9
[0294] Example 9 illustrates a schematic diagram of sending a second instruction message according to an embodiment of this application, as shown in Figure 9.
[0295] In step S901, the first node uses the first check bit block to verify the first candidate data block. If the verification passes, the second control information is generated in step S902. If the verification fails, the process ends.
[0296] It is to be noted that only the first candidate data block is checked in Embodiment 9; if the first node generates multiple candidate data blocks for the first data block, the operation in Embodiment 9 is performed on each of the multiple candidate data blocks, or the operation in Embodiment 9 is continuously performed until a candidate data block (i.e., the first candidate data block) that passes the check is found.
[0297] In theory, the first node generates a check bit block using the first candidate data block in the same way as the transmitter (second node), and then compares the check bit block with the first bit block. If they are the same, it is considered to pass the check; if they are different, it is considered to fail the check.
[0298] In actual products, the above algorithm can be simplified in combination with the specific generation method of the first check bit block, such as the integer division operation mentioned in Embodiment 1, or the early termination operation, etc.
[0299] How to use the first check bit block to check is usually determined by the equipment manufacturer of the first node.
[0300] Embodiment 10
[0301] Embodiment 10
[0302] A schematic diagram of RAN (Radio Access Network) domain (Domain) AI / ML function deployment according to an embodiment of the present application; as shown in FIG. 10. The gNB in Embodiment 10 can be replaced by a network device such as an eNB, or a 6G base station, etc.
[0303] AI / ML related functions include ML training functions (also known as AI training, or AI / ML training), ML testing functions, ML inference functions (also known as AI inference, or AI / ML inference), etc. ML training functions, ML testing functions, and ML inference functions can be deployed independently or co-located. The deployment of AI / ML related functions can be implemented through software, such as the download and / or running of executable files; or through a combination of software and hardware, such as accelerating specific computing units through hardware to improve operation speed or save power consumption.
[0304] For ML training function, it can be deployed in cross-domain management system, or domain-specific management system, which is used to manage RAN domain or CN (Core Network) domain. For example, for MDA (Management Data Analytics) ML training function can be deployed in MDAF (MDA function); for network data analytics ML training can be deployed in NWDAF (Network Data Analytics Function), i.e. ML training function is MTLF (Model Training logical function).
[0305] For ML inference function, it can also be deployed in cross-domain management system, or domain-specific management system; for example, ML inference function is MDAF, or ML inference function is AnLF (Analytics logical function) in NWDAF.
[0306] Similarly, ML testing function can also be deployed in cross-domain management system, or domain-specific management system.
[0307] In embodiment 10, RAN domain ML training function 1402 is located in RAN domain management function 1403; and ML inference function is located in base station, i.e. AI / ML inference function 1404 is located in gNB 1405, AI / ML inference function 1406 is located in gNB 1407, and so on.
[0308] In FIG. 10, management of ML inference function of multiple base stations is completed by RAN domain management function 1403, i.e. data interaction is performed with RAN domain MnS (Mangement Service) consumer / cross-domain management 1401 (as shown by the dashed arrow in FIG. 10).
[0309] Optionally, management of ML inference function can also be completed by base station itself, i.e. each base station can independently perform data interaction with RAN domain MnS consumer / cross-domain management 1401.
[0310] It should be noted that embodiment 10 is only a non-limiting implementation; optionally, RAN domain ML training function can also be deployed in base station; or optionally, part of base stations deploy ML inference function and RAN domain ML training function, and part of base stations only deploy ML inference function.
[0311] As one embodiment, one gNB (or base station) in embodiment 10 is the second node of the present application, and the first node is a UE.
[0312] As one sub-embodiment of the above-mentioned embodiment, the derived ML model of the RAN-domain ML training function 1402 is deployed at the first node, and the at least first candidate data block is derived by inference of the deployed ML model at the first node.
[0313] Typically, the RAN-domain ML training function 1402 trains the ML model according to a sequence of data blocks.
[0314] As one embodiment, the first node is a base station, and the first receiver of the present application includes an AL / ML inference function in FIG. 10, i.e., 1404 or 1406.
[0315] As one sub-embodiment of the above-mentioned embodiment, the AL / ML inference function in FIG. 10 generates the at least first candidate data block.
[0316] Embodiment 11
[0317] Embodiment 11 illustrates a schematic diagram of AI / ML function deployment of a UE according to one embodiment of the present application; as shown in FIG. 11. The RAN-domain ML training function 1505 in FIG. 1 is optional.
[0318] The UE function 1504 is deployed in the first node of the present application, and the UE function 1504 includes an AI / ML inference function 1506; the AI / ML inference function 1506 uses a ML model (also referred to as an AI model) for inference; one ML model is usually trained before being used for AI / ML inference.
[0319] As one embodiment, the UE function 1504 includes the RAN-domain ML training function 1505, which runs training data through a ML model, derives a related loss, and adjusts parameters of the ML model based on the calculated loss; the ML training includes at least one of ML initial training, ML re-training, and reinforcement learning.
[0320] The above-mentioned embodiments can reduce the complexity of the base station, or save the air interface resources caused by reporting training data; however, the above-mentioned embodiments put higher requirements on the processing capability of the UE side.
[0321] Optionally, the UE function 1504 further comprises a CN domain ML training function (not included in FIG. 11).
[0322] Optionally, the UE function 1504 further comprises an AI / ML deployment function - not included in FIG. 11, for loading ML models and data.
[0323] As one embodiment, the first node indicates whether to support ML training function (RAN domain or CN domain) through capability reporting, and the capability reporting is RRC signaling or NAS (Non-Access Stratum) signaling.
[0324] As one embodiment, the ML model and related metadata are loaded by the first node from a network device or a remote server.
[0325] Optionally, the UE function 1504 is an MnS (Management Service) producer, providing data to the CN domain MnF (Management Function) 1501, and / or the RAN domain MnF 1502, and / or the cross-domain management system 1503 for management or analysis (as shown by double-headed arrow 1507).
[0326] Optionally, the UE function 1504 is an MnS consumer, loading data from the CN domain MnF (Management Function) 1501, and / or the RAN domain MnF 1502, and / or the cross-domain management system 1503 for AI / ML related management, such as management data request, ML model activation, and / or ML training, etc. (as shown by double-headed arrow 1507).
[0327] As one embodiment, the at least the first candidate data block in the present application is obtained through inference of the AI / ML inference function 1506.
[0328] As one embodiment, the RAN domain ML training function 1505 performs ML training according to the data block sequence to obtain the ML model.
[0329] As one embodiment, the first node is a UE, and the first receiver of the present application comprises an AL / ML inference function 1506 in FIG. 11.
[0330] As one embodiment, the ML model is based on a neural network (Neural Network).
[0331] As one embodiment, the ML model is based on CNN (Conventional Neural Networks).
[0332] As one embodiment, the ML model is based on Transformer architecture.
[0333] Embodiment 12
[0334] Embodiment 12 illustrates a schematic diagram of an artificial intelligence or machine learning based processing system according to one embodiment of the present application; as shown in FIG. 12. FIG. 12 includes a third processor, a fourth processor, a fifth processor and a sixth processor.
[0335] In embodiment 12, the third processor sends a first data set to the fourth processor, and sends a second data set to the fifth processor; the fourth processor generates a target first type parameter group according to the first data set, and sends the generated target first type parameter group to the fifth processor; the fifth processor processes the second data set using the target first type parameter group to obtain a first type output, and (optionally) sends the first type output to the sixth processor. In FIG. 12, the first type feedback and the second type feedback are optional; the fourth processor includes an ML training function; and the fifth processor includes an ML inference function.
[0336] As one embodiment, the sixth processor includes an ML testing function.
[0337] As one embodiment, the sixth processor includes performance monitoring / evaluation of the ML model.
[0338] As one embodiment, the fifth processor sends a first type feedback to the fourth processor, and the first type feedback is used to trigger recalculation or update of the target first type parameter group, i.e., trigger ML initial training or ML retraining.
[0339] As one embodiment, the first receiver of the first node of the present application includes the fifth processor.
[0340] As one embodiment, the vector representation of the at least one data block in the data block sequence in the present application belongs to the second data set.
[0341] As one embodiment, the at least one data block in the data block sequence in the present application belongs to the second data set.
[0342] The above embodiment is equivalent to incorporating the vector mapping (vector representation) of the data block into the fifth processor.
[0343] As an embodiment, the first type of output includes a vector representation of each data block in the at least first candidate data block of the present application, and the each data block in the at least first candidate data block can be obtained according to the first type of output by searching the vector table; for example, each data block in the at least first candidate data block can be mapped into a multi-dimensional vector, and the first type of output includes the multi-dimensional vector corresponding to each data block in the at least first candidate data block.
[0344] As an embodiment, the first type of output includes each data block in the at least first candidate data block of the present application.
[0345] The above embodiment is equivalent to incorporating the vector mapping (vector representation) of the data block into the fifth processor.
[0346] As an embodiment, the first receiver of the first node of the present application includes the fifth processor.
[0347] As a sub-embodiment of the above embodiment, the first node of the present application includes at least the first two of the third processor, the fourth processor, and the sixth processor.
[0348] As a sub-embodiment of the above embodiment, the second node of the present application includes the third processor, the fourth processor, and the sixth processor.
[0349] As a sub-embodiment of the above embodiment, the soft bit information corresponding to the first data block received on the first wireless channel in the present application also belongs to the second data set.
[0350] As an embodiment, the sixth processor sends a second type of feedback to the third processor, and the second type of feedback is used to trigger the sending of the first data set or the sending of the second data set.
[0351] As an embodiment, the first data set and the second data set are both generated at the application layer.
[0352] As an embodiment, the fifth processor belongs to the first node, and the sixth processor belongs to the second node.
[0353] As an embodiment, the first data set includes training data (Training Data), and the second data set includes inference data (Inference Data).
[0354] As an embodiment, the fourth processor is configured to train the ML model, and the trained model is described by the target first-type parameter set.
[0355] As an embodiment, the fourth processor belongs to a core network.
[0356] The above embodiments support joint training across the whole network, further optimizing the system performance.
[0357] As an embodiment, the fifth processor generates a recovery data set according to the first-type output, and an error between the recovery data set and an actual data block generated by the second node is used to generate the first-type feedback; the actual data block generated by the second node needs to be additionally sent to the first node for performance monitoring.
[0358] As an embodiment, the first-type feedback is used to reflect the performance of the trained model; when the performance of the trained model cannot meet the requirements, the fourth processor recalculates the target first-type parameter set.
[0359] As an embodiment, when the error is too large or the update is not performed for too long a time, the performance of the trained model is considered to not meet the requirements.
[0360] As an embodiment, the target first-type parameter set includes one or more of a convolution kernel size, a convolution layer number, a convolution step length, a pooling kernel size, a pooling kernel step length, a pooling function, an activation function, or a feature map number.
[0361] As an embodiment, the target first-type parameter set includes one or more of a convolution kernel, a pooling kernel, a pooling function, an activation function, a parameter of the pooling function, or a parameter of the activation function.
[0362] In theory, the second data set for inference input can be any form of parameter (such as a data block or a vector expression, etc.), as long as the corresponding form of the first data set is used for training. The vector expression of the data block can be completed by looking up a table, or can be completed by a special ML module.
[0363] Embodiment 13
[0364] Embodiment 13 illustrates a flowchart based on artificial intelligence or machine learning according to an embodiment of the present application; as shown in FIG. 13. FIG. 13 includes a third operation, a fourth operation, a fifth operation, a sixth operation, and a seventh operation. In embodiment 13, the third operation and the fourth operation belong to the first stage, the fifth operation belongs to the second stage, the sixth operation belongs to the third stage, and the seventh operation belongs to the fourth stage. In FIG. 13, the line with an arrow indicates the order of the flow.
[0365] As one embodiment, the third operation comprises AI / ML training, the fourth operation comprises AI / ML testing, the fifth operation comprises AI / ML emulation, the sixth operation comprises AI / ML entity loading, and the seventh operation comprises AI / ML inference.
[0366] As one embodiment, the first phase comprises a training phase, the second phase comprises an emulation phase, the third phase comprises a deployment phase, and the fourth phase comprises an inference phase.
[0367] As one embodiment, the first phase comprises AI / ML model training.
[0368] As one embodiment, the first phase comprises AI / ML model training and AI / ML testing.
[0369] As one embodiment, the AI / ML model training comprises initial training and re-training of one or a set of AI / ML entities.
[0370] As one embodiment, the AI / ML model training relies on training data.
[0371] As one embodiment, the AI / ML model training comprises AI / ML entity validation.
[0372] As one embodiment, the AI / ML entity validation is used to evaluate the performance of the AI / ML entity.
[0373] As one embodiment, the AI / ML entity validation relies on validation data.
[0374] As one embodiment, if the result of AI / ML entity validation does not meet expectations, the AI / ML model will be re-trained.
[0375] As one embodiment, the AI / ML testing comprises testing the validated AI / ML entity to evaluate the performance of the trained AI / ML model.
[0376] As one embodiment, the AI / ML entity proceeds to the next stage if the result of the AI / ML testing meets the expectation; otherwise the AI / ML model is retrained.
[0377] As one embodiment, the AI / ML testing relies on testing data.
[0378] As one embodiment, the second stage includes AI / ML simulation, which simulates the inference of the AI / ML entity in a simulation environment.
[0379] As one embodiment, the AI / ML simulation estimates the performance of the inference of the AI / ML entity in a simulation environment before the AI / ML entity is used.
[0380] As one embodiment, the second stage is optional.
[0381] As one embodiment, the third stage includes AI / ML entity loading, which is to obtain the trained AI / ML entity to obtain the desired AI / ML inference function.
[0382] As one embodiment, the third stage is optional.
[0383] As one embodiment, the third stage is not needed when the training function and the inference function are co-located.
[0384] As one embodiment, the fourth stage includes AI / ML inference.
[0385] Embodiment 14
[0386] Embodiment 14 illustrates a structural block diagram of a processing apparatus in a first node according to one embodiment of the present application; as shown in FIG. 14. In FIG. 14, the processing apparatus 1600 in the first node includes a first receiver 1601 and a first transmitter 1602.
[0387] The first receiver 1601 receives at least one data block in a data block sequence, the data block sequence including a first data block; the first transmitter 1602 transmits first indication information; the first receiver 1601 receives a first check bit block; the first transmitter 1602 transmits second indication information;
[0388] In embodiment 14, the first indication information triggers the transmission of the first check bit block; the generation of the first check bit block relies on the first data block; and the second indication information is used to indicate that the first data block is obtained.
[0389] As an embodiment, the at least one data block in the sequence of data blocks comprises:
[0390] generating at least a first candidate data block;
[0391] wherein the first candidate data block is determined as the first data block.
[0392] As an embodiment, the at least first candidate data block comprises a plurality of candidate data blocks, wherein the first check bit block is used to determine the first candidate data block from the plurality of candidate data blocks.
[0393] As an embodiment, the at least one data block in the sequence of data blocks comprises:
[0394] performing receiving on a first wireless channel, the first bit block is not correctly received;
[0395] wherein the first bit block of the first wireless channel is a latest transmission of the first data block.
[0396] As an embodiment, the first transmitter 1602 indicates that the first bit block is not correctly received by using a second wireless channel;
[0397] wherein the second wireless channel is before a sending time of the first indication information.
[0398] As an embodiment, an order of the first data block in the sequence of data blocks depends on a time domain resource occupied by the first wireless channel.
[0399] As an embodiment, the first receiver 1601 receives first signaling; wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; data blocks in the sequence of data blocks are sequentially transmitted on the plurality of sequentially arranged time domain resources.
[0400] As a sub-embodiment of the above embodiment, the first node is a UE.
[0401] As an embodiment, the first transmitter 1602 sends first signaling; wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; data blocks in the sequence of data blocks are sequentially transmitted on the plurality of sequentially arranged time domain resources.
[0402] As a sub-embodiment of the above embodiment, the first node is a base station.
[0403] As an example, any data block in the data block sequence is a PDCP SDU.
[0404] As one embodiment, the first bit block includes at least a portion of the bits in the first data block, the generation of the first check bit block does not depend on bits in the first bit block and outside the first data block; the first indication information indicates that the first bit block was not received correctly.
[0405] As one example, the first node is a user equipment.
[0406] In one embodiment, the first node is a base station.
[0407] As one embodiment, the first receiver 1601 includes at least one of the following in embodiment 4: {antenna 452, receiver 454, receiver processor 456, multi-antenna receiver processor 458, controller / processor 459, memory 460, data source 467}.
[0408] As an example, the first processor 1602 includes at least one of the following in embodiment 4: {antenna 452, receiver / transmitter 454, receiver processor 456, transmitter processor 468, multi-antenna receiver processor 458, multi-antenna transmitter processor 457, controller / processor 459, memory 460, data source 467}.
[0409] Example 15
[0410] Example 15 illustrates a structural block diagram of a processing apparatus for a second node according to an embodiment of this application; as shown in Figure 15. In Figure 15, the processing apparatus 1700 in the second node includes a second transmitter 1701 and a second receiver 1702.
[0411] The second transmitter 1701 transmits at least one data block in a data block sequence, the data block sequence including a first data block; the second receiver 1702 receives first indication information; the second transmitter 1701 transmits a first parity bit block; the second receiver 1702 receives second indication information;
[0412] In Example 15, the first indication information triggers the transmission of the first check bit block; the generation of the first check bit block depends on the first data block; the second indication information is used to indicate that the first data block has been obtained.
[0413] As an example, at least one data block in the transmitted data block sequence includes:
[0414] Transmit the first bit block on the first wireless channel;
[0415] Wherein, the first bit block of the first wireless channel is the latest transmission of the first data block.
[0416] As an example, at least one data block in the transmitted data block sequence includes:
[0417] Transmit the first bit block on the first wireless channel;
[0418] The first bit block of the first wireless channel is the latest transmission of the first data block.
[0419] As one embodiment, the second receiver 1702 determines that the first bit block was not correctly received based on reception on the second wireless channel; wherein the second wireless channel is located before the transmission time of the first indication information.
[0420] As one embodiment, the order of the first data blocks in the data block sequence depends on the time-domain resources occupied by the first wireless channel.
[0421] As one embodiment, the second transmitter 1701 sends a first signaling; wherein the first signaling indicates a plurality of sequentially arranged time-domain resources, and the time-domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time-domain resources; the data blocks in the data block sequence are transmitted sequentially on the plurality of sequentially arranged time-domain resources.
[0422] As a sub-implementation of the above embodiments, the first node is a base station or network device.
[0423] As one embodiment, the second receiver 1702 receives a first signaling; wherein the first signaling indicates a plurality of sequentially arranged time-domain resources, and the time-domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time-domain resources; the data blocks in the data block sequence are transmitted sequentially on the plurality of sequentially arranged time-domain resources.
[0424] As a sub-implementation of the above embodiments, the first node is a UE.
[0425] As an example, any data block in the data block sequence is a PDCP SDU.
[0426] In one embodiment, the second node is a base station device.
[0427] In one embodiment, the second node is a user equipment.
[0428] As one embodiment, the second node is a relay node device.
[0429] As one embodiment, the second transmitter 1701 includes at least one of the following in embodiment 4: {antenna 420, receiver / transmitter 418, transmission processor 416, multi-antenna transmission processor 471, controller / processor 475, memory 476}.
[0430] As one embodiment, the second receiver 1702 includes at least one of the following in embodiment 4: {antenna 420, receiver / transmitter 418, receiver processor 470, transmitter processor 416, multi-antenna receiver processor 472, multi-antenna transmitter processor 471, controller / processor 475, memory 476}.
[0431] Those skilled in the art will understand that all or part of the steps in the above methods can be implemented by a program instructing related hardware, and the program can be stored in a computer-readable storage medium, such as a read-only memory, hard disk, or optical disk. Optionally, all or part of the steps in the above embodiments can also be implemented using one or more integrated circuits. Accordingly, each module unit in the above embodiments can be implemented in hardware or in the form of software functional modules. This application is not limited to any specific combination of software and hardware. The user equipment, terminal, and UE in this application include, but are not limited to, drones, communication modules on drones, remote-controlled aircraft, aircraft, small aircraft, mobile phones, tablets, laptops, vehicle-mounted communication equipment, vehicles, RSUs, wireless sensors, internet access cards, IoT terminals, RFID terminals, NB-IoT terminals, MTC (Machine Type Communication) terminals, eMTC (enhanced MTC) terminals, data cards, internet access cards, vehicle-mounted communication equipment, low-cost mobile phones, low-cost tablets, and other wireless communication devices. The base stations or system equipment in this application include, but are not limited to, macrocell base stations, microcell base stations, small cell base stations, home base stations, relay base stations, eNBs, gNBs, TRPs (Transmitter Receiver Points), GNSS, relay satellites, satellite base stations, airborne base stations, RSUs (Road Side Units), drones, and testing equipment, such as transceivers or signaling testers that simulate some functions of a base station, and other wireless communication equipment.
[0432] Those skilled in the art will understand that the present invention can be practiced in other specified forms without departing from its core or essential characteristics. Therefore, the embodiments disclosed herein should in any way be considered descriptive rather than restrictive. The scope of the invention is defined by the appended claims rather than the foregoing description, and all modifications within their equivalent meaning and scope are considered to be included therein.
Claims
1. A first node for wireless communication, the first node comprising: Comprising: a first receiver, receiving at least one data block in a data block sequence, the data block sequence comprising a first data block; a first transmitter, transmitting a first indication information; the first receiver, receiving a first check bit block; the first transmitter, transmitting a second indication information; wherein the first indication information triggers transmission of the first check bit block; generation of the first check bit block depends on the first data block; the second indication information is used to indicate that the first data block is obtained.
2. The first node of claim 1, characterized in that, The at least one data block in the received data block sequence comprises: generating at least a first candidate data block; wherein the first candidate data block is determined as the first data block.
3. The first node of claim 2, wherein, The at least first candidate data block comprises a plurality of candidate data blocks, wherein the first check bit block is used to determine the first candidate data block from the plurality of candidate data blocks.
4. The first node of any of claims 1 to 3, wherein, The at least one data block in the received data block sequence comprises: performing reception on a first wireless channel, the first data block is not correctly received; wherein the first data block of the first wireless channel is the latest transmission of the first data block.
5. The first node of claim 4, wherein, Comprising: the first transmitter, indicating that the first data block is not correctly received by using a second wireless channel; wherein the second wireless channel is before the transmission time of the first indication information.
6. The first node of any of claims 4-5, wherein, The order of the first data block in the data block sequence depends on the time domain resource occupied by the first wireless channel.
7. The first node of claim 6, wherein, Comprising: the first receiver, receiving a first signaling; wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
8. The first node of any of claims 1-7, wherein, Comprising: the first transmitter, transmitting a first signaling; wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
9. The first node of any of claims 1-8, wherein, Any data block in the data block sequence is a PDCP SDU.
10. A second node for use in wireless communication, characterized by Comprising: a second transmitter, transmitting at least one data block in a data block sequence, the data block sequence comprising a first data block; a second receiver, receiving a first indication information; the second transmitter, transmitting a first check bit block; the second receiver, receiving a second indication information; wherein the first indication information triggers transmission of the first check bit block; generation of the first check bit block depends on the first data block; the second indication information is used to indicate that the first data block is obtained.
11. The second node of claim 10, wherein, The at least one data block in the transmitted data block sequence comprises: transmitting a first data block on a first wireless channel; wherein the first data block of the first wireless channel is the latest transmission of the first data block.
12. The second node of claim 10 or 11, characterized by, The at least one data block in the transmitted data block sequence comprises: transmitting a first data block on a first wireless channel; The first bit block of the first wireless channel is a latest transmission of the first data block.
13. The second node of any of claims 10 to 12, wherein, Comprising: The second receiver determines that the first bit block is not correctly received according to the reception on the second wireless channel; wherein the second wireless channel is before the sending time of the first indication information.
14. The second node of any of claims 10 to 13, wherein, The order of the first data block in the data block sequence depends on the time domain resource occupied by the first wireless channel.
15. The second node of any of claims 10 to 14, wherein, Comprising: The second transmitter sends first signaling; wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources in order.
16. The second node of any of claims 10 to 15, wherein, Comprising: The second receiver receives first signaling; wherein the first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources in order.
17. The second node of any of claims 10 to 16, wherein, Any data block in the data block sequence is a PDCP SDU.
18. A method in a first node used for wireless communication, characterized by, Comprising: Receiving at least one data block in a data block sequence, the data block sequence comprising a first data block; Sending first indication information; Receiving a first check bit block; Sending second indication information; The first indication information triggers the transmission of the first check bit block; the generation of the first check bit block depends on the first data block; The second indication information is used to indicate that the first data block is obtained.
19. The method of claim 18, wherein, The receiving at least one data block in the data block sequence comprises: Generating at least a first candidate data block; The first candidate data block is determined as the first data block.
20. The method of claim 18 or 19, wherein, The at least first candidate data block comprises a plurality of candidate data blocks, wherein the first check bit block is used to determine the first candidate data block from the plurality of candidate data blocks.
21. The method of any one of claims 18-20, wherein, The receiving at least one data block in the data block sequence comprises: Performing reception on a first wireless channel, and not correctly receiving a first bit block; The first bit block of the first wireless channel is a latest transmission of the first data block.
22. The method of any one of claims 18-21, wherein, Comprising: Indicating that the first bit block is not correctly received by using a second wireless channel; The second wireless channel is before the sending time of the first indication information.
23. The method of any one of claims 18-22, wherein, The order of the first data block in the data block sequence depends on the time domain resource occupied by the first wireless channel.
24. The method of any one of claims 18-23, wherein, Comprising: Receiving first signaling; The first signaling indicates a plurality of sequentially arranged time domain resources, the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; the data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources in order.
25. The method of any one of claims 18-24, wherein, Comprising: Sending first signaling; The first signaling indicates a plurality of sequentially arranged time domain resources, and the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; and data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
26. The method of any one of claims 18-25, wherein, Any data block in the data block sequence is a PDCP SDU.
27. A method in a second node used for wireless communication, characterized by, The method comprises: transmitting at least one data block in a data block sequence, the data block sequence comprising a first data block; receiving first indication information; transmitting a first check bit block; receiving second indication information; The first indication information triggers transmission of the first check bit block; and generation of the first check bit block depends on the first data block. The second indication information is used to indicate that the first data block is obtained.
28. The method of claim 27, wherein, The at least one data block in the data block sequence comprises: transmitting a first bit block on a first wireless channel; The first bit block of the first wireless channel is the latest transmission of the first data block.
29. The method of claim 27 or 28, wherein, The at least one data block in the data block sequence comprises: transmitting a first bit block on a first wireless channel; The first bit block of the first wireless channel is the latest transmission of the first data block.
30. The method of any of claims 27-29, wherein, The method comprises: determining, according to reception on a second wireless channel, that the first bit block is not correctly received; The second wireless channel is located before a transmission time of the first indication information.
31. The method of any one of claims 27-30, wherein, An order of the first data block in the data block sequence depends on a time domain resource occupied by the first wireless channel.
32. The method of any one of claims 27-31, wherein, The method comprises: transmitting first signaling; The first signaling indicates a plurality of sequentially arranged time domain resources, and the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; and data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
33. The method of any one of claims 27-32, wherein, The method comprises: receiving first signaling; The first signaling indicates a plurality of sequentially arranged time domain resources, and the time domain resource occupied by the first wireless channel is one of the plurality of sequentially arranged time domain resources; and data blocks in the data block sequence are sequentially transmitted on the plurality of sequentially arranged time domain resources.
34. The method of any one of claims 27-33, wherein, Any data block in the data block sequence is a PDCP SDU.
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