Communication method and apparatus

Abstract

A communication method and apparatus, relating to the technical field of communications, and capable of reducing the probability of AL ambiguity, so as to improve the communication reliability. The method comprises: a network device determining, on the basis of a target aggregation level, a length E of an output sequence having undergone rate matching, and determining a polar encoding length N on the basis of E; performing polar encoding on a first sequence to obtain a second sequence having a length of N; performing cyclic shift on the second sequence to obtain a third sequence; and outputting the third sequence. N is an integer power of 2; the first sequence comprises information bits and cyclic redundancy check bits; and a start bit of the third sequence is the Y-th bit in the second sequence, and Y is determined on the basis of the target aggregation level.

Description

Communication methods and devices

[0001] This application claims priority to Chinese Patent Application No. 202411020095.3, filed on July 26, 2024, entitled "Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to communication methods and apparatus. Background Technology

[0003] In a communication system, network devices can determine a candidate set of physical downlink control channels (PDCCHs) within a configured search space. They then map the encoded downlink control information (DCI) onto control channel elements (CCEs) within the PDCCH candidate set for transmission. Correspondingly, terminal devices can perform blind detection on at least one PDCCH candidate set in the search space to obtain the required DCI. Different PDCCH candidate sets have different aggressive levels (ALs) (ALs can be understood as the number of CCEs in the PDCCH candidate set), resulting in different numbers of encoded bits that can be carried by different PDCCH candidate sets.

[0004] Because the New Radio (NR) standard specifies a maximum PDCCH mother code length of 512, when the AL (Alternating Parameter) is 4, 8, or 16, the mother code length used for encoding is always 512. This causes AL mutual checks to occur during blind detection by the terminal device. For example, if the network device uses AL 8 to send the DCI, the terminal device may also succeed in parsing using AL 16; or, if the network device uses AL 4 to send the DCI, the terminal device may also succeed in parsing using AL 8. AL mutual checks can lead to incorrect resource determination by the terminal device, causing AL ambiguity. For instance, the data transmission resource should be associated with the last CCE (CCE7) corresponding to AL 8, but after the terminal device successfully performs a blind detection with AL 16, the actual data transmission resource determined is associated with the last CCE (CCE15) corresponding to AL 16, affecting data transmission.

[0005] Therefore, how to reduce the probability of AL ambiguity in order to improve the reliability of communication has become an urgent problem to be solved. Summary of the Invention

[0006] This application provides a communication method and apparatus that can reduce the probability of AL ambiguity, thereby improving the reliability of communication.

[0007] Firstly, this application provides a communication method that can be executed by a network device. Unless otherwise specified, "network device" in this application can refer to the network device itself, a component within the network device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the network device's functions. The method includes: the network device determining the length E of the rate-matched output sequence based on a target aggregation level; determining the length N of the polar coding based on E; performing polar coding on the first sequence to obtain a second sequence of length N; performing cyclic shifting on the second sequence to obtain a third sequence; and outputting the third sequence. Wherein, N is an integer power of 2; the first sequence includes information bits and cyclic redundancy check (CRC) bits; the starting bit of the third sequence is the Y-th bit in the second sequence, where Y is determined according to the target aggregation level.

[0008] Based on the first aspect, network devices can implicitly indicate the target aggregation level by cyclically shifting the second sequence, thereby reducing signaling overhead. At the same time, terminal devices can perform decyclic shifting based on the target aggregation level during the decoding process to determine the target aggregation level (i.e., terminal devices can perform cyclic redundancy check on the decyclic shifted sequence, and if the check is successful, the target aggregation level is determined), which can reduce the probability of AL ambiguity and thus improve communication reliability.

[0009] In one possible implementation, the third sequence includes the Y-th bit to the (N-1)-th bit of the second sequence arranged in sequence, and the 0-th bit to the (Y-1)-th bit of the second sequence.

[0010] Based on this possible implementation, a third sequence can be determined, that is, the third sequence is obtained by performing cyclic redundancy on the second sequence, thus providing a feasible scheme for the representation of the third sequence.

[0011] In one possible implementation, there are X aggregation levels, and the length of the polar code corresponding to each of the X aggregation levels is N. The X aggregation levels include the target aggregation level, where X is a positive integer, and Y is determined based on N and a first value; wherein the first value is an integer power of 2, and the first value is greater than or equal to X.

[0012] In one possible implementation, Y satisfies the following formula: Y = (t × N) / 2 m Where t is an integer less than the first value and greater than or equal to 0; the first value is 2. m ,2 mGreater than or equal to X.

[0013] Based on the two possible implementations described above, a feasible solution is provided for determining Y. Since N is an integer power of 2, it can be determined by performing a 2^N operation on the second sequence. m Dividing the data into equal parts yields multiple subsequences of the same length, making it easier to implement different Y values ​​corresponding to different aggregation levels. In addition, the initial bits of the third sequence corresponding to different aggregation levels can be the initial bits of different subsequences, ensuring that the third sequences corresponding to different aggregation levels are different. This can improve the accuracy of the terminal device in determining the target aggregation level, reduce the probability of AL ambiguity, and improve the reliability of communication.

[0014] In one possible implementation, Y is 0 when the target aggregation level is 8; or Y is N / 2 when the target aggregation level is 16.

[0015] In one possible implementation, Y is 0 when the target aggregation level is 8; or Y is N / 2 when the target aggregation level is 4.

[0016] In one possible implementation, Y is 0 when the target aggregation level is 4; or Y is N / 2 when the target aggregation level is 16.

[0017] In one possible implementation, Y is 0 when the target aggregation level is 8; or Y is N / 4 when the target aggregation level is 4; or Y is N / 2 when the target aggregation level is 16.

[0018] In one possible implementation, Y is 0 when the target aggregation level is 8; or, Y is N / 4 when the target aggregation level is 4; or, Y is N / 2 when the target aggregation level is 16; or, Y is (3N) / 4 when the target aggregation level is 32.

[0019] Based on the above five possible implementations, several feasible solutions are proposed to determine the Y corresponding to the target aggregation level.

[0020] In one possible implementation, the Y values ​​corresponding to the X aggregation levels are different.

[0021] Based on this possible implementation, it can be guaranteed that the third sequence corresponding to X aggregation levels is different, which can improve the accuracy of terminal devices in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0022] In one possible implementation, Y corresponding to X aggregation levels is predefined; or Y corresponding to X aggregation levels is configured by the network device.

[0023] Based on this possible implementation, two feasible solutions are provided for determining Y corresponding to X aggregation levels. When Y corresponding to X aggregation levels is predefined, signaling overhead can be reduced. When Y corresponding to X aggregation levels is configured by network devices, Y corresponding to X aggregation levels can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of determining Y corresponding to X aggregation levels.

[0024] Secondly, this application provides a communication method that can be executed by a terminal device. Unless otherwise specified, "terminal device" in this application can refer to the terminal device itself, a component within the terminal device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the terminal device's functions. The method includes: the terminal device receiving information to be decoded; performing polar decoding on the information to be decoded to obtain a fourth sequence of length N; performing decyclic shifting on the fourth sequence according to the i-th aggregation level among X aggregation levels to obtain a fifth sequence of length N; performing cyclic redundancy check on the information bits in the fifth sequence, and determining the aggregation level corresponding to the successfully checked fifth sequence as the target aggregation level. Wherein, the length of the polar code of the first sequence corresponding to the information to be decoded is N; the first sequence includes information bits and CRC bits; N is a positive integer; the length of the polar codes corresponding to the X aggregation levels is N, and the X aggregation levels include the target aggregation level; X is a positive integer; i is one or more values ​​in [1, X].

[0025] Based on the second aspect, before performing cyclic redundancy check (CRC) on the information bits, the terminal device needs to de-cyclic shift the sequence corresponding to the information to be decoded. Simultaneously, the terminal device needs to de-cyclic shift the sequence according to the target aggregation level; otherwise, CRC will fail. Therefore, by de-cyclic shifting the fourth sequence, the target aggregation level can be implicitly indicated, thereby reducing signaling overhead. Simultaneously, it allows the terminal device to determine the target aggregation level, reducing the probability of AL ambiguity and thus improving communication reliability.

[0026] In addition, the terminal device can perform polarization decoding on the information to be decoded before performing decyclic shifting. That is, the terminal device can perform only one decoding operation and determine the target aggregation level by multiple decyclic shifts and cyclic redundancy checks, which can reduce the decoding complexity and simplify the implementation.

[0027] Specifically, the terminal device can determine one or more aggregation levels from X aggregation levels for de-cyclic shifting. That is, the terminal device can sequentially select an aggregation level for blind detection in a serial manner, or the terminal device can select multiple aggregation levels in parallel and perform de-cyclic shifting simultaneously.

[0028] In one possible implementation, the terminal device performs a cyclic shift on the fourth sequence based on the first matrix corresponding to the i-th aggregation level; wherein the first matrix corresponding to the i-th aggregation level is determined based on the step size of the cyclic shift corresponding to the i-th aggregation level.

[0029] Based on the above possible implementations, the terminal device can determine the first matrix corresponding to the i-th aggregation level according to the cyclic shift step size (i.e., Y) corresponding to the i-th aggregation level, and then realize the solution of the cyclic shift according to the first matrix corresponding to the i-th aggregation level, thus providing a feasible solution for realizing the solution of the cyclic shift.

[0030] In one possible implementation, the step size of the cyclic shift corresponding to the i-th aggregation level is determined according to N and a first value; wherein the first value is an integer power of 2 and is greater than or equal to X.

[0031] In one possible implementation, the step size of the cyclic shift corresponding to the i-th aggregation level satisfies the following formula: (t×N) / 2 m Where t is an integer less than the first value and greater than or equal to 0; the first value is 2. m ,2 m Greater than or equal to X.

[0032] Based on the above possible implementations, a feasible solution is provided for determining the step size (i.e., Y) of the cyclic shift corresponding to the i-th aggregation level.

[0033] In one possible implementation, when the i-th aggregation level is 8, the step size of the cyclic shift corresponding to the i-th aggregation level is 0; or, when the i-th aggregation level is 16, the step size of the cyclic shift corresponding to the i-th aggregation level is N / 2.

[0034] In one possible implementation, when the i-th aggregation level is 8, the step size of the cyclic shift corresponding to the i-th aggregation level is 0; or, when the i-th aggregation level is 4, the step size of the cyclic shift corresponding to the i-th aggregation level is N / 2.

[0035] In one possible implementation, when the i-th aggregation level is 4, the step size of the cyclic shift corresponding to the i-th aggregation level is 0; or, when the i-th aggregation level is 16, the step size of the cyclic shift corresponding to the i-th aggregation level is N / 2.

[0036] In one possible implementation, when the i-th aggregation level is 8, the step size of the cyclic shift corresponding to the i-th aggregation level is 0; or, when the i-th aggregation level is 4, the step size of the cyclic shift corresponding to the i-th aggregation level is N / 4; or, when the i-th aggregation level is 16, the step size of the cyclic shift corresponding to the i-th aggregation level is N / 2.

[0037] In one possible implementation, Y is 0 when the i-th aggregation level is 8; or, Y is N / 4 when the i-th aggregation level is 4; or, Y is N / 2 when the i-th aggregation level is 16; or, Y is (3N) / 4 when the i-th aggregation level is 32.

[0038] Based on the above five possible implementations, several feasible schemes are provided for determining the step size of the cyclic shift corresponding to different aggregation levels.

[0039] In one possible implementation, the step size of the cyclic shift corresponding to the X aggregation levels is different.

[0040] Based on the above possible implementations, it can be guaranteed that the fifth sequence corresponding to X aggregation levels is different, which can improve the accuracy of the terminal device in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0041] In one possible implementation, the step size of the cyclic shift corresponding to the X aggregation levels is predefined; or, the step size of the cyclic shift corresponding to the X aggregation levels is configured by the network device.

[0042] Based on the above possible implementations, two feasible solutions are provided for determining the step size of the cyclic shift corresponding to X aggregation levels. When the step size of the cyclic shift corresponding to X aggregation levels is predefined, signaling overhead can be reduced. When the step size of the cyclic shift corresponding to X aggregation levels is configured by the network device, the step size of the cyclic shift corresponding to X aggregation levels can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of determining the step size of the cyclic shift corresponding to X aggregation levels.

[0043] Thirdly, this application provides a communication method that can be executed by a terminal device. Unless otherwise specified, "terminal device" in this application can refer to the terminal device itself, a component within the terminal device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the terminal device's functions. The method includes: the terminal device receiving information to be decoded; performing a de-cyclic shift on a sixth sequence according to the i-th aggregation level among X aggregation levels to obtain a seventh sequence; performing polar decoding on the seventh sequence to obtain an eighth sequence; performing cyclic redundancy check on the information bits in the eighth sequence, and determining the aggregation level corresponding to the successfully checked eighth sequence as the target aggregation level. Wherein, the length of the polar code of the first sequence corresponding to the information to be decoded is N; the first sequence includes information bits and CRC bits; N is a positive integer; the length of the polar code corresponding to each of the X aggregation levels is N, and the X aggregation levels include the target aggregation level; i is one or more values ​​in [1, X], and X is a positive integer; the sixth sequence is the sequence after demodulation and rate matching of the information to be decoded.

[0044] Based on the third aspect, before performing cyclic redundancy check (CRC) on the information bits, the terminal device needs to de-cyclic shift the sequence corresponding to the information to be decoded. Simultaneously, the terminal device needs to de-cyclic shift the sequence according to the target aggregation level; otherwise, CRC will fail. Therefore, by de-cyclic shifting the information to be decoded, the target aggregation level can be implicitly indicated, thereby reducing signaling overhead. Simultaneously, it allows the terminal device to determine the target aggregation level, reducing the probability of AL ambiguity and thus improving communication reliability.

[0045] Specifically, the terminal device can determine one or more aggregation levels from X aggregation levels for de-cyclic shifting. That is, the terminal device can sequentially select an aggregation level for blind detection in a serial manner, or the terminal device can select multiple aggregation levels in parallel and perform de-cyclic shifting simultaneously.

[0046] In one possible implementation, the starting bit of the seventh sequence is the Z-th bit of the sixth sequence; where Z is determined according to the i-th aggregation level.

[0047] Based on this possible implementation, a feasible scheme is provided for determining the seventh sequence.

[0048] In one possible implementation, Z is 0 when the i-th aggregation level is 8; or Z is N / 2 when the i-th aggregation level is 16.

[0049] In one possible implementation, Z is 0 when the i-th aggregation level is 8; or Z is N / 2 when the i-th aggregation level is 4.

[0050] In one possible implementation, Z is 0 when the i-th aggregation level is 4; or, Z is N / 2 when the i-th aggregation level is 4.

[0051] In one possible implementation, Z is 0 when the i-th aggregation level is 8; or (3N) / 4 when the i-th aggregation level is 4; or N / 2 when the i-th aggregation level is 16.

[0052] In one possible implementation, Z is 0 when the i-th aggregation level is 8; or (3N) / 4 when the i-th aggregation level is 4; or N / 2 when the i-th aggregation level is 16; or N / 4 when the i-th aggregation level is 32.

[0053] Based on the above five possible implementations, several feasible solutions are provided for determining Z corresponding to different aggregation levels.

[0054] In one possible implementation, the Z values ​​for the X aggregation levels are different.

[0055] Based on this possible implementation, it can be guaranteed that the seventh sequence corresponding to X aggregation levels is different, which can improve the accuracy of terminal devices in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0056] Fourthly, this application provides a communication method that can be executed by a network device. Unless otherwise specified, "network device" in this application can refer to the network device itself, a component within the network device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the network device's functions. The method includes: the network device determining a CRC lead sequence corresponding to a target aggregation level based on that target aggregation level; performing cyclic redundancy check encoding on the information bits to obtain a ninth sequence; and outputting the ninth sequence. The ninth sequence includes information bits and CRC bits; the CRC bits are determined based on the CRC lead sequence and information bits corresponding to the target aggregation level.

[0057] Based on the fourth aspect, network devices can perform cyclic redundancy check encoding on information bits according to the CRC leader sequence corresponding to the target aggregation level to determine the CRC bits, which can implicitly indicate the target aggregation level, thereby reducing signaling overhead. At the same time, it can enable terminal devices to perform cyclic redundancy check on the CRC leader sequence corresponding to the target aggregation level during the decoding process to determine the target aggregation level, which can reduce the probability of AL ambiguity and thus improve the reliability of communication.

[0058] In one possible implementation, there are X aggregation levels, each with a polar code of length N. The X aggregation levels include the target aggregation level, where X is a positive integer, and the CRC lead sequence corresponding to each of the X aggregation levels is different.

[0059] Based on this possible implementation, it can be guaranteed that the CRC bits corresponding to the X aggregation levels are different. This allows the terminal device to perform cyclic redundancy check on the information bits using the CRC leader sequence corresponding to the target aggregation level when performing cyclic redundancy check. Otherwise, the check may fail. This can improve the accuracy of the terminal device in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0060] In one possible implementation, the CRC leader sequences corresponding to the X aggregation levels are mutually orthogonal.

[0061] Based on this possible implementation, the codeword sets corresponding to the X aggregation levels can be different, which can improve the accuracy of the terminal device in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0062] In one possible implementation, the CRC lead sequences corresponding to the X aggregation levels are predefined; or, the CRC lead sequences corresponding to the X aggregation levels are configured by the network device.

[0063] Based on this possible implementation, two feasible schemes are provided for determining the CRC leader sequence corresponding to X aggregation levels. When the CRC leader sequence corresponding to X aggregation levels is predefined, signaling overhead can be reduced. When the CRC leader sequence corresponding to X aggregation levels is configured by the network device, the CRC leader sequence corresponding to X aggregation levels can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of determining the CRC leader sequence corresponding to X aggregation levels.

[0064] In one possible implementation, when the target aggregation level is 16, the CRC leader sequence corresponding to the target aggregation level is 0; or, when the target aggregation level is 8, the CRC leader sequence corresponding to the target aggregation level is 1.

[0065] In one possible implementation, when the target aggregation level is 16, the CRC leader sequence corresponding to the target aggregation level is 001110011100110001100100; or, when the target aggregation level is 8, the CRC leader sequence corresponding to the target aggregation level is 010110100111000010001001; or, when the target aggregation level is 4, the CRC leader sequence corresponding to the target aggregation level is 110011001001010110100101.

[0066] Based on the two possible implementations mentioned above, several feasible schemes are provided for determining the CRC leader sequence corresponding to the target aggregation level.

[0067] Fifthly, this application provides a communication method that can be executed by a terminal device. Unless otherwise specified, "terminal device" in this application can refer to the terminal device itself, a component within the terminal device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the terminal device's functions. The method includes: the terminal device receiving information to be decoded; decoding the information to be decoded to obtain a tenth sequence; performing cyclic redundancy check (CRC) on the information bits in the tenth sequence based on the CRC leader sequence corresponding to the i-th aggregation level among X aggregation levels, and determining the aggregation level corresponding to the successfully checked tenth sequence as the target aggregation level; wherein the tenth sequence includes information bits and CRC bits; the length of the polar codes corresponding to the X aggregation levels is N, and the X aggregation levels include the target aggregation level; i is one or more values ​​in [1, X], and X is a positive integer.

[0068] Based on the fifth aspect, the terminal device needs to perform cyclic redundancy check on the information bits using the CRC preamble sequence corresponding to the target aggregation level; otherwise, the check will fail. Therefore, by performing cyclic redundancy check on the information bits using the CRC preamble sequence corresponding to the target aggregation level, the terminal device can implicitly indicate the target aggregation level, thereby reducing signaling overhead. At the same time, it can enable the terminal device to determine the target aggregation level, which can reduce the probability of AL ambiguity and thus improve the reliability of communication.

[0069] In one possible implementation, the CRC lead sequences corresponding to the X aggregation levels are different.

[0070] Based on this possible implementation, it can be guaranteed that the CRC bits corresponding to the X aggregation levels are different. This allows the terminal device to perform cyclic redundancy check on the information bits using the CRC leader sequence corresponding to the target aggregation level when performing cyclic redundancy check. Otherwise, the check may fail. This can improve the accuracy of the terminal device in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0071] In one possible implementation, the CRC leader sequences corresponding to the X aggregation levels are mutually orthogonal.

[0072] Based on this possible implementation, the codeword sets corresponding to the X aggregation levels can be different, which can improve the accuracy of the terminal device in determining the target aggregation level, reduce the probability of AL ambiguity, and thus improve the reliability of communication.

[0073] In one possible implementation, the CRC lead sequences corresponding to the X aggregation levels are predefined; or, the CRC lead sequences corresponding to the X aggregation levels are configured by the network device.

[0074] Based on this possible implementation, two feasible schemes are provided for determining the CRC leader sequence corresponding to X aggregation levels. When the CRC leader sequence corresponding to X aggregation levels is predefined, signaling overhead can be reduced. When the CRC leader sequence corresponding to X aggregation levels is configured by the network device, the CRC leader sequence corresponding to X aggregation levels can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of determining the CRC leader sequence corresponding to X aggregation levels.

[0075] In one possible implementation, when the i-th aggregation level is 16, the CRC leader sequence corresponding to the i-th aggregation level is 0; or, when the i-th aggregation level is 8, the CRC leader sequence corresponding to the i-th aggregation level is 1.

[0076] In one possible implementation, when the i-th aggregation level is 16, the CRC leader sequence corresponding to the i-th aggregation level is 001110011100110001100100; or, when the i-th aggregation level is 8, the CRC leader sequence corresponding to the i-th aggregation level is 010110100111000010001001; or, when the i-th aggregation level is 4, the CRC leader sequence corresponding to the i-th aggregation level is 110011001001010110100101.

[0077] Based on the above possible implementations, several feasible schemes are provided for determining the CRC leader sequence corresponding to different aggregation levels.

[0078] Sixthly, this application provides a communication method that can be executed by a network device. Unless otherwise specified, "network device" in this application can refer to the network device itself, a component within the network device (e.g., a processor, chip, or chip system), or a logical module or software capable of implementing all or part of the functions of the network device. The method includes: the network device acquiring a Data Integration Certificate (DCI) and transmitting the DCI. The DCI includes first indication information, which indicates a target aggregation level.

[0079] Based on the sixth aspect, a new field can be added to the DCI to carry the first indication information, so as to explicitly indicate the target aggregation level. This allows the terminal device to directly determine the target aggregation level based on the first indication information, which can reduce the probability of AL ambiguity, thereby improving the reliability of communication and simplifying implementation.

[0080] In one possible implementation, the first indication information may be located at the tail of the DCI.

[0081] Based on this possible implementation, a new field can be added to the end of the DCI to carry the first indication information without changing the other fields of the DCI, which can simplify the implementation.

[0082] In one possible implementation, the first indication information occupies one or more bits.

[0083] Based on this possible implementation, the number of bits occupied by the first indication information can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of the first indication information in indicating the aggregation level.

[0084] In one possible implementation, when the target aggregation level is 8, the bit value corresponding to the first indication information is 0; or, when the target aggregation level is 16, the bit value corresponding to the first indication information is 1.

[0085] In one possible implementation, when the target aggregation level is 8, the bit value corresponding to the first indication information is 00; or, when the target aggregation level is 16, the bit value corresponding to the first indication information is 10; or, when the target aggregation level is 4, the bit value corresponding to the first indication information is 01.

[0086] Based on the two possible implementations mentioned above, several feasible solutions are provided for determining the bit value of the first indication information corresponding to the target aggregation level.

[0087] Seventhly, this application provides a communication method that can be executed by a terminal device. Unless otherwise specified, "terminal device" in this application can refer to the terminal device itself, a component within the terminal device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the terminal device's functions. The method includes: the terminal device receiving a DCI (Distributed Indicator Context); and determining a target aggregation level based on first indication information. The DCI includes the first indication information, which indicates the target aggregation level.

[0088] Based on the seventh aspect, a new field can be added to the DCI to carry the first indication information, so as to explicitly indicate the target aggregation level. The terminal device can directly determine the target aggregation level based on the first indication information, which can reduce the probability of AL ambiguity, thereby improving the reliability of communication and simplifying implementation.

[0089] In one possible implementation, the first indication information may be located at the tail of the DCI.

[0090] Based on this possible implementation, a new field can be added to the end of the DCI to carry the first indication information without changing the other fields of the DCI, which can simplify the implementation.

[0091] In one possible implementation, the first indication information occupies one or more bits.

[0092] Based on this possible implementation, the number of bits occupied by the first indication information can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of the first indication information in indicating the aggregation level.

[0093] In one possible implementation, when the target aggregation level is 8, the bit value corresponding to the first indication information is 0; or, when the target aggregation level is 16, the bit value corresponding to the first indication information is 1.

[0094] In one possible implementation, when the target aggregation level is 8, the bit value corresponding to the first indication information is 00; or, when the target aggregation level is 16, the bit value corresponding to the first indication information is 10; or, when the target aggregation level is 4, the bit value corresponding to the first indication information is 01.

[0095] Based on the two possible implementations mentioned above, several feasible solutions are provided for determining the bit value of the first indication information corresponding to the target aggregation level.

[0096] Eighthly, embodiments of this application provide a communication device that can be applied to the network device described in the first aspect to realize the functions performed by the network device. The communication device can be the network device itself, or it can be a chip, chip system, or system-on-a-chip (SoC) of the network device. The communication device can execute the functions performed by the network device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0097] For example, the processing module is used to determine the length E of the output sequence after rate matching according to the target aggregation level, and to determine the length N of the polar coding according to E; where N is an integer power of 2; the processing module is also used to perform polar coding on the first sequence to obtain a second sequence of length N; where the first sequence includes information bits and cyclic redundancy check bits; the processing module is also used to perform cyclic shifting on the second sequence to obtain a third sequence; where the starting bit of the third sequence is the Y-th bit in the second sequence, and Y is determined according to the target aggregation level; the transceiver module is used to output the third sequence.

[0098] Optionally, the transceiver module and processing module of the communication device in the eighth aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0099] Ninthly, embodiments of this application provide a communication device that can be applied to the terminal device described in the second aspect to realize the functions performed by the terminal device. The communication device can be the terminal device itself, or it can be a chip, chip system, or system-on-a-chip (SoC) of the terminal device. The communication device can execute the functions performed by the terminal device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0100] For example, the transceiver module is used to receive information to be decoded; wherein the length of the polar code of the first sequence corresponding to the information to be decoded is N; the first sequence includes information bits and cyclic redundancy check bits; N is a positive integer; the processing module is used to perform polar decoding on the information to be decoded to obtain a fourth sequence of length N; the processing module is also used to perform decyclic shift on the fourth sequence according to the i-th aggregation level among X aggregation levels to obtain a fifth sequence of length N; wherein the length of the polar code corresponding to the X aggregation levels is N, and the X aggregation levels include the target aggregation level; X is a positive integer; i is one or more values ​​in [1, X]; the processing module is also used to perform cyclic redundancy check on the information bits in the fifth sequence, and determine the aggregation level corresponding to the fifth sequence that has been successfully checked as the target aggregation level.

[0101] Optionally, the transceiver module and processing module of the communication device in the ninth aspect may also perform the corresponding functions in the second aspect or any possible design of the second aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0102] Tenthly, embodiments of this application provide a communication device that can be applied to the terminal device described in the third aspect to realize the functions performed by the terminal device. The communication device can be the terminal device itself, or it can be a chip, chip system, or system-on-a-chip (SoC) of the terminal device. The communication device can execute the functions performed by the terminal device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0103] For example, the transceiver module is used to receive information to be decoded; wherein the length of the polar code of the first sequence corresponding to the information to be decoded is N; the first sequence includes information bits and cyclic redundancy check bits; N is a positive integer; the processing module is used to perform decyclic shifting on the sixth sequence according to the i-th aggregation level among X aggregation levels to obtain the seventh sequence; wherein the length of the polar code corresponding to each of the X aggregation levels is N, and the X aggregation levels include the target aggregation level; i is one or more values ​​in [1, X], and X is a positive integer; the sixth sequence is the sequence after demodulation and derate matching of the information to be decoded; the processing module is also used to perform polar decoding on the seventh sequence to obtain the eighth sequence; the processing module is also used to perform cyclic redundancy check on the information bits in the eighth sequence, and determine the aggregation level corresponding to the eighth sequence that has been successfully checked as the target aggregation level.

[0104] Optionally, the transceiver module and processing module of the communication device in the tenth aspect may also perform the corresponding functions in the third aspect or any possible design of the third aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0105] Eleventhly, embodiments of this application provide a communication device that can be applied to the network device described in the fourth aspect to realize the functions performed by the network device. The communication device can be a network device, or a chip, chip system, or system-on-a-chip of the network device, etc. The communication device can execute the functions performed by the network device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0106] For example, the processing module is used to determine the CRC leader sequence corresponding to the target aggregation level based on the target aggregation level; the processing module is also used to perform cyclic redundancy check encoding on the information bits to obtain the ninth sequence; wherein, the ninth sequence includes information bits and cyclic redundancy check bits; the cyclic redundancy check bits are determined based on the CRC leader sequence and information bits corresponding to the target aggregation level; the transceiver module is used to output the ninth sequence.

[0107] Optionally, the transceiver module and processing module of the communication device in the eleventh aspect may also perform the corresponding functions in the fourth aspect or any possible design of the fourth aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0108] In a twelfth aspect, embodiments of this application provide a communication device that can be applied to the terminal device described in the fifth aspect to realize the functions performed by the terminal device. The communication device can be the terminal device itself, or it can be a chip, chip system, or system-on-a-chip (SoC) of the terminal device. The communication device can execute the functions performed by the terminal device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0109] For example, the transceiver module is used to receive the information to be decoded; the processing module is used to decode the information to be decoded to obtain the tenth sequence; wherein the tenth sequence includes information bits and cyclic redundancy check bits; the processing module is also used to perform cyclic redundancy check on the information bits in the tenth sequence according to the CRC leader sequence corresponding to the i-th aggregation level among the X aggregation levels, and determine the aggregation level corresponding to the tenth sequence that has been successfully checked as the target aggregation level; wherein the length of the polar code corresponding to the X aggregation levels is N, the X aggregation levels include the target aggregation level; i is one or more values ​​in [1, X], and X is a positive integer.

[0110] Optionally, the transceiver module and processing module of the communication device in the twelfth aspect may also perform the corresponding functions in the fifth aspect or any possible design of the fifth aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0111] In a thirteenth aspect, embodiments of this application provide a communication device that can be applied to the network device described in the sixth aspect to realize the functions performed by the network device. The communication device can be the network device itself, or it can be a chip, chip system, or system-on-a-chip (SoC) of the network device. The communication device can execute the functions performed by the network device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0112] For example, a processing module is used to acquire DCI; wherein, DCI includes first indication information, the first indication information is used to indicate the target aggregation level; and a transceiver module is used to send DCI.

[0113] Optionally, the transceiver module and processing module of the communication device in the eleventh aspect may also perform the corresponding functions in the sixth aspect or any possible design of the sixth aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0114] In a fourteenth aspect, embodiments of this application provide a communication device that can be applied to the terminal device described in the seventh aspect to realize the functions performed by the terminal device. The communication device can be the terminal device itself, or it can be a chip, chip system, or system-on-a-chip (SoC) of the terminal device. The communication device can execute the functions performed by the terminal device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0115] For example, a transceiver module is used to receive DCI; wherein the DCI includes first indication information, the first indication information being used to indicate a target aggregation level; and a processing module is used to determine the target aggregation level based on the first indication information.

[0116] Optionally, the transceiver module and processing module of the communication device in aspect fourteen may also perform the corresponding functions in aspect seven or any possible design of aspect seven, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0117] In a fifteenth aspect, embodiments of this application provide a communication device comprising one or more processors; the one or more processors being configured to run a computer program or instructions, wherein when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to seventh aspects is performed.

[0118] In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and / or transmitting information.

[0119] In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

[0120] In a sixteenth aspect, embodiments of this application provide a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to perform the communication method as described in any one of the first to seventh aspects, and to process and / or generate information based on the information.

[0121] In a seventeenth aspect, embodiments of this application provide a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in any one of the first to seventh aspects to be performed.

[0122] In an eighteenth aspect, embodiments of this application provide a computer program product containing computer instructions that, when run on a computer, causes the communication method described in any one of the first to seventh aspects to be executed.

[0123] In a nineteenth aspect, embodiments of this application provide a computer program that, when run on a computer, causes the communication method described in any one of the first to seventh aspects to be executed.

[0124] In a twentieth aspect, embodiments of this application provide a chip, including: a processor coupled to a memory, the memory being used to store programs or instructions, wherein when the program or instructions are executed by the processor, a communication method as described in any one of the first to seventh aspects is executed.

[0125] The technical effects of any of the design methods in aspects eight through twentieth can be found in the technical effects of any of the aspects one through seven mentioned above, and will not be elaborated upon further.

[0126] In a twentieth aspect, embodiments of this application provide a communication system that may include communication means for performing the communication described in the first aspect or any possible design of the first aspect, and communication means for performing the communication described in the second aspect or any possible design of the second aspect; or, the communication system may include communication means for performing the communication described in the first aspect or any possible design of the first aspect, and communication means for performing the communication described in the third aspect or any possible design of the third aspect; or, the communication system may include communication means for performing the communication described in the fourth aspect or any possible design of the fourth aspect, and communication means for performing the communication described in the fifth aspect or any possible design of the fifth aspect; or, the communication system may include communication means for performing the communication described in the sixth aspect or any possible design of the sixth aspect, and communication means for performing the communication described in the seventh aspect or any possible design of the seventh aspect. Attached Figure Description

[0127] Figure 1 is a schematic diagram of a search space provided in an embodiment of this application;

[0128] Figure 2 is a schematic diagram of a polarization encoder provided in an embodiment of this application;

[0129] Figure 3 is a schematic diagram of a polarization decoder provided in an embodiment of this application;

[0130] Figure 4 is a schematic diagram of an information transmission method provided in an embodiment of this application;

[0131] Figure 5 is a schematic diagram of an AL ambiguity provided in an embodiment of this application;

[0132] Figure 6 is a schematic diagram of an AL ambiguity provided in an embodiment of this application;

[0133] Figure 7 is a schematic diagram of an AL ambiguity provided in an embodiment of this application;

[0134] Figure 8 is a schematic diagram of a communication system provided in an embodiment of this application;

[0135] Figure 9 is a schematic diagram of encoding and decoding performed by a transmitting end device and a receiving end device according to an embodiment of this application;

[0136] Figure 10 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0137] Figure 11 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0138] Figure 12 is a schematic diagram of an information transmission method provided in an embodiment of this application;

[0139] Figure 13 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0140] Figure 14 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0141] Figure 15 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0142] Figure 16 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0143] Figure 17 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0144] Figure 18 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0145] Figure 19 is a schematic diagram of a third sequence corresponding to X aggregation levels provided in an embodiment of this application;

[0146] Figure 20 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0147] Figure 21 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0148] Figure 22 is a schematic diagram of the structure of a network device provided in an embodiment of this application;

[0149] Figure 23 is a schematic diagram of the structure of a terminal device provided in an embodiment of this application;

[0150] Figure 24 is a schematic diagram of the structure of a communication device provided in an embodiment of this application. Detailed Implementation

[0151] Before describing the embodiments of this application, the technical terms involved in the embodiments of this application will be described.

[0152] Physical Downlink Control Channel (PDCCH): In the New Radio (NR) standard, the PDCCH can carry the Digital Access Control (DCI). The DCI is used to allocate uplink and downlink resource transmission modes, uplink power control indications, time slot format indications, and the physical resource block (PRB) and orthogonal frequency division multiplexing (OFDM) symbols where terminal equipment mapping data resides. Essentially, the scheduling of the entire communication system is achieved through the DCI, and its efficiency affects the overall system throughput. Since the DCI is transmitted via the PDCCH, the PDCCH is considered the core of the NR air interface.

[0153] The control channel and the data channel transmit significantly different amounts of data; that is, the amount of data transmitted through the control channel is relatively small. Therefore, when transmitting data through the control channel, it is not suitable to pre-allocate independent resources to each terminal device for each transmission. If independent resources are pre-allocated, the overhead of this allocation process itself may exceed the amount of data transmitted through the control channel, resulting in resource waste. In addition, network devices need to communicate with multiple terminal devices simultaneously, and the transmission needs of each terminal device have a certain degree of randomness, making it impossible to allocate specific resources to each terminal device in a fixed manner over a long period.

[0154] Therefore, the PDCCH can dynamically send the DCI to the terminal device, enabling the terminal device to determine the time and frequency domain resources occupied by the physical downlink shared channel (PDSCH), how to demodulate / decode the PDSCH, and the time and frequency domain resources occupied by the physical uplink shared channel (PUSCH) by reading the DCI. Specifically, the network device can map the DCI onto the control resource set (CORESET), and the terminal device can obtain the DCI from the CORESET accordingly. For example, the terminal device can monitor the CORESET at a specified monitoring occasion to obtain the DCI; that is, the terminal device can obtain the DCI by performing blind decoding on the PDCCH candidate set in the search space.

[0155] For example, Figure 1 shows a search space configured by the network device for the terminal device. This search space can include seven PDCCH candidate sets, where #0 to #15 can represent the indices of control channel elements (CCEs). The search space includes one PDCCH candidate set with an aggregation level (AL) of 8 (i.e., CCEs #0 to #7), two PDCCH candidate sets with an AL of 4 (i.e., CCEs #0 to #3 and #8 to #11), and four PDCCH candidate sets with an AL of 2 (i.e., CCEs #0 to #1, #4 to #5, #8 to #9, and #12 to #13). When the network device sends a DCI to the terminal device, it can determine a PDCCH candidate set in the search space, encode the encoded information bit sequence (i.e., the information bit sequence corresponding to the DCI), scramble it with a radio network temporay identifier (RNIT), and map it to one or more CCEs corresponding to the PDCCH candidate set. Correspondingly, the terminal device can perform blind testing on at least one PDCCH candidate set in the configured search space, and after successful decoding, it can determine the DCI it needs.

[0156] Here, AL can be understood as the number of CCEs occupied by a PDCCH candidate set; CCE is the resource granule of PDCCH, which can be understood as a logical concept, with one CCE corresponding to 6 resource element groups (REGs).

[0157] As can be understood, as shown in Figure 1, since the DCI may be carried on any of these 7 PDCCH candidate sets, the terminal device may need to perform an average of 3.5 blind checks to successfully obtain the DCI.

[0158] Polar Code: The NR PDCCH coding scheme can use Polar codes. Polar codes are the first coding scheme that can be rigorously proven to "achieve" the Shannon channel capacity. They have the advantages of good decoding performance and low complexity, and have been selected by the Third Generation Partnership Project (3GPP) standard as the control channel coding scheme for the fifth generation (5G) enhanced mobile broadband (eMBB) scenario.

[0159] Figure 2 below shows a schematic diagram of an 8-bit Polar code encoding, also known as a factor graph. The Polar code encoding process can include several polarization kernel operations. The polarization kernel is used to combine two input bits with a matrix. Multiplying them yields two output bits. It can be seen that during the recursive construction of Polar codes, a Polar code of length 8 can be considered as coupling two Polar codes of length 4, and correspondingly, a Polar code of length 4 can be considered as coupling two Polar codes of length 2. Similarly, a Polar code of length N can be considered as coupling two Polar codes of length N / 2, and a Polar code of length N / 2 can be considered as coupling two Polar codes of length N / 4, where N is a positive integer.

[0160] For example, when the input sequence (input from the left) is “00000011”, the output sequence (output from the right) can be “01010101”.

[0161] Understandable The matrix is ​​defined as follows: the element in the first row and first column is 1, the element in the first row and second column is 0, the element in the second row and first column is 1, and the element in the second row and second column is 1. That is, the matrix consists of four elements, each of which is either 0 or 1. In this application, all elements in the matrix are either "0" or "1". For example, an N x N matrix will contain N x N elements, each of which is either 0 or 1.

[0162] The construction process of Polar codes is used to determine the information bit positions and frozen bit positions. The reliability of each sub-channel can be ranked, and the K positions with the highest reliability are designated as information bit positions, while the remaining NK positions are designated as frozen bit positions. As shown in Figure 2, taking the construction of a Polar code with N=8 and K=4 as an example, assuming the zeroth position is the starting position, the third, fifth, sixth, and seventh positions have the highest reliability, and thus these positions can be designated as information bit positions, with the remaining positions as frozen bit positions; or assuming the first position is the starting position, the fourth, sixth, seventh, and eighth positions have the highest reliability, and thus these positions can be designated as information bit positions, with the remaining positions as frozen bit positions.

[0163] Where K is a positive integer.

[0164] In practice, Polar codes can be obtained offline through reliability sequences or online through methods such as Gaussian approximation; this application does not limit this to any particular method.

[0165] The receiving device can decode the encoded Polar code using a successive cancellation (SC) decoding algorithm. During SC decoding, the bit value of the information bit is determined by progressively calculating the log likelihood ratio (LLR) of the information bits. For example, if LLR > 0, the bit value of the information bit can be determined to be 0; if LLR < 0, the bit value of the information bit can be determined to be 1. Furthermore, for frozen bits, regardless of the LLR of the frozen bit, the frozen bit is set to 0.

[0166] For example, the SC decoding process can be illustrated in Figure 3, which includes eight computation nodes: four f nodes and four g nodes. The computation of an f node requires two LLR terms to be input to its right, and the computation of a g node requires two LLR terms to be input to its right and one "partial sum" term above it. The output can only be calculated after all input terms have been calculated. The receiving device can receive the signal from the right side of Figure 2. The received signal passes through the eight computation nodes in sequence to obtain the polar code decoding, i.e., the decoding order is: ①→②→③→④.

[0167] Based on the above description of DCI and Polar codes, the process of transmitting DCI between network devices and terminal devices can be shown in Figure 4 below.

[0168] The process of a network device sending a DCI can be shown in Figure 4(a). The network device can perform cyclic redundancy check encoding on information bits of length K to obtain an information bit sequence of length K+L (this information bit sequence includes CRC bits of length L, such as v0, v1, ..., v). K+L-1 Polar coding is performed on an information bit sequence of length K+L to obtain a codeword sequence of length N (e.g., c0, c1, ..., c2). N-1 Rate matching is performed on the codeword sequence to obtain a coded bit sequence of length E (e.g., d0, d1, ..., d2). N-1 The coded bit sequence of length E is modulated to obtain a symbol sequence and sent to the terminal device.

[0169] The process of the terminal device acquiring the DCI can be shown in Figure 4(b). The terminal device can demodulate the received symbol sequence to obtain an LLR sequence of length E, perform rate matching on the LLR sequence to obtain information to be decoded of length N, perform polarization decoding on the information to be decoded to obtain an information bit sequence of length K+L (the information bit sequence includes CRC bits), perform cyclic redundancy check on the CRC bits and information bits in the information bit sequence, and obtain the DCI after successful check.

[0170] It is understandable that when AL is different, the length of the encoded bit sequence carried by the PDCCH candidate set is different, that is, the E corresponding to different AL is different.

[0171] For example, the scheduling unit of PDCCH is CCE, and each CCE can correspond to 6 REGs (one REG includes 12 resource elements (REs)). Each CCE corresponds to 72 REs. The NR standard specifies that 3 REs in a REG are used to carry demodulation reference signal (DMRS) symbols, and 9 REs are used to carry DCI. That is, one CCE can carry 10⁸ (9*6*2=10⁸, where 2 represents one RE corresponding to two coded bit sequences) coded bits. When AL is 1, the length of the coded bit sequence is 10⁸; when AL is 2, the length of the coded bit sequence is 2¹⁶; when AL is 4, the length of the coded bit sequence is 4³²; when AL is 8, the length of the coded bit sequence is 86⁴; and when AL is 16, the length of the coded bit sequence is 172⁸.

[0172] However, the maximum length (i.e., N) of the polar code in the NR standard is 512. When AL is 4, 8, or 16, the length of the polar code used for polar coding is 512. That is, when mapping the information bit sequence corresponding to DCI to the PDCCH candidate set corresponding to AL bits 4, 8, or 16, a codeword sequence of length 512 can be obtained by polar coding the information bit sequence.

[0173] Furthermore, the codeword sequence can be rate-matched to obtain the encoded bit sequence (the length of the encoded bit sequence is determined according to AL), and the encoded bit sequence can be mapped onto the PDCCH candidate set for transmission.

[0174] In one example, when AL is 8 or 16, the codeword sequence can be repeated to obtain the encoded bit sequence. The encoded bit sequence of length E can be determined using the following pseudocode:

[0175] for k=0to k=E-1

[0176] e k =y mod(k,N)

[0177] end for

[0178] When AL is 8, E is 864; when AL is 16, E is 1728. k For the encoded bit sequence, y1, y2, ..., y N Given a codeword sequence, mod(k,N) is the operation modulo N on k.

[0179] In another example, when AL is 4, the first eighty bits of the codeword sequence can be punctured to obtain the encoded bit sequence. That is, the encoded bit sequence of length E can be determined by the following pseudocode:

[0180] for k=0to k=E-1

[0181] e k =y k+N-E

[0182] end for

[0183] AL Mutual Check: Because the NR standard specifies that the maximum mother code length of Polar codes is 512, when the AL is 4, 8, or 16, the mother code length used for encoding is always 512. This causes AL mutual checks to occur when the terminal device performs blind checks. For example, if the network device uses AL 8 to send DCI, the terminal device may also succeed in parsing if it uses AL 16; or, if the network device uses AL 16 to send DCI, the terminal device may also succeed in parsing if it uses AL 8; or, if the network device uses AL 4 to send DCI, the terminal device may also succeed in parsing if it uses AL 8; or, if the network device uses AL 8 to send DCI, the terminal device may also succeed in parsing if it uses AL 4.

[0184] In other words, there might be situations where a high AL (Altered Attribute) is detected as a low AL, or vice versa; this is called AL mutual detection. AL mutual detection can lead to errors in resource determination by the terminal device, causing AL ambiguity.

[0185] Among these issues, AL cross-checking can lead to the following problems:

[0186] Question 1: The time-domain and frequency-domain resources corresponding to the Physical Uplink Control Channel (PUSCH) can be bound to the CCE index of the Allocation Array (AL). Ambiguity in the AL can lead to incorrect resource allocation in the PUCCH. Specifically, after a terminal device determines the DCI in a PDCCH candidate set, it needs to reply with an acknowledgment (ACK) or non-ACK (NACK) to the network device. The resource location corresponding to the ACK / NACK reply can be associated with the last CCE in the PDCCH candidate set, as shown in Figure 5. When the AL of the PDCCH candidate set is 8, the terminal device can transmit an ACK on CCE14 (i.e., multiplying CCE7 by 2 to get CCE14). However, if the terminal device performs blind detection and successfully resolves the AL with 16, it will transmit an ACK on CCE30 (i.e., multiplying CCE15 by 2 to get CCE30), thus causing incorrect resource allocation in the PUCCH.

[0187] Question 2: AL ambiguity can cause terminal devices to determine the PDSCH at incorrect locations (such as time-domain resources or frequency-domain resources). As shown in Figure 6(a), if the DCI sent by the network device uses AL 8, but the terminal device uses AL 16 for blind detection, the resources originally intended for transmitting the PDSCH will be used to parse the PDCCH, resulting in errors in the original PDSCH resource reading. Alternatively, as shown in Figure 6(b), if the DCI sent by the network device uses AL 16, but the terminal device uses AL 8 for blind detection, the terminal device will only parse the information before position 1, resulting in incomplete PDSCH resource reading by the terminal device.

[0188] Question 3: PDSCH may reuse resources from the PDCCH resource set. When the terminal device performs rate matching on PDSCH, it needs to determine the starting position of PDSCH. The starting position of PDSCH is bound to the CCE index (e.g., when AL is determined to be 8, the last CCE in the PDCCH resource set can be determined to be CCE7, and thus the starting position of PDSCH can be determined to be CCE8). Ambiguity of AL will cause the terminal device to fail to perform rate matching. As shown in Figure 7(a), the resources in the dashed line should be resources from the PDCCH resource set, and the other resources are resources associated with PDSCH. When the resources occupied by the PDCCH resource set are small, PDSCH can reuse resources from the PDCCH resource set to improve resource utilization. As shown in Figure 7(b), part of the resources of PDSCH are resources from the PDCCH resource set. In this case, AL needs to be determined to determine the end position of PDCCH, and thus determine the starting position of PDSCH.

[0189] In conclusion, how to reduce the probability of AL ambiguity and thus improve the reliability of communication has become an urgent problem to be solved.

[0190] Therefore, this application provides a communication method, which includes: a network device determining the length E of the output sequence after rate matching according to a target aggregation level, and determining the length N of the polar coding according to E; performing polar coding on the first sequence to obtain a second sequence of length N; performing cyclic shifting on the second sequence to obtain a third sequence; and outputting the third sequence. Wherein, N is an integer power of 2; the first sequence includes information bits and CRC bits; the starting bit of the third sequence is the Y-th bit in the second sequence, where Y is determined according to the target aggregation level.

[0191] In this embodiment of the application, the network device can implicitly indicate the target aggregation level by cyclically shifting the second sequence, thereby reducing signaling overhead. At the same time, the terminal device can perform decyclic shifting based on the target aggregation level during the decoding process to determine the target aggregation level (that is, the terminal device can perform cyclic redundancy check on the decyclic shifted sequence, and if the check is successful, the target aggregation level is determined), which can reduce the probability of AL ambiguity and thus improve the reliability of communication.

[0192] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0193] The communication method provided in this application embodiment can be used in any communication system, such as a 3GPP communication system, for example, a long term evolution (LTE) system, or a 5G mobile communication system, a hybrid LTE and 5G network system, an NR system, an NR vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an Internet of Things (IoT) system, a narrow band Internet of Things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access (CDMA2000) system, or a time division-synchronization code division multiple access (TDMA) system. Access, TD-SCDMA, eMBB, ultra-reliable and low-latency communication (URLLC), enhanced machine-type communication (eMTC), and various types of future communication systems are also included, as well as non-terrestrial network (NTN) systems (such as satellite communication systems), non-3GPP communication systems, etc., without restriction.

[0194] The communication method provided in this application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0195] The communication system provided in the embodiments of this application will be described below with reference to Figure 8.

[0196] Figure 8 is a schematic diagram of a communication system provided in an embodiment of this application. As shown in Figure 8, the communication system may include at least one terminal device and at least one network device.

[0197] In Figure 8, the terminal device can be located within the beam / cell coverage area of ​​the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device, and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device, and the network device is the receiving device). It is understood that when network devices communicate with each other, or when terminal devices communicate with each other, communication can also be based on channel coding; that is, the transmitting and receiving devices can both be network devices or both be terminal devices, without restriction.

[0198] The terminal device in Figure 8 can be a device with wireless transceiver capabilities or a chip or chip system that can be configured on the device. It allows users to access the network and is used to provide voice and / or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

[0199] For example, the terminal device in Figure 8 can be a mobile phone, a tablet computer, or a computer with wireless transceiver capabilities. Terminal equipment can also be user stations, mobile stations, remote stations, remote terminal equipment, mobile terminal equipment, user terminal equipment, wireless communication equipment, user agents, user devices, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices, processing devices connected to wireless modems, in-vehicle equipment, wearable devices, terminal equipment in the Internet of Things (IoT), home appliances, virtual reality (VR) terminals, augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in telemedicine, wireless terminals in smart grids, wireless terminals in smart cities, wireless terminals in smart homes, vehicles with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicles, and UAV-to-UAV communication. Unmanned aerial vehicles (UAVs) with U2U communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs) are not subject to restrictions.

[0200] In Figure 8, the network device can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system that can be configured within such a device, a logical node or module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network device can be either a wired access device or a wireless access device.

[0201] For example, a network device can consist of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, drone stations, wireless backhaul nodes, base band units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network devices can be terrestrial devices or non-terrestrial devices (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, in communication systems employing different wireless access technologies, the names of network devices with base station functions may differ, and this application does not impose any restrictions on this.

[0202] In another example, the network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in the central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

[0203] In another example, the network device can be a device that includes centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

[0204] In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, a DU, and a RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

[0205] It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radio access network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0206] Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

[0207] Optionally, in this embodiment of the application, the transmitting device (or source) and the receiving device (or sink) can encode and decode using the process shown in Figure 9 below. The transmitting device can be any terminal device or network device in the communication system shown in Figure 8, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 8.

[0208] In this process, the transmitting device performs source coding on its generated bits to obtain a source bit stream. Then, it performs channel coding on the source bit stream, modulates it, and transmits the modulated symbols to the receiving device through a noisy channel. When the receiving device receives the modulated symbols through the noisy channel, it demodulates them, performs channel decoding to recover the source bit stream, and then performs source decoding to obtain the decoded result.

[0209] In specific implementation, as shown in Figure 8, each terminal device and network device can adopt the composition structure shown in Figure 10, or include the components shown in Figure 10. Figure 10 is a schematic diagram of the composition of a communication device 100 provided in an embodiment of this application. The communication device 100 can be a terminal device or a chip or system-on-a-chip in a terminal device; it can also be a network device or a chip or system-on-a-chip in a network device. As shown in Figure 10, the communication device 100 includes a processor 1001, a transceiver 1002, and a communication line 1003.

[0210] Furthermore, the communication device 100 may also include a memory 1004. The processor 1001, the memory 1004, and the transceiver 1002 can be connected via a communication line 1003.

[0211] The processor 1001 can be a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 1001 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

[0212] Transceiver 1002 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area network (WLAN), etc. Transceiver 1002 can be a module, circuit, transceiver, or any device capable of enabling communication.

[0213] Communication line 1003 is used to transmit information between the components included in communication device 100.

[0214] Memory 1004 is used to store instructions. These instructions can be computer programs.

[0215] The memory 1004 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and / or instructions; it may also be a random access memory (RAM) or other type of dynamic storage device capable of storing information and / or instructions; it may also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, universal digital optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0216] The memory 1004 can exist independently of the processor 1001 or be integrated with the processor 1001. The memory 1004 can be used to store instructions, program code, or some data. The memory 1004 can be located within or outside the communication device 100, without limitation. The processor 1001 is used to execute the instructions stored in the memory 1004 to implement the communication method provided in the following embodiments of this application.

[0217] In one example, processor 1001 may include one or more CPUs, such as CPU0 and CPU1 in Figure 10.

[0218] As an optional implementation, the communication device 100 may include multiple processors, for example, in addition to the processor 1001 in FIG10, it may also include a processor 1007.

[0219] As an optional implementation, the communication device 100 also includes an output device 1005 and an input device 1006. For example, the input device 1006 is a device such as a keyboard, mouse, microphone or joystick, and the output device 1005 is a device such as a display screen or speaker.

[0220] The communication device 100 may be a desktop computer, a portable computer, a web server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device with a similar structure to that shown in Figure 10. Furthermore, the composition shown in Figure 10 does not constitute a limitation on the communication device. In addition to the components shown in Figure 10, the communication device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0221] In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

[0222] Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

[0223] The communication method provided in the embodiments of this application will be described below with reference to the communication system shown in Figure 8 and Figure 11 below. The network device or terminal device described in the following embodiments may include the components shown in Figure 10.

[0224] Figure 11 is a flowchart of a communication method provided in an embodiment of this application. As shown in Figure 11, the method may include:

[0225] Step 1101: The network device determines the length E of the output sequence after rate matching based on the target aggregation level, and determines the length N of the polar coding based on E.

[0226] Where N is an integer power of 2.

[0227] The E value varies depending on the aggregation level. For example, when the aggregation level is 4, the number of CCEs is 4. Since one CCE can carry 108 coded bits, 4 CCEs can carry 432 coded bits, so the E value is 432. When the aggregation level is 8, the number of CCEs is 8. Since one CCE can carry 108 coded bits, 8 CCEs can carry 864 coded bits, so the E value is 864. When the aggregation level is 16, the number of CCEs is 16. Since one CCE can carry 108 coded bits, 16 CCEs can carry 1728 coded bits, so the E value is 1728.

[0228] For example, a network device can determine the mother code length N = max(min([N]) based on the length K and E of the information bit sequence. M N R N max ]), 32). N M And the bit rate R = K / E and N DM related, If E≤9 / 8×N DM And R < 9 / 16, then N M =N DM / 2; otherwise, N M =N DM N R With K and minimum bitrate R min related, R min = 1 / 8. Nmax =512.

[0229] in, This is for rounding up.

[0230] For example, when the target aggregation level is 4, E can be determined to be 432 and N can be 512; or, when the target aggregation level is 8, E can be determined to be 864 and N can be 512; or, when the target aggregation level is 16, E can be determined to be 1728 and N can be 512.

[0231] In this application, a aggregation level of 4 (i.e., AL=4) can be represented as aggregation level 4, an aggregation level of 8 (i.e., AL=8) can be represented as aggregation level 8, and an aggregation level of 16 (i.e., AL=16) can be represented as aggregation level 16. Similarly, when the aggregation level is other values ​​(such as A), the same representation method can be used (e.g., aggregation level A can be represented as aggregation level A), where A is a positive integer.

[0232] Step 1102: The network device performs polar coding on the first sequence to obtain a second sequence of length N.

[0233] The first sequence includes information bits and CRC bits.

[0234] It is understandable that a network device can implement polar coding on a polar code encoder with a first sequence input of length N, which is equivalent to multiplying the first sequence with a coding matrix of length N to obtain the second sequence.

[0235] The encoding matrix of length N can be obtained by... The result is obtained by performing the Kronecker product log2N times.

[0236] Step 1103: The network device performs a cyclic shift on the second sequence to obtain the third sequence.

[0237] The starting bit of the third sequence is the Y-th bit in the second sequence, where Y is determined according to the target aggregation level.

[0238] It is understood that the starting bit of a sequence can be either the zeroth bit or the first bit. When the starting bit of a sequence is the zeroth bit, the starting bit of the third sequence can be the Yth bit of the second sequence; when the starting bit of a sequence is the first bit, the starting bit of the third sequence can be the Y+1th bit of the second sequence. For ease of description, the starting bit in this application is always the zeroth bit.

[0239] Optionally, the third sequence includes the Y-th bit to the N-1-th bit of the second sequence arranged in sequence, and the 0-th bit to the Y-1-th bit of the second sequence.

[0240] In one example, the second sequence is... For example, assuming Y is N / 2, the third sequence can include the Y-th bit to the (N-1)-th bit of the second sequence arranged in sequence, that is, At the same time, the third sequence includes the 0th bit to the (Y-1)th bit of the second sequence arranged in sequence, that is, Additionally, the third sequence can include the (N-1)th bit of the sequentially arranged second sequence and the 0th bit of the second sequence. Therefore, the third sequence can be...

[0241] In another example, the second sequence is... For example, assuming Y is N / 4, the third sequence includes the Y-th bit to the (N-1)-th bit of the second sequence arranged in sequence, that is, At the same time, the third sequence includes the 0th bit to the (Y-1)th bit of the second sequence arranged in sequence, that is, Additionally, the third sequence can include the (N-1)th bit of the sequentially arranged second sequence and the 0th bit of the second sequence. Therefore, the third sequence can be...

[0242] It is understandable that different aggregation levels correspond to different Y values. For example, if there are aggregation levels 4 and 8, the Y value corresponding to aggregation level 4 can be N / 2, while the Y value corresponding to aggregation level 8 can be 0.

[0243] Optionally, the network device can perform a cyclic shift on the second sequence to obtain the third sequence by multiplying the second sequence with the cyclic shift matrix corresponding to the target aggregation level.

[0244] The network device can determine the cyclic shift matrix corresponding to different aggregation levels based on the step size of the cyclic shift corresponding to different aggregation levels (i.e., Y corresponding to different aggregation levels). For example, taking the step size of the cyclic shift corresponding to the i-th aggregation level as Yi, the third sequence corresponding to the i-th aggregation level can be determined as the third sequence 1 (i.e., the initial bit of the third sequence 1 is the Yi-th bit of the second sequence). Since the second sequence can be multiplied by the cyclic shift matrix corresponding to the i-th aggregation level to obtain the third sequence 1, the cyclic shift matrix corresponding to the i-th aggregation level can be determined based on the second sequence and the third sequence 1.

[0245] Step 1104: The network device outputs the third sequence; correspondingly, the terminal device receives the decoding information from the network device.

[0246] Among them, the length of the polar coding of the information bit sequence corresponding to the information to be decoded is N.

[0247] Among them, the network device can perform rate matching and modulation on the third sequence to obtain a symbol sequence, and send the symbol sequence to the terminal device. When transmitted through the channel, the symbol sequence may be affected by interference such as noise. The information to be decoded received by the terminal device is the symbol sequence affected by interference such as noise.

[0248] For rate matching, the network device can determine the positions of the rate matching bits according to the rate matching method.

[0249] Among them, the rate matching method can be determined according to E and N. For example, if E > N, the rate matching method is determined to be repetition, that is, after the network device sends the third sequence with a length of N, it sends (E - N) more bits (the (E - N) bits are the rate matching bits). If E < N, the network device can determine whether to puncture or shorten according to the current code rate R = K / E. If R < 7 / 16, rate matching is performed in the puncturing manner; otherwise, (N - E) bits are shortened.

[0250] Among them, when determining the positions of the rate matching bits, the third sequence can be equally divided into 32 sub - blocks, and the 32 sub - blocks are interleaved to obtain an interleaved bit sub - channel serial number vector. The interleaving pattern can be as shown in Table 1 below. When the rate matching method is repetition, (E - N) positions are determined from the front to the back of the interleaved bit sub - channel serial number vector as the positions of the rate matching bits; when the rate matching method is shortening, (N - E) positions are selected from the back to the front of the interleaved bit sub - channel serial number vector as the positions of the rate matching bits; when the rate matching method is puncturing, (N - E) positions are selected from the front to the back of the interleaved bit sub - channel serial number vector as the positions of the rate matching bits.

[0251] Table 1

[0252] Among them, i in Table 1 represents the serial number of the sub - block, and P(i) represents the serial number of the bit sub - channel after interleaving.

[0253] Optionally, the terminal device can perform blind detection on the information to be decoded based on one or more of the X aggregation levels. That is, the terminal device can first perform polarization decoding on the information to be decoded, and then perform de-cyclic shifting and cyclic redundancy check on the decoded sequence through one or more of the X aggregation levels. The aggregation level corresponding to the successful check is determined as the target aggregation level. The specific steps can be as shown in steps 1105-1107. Alternatively, the terminal device can first perform de-cyclic shifting on the information to be decoded through one or more of the X aggregation levels, and then perform polarization decoding and cyclic redundancy check on the de-cyclic shifted sequence. The aggregation level corresponding to the successful check is determined as the target aggregation level. The specific steps can be as shown in steps 1108-1110.

[0254] In this context, the length of the polar code corresponding to each of the X aggregation levels is N. That is, for the PDCCH resource set used to carry DCI in the search space, one or more aggregation levels with a polar code length of N corresponding to the PDCCH resource set are determined as X aggregation levels. For example, when the aggregation levels with a polar code length of N corresponding to the PDCCH resource set are aggregation level 4 and aggregation level 8, then the X aggregation levels include aggregation level 4 and aggregation level 8; or, when the aggregation levels with a polar code length of N corresponding to the PDCCH resource set are aggregation level 8 and aggregation level 16, then the X aggregation levels include aggregation level 8 and aggregation level 16; when the aggregation levels with a polar code length of N corresponding to the PDCCH resource set are aggregation level 4, aggregation level 8, and aggregation level 16, then the X aggregation levels include aggregation level 4, aggregation level 8, and aggregation level 16.

[0255] Among them, the X aggregation levels can be predefined (i.e., the X aggregation levels are pre-stored on the terminal device); or, the X aggregation levels can be configured by the network device (the network device sends information indicating the X aggregation levels to the terminal device, and the terminal device can determine the X aggregation levels based on the information).

[0256] For example, information indicating X aggregation levels can be located in radio resource control (RRC) messages or system messages.

[0257] It is understandable that the X aggregation levels include the target aggregation level.

[0258] Step 1105: The terminal device performs polarization decoding on the information to be decoded to obtain a fourth sequence of length N.

[0259] The terminal device can demodulate and rate-match the information to be decoded to obtain the eleventh sequence, and then perform polarization decoding on the eleventh sequence to obtain the fourth sequence of length N.

[0260] Understandably, the terminal device can input the information to be decoded into the polar decoder and perform polar decoding on the information to be decoded. For example, the terminal device can decode the eleventh sequence using the SC decoding algorithm to obtain the fourth sequence, or the terminal device can decode the eleventh sequence using other decoding algorithms to obtain the fourth sequence.

[0261] Step 1106: The terminal device performs a de-cyclic shift on the fourth sequence based on the i-th aggregation level among the X aggregation levels to obtain a fifth sequence of length N.

[0262] Where i is one or more values ​​in [1, X].

[0263] The operation of the terminal device to de-circularly shift the fourth sequence according to the i-th aggregation level can be understood as performing a linear transformation on the fourth sequence according to the i-th aggregation level.

[0264] Optionally, the terminal device can perform a de-cyclic shift on the fourth sequence based on the first matrix corresponding to the i-th aggregation level.

[0265] The first matrix corresponding to the i-th aggregation level is determined based on the step size of the cyclic shift corresponding to the i-th aggregation level. The step size of the cyclic shift can be understood as Y in step 1102 (i.e., the step size of the cyclic shift corresponding to the i-th aggregation is Y corresponding to the i-th aggregation level).

[0266] For example, the first matrix corresponding to the i-th aggregation level can be determined based on the cyclic shift matrix corresponding to the i-th aggregation level and an encoding matrix of length N. The cyclic shift matrix corresponding to the i-th aggregation level can be determined based on the step size of the cyclic shift corresponding to the i-th aggregation level, and the encoding matrix of length N can be determined based on... The result is obtained by performing the Kronecker product log2N times.

[0267] For example, the first matrix corresponding to the i-th aggregation level can satisfy the following formula: T u =G N P c G N , among which, T u Let G be the first matrix corresponding to the i-th aggregation level. N Let P be a coding matrix of length N. c Let be the cyclic shift matrix corresponding to the i-th aggregation level.

[0268] It is understandable that the first matrix corresponding to the i-th aggregation level can be predefined, or the first matrix corresponding to the i-th aggregation level can be configured by the network device without restriction.

[0269] It is understood that the step size of the cyclic shift is different for different aggregation levels. The step size of the cyclic shift for X aggregation levels can be predefined or configured by the network device. This application does not limit this.

[0270] Step 1107: The terminal device performs cyclic redundancy check on the information bits in the fifth sequence, and determines the aggregation level corresponding to the fifth sequence that has been successfully checked as the target aggregation level.

[0271] Based on steps 1106-1107, the terminal device can determine X aggregation levels, select one aggregation level from the X aggregation levels for blind detection, and end the blind detection if the cyclic redundancy check is successful, and continue the blind detection if the cyclic redundancy check fails.

[0272] Specifically, when the aggregation level determined by the terminal device is the i-th aggregation level among X aggregation levels, the fourth sequence can be de-cyclically shifted according to the i-th aggregation level to obtain the fifth sequence, and the information bits in the fifth sequence can be subjected to cyclic redundancy check. If the check is successful, the i-th aggregation level is determined as the target aggregation level; if the check fails, a new aggregation level is determined for blind detection.

[0273] It is understood that the terminal device may select an aggregation level from the X aggregation levels in ascending order for blind testing, or it may select an aggregation level from the X aggregation levels in descending order for blind testing, or it may randomly select an aggregation level from the X aggregation levels for blind testing. This application does not limit this.

[0274] Based on the communication method shown in steps 1105-1107, the terminal device can perform polarization decoding on the information to be decoded and then perform de-cyclic shifting. That is, the terminal device can perform only one decoding operation and determine the target aggregation level by multiple de-cyclic shifts and cyclic redundancy checks, which can reduce the decoding complexity and simplify the implementation.

[0275] Step 1108: The terminal device performs a de-cyclic shift on the sixth sequence based on the i-th aggregation level among the X aggregation levels to obtain the seventh sequence.

[0276] The terminal device can demodulate and derate-match the information to be decoded to obtain the sixth sequence, and then decirculate and shift the sixth sequence according to the i-th aggregation level among the X aggregation levels to obtain the seventh sequence.

[0277] In step 1108, the solution of the circular shift can be understood as a circular shift, that is, the seventh sequence can be obtained by circularly shifting the sixth sequence by Z bits, that is, the initial bit of the seventh sequence is the Zth bit of the sixth sequence.

[0278] Wherein, when Y corresponding to the i-th aggregation level is 0, Z can be 0 (i.e., the seventh sequence is the sixth sequence); when Y corresponding to the i-th aggregation level is not 0, Z can be NY.

[0279] For example, when Y is N / 2, Z can be N / 2; or when Y is N / 4, Z can be (3N) / 4.

[0280] It is understandable that the seventh sequence includes the Zth bit to the N-1th bit of the sixth sequence arranged in sequence, and the 0th bit to the Z-1th bit of the sixth sequence.

[0281] For example, taking the sixth sequence as... For example, assuming Z is N / 2, the seventh sequence includes the Z-th bit to the (N-1)-th bit of the sixth sequence arranged in sequence, that is, At the same time, the seventh sequence includes the 0th bit to the (Z-1)th bit of the sixth sequence arranged in sequence, that is, Furthermore, if the seventh sequence includes the (N-1)th bit and the 0th bit of the sixth sequence arranged in sequence, then the seventh sequence can be...

[0282] Step 1109: The terminal device performs polarization decoding on the seventh sequence to obtain the eighth sequence.

[0283] Step 1109 can be referred to step 1105 above, and will not be repeated here.

[0284] Step 1110: The terminal device performs cyclic redundancy check on the information bits in the eighth sequence, and determines the aggregation level corresponding to the eighth sequence that has been successfully checked as the target aggregation level.

[0285] Based on the communication method shown in steps 1108-1110, the terminal device can determine X aggregation levels. The terminal device can select one aggregation level from the X aggregation levels for blind detection. If the cyclic redundancy check is successful, the blind detection ends; if the cyclic redundancy check fails, the blind detection continues.

[0286] Specifically, the terminal device can determine an aggregation level (such as the i-th aggregation level) from X aggregation levels. It can then perform a decyclic shift on the sixth sequence based on the i-th aggregation level to obtain the seventh sequence, perform polar decoding on the seventh sequence to obtain the eighth sequence, and then perform cyclic redundancy check on the eighth sequence. If the check is successful, the i-th aggregation level is determined as the target aggregation level; if the check fails, a new aggregation level is determined for blind detection.

[0287] It is understood that the terminal device may select an aggregation level from the X aggregation levels in ascending order for blind testing, or it may select an aggregation level from the X aggregation levels in descending order for blind testing, or it may randomly select an aggregation level from the X aggregation levels for blind testing. This application does not limit this.

[0288] Based on the communication method shown in Figure 11, the network device can perform a cyclic shift on the third sequence. This allows the terminal device to de-cyclic shift the sequence corresponding to the information to be decoded before performing cyclic redundancy check (CRC) on the information bits. Simultaneously, the terminal device can de-cyclic shift the sequence corresponding to the information to be decoded according to the Y corresponding to the target aggregation level; otherwise, the CRC check will fail. Therefore, by cyclically shifting the third sequence, the target aggregation level can be implicitly indicated, thereby reducing signaling overhead. Simultaneously, the terminal device can determine the target aggregation level (i.e., the aggregation level corresponding to a successful CRC check is the target aggregation level), reducing the probability of AL ambiguity and thus improving communication reliability.

[0289] Based on the communication method shown in step 1106, T u =G N P c G N The derivation process can be shown below: For the second sequence (The second sequence can be based on the first sequence) With G N Multiplying them together yields the result, i.e. Circular shifting can be represented as: but, When performing the circular shift solution, we can first assume... Row and column transformations correspond to Linear transformation T over a binary field u ,Right now, ( It can be transformed into ), and thus we can obtain G N P c =T u G N Both sides simultaneously multiply by G N T can be obtained u =G N P c G N Therefore, cyclic shifting the second sequence is equivalent to shifting the second sequence to the first sequence. Perform a linear transformation.

[0290] Among them, G N The inverse matrix or G N .

[0291] Based on the communication method shown in Figure 11, optionally, the process of the network device sending DCI can be as shown in Figure 12(a) below. Compared with the process shown in Figure 4(a), a cyclic shift operation is added.

[0292] Specifically, the network device can perform cyclic redundancy check coding on the sequence corresponding to DCI to obtain a first sequence; perform polar coding on the first sequence to obtain a second sequence; perform cyclic shifting on the second sequence according to the target aggregation level to obtain a third sequence; perform rate matching on the third sequence to obtain a rate-matched sequence; modulate the rate-matched sequence to obtain a symbol sequence, and send the symbol sequence to the terminal device.

[0293] Furthermore, the terminal device can receive decoding information from the network device and obtain DCI based on the decoding information. That is, the terminal device can determine multiple aggregation levels corresponding to the search space (multiple aggregation levels may include X aggregation levels, or multiple aggregation levels may include X aggregation levels and one or more aggregation levels other than X aggregation levels), select one aggregation level from the multiple aggregation levels for blind detection, and if the cyclic redundancy check is successful during the blind detection process, the blind detection ends; if the cyclic redundancy check fails, the blind detection continues.

[0294] When the aggregation level determined by the terminal device is one other than the X aggregation levels (this aggregation level can be denoted as the first aggregation level), blind detection based on the first aggregation level does not require de-cyclic shifting. In this case, the process of parsing DCI by the terminal device can be shown in Figure 4(b), that is, the received symbol sequence can be demodulated to obtain the LLR sequence; the LLR sequence can be de-rate matched to obtain the information to be decoded; the information to be decoded can be polarized decoded and cyclic redundancy check can be performed. If the check is successful, the first aggregation level is determined as the target aggregation level and the DCI is output. If the check fails, the aggregation level is re-determined and blind detection is performed.

[0295] Understandably, when blind testing fails based on the first aggregation level and a new aggregation level (such as the second aggregation level, which can be one of the X aggregation levels or one of the multiple aggregation levels other than the X aggregation levels) is determined, the LLR sequence can be de-rate matched based on the second aggregation level. That is, there is no need to re-demodulate, which can improve efficiency and simplify implementation, reducing the complexity of blind testing.

[0296] When the aggregation level determined by the terminal device is one of X aggregation levels (such as the i-th aggregation level among X aggregation levels), blind detection based on the i-th aggregation level requires de-circular shifting. At this time, the process of the terminal device parsing DCI can be shown in Figure 12(b) or Figure 12(c). In Figure 12(b), the terminal device can first perform polarization decoding on the received symbol sequence and then perform de-circular shifting, while in Figure 12(c), the terminal device can first perform de-circular shifting on the received symbol sequence and then perform polarization decoding.

[0297] Specifically, as shown in Figure 12(b), the terminal device can demodulate the information to be decoded to obtain an LLR sequence; perform rate matching on the LLR sequence to obtain an eleventh sequence; perform polarization decoding on the eleventh sequence to obtain a fourth sequence; perform de-cyclic shift on the fourth sequence according to the i-th aggregation level to obtain a fifth sequence; perform cyclic redundancy check on the information bits in the fifth sequence. If the check is successful, the i-th aggregation level is determined as the target aggregation level and the DCI is output. If the check fails, the device returns to de-cyclic shift. That is, the terminal device can determine the j-th aggregation level among the X aggregation levels, perform de-cyclic shift on the fourth sequence, and perform cyclic redundancy check. If the check is successful, the j-th aggregation level is determined as the target aggregation level and the DCI is output. If the check fails, the device continues to return to de-cyclic shift and re-determines an aggregation level among the X aggregation levels for blind detection.

[0298] Where j = 1, 2, ..., X, j is not equal to i.

[0299] It is understandable that if all X aggregation levels fail the cyclic redundancy check, the terminal device can continue to determine one aggregation level from one or more aggregation levels other than X aggregation levels for blind detection. At this time, the process of parsing DCI by the terminal device can be shown in Figure 4(b). The specific parsing process can be referred to the above description of Figure 4(b), which will not be repeated here.

[0300] It is understandable that, in Figure 12(b), the terminal device can sequentially determine one aggregation level from the X aggregation levels in a serial manner, perform de-cyclic shifting and cyclic redundancy check on the fourth sequence until the check is successful, and determine the aggregation level that has been successfully checked as the target aggregation level; or, the terminal device can simultaneously perform de-cyclic shifting and cyclic redundancy check on the fourth sequence according to the X aggregation levels in a parallel manner, and determine the aggregation level that has been successfully checked as the target aggregation level.

[0301] It is understandable that performing de-circular shifting in parallel can improve the working efficiency of terminal devices and reduce latency; while performing de-circular shifting in serial mode can reduce the workload of terminal devices, have lower hardware requirements, and reduce costs.

[0302] Specifically, as shown in Figure 12(c), the terminal device can demodulate the information to be decoded to obtain an LLR sequence; perform rate matching on the LLR sequence to obtain a sixth sequence; perform de-cyclic shift on the sixth sequence according to the i-th aggregation level to obtain a seventh sequence; perform polar decoding on the seventh sequence to obtain an eighth sequence; perform cyclic redundancy check on the information bits in the eighth sequence. If the check is successful, the i-th aggregation level is determined as the target aggregation level and the DCI is output. If the check fails, the device returns to de-cyclic shift. That is, the terminal device can determine the j-th aggregation level among X aggregation levels, perform de-cyclic shift on the information to be decoded to obtain a seventh sequence, perform polar decoding on the seventh sequence, and perform cyclic redundancy check. If the check is successful, the j-th aggregation level is determined as the target aggregation level and the DCI is output. If the check fails, the device returns to de-cyclic shift and re-determines an aggregation level among X aggregation levels for blind detection.

[0303] It is understandable that if all X aggregation levels fail the cyclic redundancy check, the terminal device can continue to determine one aggregation level from one or more aggregation levels other than X aggregation levels for blind detection. At this time, the process of parsing DCI by the terminal device can be shown in Figure 4(b). The specific parsing process can be referred to the above description of Figure 4(b), which will not be repeated here.

[0304] It is understandable that, in Figure 12(c), the terminal device can determine one aggregation level from X aggregation levels in a serial manner, sequentially perform de-cyclic shifting on the information to be decoded to obtain the seventh sequence, perform polar decoding and cyclic redundancy check on the seventh sequence until the check is successful, and determine the aggregation level that has been successfully checked as the target aggregation level; or, the terminal device can simultaneously perform de-cyclic shifting on the information to be decoded according to X aggregation levels in a parallel manner to obtain multiple seventh sequences, perform polar decoding and cyclic redundancy check on the multiple seventh sequences, and determine the aggregation level that has been successfully checked as the target aggregation level.

[0305] It is understandable that performing decyclic shifting in parallel, followed by polarization decoding and cyclic redundancy check, can improve the working efficiency of terminal devices and reduce latency; while performing polarization decoding serially, followed by polarization decoding and cyclic redundancy check, can reduce the workload of terminal devices, have lower hardware requirements, and reduce costs.

[0306] Optionally, Y can be determined based on N and the first value.

[0307] Wherein, the first value is an integer power of 2, and the first value is greater than or equal to X.

[0308] For example, Y can satisfy the following formula: Y = (t × N) / 2 m Where t is an integer less than the first value and greater than or equal to 0, 2 m The first value, 2 m Greater than or equal to X.

[0309] For example, taking X as 2, 2 m It can be greater than or equal to 2 (e.g., 2). m (It can be 2, 4, 8, ...), let's assume 2. m If t is 2, and t can take the values ​​0 and 1, then Y can be 0 or N / 2; or, suppose 2 m If t is 4, and t can take the values ​​0, 1, 2, and 3, then Y can be 0, N / 4, N / 2, or (3N) / 4.

[0310] For example, if X is 3, then 2 m It can be greater than or equal to 3 (e.g., 2). m (Can be 4, 8, ...), assuming 2 m If t is 4, and t can take the values ​​0, 1, 2, and 3, then Y can be 0, N / 4, N / 2, or (3N) / 4.

[0311] For example, if X is 4, then 2 m It can be greater than or equal to 4 (e.g., 2). m (Can be 4, 8, ...), assuming 2 m If t is 4, and t can take the values ​​0, 1, 2, and 3, then Y can be 0, N / 4, N / 2, or (3N) / 4.

[0312] For example, if X is 5, then 2 m It can be greater than or equal to 5 (e.g., 2). m (Can be 8, 16, ...), assuming 2 m If t is 8, then t can take the values ​​0, 1, 2, and 3. Therefore, Y can be 0, N / 8, N / 4, (3N) / 8, N / 2, (5N) / 8, (3N) / 4, or (7N) / 8.

[0313] Among them, the Y corresponding to each of the X aggregation levels is different.

[0314] Optionally, Y corresponding to X aggregation levels can be predefined; or Y corresponding to X aggregation levels can be configured by the network device.

[0315] For example, a network device can send first information to a terminal device. The first information is used to indicate Y corresponding to X aggregation levels. The first information can be located in an RRC message or a system message.

[0316] It is understandable that when Y corresponding to X aggregation levels is predefined, signaling overhead can be reduced; when Y corresponding to X aggregation levels is configured by network devices, Y corresponding to X aggregation levels can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of determining Y corresponding to X aggregation levels.

[0317] Based on the above description of Y, this application proposes several possible designs:

[0318] The first possible design assumes that when X is less than or equal to 2, the first value is 2 (i.e., m is 1, 2). m Y can be 0, or Y can be N / 2.

[0319] In the first example, when the X aggregation levels include aggregation level 4 and aggregation level 8, the Y corresponding to aggregation level 8 can be 0; the Y corresponding to aggregation level 4 can be N / 2. Alternatively, the Y corresponding to aggregation level 4 can be 0; the Y corresponding to aggregation level 8 can be N / 2.

[0320] It is understandable that, taking Y as 0 for aggregation level 8 and Y as N / 2 for aggregation level 4 as an example, when the target aggregation level is aggregation level 4, the initial bit of the third sequence is the N / 2th bit of the second sequence; when the target aggregation level is aggregation level 8, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which point the second and third sequences are the same).

[0321] For example, let the 0th bit to the N / 2-1th bit of the second sequence be C1 (i.e., C1 can be...). The N / 2th to N-1th bits of the second sequence are C2 (i.e., C2 can be any two bits). For example, the third sequence corresponding to aggregation level 4 can be C2C1, and the third sequence corresponding to aggregation level 8 can be C1C2, as shown in Figure 13 below. In this case, the initial bit of the third sequence corresponding to aggregation level 8 is the initial bit of C1, and the initial bit of the third sequence corresponding to aggregation level 4 is the initial bit of C2.

[0322] In the second example, when the X aggregation levels include aggregation level 8 and aggregation level 16, the Y corresponding to aggregation level 8 can be 0; the Y corresponding to aggregation level 16 can be N / 2. Alternatively, the Y corresponding to aggregation level 16 can be 0; the Y corresponding to aggregation level 8 can be N / 2.

[0323] It is understandable that, taking Y as 0 for aggregation level 8 and Y as N / 2 for aggregation level 16 as an example, when the target aggregation level is aggregation level 8, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which time the second sequence and the third sequence are the same); when the target aggregation level is aggregation level 16, the initial bit of the third sequence is the N / 2th bit of the second sequence.

[0324] For example, let the 0th bit to the N / 2-1th bit of the second sequence be C1 (i.e., C1 can be...). The N / 2th to N-1th bits of the second sequence are C2 (i.e., C2 can be any two bits). For example, the third sequence corresponding to aggregation level 8 can be C1C2, and the third sequence corresponding to aggregation level 16 can be C2C1, as shown in Figure 14 below. In this case, the initial bit of the third sequence corresponding to aggregation level 8 is the initial bit of C1, and the initial bit of the third sequence corresponding to aggregation level 16 is the initial bit of C2.

[0325] In the third example, when the X aggregation levels include aggregation level 4 and aggregation level 16, the Y corresponding to aggregation level 4 can be 0; the Y corresponding to aggregation level 16 can be N / 2. Alternatively, the Y corresponding to aggregation level 16 can be 0; the Y corresponding to aggregation level 4 can be N / 2.

[0326] It is understandable that, taking Y as 0 for aggregation level 4 and Y as N / 2 for aggregation level 16 as an example, when the target aggregation level is aggregation level 4, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which point the second and third sequences are the same); when the target aggregation level is aggregation level 16, the initial bit of the third sequence is the N / 2th bit of the second sequence.

[0327] For example, let the 0th bit to the N / 2-1th bit of the second sequence be C1 (i.e., C1 can be...). The N / 2th to N-1th bits of the second sequence are C2 (i.e., C2 can be any two bits). For example, the third sequence corresponding to aggregation level 4 can be C1C2, and the third sequence corresponding to aggregation level 16 can be C2C1, as shown in Figure 15 below. In this case, the initial bit of the third sequence corresponding to aggregation level 4 is the initial bit of C1, and the initial bit of the third sequence corresponding to aggregation level 16 is the initial bit of C2.

[0328] The second possible design assumes that when X is greater than 2 and less than or equal to 4, the first value is 4 (i.e., m is 2, 2). mY can be any of the following: 0, N / 4, N / 2, or (3N) / 4.

[0329] In the first example, when the X aggregation levels include aggregation level 4, aggregation level 8, and aggregation level 16, the Y corresponding to aggregation level 8 can be 0; the Y corresponding to aggregation level 4 can be N / 4; and the Y corresponding to aggregation level 16 can be N / 2.

[0330] It is understandable that when the target aggregation level is aggregation level 4, the initial bit of the third sequence is the N / 4th bit of the second sequence; when the target aggregation level is aggregation level 8, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which point the second and third sequences are the same); when the target aggregation level is aggregation level 16, the initial bit of the third sequence is the N / 2th bit of the second sequence.

[0331] For example, let C1 be the 0th bit to the N / 4-1th bit of the second sequence (i.e., C1 can be...). The N / 4th bit to the N / 2-1th bit of the second sequence is C2 (i.e., C2 can be any bit). The second sequence, from the N / 2th bit to the (3N) / 4-1th bit, is C3 (i.e., C3 can be...). The (3N) / 4th to (N-1)th bits of the second sequence are C4 (i.e., C4 can be...). For example, the third sequence corresponding to aggregation level 4 can be C2C3C4C1, the third sequence corresponding to aggregation level 8 can be C1C2C3C4, and the third sequence corresponding to aggregation level 16 can be C3C4C1C2, as shown in Figure 16 below. In this case, the initial bit of the third sequence corresponding to aggregation level 4 is the initial bit of C2, the initial bit of the third sequence corresponding to aggregation level 8 is the initial bit of C1, and the initial bit of the third sequence corresponding to aggregation level 16 is the initial bit of C3.

[0332] In the second example, when the X aggregation levels include aggregation level 8, aggregation level 16, and aggregation level 32, the Y corresponding to aggregation level 8 can be 0, the Y corresponding to aggregation level 16 can be N / 2, and the Y corresponding to aggregation level 32 can be (3N) / 4.

[0333] It is understandable that when the target aggregation level is aggregation level 8, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which point the second and third sequences are the same); when the target aggregation level is aggregation level 16, the initial bit of the third sequence is the N / 2th bit of the second sequence; when the target aggregation level is aggregation level 32, the initial bit of the third sequence is the (3N) / 4th bit of the second sequence.

[0334] For example, let C1 be the 0th bit to the N / 4-1th bit of the second sequence (i.e., C1 can be...). The N / 4th bit to the N / 2-1th bit of the second sequence is C2 (i.e., C2 can be any bit). The second sequence, from the N / 2th bit to the (3N) / 4-1th bit, is C3 (i.e., C3 can be...). The (3N) / 4th to (N-1)th bits of the second sequence are C4 (i.e., C4 can be...). For example, the third sequence corresponding to aggregation level 8 can be C1C2C3C4, the third sequence corresponding to aggregation level 16 can be C3C4C1C2, and the third sequence corresponding to aggregation level 32 can be C4C1C2C3, as shown in Figure 17 below. In this case, the initial bit of the third sequence corresponding to aggregation level 8 is the initial bit of C1, the initial bit of the third sequence corresponding to aggregation level 16 is the initial bit of C3, and the initial bit of the third sequence corresponding to aggregation level 32 is the initial bit of C4.

[0335] In the third example, when the X aggregation levels include aggregation level 4, aggregation level 8, aggregation level 16, and aggregation level 32, the Y corresponding to aggregation level 8 can be 0, the Y corresponding to aggregation level 4 can be N / 4, the Y corresponding to aggregation level 16 can be N / 2, and the Y corresponding to aggregation level 32 can be (3N) / 4.

[0336] It is understandable that when the target aggregation level is aggregation level 4, the initial bit of the third sequence is the N / 4th bit of the second sequence; when the target aggregation level is aggregation level 8, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which point the second and third sequences are the same); when the target aggregation level is aggregation level 16, the initial bit of the third sequence is the N / 2th bit of the second sequence; and when the target aggregation level is aggregation level 32, the initial bit of the third sequence is the (3N) / 4th bit of the second sequence.

[0337] For example, let C1 be the 0th bit to the N / 4-1th bit of the second sequence (i.e., C1 can be...). The N / 4th bit to the N / 2-1th bit of the second sequence is C2 (i.e., C2 can be any bit). The second sequence, from the N / 2th bit to the (3N) / 4-1th bit, is C3 (i.e., C3 can be...). The (3N) / 4th to (N-1)th bits of the second sequence are C4 (i.e., C4 can be...). For example, the third sequence corresponding to aggregation level 4 can be C2C3C4C1, the third sequence corresponding to aggregation level 8 can be C1C2C3C4, the third sequence corresponding to aggregation level 16 can be C3C4C1C2, and the third sequence corresponding to aggregation level 32 can be C4C1C2C3, as shown in Figure 18 below. In this case, the initial bit of the third sequence corresponding to aggregation level 4 is the initial bit of C2, the initial bit of the third sequence corresponding to aggregation level 8 is the initial bit of C1, the initial bit of the third sequence corresponding to aggregation level 16 is the initial bit of C3, and the initial bit of the third sequence corresponding to aggregation level 32 is the initial bit of C4.

[0338] The third possible design assumes that when X is greater than 4 and less than or equal to 8, the first value is 8 (i.e., m is 3, 2). m Y can be any of the following: 0, N / 8, N / 4, (3N) / 8, N / 2, (5N) / 8, (3N) / 4, or (7N) / 8.

[0339] For example, when X aggregation levels include aggregation level 4, aggregation level 8, aggregation level 16, aggregation level 32, and aggregation level 64, the Y corresponding to aggregation level 8 can be 0, the Y corresponding to aggregation level 4 can be N / 4, the Y corresponding to aggregation level 16 can be N / 2, the Y corresponding to aggregation level 32 can be (3N) / 4, and the Y corresponding to aggregation level 64 can be (7N) / 8.

[0340] It is understandable that when the target aggregation level is aggregation level 4, the initial bit of the third sequence is the N / 4th bit of the second sequence; when the target aggregation level is aggregation level 8, the initial bit of the third sequence is the 0th bit of the second sequence (i.e., the initial bit of the second sequence, at which point the second and third sequences are the same); when the target aggregation level is aggregation level 16, the initial bit of the third sequence is the N / 2th bit of the second sequence; when the target aggregation level is aggregation level 32, the initial bit of the third sequence is the (3N) / 4th bit of the second sequence; and when the target aggregation level is aggregation level 64, the initial bit of the third sequence is the (7N) / 8th bit of the second sequence.

[0341] For example, let C1 be the 0th bit to the N / 8-1th bit of the second sequence (i.e., C1 can be...). The N / 8th to N / 4-1th bits of the second sequence are C2 (i.e., C2 can be any bit). The N / 4th bit to the (3N) / 8-1th bit of the second sequence is C3 (i.e., C3 can be...). The (3N) / 8th bit to the N / 2-1th bit of the second sequence is C4 (i.e., C4 can be...). The second sequence, from the N / 2th bit to the (5N) / 8-1th bit, is C5 (i.e., C5 can be...). The (5N) / 8th to (3N) / 4-1th bits of the second sequence are C6 (i.e., C6 can be...). The (3N) / 4th to (7N) / 8-1th bits of the second sequence are C7 (i.e., C7 can be...). The (7N) / 8th to (N-1)th bits of the second sequence are C8 (i.e., C8 can be...). For example, the third sequence corresponding to aggregation level 4 can be C3C4C5C6C7C8C1C2, the third sequence corresponding to aggregation level 8 can be C1C2C3C4C5C6C7C8, the third sequence corresponding to aggregation level 16 can be C5C6C7C8C1C2C3C4, and the third sequence corresponding to aggregation level 32 can be C7C8C1C2C3C4C5C6, as shown in Figure 19 below. At this time, the initial bit of the third sequence corresponding to aggregation level 4 is the initial bit of C3, the initial bit of the third sequence corresponding to aggregation level 8 is the initial bit of C1, the initial bit of the third sequence corresponding to aggregation level 16 is the initial bit of C5, the initial bit of the third sequence corresponding to aggregation level 32 is the initial bit of C7, and the initial bit of the third sequence corresponding to aggregation level 64 is the initial bit of C8.

[0342] It is understood that the Y corresponding to different aggregation levels in the above three possible designs are merely examples, and this application does not limit them.

[0343] Based on the above description of Y corresponding to the aggregation level, Z corresponding to the aggregation level (i.e. Z in step 1108) can be determined according to Y corresponding to the aggregation level.

[0344] Optionally, when Y corresponding to the aggregation level is 0, Z corresponding to the aggregation level is 0; when Y corresponding to the aggregation level is not 0, Z corresponding to the aggregation level is NY.

[0345] For example, when Y is not 0, if Y = (t × N) / 2 m Z can be N-(t×N) / 2 m .

[0346] For example, taking X aggregation levels including aggregation level 4 (where Y is N / 2) and aggregation level 8 (where Y is 0), Z for aggregation level 4 can be N / 2, and Z for aggregation level 8 can be 0.

[0347] For example, taking X aggregation levels including aggregation level 16 (where Y is N / 2 for aggregation level 4) and aggregation level 8 (where Y is 0 for aggregation level 8), Z for aggregation level 16 can be N / 2, and Z for aggregation level 8 can be 0.

[0348] For example, taking X aggregation levels including aggregation level 4 (Y corresponding to aggregation level 4 is N / 4), aggregation level 16 (Y corresponding to aggregation level 4 is N / 2), and aggregation level 8 (Y corresponding to aggregation level 8 is 0), the Z corresponding to aggregation level 4 can be (3N) / 4, the Z corresponding to aggregation level 16 can be N / 2, and the Z corresponding to aggregation level 8 can be 0.

[0349] It is understandable that different aggregation levels correspond to different Z values.

[0350] Unlike mapping X aggregation levels one-to-one with different Y values, this application also proposes a communication method that maps X aggregation levels one-to-one with different CRC leader sequences (so that different aggregation levels correspond to different CRC leader sequences). This allows the terminal device to perform cyclic redundancy check on the information bits using the CRC leader sequence corresponding to the i-th aggregation level, and determines the i-th aggregation level that passes the check as the target aggregation level. The specific steps are shown in Figure 20 below.

[0351] Step 2001: The network device determines the CRC lead sequence corresponding to the target aggregation level based on the target aggregation level.

[0352] There can be X aggregation levels, including the target aggregation level. The description of the X aggregation levels is similar to that above and will not be repeated here.

[0353] Among them, the CRC leader sequences corresponding to the X aggregation levels are different.

[0354] In one example, taking X aggregation levels including aggregation level 4, aggregation level 8, and aggregation level 16 as an example, the CRC leader sequence corresponding to aggregation level 4 can be 110011001001010110100101, the CRC leader sequence corresponding to aggregation level 8 can be 010110100111000010001001, and the CRC leader sequence corresponding to aggregation level 16 can be 001110011100110001100100.

[0355] In another example, taking X aggregation levels including aggregation level 8 and aggregation level 16 as an example, the CRC leading sequence corresponding to aggregation level 8 can be 1, and the CRC leading sequence corresponding to aggregation level 16 can be 0. Alternatively, the CRC leading sequence corresponding to aggregation level 16 can be 1, and the CRC leading sequence corresponding to aggregation level 8 can be 0.

[0356] The CRC lead sequences corresponding to the X aggregation levels are either predefined or configured by the network device, and there are no restrictions.

[0357] Understandably, when the CRC pre-sequences corresponding to the X aggregation levels are predefined, signaling overhead can be reduced; when the CRC pre-sequences corresponding to the X aggregation levels are configured by the network device, the CRC pre-sequences corresponding to the X aggregation levels can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of determining the CRC pre-sequences corresponding to the X aggregation levels.

[0358] Optionally, the CRC leader sequences corresponding to the X aggregation levels can be mutually orthogonal.

[0359] For example, taking a CRC leader sequence with 1 bit as an example, assuming there are X aggregation levels including aggregation level 8 and aggregation level 16, then the CRC leader sequence corresponding to aggregation level 8 can be 1, and the CRC leader sequence corresponding to aggregation level 16 can be 0. That is, 1 and 0 are orthogonal to each other.

[0360] Step 2002: The network device performs cyclic redundancy check encoding on the information bits to obtain the ninth sequence.

[0361] The ninth sequence includes information bits and CRC bits; the CRC bits are determined based on the CRC lead sequence and information bits corresponding to the target aggregation level.

[0362] The number of CRC bits is the same as the number of bits in the CRC leader sequence.

[0363] This application proposes two possible designs for determining the ninth sequence:

[0364] The first possible design, taking a target aggregation level with a CRC leader sequence of length L and an information bit sequence of length K (in this case, the information bit sequence only includes the information bits themselves) as an example, can concatenate the CRC leader sequence of length L corresponding to the target aggregation level to the information bit sequence of length K (such as b0, b1, ..., b...). K-1 Before the given sequence, we obtain sequence 1 of length K+L. The remainder obtained by dividing sequence 1 by a CRC polynomial of length L determines the CRC bit sequence (e.g., p0, p1, ..., p...). L-1Therefore, the ninth sequence can be determined as: b0, b1, ..., b K-1 ,p0,p1,…,p L-1 .

[0365] The second possible design, taking a target aggregation level with a CRC leader sequence of length L and an information bit sequence of length K (in this case, the information bit sequence only includes the information bits themselves) as an example, concatenates the CRC leader sequence of length L to the beginning of the all-zero sequence of length K, resulting in sequence 2 of length K+L. Multiplying sequence 2 by the CRC encoding matrix yields sequence 3 of length K+L. The last L bits of sequence 3 are used as the CRC mask sequence (e.g., m0, m1, ..., m...). L-1 ), can be m0, m1, ..., m L-1 With p0, p1, ..., p L-1 (p0,p1,…,p L-1 The determination of the sequence can be performed by performing an XOR operation (referring to the first possible design mentioned above), thereby determining the ninth sequence as:

[0366] in, This represents the XOR operation.

[0367] It is understandable that when the target aggregation level is different, the CRC lead sequence corresponding to the target aggregation level is different, and the ninth sequence obtained by cyclic redundancy check encoding the same information bits is different.

[0368] For example, taking two information bits as an example, assuming the CRC leader sequence corresponding to the target aggregation level is 0, when the information bit is 00, the CRC bit can be determined to be 0, and the ninth sequence can be 000; when the information bit is 01, the CRC bit can be determined to be 1, and the ninth sequence can be 011; when the information bit is 10, the CRC bit can be determined to be 1, and the ninth sequence can be 101; when the information bit is 11, the CRC bit can be determined to be 0, and the ninth sequence can be 110. Alternatively, assuming the CRC leader sequence corresponding to the target aggregation level is 1, when the information bit is 00, the CRC bit can be determined to be 1, and the ninth sequence can be 001; when the information bit is 01, the CRC bit can be determined to be 0, and the ninth sequence can be 010; when the information bit is 10, the CRC bit can be determined to be 0, and the ninth sequence can be 100; when the information bit is 11, the CRC bit can be determined to be 1, and the ninth sequence can be 111. This can be further illustrated in Table 2 below.

[0369] Table 2

[0370] It can be seen that the ninth sequences corresponding to different CRC leader sequences have no overlap.

[0371] Step 2003: The network device outputs the ninth sequence; correspondingly, the terminal device receives the information to be decoded.

[0372] Step 2003 can be referred to step 1104 above, and will not be repeated here.

[0373] Step 2004: The terminal device decodes the information to be decoded to obtain the tenth sequence.

[0374] The tenth sequence includes information bits and cyclic redundancy check bits.

[0375] Step 2004 can be referred to step 1105 above, and will not be repeated here.

[0376] Step 2005: The terminal device performs cyclic redundancy check on the information bits in the tenth sequence according to the CRC leader sequence corresponding to the i-th aggregation level among the X aggregation levels, and determines the aggregation level corresponding to the tenth sequence that has been successfully checked as the target aggregation level.

[0377] The terminal device can determine X aggregation levels, select one aggregation level from the X aggregation levels for blind testing, and end the blind test if the cyclic redundancy check is successful; if the cyclic redundancy check fails, the blind test continues.

[0378] Specifically, when the terminal device determines the aggregation level as the i-th aggregation level among X aggregation levels, it can perform cyclic redundancy check on the information bits in the tenth sequence according to the CRC leader sequence corresponding to the i-th aggregation level. If the check is successful, the i-th aggregation level is determined as the target aggregation level; if the check fails, a new aggregation level is selected for cyclic redundancy check.

[0379] Understandably, when determining an aggregation level from X aggregation levels for blind testing again, only cyclic redundancy check can be performed, without needing to execute the above steps 2004-2005, in order to simplify implementation and reduce the complexity of blind testing.

[0380] This application proposes two possible designs for cyclic redundancy check:

[0381] The first possible design, taking the length of the CRC leader sequence corresponding to the target aggregation level as L and the length of the information bit sequence as K (in this case, the information bit sequence only includes the information bits themselves) as an example, assumes that the ninth sequence is b0, b1, ..., b K-1 ,p0,p1,…,p L-1 The terminal device can concatenate the CRC leader sequence corresponding to the target aggregation level to the information bit sequence corresponding to the tenth sequence (such as b0, b1, ..., b). K-1Before the given sequence, we obtain a sequence 1' of length K+L. The remainder obtained by dividing sequence 1' by a CRC polynomial of length L determines the CRC bit sequence (e.g., p0′, p1′, ..., p...). L-1 When p0′, p1′, ..., p′), L-1 ′ and p0,p1,…,p L-1 If they are the same, the cyclic redundancy check can be confirmed as successful; when p0′, p1′, ..., p L-1 ′ and p0,p1,…,p L-1 If they are not the same, it can be determined that the cyclic redundancy check has failed.

[0382] Where p0, p1, ..., p L-1 For p0, p1, ..., p in the first possible design in step 2002 above L-1 .

[0383] In the second possible design, taking the length of the CRC leader sequence corresponding to the target aggregation level as L and the length of the information bit sequence as K (in this case, the information bit sequence only includes the information bits themselves) as an example, assuming the ninth sequence is... The terminal device can concatenate the CRC leader sequence corresponding to the target aggregation level to the beginning of a sequence of all zeros of length K, resulting in a sequence 2' of length K+L. Multiplying sequence 2' by the CRC encoding matrix yields a sequence 3' of length K+L. The last L bits of sequence 3' are then used as the CRC mask sequence (e.g., m0′, m1′, ..., m...). L-1 ′), which can be m0′,m1′,…,m L-1 p' and p0', p1', ..., p L-1 ′(p0′,p1′,…,p L-1 The value of ′ can be determined by performing an XOR operation (referring to the first possible design mentioned above), which yields the result. when and If they are the same, the cyclic redundancy check can be confirmed as successful; when and If they are not the same, it can be determined that the cyclic redundancy check has failed.

[0384] in, For the second possible design in step 2002 above

[0385] It is understandable that the terminal device can perform cyclic verification by sequentially determining one aggregation level from X aggregation levels in a serial manner, or it can perform cyclic redundancy verification simultaneously based on X aggregation levels in a parallel manner, without any restriction.

[0386] Based on the communication method shown in Figure 20, the network device can perform cyclic redundancy check (CRC) encoding on the information bits according to the CRC pre-sequence corresponding to the target aggregation level to determine the CRC bits. This ensures that the terminal device must perform CRC check on the information bits using the CRC pre-sequence corresponding to the target aggregation level; otherwise, the check will fail. Therefore, performing CRC encoding based on the CRC pre-sequence corresponding to the target aggregation level implicitly indicates the target aggregation level, thereby reducing signaling overhead. Simultaneously, it allows the terminal device to determine the target aggregation level, reducing the probability of AL ambiguity and thus improving communication reliability.

[0387] Unlike the implicit indication of the target aggregation level in Figures 11 and 20, this application also proposes a communication method that explicitly indicates the target aggregation level by carrying first indication information in the DCI, so that the terminal device can determine the target aggregation level based on the first indication information. The specific steps are shown in Figure 21 below:

[0388] Step 2101: Network device obtains DCI.

[0389] DCI includes the first indication information.

[0390] The first indication information is used to indicate the target aggregation level.

[0391] The number of bits occupied by the first indication information can be determined based on X aggregation levels.

[0392] The X aggregation levels can be referred to in the above description of the X aggregation levels, and will not be repeated here.

[0393] Optionally, the first indication information may occupy one or more bits.

[0394] For example, the number of bits occupied by the first indication information can be greater than or equal to This indicates rounding up to the nearest integer.

[0395] For example, when X is 2, the number of bits occupied by the first indication information can be 1; when X is 3, the number of bits occupied by the first indication information can be 2; when X is 4, the number of bits occupied by the first indication information can be 2; when X is 5, the number of bits occupied by the first indication information can be 3.

[0396] Understandably, the number of bits occupied by the first indication information can be dynamically determined according to the actual communication scenario or communication situation, which can improve the flexibility of the first indication information in indicating the aggregation level.

[0397] Based on the above description of the first instruction information, this application proposes several possible embodiments:

[0398] In a first possible embodiment, taking X aggregation levels including aggregation level 8 and aggregation level 16 as an example, the number of bits occupied by the first indication information can be 1. When the bit value is 0, it can indicate that the target aggregation level is aggregation level 8; when the bit value is 1, it can indicate that the target aggregation level is aggregation level 16. Alternatively, when the bit value is 1, it can indicate that the target aggregation level is aggregation level 8; when the bit value is 0, it can indicate that the target aggregation level is aggregation level 16.

[0399] In a second possible embodiment, taking X aggregation levels including aggregation level 4 and aggregation level 8 as an example, the number of bits occupied by the first indication information can be 1. When the bit value is 0, it can indicate that the target aggregation level is aggregation level 8; when the bit value is 1, it can indicate that the target aggregation level is aggregation level 4. Alternatively, when the bit value is 1, it can indicate that the target aggregation level is aggregation level 8; when the bit value is 0, it can indicate that the target aggregation level is aggregation level 4.

[0400] In a third possible embodiment, taking X aggregation levels including aggregation level 4 and aggregation level 16 as an example, the number of bits occupied by the first indication information can be 1. When the bit value is 0, it can indicate that the target aggregation level is aggregation level 16; when the bit value is 1, it can indicate that the target aggregation level is aggregation level 4. Alternatively, when the bit value is 1, it can indicate that the target aggregation level is aggregation level 16; when the bit value is 0, it can indicate that the target aggregation level is aggregation level 4.

[0401] In the fourth possible embodiment, taking X aggregation levels including aggregation level 4, aggregation level 8, and aggregation level 16 as an example, the number of bits occupied by the first indication information can be 2. When the bit value is 00, it can indicate that the target aggregation level is aggregation level 8; when the bit value is 01, it can indicate that the target aggregation level is aggregation level 16; and when the bit value is 10, it can indicate that the target aggregation level is aggregation level 4.

[0402] In the fifth possible embodiment, taking X aggregation levels including aggregation level 4, aggregation level 8, aggregation level 16, and aggregation level 32 as an example, the number of bits occupied by the first indication information can be 2. When the bit value is 00, it can indicate that the target aggregation level is aggregation level 8; when the bit value is 01, it can indicate that the target aggregation level is aggregation level 16; when the bit value is 10, it can indicate that the target aggregation level is aggregation level 4; and when the bit value is 11, it can indicate that the target aggregation level is aggregation level 32.

[0403] Optionally, one or more bits can be added to the end of the DCI to carry the first indication information. When the first indication information occupies one bit, the structure of the DCI can be as shown in Table 3 below:

[0404] Table 3

[0405] When the first indication information occupies two bits, the structure of DCI can be shown in Table 4 below:

[0406] Table 4

[0407] Understandably, without changing other fields in the DCI, a new field can be added at the end of the DCI to carry the first indication information, which simplifies the implementation.

[0408] Step 2102: The network device sends the DCI; correspondingly, the terminal device receives the DCI.

[0409] Step 2103: The terminal device determines the target aggregation level based on the first instruction information.

[0410] It is understandable that the terminal device can determine the target aggregation level based on the bit value corresponding to the first indication information.

[0411] Based on the communication method shown in Figure 20, a new field can be added to the DCI to carry the first indication information, so as to explicitly indicate the target aggregation level. This allows the terminal device to directly determine the target aggregation level based on the first indication information, which can reduce the probability of AL ambiguity, thereby improving the reliability of communication and simplifying implementation.

[0412] Based on the communication methods shown in Figures 11, 20, and 21 above, these three communication methods can be used in combination or independently, and this application does not limit this.

[0413] For example, the communication methods shown in Figures 11 and 21 can be used in combination, that is, the first indication information can be carried in the DCI, and the encoding sequence corresponding to the DCI can be cyclically shifted according to the target aggregation level; or, the communication methods shown in Figures 20 and 21 can be used in combination, that is, the first indication information can be carried in the DCI, and the CRC bit corresponding to the DCI can be determined according to the CRC leader sequence corresponding to the target aggregation level; or, the communication methods shown in Figures 11 and 20 can be used in combination, that is, the CRC bit corresponding to the DCI can be determined according to the CRC leader sequence corresponding to the target aggregation level, and the encoding sequence corresponding to the DCI can be cyclically shifted according to the target aggregation level; or, the communication methods shown in Figures 11, 20, and 21 can be used in combination, that is, the first indication information can be carried in the DCI, the CRC bit corresponding to the DCI can be determined according to the CRC leader sequence corresponding to the target aggregation level, and the encoding sequence corresponding to the DCI can be cyclically shifted according to the target aggregation level. The specific steps can be referred to the communication methods shown in Figures 11, 20, and 21 above, and will not be repeated here.

[0414] The various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict of logic, the terminology and / or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0415] It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

[0416] The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art will readily recognize that, based on the algorithmic steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0417] This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. In addition, the module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0418] When each function is divided into functional modules, Figure 22 shows a network device 220. The network device 220 can perform the actions performed by the network device in the methods shown in Figures 11, 20, or 21. All relevant content of each step involved in the above method embodiments can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiments, and will not be repeated here.

[0419] The network device 220 may include a transceiver module 2201 and a processing module 2202. Exemplarily, the network device 220 may be a communication device, or a chip or other combination of devices or components with the aforementioned network device functions applied in a communication device. When the network device 220 is a communication device, the transceiver module 2201 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 2202 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the network device 220 is a component with the aforementioned network device functions, the transceiver module 2201 may be a radio frequency unit; the processing module 2202 may be a processor (or processing circuit), such as a baseband processor. When the network device 220 is a chip system, the transceiver module 2201 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 2202 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 2201 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 2202 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0420] For example, transceiver module 2201 can be used to perform all transceiver operations performed by the network device in the embodiments shown in FIG11, FIG20, or FIG21, and / or to support other processes of the technology described herein; processing module 2202 can be used to perform all operations other than transceiver operations performed by the network device in the embodiments shown in FIG11, FIG20, or FIG21, and / or to support other processes of the technology described herein.

[0421] Figure 23 shows a terminal device 230, which can perform the actions performed by the terminal device in the methods shown in Figures 11, 20, or 21. All relevant content of each step involved in the above method embodiments can be referred to the functional description of the corresponding functional module, and the technical effects that can be obtained can be referred to the above method embodiments, which will not be repeated here.

[0422] The terminal device 230 may include a transceiver module 2301 and a processing module 2302. Exemplarily, the terminal device 230 may be a communication device, or a chip or other combination device or component having the aforementioned terminal device functions applied in a communication device. When the terminal device 230 is a communication device, the transceiver module 2301 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 2302 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the terminal device 230 is a component having the aforementioned terminal device functions, the transceiver module 2301 may be a radio frequency unit; the processing module 2302 may be a processor (or processing circuit), such as a baseband processor. When the terminal device 230 is a chip system, the transceiver module 2301 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 2302 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 2301 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 2302 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0423] For example, the transceiver module 2301 can be used to perform all the transceiver operations performed by the terminal device in the embodiments shown in FIG11, FIG20, or FIG21, and / or to support other processes of the technology described herein; the processing module 2302 can be used to perform all operations other than the transceiver operations performed by the terminal device in the embodiments shown in FIG11, FIG20, or FIG21, and / or to support other processes of the technology described herein.

[0424] As another possible implementation, the transceiver module 2201 in Figure 22 can be replaced by a transceiver unit that integrates the functions of the transceiver module 2201; the processing module 2202 can be replaced by a processor that integrates the functions of the processing module 2202. Furthermore, the network device 220 shown in Figure 22 may also include a memory. Alternatively, the transceiver module 2301 in Figure 23 can be replaced by a transceiver unit that integrates the functions of the transceiver module 2301; the processing module 2302 can be replaced by a processor that integrates the functions of the processing module 2302. Furthermore, the terminal device 230 shown in Figure 23 may also include a memory.

[0425] Alternatively, when the processing module 2202 is replaced by a processor and the transceiver module 2201 is replaced by a transceiver, the network device 220 involved in the embodiments of this application can also be the communication device 240 shown in FIG. 24. Or, when the processing module 2302 is replaced by a processor and the transceiver module 2301 is replaced by a transceiver, the terminal device 230 involved in the embodiments of this application can also be the communication device 240 shown in FIG. 24.

[0426] The processor can be logic circuit 2401, and the transceiver can be interface circuit 2402. Furthermore, the communication device 240 shown in Figure 24 may also include a memory 2403. The memory 2403 can be used to store instructions, program code, or data, and can be integrated into the processor or exist independently of the processor.

[0427] In one possible implementation, when the terminal device or network device is a chip, the transceiver module can be a communication interface, pins, or circuits. The communication interface can be used to input data to be processed to the processor and can output the processor's processing results. Specifically, the communication interface can be a general purpose input / output (GPIO) interface, which can connect to multiple peripheral devices (such as displays (LCDs), cameras, radio frequency (RF) modules, antennas, etc.). The communication interface is connected to the processor via a bus.

[0428] The processing module can be a processor, which can execute computer execution instructions stored in the storage module to cause the chip to perform the communication methods involved in any of the embodiments shown above. Further, the processor may include a controller, an arithmetic logic unit (ALU), and registers. For example, the controller is mainly responsible for instruction decoding and issuing control signals for the operations corresponding to the instructions. The ALU is mainly responsible for performing fixed-point or floating-point arithmetic operations, shift operations, and logical operations, and can also perform address operations and conversions. The registers are mainly responsible for storing register operands and intermediate operation results temporarily stored during instruction execution. In specific implementations, the processor's hardware architecture can be an ASIC architecture, a microprocessor without interlocked piped stages architecture (MIPS), an advanced reduced instruction set machine (RISC) machine (ARM) architecture, or a network processor (NP) architecture, etc. The processor can be single-core or multi-core. The storage module can be an internal storage module of the chip, such as registers or caches. The storage module can also be an external storage module, such as ROM or other types of static storage devices that can store static information and instructions, RAM, etc.

[0429] The functions of the processor and interface can be implemented through hardware design, software design, or a combination of both; no restrictions are placed here.

[0430] This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0431] This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0432] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending end and / or a data receiving end) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0433] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0434] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0435] In this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. "...when" and "if" both mean that a corresponding action will be taken under certain objective circumstances, not a time limit, nor do they require a judgment action at the time of implementation, nor do they imply any other limitations.

[0436] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0437] In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

[0438] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0439] In the several embodiments provided in this application, the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0440] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0441] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0442] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A communication method characterized by comprising: The method comprises the following steps: According to the target aggregation level, determine the output sequence length E after rate matching, and determine the length N of polar encoding according to the E; wherein N is an integer power of 2; Polar encoding is performed on the first sequence to obtain a second sequence with a length of N; wherein the first sequence includes information bits and cyclic redundancy check bits; Cyclic shift is performed on the second sequence to obtain a third sequence; wherein the starting bit of the third sequence is the Yth bit in the second sequence, and Y is determined according to the target aggregation level; Output the third sequence.

2. The method of claim 1, wherein The third sequence includes the Yth bit to the N-1th bit of the second sequence and the 0th bit to the Y-1th bit of the second sequence arranged in sequence.

3. The method according to claim 1 or 2, characterized in that, There are X aggregation levels, the lengths of polar encoding corresponding to the X aggregation levels are all N, the X aggregation levels include the target aggregation level, and X is a positive integer, Y is determined according to N and a first value; wherein the first value is an integer power of 2, and the first value is greater than or equal to X.

4. The method of claim 3, wherein Y satisfies the following equation: Y = (t x N) / 2 m ; wherein the t is an integer less than the first numerical value and greater than or equal to 0; the first numerical value is 2 m , 2 m greater than or equal to X.

5. The method of any one of claims 1-4, wherein When the target aggregation level is 8, Y is 0; or When the target aggregation level is 16, Y is N / 2.

6. The method of any one of claims 1-4, wherein When the target aggregation level is 8, Y is 0; or When the target aggregation level is 4, Y is N / 2.

7. The method of any one of claims 1-4, wherein When the target aggregation level is 4, Y is 0; or When the target aggregation level is 16, Y is N / 2.

8. The method of any one of claims 1-4, wherein When the target aggregation level is 8, Y is 0; or When the target aggregation level is 4, Y is N / 4; or When the target aggregation level is 16, Y is N / 2.

9. The method of any one of claims 1-4, wherein When the target aggregation level is 8, Y is 0; or When the target aggregation level is 4, Y is N / 4; or When the target aggregation level is 16, Y is N / 2; or When the target aggregation level is 32, Y is (3N) / 4.

10. The method according to any one of claims 1 to 9, characterized in that, There are X aggregation levels, the lengths of polar encoding corresponding to the X aggregation levels are all N, the X aggregation levels include the target aggregation level, and X is a positive integer, The Y corresponding to the X aggregation levels is different.

11. The method of claim 10, wherein The Y corresponding to the X aggregation levels is predefined; or The Y corresponding to the X aggregation levels is configured by a network device.

12. A communication method characterized by comprising: The method comprises the following steps: Receiving information to be coded; wherein the length of polar encoding of the first sequence corresponding to the information to be coded is N; the first sequence includes information bits and cyclic redundancy check bits; N is a positive integer; polar decode the to-be-decoded information to obtain a fourth sequence with a length of N; performing de-circshift on the fourth sequence according to an i-th aggregation level of X aggregation levels to obtain a fifth sequence with a length of N; wherein, the X aggregation levels correspond to polar encoding with a length of N, and the X aggregation levels include a target aggregation level; X is a positive integer; i is one or more values in [1, X]; performing cyclic redundancy check on information bits in the fifth sequence, and determining an aggregation level corresponding to the fifth sequence passing the check as the target aggregation level.

13. The method of claim 12, wherein, The performing de-circshift on the fourth sequence according to an i-th aggregation level of X aggregation levels comprises: performing de-circshift on the fourth sequence according to a first matrix corresponding to the i-th aggregation level; wherein, the first matrix corresponding to the i-th aggregation level is determined according to a step length of circshift corresponding to the i-th aggregation level.

14. The method of claim 13, wherein, the step length of circshift corresponding to the i-th aggregation level is determined according to N and a first value; wherein, the first value is an integer power of 2, and the first value is greater than or equal to the X.

15. The method of claim 14, wherein, The step of the cyclic shift corresponding to the ith aggregation level satisfies the following formula: (t x N) / 2 m ; wherein t is an integer less than the first value and greater than or equal to 0; the first value is 2 m , 2 m greater than or equal to X.

16. The method of any one of claims 13-15, wherein, when the i-th aggregation level is 8, the step length of circshift corresponding to the i-th aggregation level is 0; or when the i-th aggregation level is 16, the step length of circshift corresponding to the i-th aggregation level is N / 2.

17. The method of any one of claims 13-15, wherein, when the i-th aggregation level is 8, the step length of circshift corresponding to the i-th aggregation level is 0; or when the i-th aggregation level is 4, the step length of circshift corresponding to the i-th aggregation level is N / 2.

18. The method of any one of claims 13-15, wherein, when the target aggregation level is 4, the step length of circshift corresponding to the i-th aggregation level is 0; or when the target aggregation level is 16, the step length of circshift corresponding to the i-th aggregation level is N / 2.

19. The method of any one of claims 13-15, wherein, when the i-th aggregation level is 8, the step length of circshift corresponding to the i-th aggregation level is 0; or when the i-th aggregation level is 4, the step length of circshift corresponding to the i-th aggregation level is N / 4; or when the i-th aggregation level is 16, the step length of circshift corresponding to the i-th aggregation level is N / 2.

20. The method of any one of claims 13-15, wherein, when the i-th aggregation level is 8, the step length of circshift corresponding to the i-th aggregation level is 0; or when the i-th aggregation level is 4, the step length of circshift corresponding to the i-th aggregation level is N / 4; or when the i-th aggregation level is 16, the step length of circshift corresponding to the i-th aggregation level is N / 2. ​ When the i-th aggregation level is 16, the step length of the cyclic shift corresponding to the i-th aggregation level is N / 2; or When the i-th aggregation level is 32, the step length of the cyclic shift corresponding to the i-th aggregation level is (3N) / 4.

21. The method of any one of claims 13-20, wherein, the step lengths of the cyclic shifts corresponding to the X aggregation levels are different.

22. The method of claim 21, wherein, the step lengths of the cyclic shifts corresponding to the X aggregation levels are predefined; or the step lengths of the cyclic shifts corresponding to the X aggregation levels are configured by a network device.

23. A method of communication, comprising: including: receiving to-be-decoded information; wherein a length of polar encoding of a first sequence corresponding to the to-be-decoded information is N; the first sequence includes information bits and cyclic redundancy check bits; N is a positive integer; performing, according to an i-th aggregation level of X aggregation levels, de-cyclic shift on a sixth sequence to obtain a seventh sequence; wherein lengths of polar encoding corresponding to the X aggregation levels are all N, the X aggregation levels include a target aggregation level; i is one or more values in [1, X], X is a positive integer; the sixth sequence is a sequence after demodulation and rate matching on the to-be-decoded information; performing polar decoding on the seventh sequence to obtain an eighth sequence; performing cyclic redundancy check on information bits in the eighth sequence, and determining an aggregation level corresponding to the eighth sequence that passes the check as the target aggregation level.

24. The method of claim 23, wherein, a starting bit of the seventh sequence is a Z-th bit of the sixth sequence; wherein Z is determined according to the i-th aggregation level.

25. The method of claim 24, wherein, when the i-th aggregation level is 8, Z is 0; or when the i-th aggregation level is 16, Z is N / 2.

26. The method of claim 24, wherein, when the i-th aggregation level is 4, Z is 0; or when the i-th aggregation level is 4, Z is N / 2.

27. The method of claim 24, wherein, when the i-th aggregation level is 8, Z is 0; or when the i-th aggregation level is 4, Z is N / 2.

28. The method of claim 24, wherein, when the i-th aggregation level is 8, Z is 0; or when the i-th aggregation level is 4, Z is (3N) / 4; or when the i-th aggregation level is 16, Z is N / 2.

29. The method of any one of claims 24-28, wherein, Zs corresponding to the X aggregation levels are different.

30. A method of communication, comprising: including: determining, according to a target aggregation level, a cyclic redundancy check pilot sequence corresponding to the target aggregation level; performing cyclic redundancy check encoding on information bits to obtain a ninth sequence; wherein the ninth sequence includes information bits and cyclic redundancy check bits; the cyclic redundancy check bits are determined according to the cyclic redundancy check pilot sequence corresponding to the target aggregation level and the information bits; outputting the ninth sequence.

31. The method of claim 30, wherein, There are X aggregation levels corresponding to polar encoding lengths of N, the X aggregation levels include the target aggregation level, X is a positive integer, The X aggregation levels correspond to different cyclic redundancy check pilot sequences.

32. The method of claim 31, wherein, The X aggregation levels correspond to cyclic redundancy check pilot sequences that are orthogonal to each other.

33. The method of claim 31 or 32, wherein, The X aggregation levels correspond to cyclic redundancy check pilot sequences that are predefined; or The X aggregation levels correspond to cyclic redundancy check pilot sequences configured by a network device.

34. The method of any of claims 31-33, wherein, When the target aggregation level is 16, the cyclic redundancy check pilot sequence corresponding to the target aggregation level is 0; or When the target aggregation level is 8, the cyclic redundancy check pilot sequence corresponding to the target aggregation level is 1.

35. The method of any of claims 31-33, wherein, When the target aggregation level is 16, the cyclic redundancy check pilot sequence corresponding to the target aggregation level is 001110011100110001100100; or When the target aggregation level is 8, the cyclic redundancy check pilot sequence corresponding to the target aggregation level is 010110100111000010001001; or When the target aggregation level is 4, the cyclic redundancy check pilot sequence corresponding to the target aggregation level is 110011001001010110100101.

36. A method of communication, comprising: comprising: receiving to-be-coded information; coding the to-be-coded information to obtain a tenth sequence; wherein the tenth sequence includes information bits and cyclic redundancy check bits; According to the cyclic redundancy check pilot sequence corresponding to the i-th aggregation level in the X aggregation levels, the information bits in the tenth sequence are subjected to cyclic redundancy check, and the aggregation level corresponding to the tenth sequence that passes the check is determined as the target aggregation level; wherein the X aggregation levels correspond to polar encoding lengths of N, the X aggregation levels include the target aggregation level; i is one or more values in [1, X], and X is a positive integer.

37. The method of claim 36, wherein, The X aggregation levels correspond to different cyclic redundancy check pilot sequences.

38. The method of claim 36 or 37, wherein, The X aggregation levels correspond to cyclic redundancy check pilot sequences that are orthogonal to each other.

39. The method of any of claims 36-38, wherein, The X aggregation levels correspond to cyclic redundancy check pilot sequences that are predefined; or The X aggregation levels correspond to cyclic redundancy check pilot sequences configured by a network device.

40. The method of any of claims 36-38, wherein, When the i-th aggregation level is 16, the cyclic redundancy check preamble sequence corresponding to the i-th aggregation level is 0; or When the i-th aggregation level is 8, the cyclic redundancy check preamble sequence corresponding to the i-th aggregation level is 1.

41. The method of any one of claims 36-38, wherein, When the i-th aggregation level is 16, the cyclic redundancy check preamble sequence corresponding to the i-th aggregation level is 001110011100110001100100; or When the i-th aggregation level is 8, the cyclic redundancy check preamble sequence corresponding to the i-th aggregation level is 010110100111000010001001; or When the i-th aggregation level is 4, the cyclic redundancy check preamble sequence corresponding to the i-th aggregation level is 110011001001010110100101.

42. A method of communication, the method comprising: Comprising: obtaining a downlink control information (DCI); wherein the DCI comprises first indication information, the first indication information being used to indicate a target aggregation level; transmitting the DCI.

43. The method of claim 42, wherein, the first indication information is located at a tail of the DCI.

44. The method of claim 42 or 43, wherein, the first indication information occupies one or more bits.

45. The method of any one of claims 42-44, wherein, when the target aggregation level is 8, the first indication information corresponds to a bit value of 0; or when the target aggregation level is 16, the first indication information corresponds to a bit value of 1.

46. The method of any one of claims 42-44, wherein, when the target aggregation level is 8, the first indication information corresponds to a bit value of 00; or when the target aggregation level is 16, the first indication information corresponds to a bit value of 10; or when the target aggregation level is 4, the first indication information corresponds to a bit value of 01.

47. A method of communication, the method comprising: Comprising: receiving a downlink control information (DCI); wherein the DCI comprises first indication information, the first indication information being used to indicate a target aggregation level; determining the target aggregation level according to the first indication information.

48. The method of claim 47, wherein, the first indication information is located at a tail of the DCI.

49. The method of claim 47 or 48, wherein, the first indication information occupies one or more bits.

50. The method of any one of claims 47-49, wherein, when the target aggregation level is 8, the first indication information corresponds to a bit value of 0; or when the target aggregation level is 16, the first indication information corresponds to a bit value of 1.

51. The method of any one of claims 47-49, wherein, when the target aggregation level is 8, the first indication information corresponds to a bit value of 00; or When the target aggregation level is 16, the bit value corresponding to the first indication information is 10; or When the target aggregation level is 4, the bit value corresponding to the first indication information is 01.

52. A communications device, characterized by The communication device comprises a processor; the processor is configured to run a computer program or instructions, so that the communication method in any one of claims 1-11 is executed, or so that the communication method in any one of claims 12-22 is executed, or so that the communication method in any one of claims 23-29 is executed, or so that the communication method in any one of claims 30-35 is executed, or so that the communication method in any one of claims 36-41 is executed, or so that the communication method in any one of claims 42-46 is executed, or so that the communication method in any one of claims 47-51 is executed.

53. A computer-readable storage medium, comprising: The computer readable storage medium stores computer instructions or programs, when the computer instructions or programs are run on a computer, so that the communication method in any one of claims 1-11 is executed, or so that the communication method in any one of claims 12-22 is executed, or so that the communication method in any one of claims 23-29 is executed, or so that the communication method in any one of claims 30-35 is executed, or so that the communication method in any one of claims 36-41 is executed, or so that the communication method in any one of claims 42-46 is executed, or so that the communication method in any one of claims 47-51 is executed.

54. A computer program product, characterised in that, The computer program product comprises computer instructions; when part or all of the computer instructions are run on a computer, so that the communication method in any one of claims 1-11 is executed, or so that the communication method in any one of claims 12-22 is executed, or so that the communication method in any one of claims 23-29 is executed, or so that the communication method in any one of claims 30-35 is executed, or so that the communication method in any one of claims 36-41 is executed, or so that the communication method in any one of claims 42-46 is executed, or so that the communication method in any one of claims 47-51 is executed.

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