Command scheduling method, apparatus and device

Abstract

Embodiments of the present disclosure provide a command scheduling method, apparatus and device. The method comprises: if the command state on a host side corresponding to a solid state drive is a hybrid command state, recording historical system clock values corresponding to write commands of target channels in the solid state drive, and recording counts of suspend operation and quantities of slow read commands; for write commands to be scheduled of command queues corresponding to dies, on the basis of the current system clock values and historical system clock values corresponding to the write commands as well as the counts of suspend operation, determining a first target scheduling mode corresponding to the write commands to be scheduled; for slow read commands to be scheduled of the command queues, on the basis of the quantities of slow read commands of the target channels, determining a second target scheduling mode corresponding to the slow read commands to be scheduled; and on the basis of the first target scheduling mode, scheduling the write commands to be scheduled, and on the basis of the second target scheduling mode, scheduling the slow read commands to be scheduled. In this way, the latency of a host reading commands can be reduced, and the quality of service requirements can be met.

Description

Command scheduling method, device and equipment

[0001] The present disclosure claims priority to Chinese Patent Application No. 202411075461.5, filed on August 6, 2024 with the Chinese Patent Office and entitled "Command Scheduling Method, Device and Equipment", the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] The present disclosure relates to the technical field of solid state drives, and in particular to a command scheduling method, device and equipment. BACKGROUND

[0003] With the continuous development of technologies such as the Internet, the number of online users is increasing, and the amount of data processed online is rapidly growing. In order to improve processing capacity and reduce costs, data centers are becoming more and more common.

[0004] In actual scenarios such as data centers, the types of commands sent by the host to the solid state drive (SSD) are diverse, for example, can include read commands (Read), write commands (Write) and erase commands (Erase) and the like. Inside the solid state drive, the die command scheduler usually pushes commands to the back end (Hardware, HW) in a balanced manner according to the die granularity, or controls the order in which read / write commands, write commands and erase commands are pushed to the back end.

[0005] In related technologies, in order to meet the needs of actual scenarios and pursue higher bandwidth (Bandwidth, BW) and input / output operations per second (Input / Output Operations Per Second, IOPS), the command scheduling method in the solid state drive is usually to push the host's commands directly to the back end as much as possible, resulting in a large number of commands in the solid state drive in the same channel being in a concurrent state. This command scheduling method is relatively single, resulting in a high delay of the host read command, which cannot meet the quality of service (Quality of Service, QoS) requirements. SUMMARY

[0006] Aspects of the present disclosure provide a command scheduling method, device and equipment to improve the flexibility of solid state drive command scheduling, reduce the delay of the host read command, and meet the quality of service requirements.

[0007] In a first aspect, embodiments of the present disclosure provide a command scheduling method applied to a solid state drive, the method comprising:

[0008] In a case where the command state of the host side corresponding to the solid state disk is a mixed command state, for each target channel in the solid state disk, a system clock history value corresponding to a write command of the target channel is recorded, and a number of pause operations of the target channel and a number of slow read commands of the target channel are recorded; the slow read command is a read command sent internally in the solid state disk;

[0009] For a to-be-scheduled write command in a command queue corresponding to a flash memory particle in the target channel, a first target scheduling mode corresponding to the to-be-scheduled write command is determined according to a current value of a system clock corresponding to the write command, the system clock history value, and the number of pause operations.

[0010] For a to-be-scheduled slow read command in a command queue corresponding to a flash memory particle in the target channel, a second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands of the target channel.

[0011] The to-be-scheduled write command is scheduled according to the first target scheduling mode, and the to-be-scheduled slow read command is scheduled according to the second target scheduling mode.

[0012] In a possible implementation, the method further includes:

[0013] receiving a plurality of host commands from the host side within a preset period;

[0014] In a case where the plurality of host commands include read commands and write commands, it is determined that the command state of the host side is a mixed command state.

[0015] In a possible implementation, the first target scheduling mode corresponding to the to-be-scheduled write command is determined according to the current value of the system clock corresponding to the write command, the system clock history value, and the number of pause operations, and includes:

[0016] If a time interval between the current value of the system clock and the system clock history value is less than a target time threshold, it is determined that the first target scheduling mode corresponding to the to-be-scheduled write command is pause pushing; the target time threshold is determined according to a data transmission time of the flash memory particle in the target channel.

[0017] If the number of pause operations is greater than a first target value, it is determined that the first target scheduling mode corresponding to the to-be-scheduled write command is pause pushing.

[0018] In a possible implementation, the second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands of the target channel, and includes:

[0019] If the number of slow read commands is greater than a second target value, it is determined that a second target scheduling mode corresponding to the to-be-scheduled slow read command is a pause pushing.

[0020] In a possible implementation, the method further includes:

[0021] In a case where the command state on the host side corresponding to the solid state disk is a mixed command state, the number of concurrent slow read commands of each flash memory grain in the target channel is reduced.

[0022] In a possible implementation, the method further includes:

[0023] In a case where the command state on the host side corresponding to the solid state disk is a mixed command state, the number of concurrent instructions of each flash memory grain in the target channel is increased.

[0024] In a possible implementation, the number of concurrent instructions of each flash memory grain in the target channel is increased, including:

[0025] For each flash memory grain in the target channel, at least one concurrent command structure is added in the flash memory grain.

[0026] In a second aspect, the embodiments of the present disclosure provide a command scheduling mode determination apparatus, including:

[0027] A recording module is configured to, in a case where the command state on the host side corresponding to the solid state disk is a mixed command state, record, for each target channel in the solid state disk, a system clock historical value corresponding to a write command of the target channel, and record a number of slow read commands of the target channel and a number of pause operations of the target channel.

[0028] A first scheduling module is configured to, for a to-be-scheduled write command in a command queue corresponding to a flash memory grain in the target channel, determine a first target scheduling mode corresponding to the to-be-scheduled write command according to a current value of a system clock corresponding to the write command, the system clock historical value, and the number of pause operations.

[0029] A second scheduling module is configured to, for a to-be-scheduled slow read command in a command queue corresponding to a flash memory grain in the target channel, determine a second target scheduling mode corresponding to the to-be-scheduled slow read command according to the number of slow read commands of the target channel.

[0030] A third scheduling module is configured to schedule the to-be-scheduled write command according to the first target scheduling mode, and schedule the to-be-scheduled slow read command according to the second target scheduling mode.

[0031] In a possible implementation, the apparatus is further configured to:

[0032] receiving a plurality of host commands from the host side in a preset period;

[0033] In a case where the plurality of host commands include a read command and a write command, determining that a command state of the host side is a mixed command state.

[0034] In a possible implementation, the first scheduling module is specifically configured to:

[0035] If a time interval between the current value of the system clock and the historical value of the system clock is less than a target time threshold, determining that a first target scheduling manner corresponding to the to-be-scheduled write command is pause pushing; the target time threshold is determined according to a data transmission time corresponding to a flash grain in the target channel;

[0036] If the number of pause operations is greater than a first target value, determining that the first target scheduling manner corresponding to the to-be-scheduled write command is pause pushing.

[0037] In a possible implementation, the second scheduling module is specifically configured to:

[0038] If the number of slow read commands is greater than a second target value, determining that a second target scheduling manner corresponding to the to-be-scheduled slow read command is pause pushing.

[0039] In a possible implementation, the apparatus is further configured to:

[0040] In a case where a command state of the host side corresponding to the solid state disk is a mixed command state, reducing a slow read command concurrency number of each flash grain in the target channel.

[0041] In a possible implementation, the apparatus is further configured to:

[0042] In a case where a command state of the host side corresponding to the solid state disk is a mixed command state, increasing an instruction concurrency number of each flash grain in the target channel.

[0043] In a possible implementation, the apparatus is further configured to:

[0044] For each flash grain in the target channel, at least one concurrency command structure is added in the flash grain.

[0045] In a third aspect, an electronic device is provided, including a memory and a processor.

[0046] The memory stores computer execution instructions.

[0047] The processor executes computer-executable instructions stored in the memory, so that the processor executes the command scheduling method of any one of the first aspect.

[0048] In a fourth aspect, the embodiments of the present disclosure provide a computer-readable storage medium, which stores computer-executable instructions. When the computer-executable instructions are executed by a processor, the computer-executable instructions are used to implement the command scheduling method of any one of the first aspect.

[0049] In a fifth aspect, the embodiments of the present disclosure provide a computer program product, which includes a computer program. When the computer program is executed by a processor, the computer program implements the command scheduling method of any one of the first aspect.

[0050] In the embodiments of the present disclosure, in a case where the command state of the host corresponding to the solid state disk is a mixed command state, for each target channel in the solid state disk, a system clock historical value corresponding to a write command of the target channel is recorded, and the number of suspension operations of the target channel and the number of slow read commands of the target channel are recorded; the slow read command is a read command sent internally in the solid state disk; for a to-be-scheduled write command in a command queue corresponding to a flash memory grain in the target channel, a first target scheduling mode corresponding to the to-be-scheduled write command is determined according to a current value of a system clock corresponding to the write command, the system clock historical value, and the number of suspension operations; for a to-be-scheduled slow read command in the command queue corresponding to the flash memory grain in the target channel, a second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands of the target channel; the to-be-scheduled write command is scheduled according to the first target scheduling mode, and the to-be-scheduled slow read command is scheduled according to the second target scheduling mode. In the present disclosure, the system clock historical value of the write command of the target channel, the current value of the system clock, and the number of suspension operations of the target channel are used to determine the first target scheduling mode of the to-be-scheduled write command, and the number of slow read commands is used to determine the second target scheduling mode of the to-be-scheduled slow read command, so that the flexibility of the command scheduling of the solid state disk can be improved, the pushing speed of the write command and the slow read command to the back end can be controlled, the concurrency of a large number of commands in the same channel can be avoided, the delay of the host read command can be reduced in a mixed command scenario such as a data center or a cloud computing center, and the requirements of the quality of service can be met to a certain extent. BRIEF DESCRIPTION OF DRAWINGS

[0051] The accompanying drawings, which are included to provide a further understanding of the present disclosure and constitute a part of the present disclosure, illustrate the exemplary embodiments of the present disclosure and serve to explain the present disclosure, but do not limit the present disclosure in any way. In the drawings:

[0052] FIG. 1 is a schematic diagram of an application scenario provided by an exemplary embodiment of the present disclosure;

[0053] FIG. 2 is a flow diagram of a command scheduling method according to an example embodiment of the present disclosure;

[0054] FIG. 3 is a flow diagram of another command scheduling method according to an example embodiment of the present disclosure;

[0055] FIG. 4 is a structural diagram of a command scheduling apparatus according to an example embodiment of the present disclosure;

[0056] FIG. 5 is a structural diagram of an electronic device according to an example embodiment of the present disclosure. DETAILED DESCRIPTION

[0057] In order to make the objectives, technical solutions and advantages of the present disclosure clearer, the technical solutions of the present disclosure will be described below in conjunction with specific embodiments of the present disclosure and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of the present disclosure, rather than all the embodiments. Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative work fall within the scope of protection of the present disclosure. It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data for analysis, stored data, displayed data, etc.) involved in the present disclosure are all information and data authorized by the user or authorized by all parties, and the collection, use and processing of the relevant data need to comply with relevant laws, regulations and standards, and provide corresponding operation entry for the user to choose authorization or refusal.

[0058] In actual scenarios such as data centers, the types of commands sent by a host (such as a server or the like) to an SSD disk are various, mainly including mixed commands, for example, random mixed commands in which read commands account for 70% and write commands account for 30%, and the like; meanwhile, there are also slow read commands such as garbage collection (GC) inside the SSD disk. During the running of the solid-state disk, there is usually a requirement for the quality of service of the host read command, which can be used to measure the delay distribution of the host command, and usually a certain proportion (99.99%, 99.999%, or 99.9999%) of the host read command delay is required to be below a specific value (for example, 500 microseconds or 800 microseconds). However, in the mixed command scenario, due to the influence of write commands and erase commands, the latency of the host read command is greatly increased, thereby causing poor quality of service. For example, when there is a write command or an erase command on a flash memory particle and a host read command exists on the same flash memory particle, the host read command needs to wait for the write command or the erase command to be executed, and the latency of the write command or the erase command is very long. If the host read command is arranged after the write command or the erase command, it obviously does not meet the requirement of QoS. Exemplarily, in a quad-level cell (QLC), the latency of the host read command can reach about 10 milliseconds (ms), which is mainly caused by the long latency of the write command or the erase command in the quad-level cell non-volatile flash memory (QLC NAND Flash). Moreover, in the actual scenario of a data center, the proportion of the host read command is higher, the response time requirement for the host read command is higher, and the requirement for the quality of service is higher accordingly.

[0059] On this basis, the non-volatile flash memory (NAND Flash) provides suspend and resume operations of the write command and the erase command, that is, the executing write command or erase command can be interrupted by the host read command, and after the host read command is executed, the suspended write command or erase command is woken up. This method solves the long-tail delay problem of the host read command to a certain extent, and can reduce the quality of service from the level of about 10 ms to the level of 3 ms to 5 ms, but still cannot meet the requirement of the quality of service. This is mainly because the enterprise-level SSD disk used in the actual scenario of a data center has a large capacity, the SSD disk has too many concurrent commands of the flash memory particles (DIE) in the same channel, but there is only one group of data buses, causing data transmission congestion, thereby lengthening the long-tail delay of the host read command.

[0060] In the related art, the main function of the traditional flash grain command scheduler is to balance the pushing of commands to the back end according to the granularity of the flash grain, or to control the order of pushing of read commands, write commands and erase commands to the back end. However, in the mixed command scenario of the data center, in order to pursue higher bandwidth and or input / output operations per second, the command scheduler may try to push commands to the back end, resulting in a large number of concurrent commands in the same channel, causing data transmission congestion. It can be seen that the command scheduling method in the related art is relatively single, resulting in high delay of host read commands, which cannot meet the quality of service requirements.

[0061] To solve the above problems, the present disclosure provides a command scheduling method, device and equipment, and the solid state disk records the system clock history value corresponding to the write command in the same target channel in real time under the mixed command state and the like, and records the number of pause operations of the target channel and the number of slow read commands of the target channel, and then through the flash command scheduler, according to the current value of the system clock, the history value of the system clock and the number of pause operations, the first target scheduling mode corresponding to the to-be-scheduled write command is determined; at the same time, the second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands, the to-be-scheduled write command is processed according to the first target scheduling mode, and the to-be-scheduled slow read command is processed according to the second target scheduling mode. In this way, the solid state disk can realize the separate control and issuance of traffic of different types of commands, avoid the concurrency of a large number of commands in the same channel, reduce the delay of host read commands in the mixed command scenario of the data center, cloud computing center and the like, and thus improve the service quality of the host read commands, and meet the requirements of 99.999% or 99.9999% service quality.

[0062] FIG. 1 is a schematic diagram of an application scenario provided by an exemplary embodiment of the present disclosure. As shown in FIG. 1, in the related art, the flash grain command scheduler of the solid state disk usually pushes commands to the back end according to the order of the commands. In the mixed command state and the like, in order to improve the bandwidth and the number of input / output operations per second, the command scheduler usually increases the speed of pushing commands to the back end, and tries to push commands to the back end flash grain. This command scheduling method is relatively single, and a large number of concurrent commands exist in the same channel, resulting in high delay of host read commands, which cannot meet the service quality requirements of the host read commands.

[0063] In the embodiment of the present disclosure, the solid state disk records the system clock history value corresponding to the write command in the same target channel, the number of suspension operations of the target channel, and the number of slow read commands of the target channel in real time under actual scenarios such as the mixed command state, and then determines the first target scheduling mode corresponding to the to-be-scheduled write command through the flash command scheduler according to the current value of the system clock, the system clock history value, and the number of suspension operations. At the same time, the second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands, the to-be-scheduled write command is processed according to the first target scheduling mode, and the to-be-scheduled slow read command is processed according to the second target scheduling mode. In this way, the solid state disk can realize flexible scheduling of different types of commands, can avoid the situation of a large number of commands in the same channel, can reduce the delay of the host read command, and can meet the quality of service requirements of the host read command.

[0064] The technical solutions shown in the present disclosure will be described in detail through specific embodiments. It should be noted that the following several embodiments can exist independently or can be combined with each other. For the same or similar content, it will not be repeated in different embodiments.

[0065] FIG. 2 is a flowchart of a command scheduling method according to an exemplary embodiment of the present disclosure. Referring to FIG. 2, the command scheduling method can include the following steps.

[0066] S201, in the case where the command state of the host corresponding to the solid state disk is a mixed command state, for each target channel in the solid state disk, record the system clock history value corresponding to the write command of the target channel, and record the number of suspension operations of the target channel and the number of slow read commands of the target channel. The slow read command is a read command sent internally by the solid state disk.

[0067] The execution subject of the embodiment of the present disclosure can be a solid state disk or a command scheduling device arranged in an electronic device. The command scheduling device can be implemented by software or by a combination of software and hardware. In order to facilitate understanding, in the following, the execution subject is taken as a solid state disk as an example for description. The solid state disk can be a non-volatile memory (NVM) solid state disk, and can also include other types of solid state disks. The specific type of the solid state disk is not limited in the embodiment of the present disclosure.

[0068] In the embodiments of the present disclosure, the host side can refer to a host device corresponding to the solid state disk, and can refer to a host device in a data center that needs to execute various instructions through the solid state disk, such as a server and the like. The command state can refer to the actual command state corresponding to various commands issued by the host side, which can be determined based on the proportional relationship between read commands, write commands and erase commands. The mixed command state can refer to the command state corresponding to the host side, which can also be referred to as a mixed command model. The mixed command state can refer to the fact that the commands sent by the host to the solid state disk in a unit of time include both read commands and write commands. The command scheduling method in the embodiments of the present disclosure can also be applied in other command state scenarios, such as a steady state scenario. The steady state can refer to a state when the load of the garbage collection command of the solid state disk and the load of the host write command tend to be balanced. In the steady state, the invalid data space on each stripe physical block (SPB) tends to be stable, or in the steady state, the write amplification (WA) value corresponding to the solid state disk tends to be stable. The write amplification can be used to describe the ratio between the amount of data actually written in the solid state disk and the amount of data requested to be written by the host. The embodiments of the present disclosure do not limit the specific scenarios of the command state.

[0069] The target channel can refer to a channel in the solid state disk for transmitting host commands and data to the storage medium (i.e., flash memory particles). The solid state disk can include multiple target channels to provide higher read and write speed and throughput. Each target channel can include multiple flash memory particles, such as 128 flash memory particles corresponding to one target channel, and the like, but each target channel corresponds to a group of data buses, that is, the multiple flash memory particles in the target channel use the same group of data buses. The system clock history value can refer to the system tick value corresponding to a write command sent by the target channel. The write command can also be referred to as a programming operation, which can be a programming operation initiated by the host side or a programming operation initiated by an internal garbage collection operation of the solid state disk. The embodiments of the present disclosure do not limit this. The number of suspend operations can refer to the number of times that a suspend operation occurs in a flash memory particle in the target channel.

[0070] The slow read command can refer to a read operation initiated by the internal solid state disk, which can also be referred to as a non-host read command, such as a garbage collection read command (GC read) and the like. It should be noted that in the embodiments of the present disclosure, the read command and the host read command can refer to the read command initiated by the host, and the slow read command is a non-host read command. The number of slow read commands can refer to the number of non-host read commands running in the target channel.

[0071] In this step, the solid state disk can obtain the command state type of the host side in the process of receiving and processing the command issued by the host side. If the command state is a mixed command state, the system clock history value corresponding to the time when the target channel sends a write command can be recorded for each target channel in the solid state disk. The solid state disk can record the number of pause operations of the flash memory particles in the target channel. The flash memory particle command scheduler in the solid state disk can determine the scheduling mode of the to-be-scheduled write command according to the system clock history value and the number of pause operations. In addition, the solid state disk can record the number of slow read commands in the target channel. The flash memory particle command scheduler can determine the scheduling mode of the to-be-scheduled slow read command according to the number of slow read commands.

[0072] S202, for the to-be-scheduled write command in the command queue corresponding to the flash memory particle in the target channel, determining a first target scheduling mode corresponding to the to-be-scheduled write command according to the system clock current value corresponding to the write command, the system clock history value, and the number of pause operations.

[0073] In the embodiments of the present disclosure, the command queue can refer to the command sequence corresponding to the flash memory particle in the target channel, such as a write queue in the flash memory particle, etc. The to-be-scheduled write command can refer to a write command that needs to be pushed to the back-end flash memory particle. The solid state disk can be internally divided into front-end (Firmware) and back-end (Hardware), wherein the front-end includes the CPU and the communication interface in the solid state disk, etc., which can communicate and interact with the host, receive the command and related data sent by the host, and return the data to the host after processing by the SSD. The back-end is responsible for communication with the flash memory particle, data management, address conversion, garbage collection, etc. The command scheduler in the solid state disk can be set in the back-end, which is used to manage and schedule various commands of the flash memory particle. The system clock current value can refer to the current value of the system clock corresponding to the write command. Based on the system clock current value and the system clock history value, the execution time of the write command can be determined. The first target scheduling mode can refer to the scheduling mode corresponding to the to-be-scheduled write command. The first target scheduling mode can include pushing to the back-end flash memory particle and pausing pushing to the back-end flash memory particle, etc. In this step, if there is a to-be-scheduled write command in the command queue corresponding to the flash memory particle of the target channel, the solid state disk can determine the first target scheduling mode corresponding to the to-be-scheduled write command according to the system clock current value, the system clock history value, and the number of pause operations through the command scheduler.

[0074] Specifically, in the execution process of the write command, the flash particle needs to perform data transmission based on the data bus of the target channel, and the data bus is occupied by the write command in the process; since the read command also involves data transmission, it cannot be executed until the execution of the write command is completed, and if a large number of write commands are in a concurrent state in the target channel, the latency of the read command will be greatly increased. In order to avoid the situation that a large number of write commands are concurrent, in the embodiment of the present disclosure, the command scheduler can determine the difference between the current value of the system clock and the historical value of the system clock, and if the difference meets a preset condition, for example, the difference is less than a target time threshold (the target time threshold is the time required for the write command to complete data transmission), the command scheduler can determine that there is a write command occupying the data bus in the target channel, and further determine that the first target scheduling mode corresponding to the to-be-scheduled write command is to suspend pushing, that is, to suspend the pushing of the to-be-scheduled write command to the backend flash particle, so as to avoid the frequent pushing of the write command to the backend, which can avoid the situation that a large number of write commands are concurrent in the target channel, and reduce the latency of the host read command.

[0075] In addition, when there is a write command or an erase command in a suspended state in the flash particle in the target channel in the solid state disk, at this time, there is a high-priority host read command running in the target channel. In order to avoid that the to-be-scheduled write command occupies the data bus of the target channel, the command scheduler can determine the first target scheduling mode corresponding to the to-be-scheduled write command according to the number of suspension operations of the target channel, for example, when the number of suspension operations is greater than a first target value, the pushing of the to-be-scheduled write command to the backend flash particle is suspended, so as to avoid that the write command occupies the data bus of the target channel and reduce the latency of the host read command.

[0076] In addition, when the difference between the current value of the system clock and the historical value of the system clock does not meet the preset condition, and the number of suspension operations in the target channel is less than or equal to the first target value, the command scheduler can determine that there is neither a write command occupying the data bus nor a write command or an erase command in a suspended operation state in the target channel, and at this time, the first target scheduling mode of the to-be-scheduled write command can be determined as direct pushing, that is, the to-be-scheduled write command can be directly pushed to the backend flash particle, so as to ensure the normal execution of the write command. Of course, the first target scheduling mode of the to-be-scheduled write command can also be calculated and determined in other ways, and the specific calculation and determination can be set based on actual needs, and the embodiment of the present disclosure does not limit this.

[0077] S203, for the to-be-scheduled slow read command in the command queue corresponding to the flash particle in the target channel, determining a second target scheduling mode corresponding to the to-be-scheduled slow read command according to the number of slow read commands of the target channel.

[0078] In the embodiments of the present disclosure, the to-be-scheduled slow read command can be a non-host read command waiting to be pushed to the back-end flash particle. The second target scheduling mode can be a scheduling mode corresponding to the to-be-scheduled slow read command, and the second target scheduling mode can include suspending pushing to the back-end flash particle and directly pushing to the back-end flash particle.

[0079] Specifically, the slow read command is a non-host read command initiated internally in the solid state disk, and is usually a non-host read command corresponding to garbage collection. Since garbage collection includes non-host read and data erasure processes, it needs to occupy the data bus of the target channel, and therefore the command scheduler in the solid state disk also needs to control the frequency of pushing the slow read command to the back-end, so as to avoid frequent pushing of the slow read command to the back-end. In this step, the command scheduler can determine the second target scheduling mode corresponding to the to-be-scheduled slow read command according to the number of slow read commands in the target channel. When the number of slow read commands is large (for example, greater than a second target value), the command scheduler can determine that the second target scheduling mode is to suspend pushing, that is, to suspend pushing of the to-be-scheduled slow read command to the back-end flash particle, so as to avoid frequent pushing of the slow read command and reduce the concurrency of the slow read command in the target channel, thereby reducing the latency of the host read command.

[0080] S204, scheduling the to-be-scheduled write command according to the first target scheduling mode, and scheduling the to-be-scheduled slow read command according to the second target scheduling mode.

[0081] In the embodiments of the present disclosure, after determining the first target scheduling mode of the to-be-scheduled write command, the command scheduler in the solid state disk can perform scheduling processing on the to-be-scheduled write command according to the first target scheduling mode; after determining the second target scheduling mode corresponding to the to-be-scheduled slow read command, the command scheduler in the solid state disk can perform scheduling processing on the to-be-scheduled write command according to the first target scheduling mode.

[0082] In the embodiment of the present disclosure, in the case that the command state of the host side corresponding to the solid state disk is a hybrid command state, for each target channel in the solid state disk, the system clock historical value corresponding to the write command of the target channel is recorded, and the number of suspension operations of the target channel and the number of slow read commands of the target channel are recorded; the slow read command is a read command sent internally in the solid state disk; for the to-be-scheduled write command in the command queue corresponding to the flash memory grain in the target channel, the first target scheduling mode corresponding to the to-be-scheduled write command is determined according to the system clock current value, the system clock historical value and the number of suspension operations corresponding to the write command; for the to-be-scheduled slow read command in the command queue corresponding to the flash memory grain in the target channel, the second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands of the target channel; the to-be-scheduled write command is scheduled according to the first target scheduling mode, and the to-be-scheduled slow read command is scheduled according to the second target scheduling mode. In the present disclosure, the system clock historical value, the system clock current value and the number of suspension operations of the target channel are used to determine the first target scheduling mode of the to-be-scheduled write command, and the number of slow read commands is used to determine the second target scheduling mode of the to-be-scheduled slow read command, which can improve the flexibility of the command scheduling of the solid state disk, can control the pushing speed of the write command and the slow read command to the back end, avoid the concurrency of a large number of commands in the same channel, reduce the delay of the host read command in the hybrid command scene such as data center and cloud computing center, and meet the quality of service requirements to a certain extent.

[0083] On the basis of the above-mentioned embodiment, FIG. 3 is a flow diagram of another command scheduling method provided by an exemplary embodiment of the present disclosure. Please refer to FIG. 3, the command scheduling method can include:

[0084] S301, receiving a plurality of host commands from the host side in a preset period; in the case that the plurality of host commands include read commands and write commands, determining that the command state type of the host side is a hybrid command state.

[0085] In the embodiments of the present disclosure, the preset period can refer to a pre-set time period, which is used to determine the command state of the host side. The specific value can be set based on the actual scene, and the embodiments of the present disclosure do not limit it. Specifically, the CPU in the solid state disk can receive a plurality of host commands from the host side within the preset period, and then determine the command type of each host command. When the plurality of host commands simultaneously include both read commands and write commands, it can be determined that the host read command and the host write command fall on the solid state disk for processing within the preset period, and the solid state disk can determine that the command state of the host side is the mixed command state. In this way, the solid state disk in the embodiments of the present disclosure determines the command state of the host by determining the command type included in the host command, which can improve the flexibility of scene determination, and thus can ensure the rationality of subsequent command scheduling.

[0086] S302, in the case that the command state of the host side corresponding to the solid state disk is the mixed command state, for each target channel in the solid state disk, record the system clock historical value corresponding to the write command of the target channel, and record the number of suspension operations of the target channel and the number of slow read commands of the target channel; the slow read command is a read command sent internally in the solid state disk.

[0087] S303, for the to-be-scheduled write command in the command queue corresponding to the flash memory grain in the target channel, if the time interval between the current value of the system clock and the historical value of the system clock is less than the target time threshold, it is determined that the first target scheduling mode corresponding to the to-be-scheduled write command is suspension pushing; the target time threshold is determined according to the data transmission time corresponding to the flash memory grain in the target channel.

[0088] In the embodiments of the present disclosure, the time interval can refer to the difference between the current value of the system clock and the historical value of the system clock. The target time threshold can refer to the critical value of the time interval. The target time threshold can refer to a pre-set value, or can be calculated according to the data transmission time corresponding to the flash memory grain of the target channel of the solid state disk. The embodiments of the present disclosure do not limit it. When the command state of the host side corresponding to the solid state disk is the mixed command state, i.e. in the actual scene where the host side is in the mixed command state, and there is a to-be-scheduled write command in the command queue of the target channel flash memory grain, the command scheduler of the solid state disk can determine the time interval between the current value of the system clock and the historical value of the system clock. If the time interval is less than the target time threshold, there is a write command in the target channel at this time. The command scheduler can determine that the first target scheduling mode corresponding to the to-be-scheduled write command is suspension pushing, i.e. suspending the pushing of the to-be-scheduled write command to the back-end flash memory grain, to avoid the large concurrent situation of the write command in the target channel.

[0089] Specifically, the solid state disk can determine the data transfer time (xfer time) corresponding to the target channel flash memory particle according to the hardware parameters, which can specifically include the physical page size, the plane number, and the Open NAND Flash Interface (ONFI) frequency, etc. For example, without considering the data transfer interruption (xfer suspend), when the data amount of the programming operation of a QLC flash memory particle is 256 kilobytes (KB), the physical page size is 16 KB, the plane number is 4, and the ONFI frequency = 1200 million times per second (MT / s), the data transfer time is 213.33 microseconds (us), and the target time threshold value can be 213.33 us at this time.

[0090] In this way, the data transfer time of the flash memory particle is 213.33 us, and assuming that there are 16 flash memory particles in the target channel, if there is a QLC write command (QLC program command) on each flash memory particle that needs to perform data transfer (xfer data), any one of the 16 flash memory particles needs to wait for 16 x 213.33 us = 3413.28 us after receiving a host read command in the back end before initiating data transfer. In the embodiment of the present disclosure, when the command scheduler determines the target time threshold value according to the data transfer time to schedule the to-be-scheduled write command, when the time interval between the current value of the system clock and the historical value of the system clock is less than the target time threshold value, the command scheduler suspends the pushing of the to-be-scheduled write command to the back-end flash memory particle, so that the host read command can initiate data transfer after waiting for at most 213.33 us, which can greatly reduce the long tail delay of the host read command.

[0091] S304, if the number of suspension operations is greater than the first target value, it is determined that the first target scheduling mode corresponding to the to-be-scheduled write command is to suspend pushing.

[0092] In the embodiments of the present disclosure, the first target value can refer to a pre-set critical value of the number of suspension operations, and the first target value can be 0, etc. In this embodiment of the present disclosure, the first target value is not limited. In this step, when the number of suspension operations of the target channel is greater than the first target value (for example, 0, etc.), at this time, the solid state disk can determine that there is a write command or an erase command in the suspended state in the flash memory particles in the target channel, that is, there is a running other host read command in the target channel, at this time, the solid state disk can determine that the first target scheduling mode corresponding to the to-be-scheduled write command is suspension pushing, that is, suspending the pushing of the to-be-scheduled write command to the back-end flash memory particles, so as to avoid the write command occupying the data bus of the target channel and reduce the delay of the host read command.

[0093] In the embodiments of the present disclosure, the second target value can refer to a pre-set critical value of the number of slow read commands, for example, the second target value can be a value of 1, 2, etc. In this embodiment of the present disclosure, the second target value is not limited. When the number of slow read commands in the solid state disk is greater than the second target value, at this time, there is a slow read command running on the target channel of the solid state disk, the command scheduler in the solid state disk can determine that the second target scheduling mode corresponding to the to-be-scheduled slow read command is suspension pushing, that is, suspending the pushing of the to-be-scheduled slow read command to the back-end flash memory particles, so as to avoid the concurrency of the slow read command in the target channel, to a certain extent, the delay of the host read command can be reduced, and the requirement of the service quality of the host read command can be met.

[0094] In the embodiments of the present disclosure, the second target value can refer to a pre-set critical value of the number of slow read commands, for example, the second target value can be a value of 1, 2, etc. In this embodiment of the present disclosure, the second target value is not limited. When the number of slow read commands in the solid state disk is greater than the second target value, at this time, there is a slow read command running on the target channel of the solid state disk, the command scheduler in the solid state disk can determine that the second target scheduling mode corresponding to the to-be-scheduled slow read command is suspension pushing, that is, suspending the pushing of the to-be-scheduled slow read command to the back-end flash memory particles, so as to avoid the concurrency of the slow read command in the target channel, to a certain extent, the delay of the host read command can be reduced, and the requirement of the service quality of the host read command can be met.

[0095] In the embodiments of the present disclosure, the second target value can refer to a pre-set critical value of the number of slow read commands, for example, the second target value can be a value of 1, 2, etc. In this embodiment of the present disclosure, the second target value is not limited. When the number of slow read commands in the solid state disk is greater than the second target value, at this time, there is a slow read command running on the target channel of the solid state disk, the command scheduler in the solid state disk can determine that the second target scheduling mode corresponding to the to-be-scheduled slow read command is suspension pushing, that is, suspending the pushing of the to-be-scheduled slow read command to the back-end flash memory particles, so as to avoid the concurrency of the slow read command in the target channel, to a certain extent, the delay of the host read command can be reduced, and the requirement of the service quality of the host read command can be met.

[0096] In the embodiments of the present disclosure, the slow read command concurrency can refer to the maximum number of slow read commands processed by the flash memory particles at the same time. Since the slow read command needs to occupy the data bus, in order to avoid the data transmission blockage caused by the concurrency of a large number of slow read commands, the flash memory particle command scheduler in the solid state disk can reduce the slow read command concurrency of each flash memory particle in the target channel, for example, by default, the slow read command concurrency of the flash memory particle in the target channel is 4, and the command scheduler can directly reduce the slow read command concurrency of the flash memory particle in the target channel to 1 when it is determined that the command state on the host side is a mixed command state. In this way, the flash memory particle command scheduler of the solid state disk can avoid the data transmission blockage caused by the concurrency of the slow read command in the target channel by reducing the slow read command concurrency, and can reduce the delay of the host read command.

[0097] S307, in the case where the command state of the host side corresponding to the solid state disk is a mixed command state, increasing the instruction concurrency quantity of each flash memory particle in the target channel.

[0098] In the embodiments of the present disclosure, the instruction concurrency quantity can refer to the number of commands executed simultaneously by the flash memory particle in the target channel. In the solid state disk, the concurrency capability of each target channel is limited, and the concurrency capability allocated to each flash memory particle is also limited. For example, the instruction concurrency quantity of a target channel is 32, and the concurrency capability allocated to each flash memory particle can be 2 instruction concurrency quantities. When the command state of the host side corresponding to the solid state disk is a mixed command state, for the flash memory particle with 2 instruction concurrency quantities, if there is a write command and a host read command on the flash memory particle, the write command can be paused, but the write command in the paused state still occupies one instruction concurrency quantity. At this time, after the back-end flash memory particle completes a host read command, it needs to wait for the front-end solid state disk to push the next read command, so that the back-end cannot dynamically flow when processing the host read command, resulting in a longer delay of the host read command.

[0099] In this step, in the case where the command state of the host side corresponding to the solid state disk is a mixed command state, the solid state disk can increase the instruction concurrency quantity of each flash memory particle in the target channel. For example, the instruction concurrency quantity of each flash memory particle can be adjusted to 3. In this way, even if there is a write command on the flash memory particle, the command scheduler can send two host read commands to the back-end flash memory particle. After the back-end executes a host read command, it can immediately execute the next host read command, saving the time waiting for the front-end to send the host read command, and the front-end can directly push a new third host read command to the back-end. In this way, the front-end and the back-end of the solid state disk can be concurrent, realizing dynamic flow processing of the host read command in the flash memory particle, without waiting for the front-end to push the host read command for execution, which can significantly reduce the delay of the host read command.

[0100] Each channel has a certain concurrency capability, but this concurrency capability is limited, and the concurrency capability allocated to each die is also limited. For example, the concurrency capability of a channel is 32, and the concurrency capability allocated to each die can be only 2 commands. If there is a read command and a write command in the 2 commands in the mixed mode, but the write command cannot be released in the paused state. In this way, the read command in the die can be completed one by one, and the next read command is pushed from the upper layer to the lower layer after the previous one is completed. In this way, the back-end cannot flow, and needs to wait for the front-end to push the next read command after completing a read command, resulting in a longer delay of the read command.

[0101] In the embodiment of the present disclosure, for each flash memory particle in the target channel of the solid state disk, the number of concurrent instructions of the flash memory particle can be increased, for example, one concurrent command structure (command) can be added, so that on the basis of the original concurrent capability, although one write command with a pause operation cannot be released, two commands in the flash memory particle can execute read commands, and after executing one read command, the next read command can be executed immediately without waiting for the front end to send, and the front end can directly push a new third read command. In this way, the front end and the back end can be concurrent, which is equivalent to being able to flow, avoiding the delay caused by the back end waiting for the front end to push the command.

[0102] In a possible implementation, step S307 can be implemented by the following manner:

[0103] For each flash memory particle in the target channel, at least one concurrent command structure is added in the flash memory particle.

[0104] In the embodiment of the present disclosure, the concurrent command structure can be a command context structure in the flash memory particle, for example, it can be a NAND controller logic command. Specifically, the solid state disk can add at least one concurrent command structure for each flash memory particle of the target channel in the mixed command state, so that the number of concurrent instructions of the flash memory particle can be increased, and even if there is a write command on the flash memory particle, the command scheduler can directly send two or more host read commands to the back-end flash memory particle, which can reduce the waiting time of the back-end flash memory particle and reduce the delay of the host read command.

[0105] For example, the firmware overhead required by the command scheduler for scheduling once is usually more than 200 microseconds. In the case where the number of concurrent instructions of one flash memory particle is 2, if there is a write operation on the flash memory particle, the back-end flash memory particle needs to wait for the command scheduler to schedule once after executing one host read command, and then push a new host read command to the back-end flash memory particle, so that the delay of the host read command is at least increased by 200 microseconds. In the embodiment of the present disclosure, after the solid state disk adds at least one concurrent command structure for each flash memory particle of the target channel, that is, after adding one command context and increasing the number of concurrent instructions, the command scheduler can push at least two host read commands to the back-end flash memory particle at the same time, and the back-end flash memory particle does not need to spend 200 microseconds of waiting time, so that the dynamic flow processing of the host read command can be realized, the delay of the host read command can be reduced to a certain extent, and the quality requirement of the host read command can be met.

[0106] In the embodiments of the present disclosure, the solid state disk schedules the slow read command and the write command according to the system clock value (historical value, current value) of the write command, the number of pause operations in the target channel, and the number of slow read commands, can reduce the concurrency of the slow read command, improve the instruction concurrency of the flash grain, and better improve the long tail delay of the host read command, reduce the delay of the host read command in the mixed command state, and thus ensure the service instruction of the host read command.

[0107] It should be understood that, in various embodiments of the present disclosure, the size of the sequence number of each process does not mean the order of execution, and the execution order of each process should be determined according to its function and inherent logic, and should not constitute any limitation on the implementation process of the embodiments of the present disclosure.

[0108] FIG. 4 is a structural schematic diagram of a command scheduling device provided by an exemplary embodiment of the present disclosure, please refer to FIG. 4, the command scheduling device 40 comprises:

[0109] The recording module 41 is configured to, in the case that the command state of the host side corresponding to the solid state disk is in the mixed command state, record the system clock historical value corresponding to the write command of the target channel in each target channel in the solid state disk, and record the number of pause operations of the target channel and the number of slow read commands of the target channel;

[0110] The first scheduling module 42 is configured to, for the to-be-scheduled write command in the command queue corresponding to the flash grain in the target channel, determine the first target scheduling mode corresponding to the to-be-scheduled write command according to the system clock current value, the system clock historical value and the number of pause operations corresponding to the write command;

[0111] The second scheduling module 43 is configured to, for the to-be-scheduled slow read command in the command queue corresponding to the flash grain in the target channel, determine the second target scheduling mode corresponding to the to-be-scheduled slow read command according to the number of slow read commands of the target channel;

[0112] The third scheduling module 44 is configured to schedule the to-be-scheduled write command according to the first target scheduling mode, and schedule the to-be-scheduled slow read command according to the second target scheduling mode.

[0113] In a possible implementation, the device 40 is further configured to:

[0114] receive a plurality of host commands from the host side in a preset period;

[0115] In the case that the plurality of host commands comprises a read command and a write command, determine that the command state of the host side is in the mixed command state.

[0116] In a possible implementation, the first scheduling module 42 is specifically configured to:

[0117] If the time interval between the current value of the system clock and the historical value of the system clock is less than a target time threshold, it is determined that the first target scheduling manner corresponding to the to-be-scheduled write command is pause pushing, and the target time threshold is determined according to the data transmission time corresponding to the flash grain in the target channel.

[0118] If the number of pause operations is greater than a first target value, it is determined that the first target scheduling manner corresponding to the to-be-scheduled write command is pause pushing.

[0119] In a possible implementation, the second scheduling module 43 is specifically configured to:

[0120] If the number of slow read commands is greater than a second target value, it is determined that the second target scheduling manner corresponding to the to-be-scheduled slow read command is pause pushing.

[0121] In a possible implementation, the device 40 is further configured to:

[0122] In the case where the command state on the host side corresponding to the solid state disk is a mixed command state, the number of slow read commands of each flash grain in the target channel is reduced.

[0123] In a possible implementation, the device 40 is further configured to:

[0124] In the case where the command state on the host side corresponding to the solid state disk is a mixed command state, the number of instruction concurrency of each flash grain in the target channel is increased.

[0125] In a possible implementation, the device 40 is further configured to:

[0126] For each flash grain in the target channel, at least one concurrent command structure is added in the flash grain.

[0127] The command scheduling device 40 provided by the embodiments of the present disclosure can execute the technical solutions shown in the above method embodiments, and the implementation principles and beneficial effects are similar, which will not be repeated here.

[0128] FIG. 5 is a structural schematic diagram of an electronic device provided by an exemplary embodiment of the present disclosure. Referring to FIG. 5, the electronic device 50 can include a processor 51 and a memory 52. Exemplarily, the processor 51, the memory 52, and each part are connected to each other through a bus 53.

[0129] The memory 52 stores computer execution instructions;

[0130] The processor 51 executes the computer execution instructions stored in the memory 52, so that the processor 51 executes the command scheduling method as shown in the above method embodiments.

[0131] Accordingly, the embodiment of the present disclosure provides a computer readable storage medium, which stores computer execution instructions. When the computer execution instructions are executed by a processor, the computer execution instructions are used to implement the command scheduling method of the above method embodiment.

[0132] Accordingly, the embodiment of the present disclosure can also provide a computer program product, which includes a computer program. When the computer program is executed by a processor, the computer program can implement the command scheduling method shown in the above method embodiment.

[0133] Those skilled in the art should understand that the embodiments of the present disclosure can be provided as a method, a system, or a computer program product. Therefore, the present disclosure can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Moreover, the present disclosure can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROMs, optical storage, etc.) containing computer-usable program code.

[0134] The present disclosure is described with reference to flowcharts and / or block diagrams of the method, device (system), and computer program product according to the embodiments of the present disclosure. It should be understood that each flow and / or block in the flowcharts and / or block diagrams, and the combination of the flows and / or blocks in the flowcharts and / or block diagrams can be implemented by computer program instructions. These computer program instructions can be provided to a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable command scheduling devices to produce a machine, so that the instructions executed by the processor of the computer or other programmable command scheduling devices produce a device that implements the functions specified in one or more flows in the flowcharts and / or one or more blocks in the block diagrams.

[0135] These computer program instructions can also be stored in a computer readable memory that can guide the computer or other programmable command scheduling devices to work in a specific way, so that the instructions stored in the computer readable memory produce a product including instruction devices that implement the functions specified in one or more flows in the flowcharts and / or one or more blocks in the block diagrams.

[0136] These computer program instructions can also be loaded into a computer or other programmable command scheduling device, so that a series of operation steps are performed on the computer or other programmable device to produce a computer implemented process, so that the instructions executed on the computer or other programmable device provide steps for implementing the functions specified in one or more flows in the flowcharts and / or one or more blocks in the block diagrams.

[0137] In a typical configuration, the computing device includes one or more processors, input / output interfaces, network interfaces, and memories.

[0138] Memory can include non-persistent memory, Random Access Memory (RAM), and / or non-volatile memory, such as Read Only Memory (ROM) or flash memory, in computer readable media. Memory is an example of computer readable media.

[0139] Computer readable media includes permanent and non-permanent, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory or other memory technology, compact disc read only memory (CD-ROM), digital versatile disc (DVD), or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other non-transmission medium that can be used to store information accessible to a computing device. According to the definition herein, computer readable media does not include transitory media, such as modulated data signals and carrier waves.

[0140] It should also be noted that the terms "comprising", "containing", or any other variant thereof are intended to cover a non-exclusive inclusion, such that a process, method, article or apparatus that comprises a list of elements does not include only those elements in the list, but can also include other elements not expressly listed or inherent to such process, method, article or apparatus. Without further limitation, an element defined by the statement "comprising a" does not exclude the presence of additional identical elements in the process, method, article or apparatus that includes the element.

[0141] The above only describes the embodiments of the present disclosure and is not intended to limit the present disclosure. The present disclosure can have various modifications and changes for those skilled in the art. Any modification, equivalent replacement, improvement, etc. within the spirit and principle of the present disclosure shall be included in the scope of claims of the present disclosure.

Claims

1. A command dispatching method, wherein, The method is applied to a solid state disk, and the method comprises the following steps: In a case where a command state of a host side corresponding to the solid state disk is a mixed command state, for each target channel in the solid state disk, a system clock historical value corresponding to a write command of the target channel is recorded, and a number of pause operations of the target channel and a number of slow read commands of the target channel are recorded; the slow read command is a read command sent internally in the solid state disk; For a to-be-scheduled write command in a command queue corresponding to a flash memory grain in the target channel, a first target scheduling mode corresponding to the to-be-scheduled write command is determined according to a current value of a system clock corresponding to the write command, the system clock historical value and the number of pause operations; For a to-be-scheduled slow read command in the command queue corresponding to the flash memory grain in the target channel, a second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands of the target channel; The to-be-scheduled write command is scheduled according to the first target scheduling mode, and the to-be-scheduled slow read command is scheduled according to the second target scheduling mode.

2. The method of claim 1, wherein, The method further comprises the following steps: A plurality of host commands are received from the host side in a preset period; In a case where the plurality of host commands comprise a read command and a write command, it is determined that the command state of the host side is a mixed command state.

3. The method of claim 1 or 2, wherein, The first target scheduling mode corresponding to the to-be-scheduled write command is determined according to the current value of the system clock corresponding to the write command, the system clock historical value and the number of pause operations, and the method comprises the following steps: If a time interval between the current value of the system clock and the system clock historical value is less than a target time threshold value, it is determined that the first target scheduling mode corresponding to the to-be-scheduled write command is pause pushing; the target time threshold value is determined according to a data transmission time of the flash memory grain in the target channel; If the number of pause operations is greater than a first target value, it is determined that the first target scheduling mode corresponding to the to-be-scheduled write command is pause pushing.

4. The method according to any one of claims 1 to 3, wherein, The second target scheduling mode corresponding to the to-be-scheduled slow read command is determined according to the number of slow read commands of the target channel, and the method comprises the following steps: If the number of slow read commands is greater than a second target value, it is determined that the second target scheduling mode corresponding to the to-be-scheduled slow read command is pause pushing.

5. The method according to any one of claims 1 to 4, wherein, The method further comprises the following steps: In a case where a command state of a host side corresponding to the solid state disk is a mixed command state, the number of slow read commands of each flash memory grain in the target channel is reduced.

6. The method according to any one of claims 1 to 5, wherein, The method further comprises the following steps: In a case where a command state of a host side corresponding to the solid state disk is a mixed command state, the number of instruction concurrent commands of each flash memory grain in the target channel is increased.

7. The method of claim 6, wherein, The number of instruction concurrent commands of each flash memory grain in the target channel is increased, and the method comprises the following steps: At least one concurrent command structure is added in each flash memory grain in the target channel.

8. A command scheduling apparatus, wherein, The method further comprises the following steps: The recording module is configured to, in a case where a command state of a host side corresponding to the solid state disk is a mixed command state, record, for each target channel in the solid state disk, a system clock historical value corresponding to a write command of the target channel, and record a number of pause operations of the target channel and a number of slow read commands of the target channel. The first scheduling module is configured to, for a to-be-scheduled write command in a command queue corresponding to a flash memory grain in the target channel, determine a first target scheduling manner corresponding to the to-be-scheduled write command according to a current value of a system clock corresponding to the write command, the system clock historical value, and the number of pause operations. The second scheduling module is configured to, for a to-be-scheduled slow read command in the command queue corresponding to the flash memory grain in the target channel, determine a second target scheduling manner corresponding to the to-be-scheduled slow read command according to the number of slow read commands of the target channel. The third scheduling module is configured to schedule the to-be-scheduled write command according to the first target scheduling manner, and schedule the to-be-scheduled slow read command according to the second target scheduling manner.

9. An electronic device, comprising: comprising: a memory and a processor; the memory stores computer execution instructions; the processor executes the computer execution instructions stored in the memory, so that the processor executes the command scheduling method according to any one of claims 1 to 7.

10. A computer readable storage medium, wherein, The computer readable storage medium stores computer execution instructions, and when the computer execution instructions are executed by the processor, the command scheduling method according to any one of claims 1 to 7 is implemented.

11. A computer program product, wherein, comprising a computer program, when the computer program is executed by a computer, the command scheduling method according to any one of claims 1 to 7 is implemented.

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