Display panel and display apparatus having same

Abstract

A display panel. The display panel comprises a display area and a non-display area, the non-display area at least partially surrounding the display area. The display area comprises a main display area and an auxiliary display area, the main display area at least partially surrounding the auxiliary display area. The auxiliary display area contains a light-transmitting hole, the light-transmitting hole being used for transmitting a light ray to a photosensitive element. The display panel further comprises a substrate and a plurality of signal lines. The signal lines comprise a first signal line, the first signal line extending in a first direction and comprising a first cut. In a second direction, the orthographic projection of the first cut on the substrate overlaps the orthographic projection of the light-transmitting hole on the substrate, the first direction intersecting the second direction.

Description

Display panel and display device thereof

[0001] The present application claims priority to the Chinese patent application No. 202411262703.1, filed on September 9, 2024, to the Chinese Patent Office, the content of which is incorporated herein by reference in its entirety. TECHNICAL FIELD

[0002] Embodiments of the present application relate to the display technical field, for example, to a display panel and a display device thereof. BACKGROUND

[0003] With the continuous development of display technology, display panels have been widely used in people's production and life. In order to better meet people's needs, the display panel can be adjusted, for example, the wiring in the display panel is adjusted, so as to improve the overall effect of the display panel.

[0004] SUMMARY

[0005] In a first aspect, embodiments of the present application provide a display panel, comprising a display area and a non-display area, the non-display area at least partially surrounds the display area;

[0006] The display area comprises a main display area and an auxiliary display area, the main display area at least partially surrounds the auxiliary display area; the auxiliary display area comprises a light transmission hole, the light transmission hole is used for transmitting light to a photosensitive element;

[0007] The display panel further comprises a substrate and a plurality of signal lines, the signal lines comprise a first signal line, the first signal line extends along a first direction; the first signal line comprises a first break; along a second direction, the orthographic projection of the first break on the substrate overlaps with the orthographic projection of the light transmission hole on the substrate;

[0008] Wherein, the first direction and the second direction intersect.

[0009] In a second aspect, embodiments of the present application provide a display device, comprising the display panel of the first aspect;

[0010] The display device further comprises a photosensitive element;

[0011] Along the thickness direction of the display device, the light transmission hole overlaps with the photosensitive element. BRIEF DESCRIPTION OF DRAWINGS

[0012] FIG. 1 is a structural schematic diagram of a first display panel according to an embodiment of the present application;

[0013] FIG. 2 is an enlarged schematic diagram of a first auxiliary display area according to an embodiment of the present application;

[0014] FIG. 3 is an enlarged schematic view of a second auxiliary display area according to an embodiment of the present application;

[0015] FIG. 4 is an enlarged schematic view of region B in FIG. 1;

[0016] FIG. 5 is a first cross-sectional view along section line C-C' in FIG. 4;

[0017] FIG. 6 is a second cross-sectional view along section line C-C' in FIG. 4;

[0018] FIG. 7 is an enlarged schematic view of a first auxiliary display area according to an embodiment of the present application;

[0019] FIG. 8 is an enlarged schematic view of a second auxiliary display area according to an embodiment of the present application;

[0020] FIG. 9 is a structural schematic view of a second display panel according to an embodiment of the present application;

[0021] FIG. 10 is a schematic view of a film layer setting of an auxiliary line according to an embodiment of the present application;

[0022] FIG. 11 is an enlarged schematic view of a third auxiliary display area according to an embodiment of the present application;

[0023] FIG. 12 is an enlarged schematic view of a fourth auxiliary display area according to an embodiment of the present application;

[0024] FIG. 13 is an enlarged schematic view of a fifth auxiliary display area according to an embodiment of the present application;

[0025] FIG. 14 is an enlarged schematic view of a sixth auxiliary display area according to an embodiment of the present application;

[0026] FIG. 15 is an enlarged schematic view of a seventh auxiliary display area according to an embodiment of the present application;

[0027] FIG. 16 is a structural schematic view of a third display panel according to an embodiment of the present application;

[0028] FIG. 17 is a structural schematic view of a fourth display panel according to an embodiment of the present application;

[0029] FIG. 18 is a structural schematic view of a fifth display panel according to an embodiment of the present application;

[0030] FIG. 19 is a structural schematic view of a first pixel circuit according to an embodiment of the present application;

[0031] FIG. 20 is a timing diagram of an embodiment of signals provided to the pixel circuit shown in FIG. 19 during a drive period according to an embodiment of the present application;

[0032] FIG. 21 is a structural schematic view of a second pixel circuit according to an embodiment of the present application;

[0033] FIG. 22 is a timing diagram of an embodiment of signals provided to the pixel circuit of FIG. 21 during a drive cycle according to an embodiment of the present application;

[0034] FIG. 23 is a first enlarged schematic view of region D of FIG. 1;

[0035] FIG. 24 is a second enlarged schematic view of region D of FIG. 1;

[0036] FIG. 25 is a third enlarged schematic view of region D of FIG. 1;

[0037] FIG. 26 is a fourth enlarged schematic view of region D of FIG. 1;

[0038] FIG. 27 is a fifth enlarged schematic view of region D of FIG. 1;

[0039] FIG. 28 is a schematic view of an eighth sub-display according to an embodiment of the present application;

[0040] FIG. 29 is another enlarged schematic view of region B of FIG. 1;

[0041] FIG. 30 is a cross-sectional view of FIG. 29 along section line F-F';

[0042] FIG. 31 is a schematic view of a display device according to an embodiment of the present application. DETAILED DESCRIPTION

[0043] The terms "first", "second", and the like, as used in the description and the claims of this application, are used for distinguishing between similar elements and not necessarily for describing a particular sequential or chronological order. It is to be understood that the use of these terms in the description and the claims of this application is merely for distinguishing between the similar elements, and not necessarily for describing a particular sequential or chronological order. Unless specifically set forth herein, the terms "first", "second", and the like do not entail a description of a temporal or chronological order. It is to be understood that the terms "first", "second", and the like can be used interchangeably with the terms "initial", "primary", or the like, and vice versa. The terms "comprise", "comprising", "include", "including", and the like, as used herein, specify the presence of stated features, integers, steps, or components, but do not preclude the presence or addition of one or more other features, integers, steps, components, or groups thereof. The terms "coupled", "coupling", "connected", "connecting", or the like, as used herein, mean the elements or components so described are directly or indirectly connected or coupled together either electrically, mechanically or via some other means of connection.

[0044] FIG. 1 is a structural schematic diagram of a first display panel provided by an embodiment of the present application, FIG. 2 is an enlarged schematic diagram of a first auxiliary display area provided by an embodiment of the present application, and FIG. 3 is an enlarged schematic diagram of a second auxiliary display area provided by an embodiment of the present application. Referring to FIGS. 1 to 3, an embodiment of the present application provides a display panel 10, which includes a display area AA and a non-display area NA, the non-display area NA at least partially surrounds the display area AA; the display area AA includes a main display area AA1 and an auxiliary display area AA2, the main display area AA1 at least partially surrounds the auxiliary display area AA2; the auxiliary display area AA2 includes a light-transmitting hole 100, the light-transmitting hole 100 is used for transmitting light to a photosensitive element; the display panel 10 further includes a substrate 200 and a plurality of signal lines 300, the signal lines 300 include a first signal line 310, the first signal line 310 extends along a first direction X1; the first signal line 310 includes a first break 310a; along a second direction X2, the first break 310a on the substrate 200 overlaps with the light-transmitting hole 100 on the substrate 200; wherein the first direction X1 and the second direction X2 intersect.

[0045] Referring to FIG. 1, the display panel 10 includes the display area AA and the non-display area NA, the display area AA includes a light-emitting element 400 and a signal line connected with the light-emitting element 400, etc., for realizing the display function of the display panel 10. The non-display area NA includes a display controller, for example, a driving chip, etc., the display controller can be electrically connected with some signal lines located in the display area AA, for example, taking a data signal line as an example, the display controller can provide a display signal to the data signal line in the display area AA, and then drive the display panel 10 to realize the display function. The non-display area NA surrounds at least part of the display area AA, based on the specific positions of the display area AA and the non-display area NA, embodiments of the present application do not make specific limitations.

[0046] Optionally, referring to FIG. 1, the display area AA includes a main display area AA1 and an auxiliary display area AA2, the main display area AA1 at least partially surrounds the auxiliary display area AA2, the auxiliary display area AA2 includes a light transmission hole 100, and the light transmission hole 100 is used for transmitting light to a photosensitive element, and the number of photosensitive elements arranged at the light transmission hole 100 in the thickness direction of the display panel 10 has diversity, which is not specifically described in the embodiments of the present application. Wherein, the main display area AA1 and the auxiliary display area AA2 can be understood as follows: the main display area AA1 is used to realize the main display function of the display panel 10, and the auxiliary display area AA2 can meet the light transmission requirement of the display panel 10 while realizing the display function of the display panel 10. It should be noted that the relative position relationship between the main display area AA1 and the auxiliary display area AA2 is shown in FIG. 1 for clarity, and the case where the signal line is electrically connected to the light emitting element 400 is not shown in FIG. 1; at the same time, the arrangement mode of the auxiliary display area AA2 in the display area AA has diversity and flexibility, and FIG. 1 only shows one relative position relationship between the main display area AA1 and the auxiliary display area AA2. In different display panels 10, based on the different arrangement positions of the photosensitive element, the arrangement position of the light transmission hole 100 has diversity, so the relative position of the main display area AA1 and the auxiliary display area AA2 has diversity. It can be understood that the auxiliary display area AA2 can be provided with a plurality of light transmission holes 100 to increase the light transmission rate.

[0047] Optionally, the photosensitive element can be understood as an optical sensor, and the external light can be transmitted to the photosensitive element through the light transmission hole of the display panel 10. For example, the photosensitive element can be an under-screen camera, a fingerprint identification module, an ambient light sensor or an infrared sensor, etc., the external light is transmitted to the photosensitive element through the light transmission hole 100, and the photosensitive element works based on the external light, which is not specifically limited in the embodiments of the present application. Wherein, the light transmission hole 100 can be understood as an area in which the external light can be transmitted to the photosensitive element in the area of the light transmission hole 100, that is, the light flux size that can be transmitted to the light transmission hole 100 directly affects the light transmission rate of the display panel 10.

[0048] Optionally, FIG. 4 is an enlarged schematic view of region B in FIG. 1, FIG. 5 is a first cross-sectional schematic view of FIG. 4 along section line C-C', and FIG. 6 is a second cross-sectional schematic view of FIG. 4 along section line C-C'. As shown in FIGS. 4 to 6, the display panel 10 further includes a light-blocking layer 500, where the light-blocking layer 500 includes at least one opening 500a, and the opening 500a of the light-blocking layer 500 is arranged to overlap the through hole 100 in the thickness direction of the display panel 10. The opening 500a and the through hole 100 can at least partially overlap, or the opening 500a and the through hole 100 completely overlap in the thickness direction of the display panel 10, which is not specifically limited in the embodiments of the present application. The region of the light-blocking layer 500 without the opening 500a can block the transmission of light, and the light can be transmitted at the opening 500a, i.e., the light can be transmitted to the through hole 100 through the opening 500a, and then transmitted to the photosensitive element.

[0049] Optionally, as shown in FIG. 5, the light-blocking layer 500 can be understood as a pixel definition layer 500b that blocks light. The pixel definition layer 500b defines the size of the first electrode 401 (i.e., the anode) of the light-emitting element 400. The pixel definition layer 500b can block light, and part of the pixel definition layer 500b is designed to be opened to form the opening 500a, which is arranged to correspond to the light-transmitting hole 100, i.e., the opening 500a can transmit light to the photosensitive element.

[0050] Optionally, as shown in FIG. 6, the light-blocking layer 500 can be located on the side of the light-emitting element 400 away from the substrate 200. The light-blocking layer 500 includes a black matrix 500c and a filter layer 500d, and the filter layer 500d can include filter layers of different colors. The black matrix 500c is designed to be opened to prepare the opening 500a of the light-blocking layer 500, and the opening 500a is arranged to correspond to the light-transmitting hole 100, i.e., the opening 500a can transmit light to the photosensitive element.

[0051] Optionally, the light-transmitting hole 100 shown in FIGS. 5 and 6 is that the film layer 600 on the side of the substrate 200 is hollowed out. The film layer 600 can include an array layer, and the embodiments of the present application will not be exemplified one by one. Optionally, the light-transmitting hole 100 can also be designed to hollow out part of the film layer 600. The specific arrangement of the light-transmitting hole 100 can be adaptively adjusted according to different display panels 10 or different photosensitive elements, which is not specifically limited in the embodiments of the present application. It can be understood that in some embodiments, only the light-blocking layer 500 can be hollowed out, i.e., only the opening is arranged in the light-blocking layer 500 to form the light-transmitting hole 100.

[0052] The light flux transmitted to the photosensitive element through the light transmission hole 100 is related to the trace around the light transmission hole 100 along the thickness direction of the display panel 10 or the light shielding structure around the light transmission hole 100. The specific shape and size of the light transmission hole 100 are not limited in the embodiments of the present application, which are only exemplarily shown by the dashed rectangular frame in FIGS. 2 and 3. The display panel 10 can adjust the light flux transmitted to the light transmission hole 100, that is, adjust the structure that shields the light, to improve the light transmittance of the light transmission hole 100, thereby realizing the adjustment of the light transmittance of the display panel 10.

[0053] For example, referring to FIGS. 2 and 3, the auxiliary display area AA2 is enlarged and shown, and specifically, the display panel 10 includes a substrate 200 and a signal line 300 arranged on one side of the substrate 200. The signal line 300 includes a first signal line 310 extending along a first direction X1, and the first signal line 310 further includes a first break 310a, that is, the first signal line 310 is arranged discontinuously at the first break 310a, or it can be understood that the first signal line 310 is not completely extended in the first direction X1, and there is a break. The orthographic projection of the first break 310a arranged on the first signal line 310 on the substrate 200 is adjacent to or intersects with the orthographic projection of the light transmission hole 100 on the substrate 200. Thus, the trace that originally shields the light transmission hole 100 is arranged discontinuously, and the arrangement of the first break 310a can increase the light transmittance of the light transmission hole 100, that is, weaken the influence of the trace on the light transmittance of the light transmission hole 100, thereby increasing the light transmittance of the display panel 10 at the light transmission hole 100, and thus embodying the acquisition ability of the display panel 10 to external light.

[0054] For example, referring to FIGS. 2 and 3, along the second direction X2, the orthographic projection of the first break 310a on the substrate 200 overlaps with the orthographic projection of the light transmission hole 100 on the substrate 200, that is, comparing the orthographic projection of the first break 310a on the substrate 200 with the orthographic projection of the light transmission hole 100 on the substrate 200, along the second direction X2, the two orthographic projections overlap. Or it can be understood that, as shown in FIGS. 2 and 3, in the plan view (top view) without considering the film layer position relationship between the first signal line 310 and the light transmission hole 100, along the second direction X2, the first break 310a of the first signal line 310 overlaps with the light transmission hole 100, which can directly or indirectly increase the light transmittance of the light transmission hole 100.

[0055] In the embodiments of the present application, overlap is understood as at least partial overlap, that is, there can be only partial overlap, or complete overlap, which will not be described in detail in the subsequent content.

[0056] FIG. 7 is an enlarged schematic view of a first auxiliary display area according to an embodiment of the present disclosure, and FIG. 8 is an enlarged schematic view of a second auxiliary display area according to an embodiment of the present disclosure. As shown in FIGS. 7 and 8, if the first signal line 310 is routed at the first break 310a instead of being broken, the part of the routing will block the light transmitted to the light transmission hole 100, and thus affect the light transmittance of the light transmission hole 100. For example, as shown in FIGS. 7 and 2, if the first signal line 310 is not broken at the first break 310a, the routing at the first break 310a will directly affect the light transmission of the light transmission hole 100, i.e., reduce the light transmittance of the light transmission hole 100 (for example, as shown in FIGS. 7 and 2, the area of the rectangular frame denoted by the light transmission hole 100 is smaller), or as shown in FIGS. 8 and 3, if the first signal line 310 is routed at the first break 310a, the routing mode of other routing will be affected, and thus indirectly affect the light transmittance of the light transmission hole 100, and thus affect the light transmittance of the display panel 10 as a whole.

[0057] In order to improve the light transmittance of the display panel 10, i.e., increase the light transmittance of the light transmission hole 100, the part of the routing that blocks the light transmitted to the light transmission hole 100 is broken, i.e., the first break 310a is arranged on the first signal line 310, and thus the light transmittance of the display panel 10 as a whole is ensured. For example, as the display panel 10 develops, the functions of the display panel 10 become more and more abundant, and the types and number of the routing arranged accordingly increase, and thus there is a limitation in improving the light transmittance by routing avoidance. According to the present disclosure, the position of the routing can not be adjusted, and the problem of routing space does not need to be considered. By breaking the routing that blocks the light of the light transmission hole 100, the light transmittance of the light transmission hole 100 can be improved, and thus the light transmittance of the display panel 10 as a whole is improved. For example, as shown in FIG. 2, the first signal line 310 is broken at the first break 310a, and thus the light transmittance of the light transmission hole 100 can be directly increased, and the light transmittance of the display panel 10 is improved. For example, as shown in FIG. 3, the first signal line 310 is broken at the first break 310a, and thus the routing close to the light transmission hole 100 can be extended or bent towards the first break 310a when arranged in the same layer as the first signal line 310, and thus the light transmittance of the light transmission hole 100 is increased, and the light transmittance of the display panel 10 is improved.

[0058] In summary, the display panel provided in the embodiments of the present application sets a break in the first signal line in the display panel, the first break in the first signal line is overlapped with the orthographic projection of the light transmission hole on the substrate, and the overlap is along the second direction, that is, the first break is close to or adjacent to the setting position of the light transmission hole. In this way, the first break provided on the first signal line increases the light transmission rate of the display panel at the light transmission hole, and the ability of the display panel to obtain external light can be improved.

[0059] FIG. 9 is a structural schematic diagram of a second display panel provided in the embodiments of the present application. As shown in FIGS. 2, 3 and 9, the signal line 300 further includes a plurality of data signal lines 320, the plurality of data signal lines 320 extend along a third direction X3 and are arranged along a fourth direction X4; the third direction X3 and the fourth direction X4 intersect; the signal line 300 further includes a plurality of auxiliary lines 330; the non-display area NA includes a fan-out area A1 located at one side of the display area AA, and the fan-out area A1 includes a plurality of fan-out wires S0; the auxiliary line 330 includes a data auxiliary line 331, at least part of one data auxiliary line 331 is located in the display area AA; at least part of the data signal line 320 is electrically connected through the data auxiliary line 331 and the fan-out wire S0; the auxiliary line 330 further includes a virtual auxiliary line 332 located in the display area AA, the virtual auxiliary line 332 is insulatively arranged in the same layer as the data auxiliary line 331; and the first signal line 310 includes the virtual auxiliary line 332.

[0060] For example, as shown in FIGS. 1 and 9, the signal line 300 includes the data signal line 320 extending along the third direction X3, and the plurality of data signal lines 320 are arranged along the fourth direction X4, where the third direction X3 can be understood as the column direction in FIG. 9, and the fourth direction X4 can be understood as the row direction in FIG. 9. The data signal line 320 is used to transmit a data signal and is used to ensure the display function of the display panel 10. Optionally, as shown in FIG. 9, the display panel 10 further includes the fan-out area A1 in the non-display area NA, the fan-out area A1 includes a plurality of fan-out wires S0, the fan-out wires S0 are electrically connected with the plurality of data signal lines 320, and the stable transmission of the data signal is ensured.

[0061] Optionally, the signal line 300 further includes a plurality of auxiliary lines 330, the auxiliary line 330 includes the data auxiliary line 331, one end of the data auxiliary line 331 can be electrically connected with the fan-out wire S0, and the other end can be electrically connected with the data signal line 320 away from the fan-out area A1 along the fourth direction X4. In this way, the data signal line 320 away from the fan-out area A1 can indirectly obtain the data signal without being directly electrically connected with the fan-out wire S0 in the fan-out area A1, and thus the setting area of the fan-out area A1 can be reduced, the proportion of the non-display area NA can be effectively reduced, the proportion of the display area AA in the display panel 10 can be increased, and the display effect of the display panel 10 can be improved.

[0062] Exemplarily, the display area AA includes a plurality of data signal lines 320, and part of the data signal lines 320 can be directly electrically connected with the fan-out wires S0 in the fan-out area A1. Referring to the area B1 shown in FIG. 9, the data signal lines 320 in the area B1 are relatively close to the fan-out wires S0, and can be directly electrically connected with the fan-out wires S0. Alternatively, part of the data signal lines 320 can be electrically connected with the fan-out wires S0 through the data auxiliary lines 331. Referring to the area B2 shown in FIG. 9, along the fourth direction X4, the data signal lines 320 in the area B2 are farther away from the fan-out area A1 than the data signal lines in the area B1, that is, the data signal lines 320 in the area B2 are closer to the edge of the display panel 10. The data signal lines 320 in the area B2 can be electrically connected with the fan-out wires S0 through the data auxiliary lines 331, so as to reduce the occupied space of the fan-out wires S0, and further reduce the setting area of the fan-out area A1, effectively reduce the proportion of the non-display area NA, increase the proportion of the display area AA of the display panel 10, and increase the display effect of the display panel 10.

[0063] Alternatively, the auxiliary lines 330 further include virtual auxiliary lines 332 located in the display area AA, and the virtual auxiliary lines 332 are in the same layer as the data auxiliary lines 331. The display panel 10 can ensure the uniformity of the wires arranged on the display panel 10 by arranging the virtual auxiliary lines 332. The virtual auxiliary lines 332 are insulated from the data auxiliary lines 331, that is, the virtual auxiliary lines 332 do not affect the normal transmission of the data signals in the data auxiliary lines 331. In general, by arranging the virtual auxiliary lines 332, the data auxiliary lines 331 can have uniformity in the overall wire arrangement of the display panel 10, so as to ensure the uniformity of the wire arrangement density in different areas, thereby avoiding the situation that the display effect of the display panel 10 is not uniform due to the non-uniformity of the wire arrangement, which leads to different light reflectivity in the display panel 10.

[0064] Alternatively, referring to FIGS. 2 and 3, the first signal lines 310 can include the virtual auxiliary lines 332. The first signal lines 310 include the first break 310a, and the virtual auxiliary lines 332 for balancing the uniformity of the wires can also be provided with a break, that is, the virtual auxiliary lines 332 near the light transmission holes 100 can be provided with a break, so as to ensure the light transmittance of the light transmission holes 100, and thereby improve the overall light transmittance of the display panel 10. Therefore, the first signal lines 310 can include the virtual auxiliary lines 332, that is, on the one hand, the display effect of the display panel 10 is not affected, and on the other hand, the acquisition ability of the display panel 10 to external light can be improved. In addition, the virtual auxiliary lines 332 can transmit a fixed potential signal.

[0065] Optionally, FIG. 10 is a schematic diagram of a film layer setting of an auxiliary line provided in an embodiment of the present application. Referring to FIG. 10, the auxiliary line 330 shown in FIG. 10 can be a data auxiliary line 331 and / or a virtual auxiliary line 332, which are not specifically limited in the embodiment of the present application. In combination with FIG. 10, in the film layer in which the auxiliary line 330 is located, there is also a data signal line 320 extending in the same direction as the auxiliary line 330 shown in the figure, and there is also a power signal line (a positive power signal PVDD is exemplarily shown in FIG. 10), and in order to ensure the transmission of the power signal in the power signal line, the line width of the power signal line is generally set to be large. In this way, in the film layer shown in FIG. 10, the setting space of the signal line 300 is relatively compact, and there is not much space for avoiding setting the wiring, and thus it is also impossible to avoid the case that the wiring blocks the light transmitted to the light transmission hole 100. The display panel 10 provided in the embodiment of the present application sets a break in the virtual auxiliary line 332 near the light transmission hole 100, thereby improving the light transmittance of the light transmission hole 100.

[0066] FIG. 11 is an enlarged schematic diagram of a third auxiliary display area provided in an embodiment of the present application, and FIG. 12 is an enlarged schematic diagram of a fourth auxiliary display area provided in an embodiment of the present application. Referring to FIGS. 9, 11 and 12, the data auxiliary line 331 includes a first data auxiliary wiring 3311 and a second data auxiliary wiring 3312 electrically connected, the first data auxiliary wiring 3311 extends along a third direction X1 and is electrically connected with the fan-out wiring S0, and the second data auxiliary wiring 3312 extends along a fourth direction X4 and is electrically connected with the data signal line 320; the virtual auxiliary line 332 includes a first virtual auxiliary wiring 3321 and a second virtual auxiliary wiring 3322 electrically connected, the first virtual auxiliary wiring 3321 extends along the third direction X1, and the second virtual auxiliary wiring 3322 extends along the fourth direction X4; the first virtual auxiliary wiring 3321 is insulatively arranged in the same layer as the first data auxiliary wiring 3311, and the second virtual auxiliary wiring 3322 is insulatively arranged in the same layer as the second data auxiliary wiring 3312; the first signal line 310 includes at least part of the first virtual auxiliary wiring 3321; the first direction X1 and the third direction X3 are the same direction, and the second direction X2 and the fourth direction X4 are the same direction.

[0067] As shown in FIG. 9, the data auxiliary line 331 includes the first data auxiliary trace 3311 and the second data auxiliary trace 3312 which are electrically connected. The first data auxiliary trace 3311 extends in the same direction as the data signal line 320, and the second data auxiliary trace 3312 extends in the direction intersecting the data signal line 320. Specifically, in FIG. 9, the part of the data signal line 320 in the region B2 is first electrically connected to the second data auxiliary trace 3312 extending in the fourth direction X4, the second data auxiliary trace 3312 is then electrically connected to the first data auxiliary trace 3311 extending in the third direction X3, and the first data auxiliary trace 3311 is then electrically connected to the fan-out trace S0 in the fan-out region A1, thereby realizing the transmission of the data signal in the fan-out trace S0 to the data signal line 320 through the data auxiliary line 331.

[0068] As shown in FIG. 9, the virtual auxiliary line 332 includes the first virtual auxiliary trace 3321 and the second virtual auxiliary trace 3322 which are electrically connected. The first virtual auxiliary trace 3321 extends in the same direction as the first data auxiliary trace 3311, and the first virtual auxiliary trace 3321 and the first data auxiliary trace 3311 are insulatively arranged. The second virtual auxiliary trace 3322 extends in the same direction as the second data auxiliary trace 3311, and the second virtual auxiliary trace 3322 and the second data auxiliary trace 3312 are insulatively arranged. By arranging the first virtual auxiliary trace 3321 and the first data auxiliary trace 3311, the trace arrangement of the display panel 10 can be balanced in the third direction X3 and the fourth direction X4, and the trace arrangement density of different regions can be balanced, thereby avoiding the situation that the display panel 10 displays unevenly due to the different light reflectivity in the display panel 10 caused by the unbalanced trace arrangement.

[0069] As shown in FIGS. 11 and 12, the third direction X3 can be the same as the first direction X1, and the fourth direction X4 can be the same as the second direction X2, so the first signal line 310 can be understood as extending in the third direction X3. The first virtual auxiliary trace 3321 is the virtual auxiliary line 332, and the first virtual auxiliary trace 3321 extends in the third direction X3, so the first virtual auxiliary trace 3321 can be at least partially located in the auxiliary display region AA2. Therefore, the first signal line 310 includes at least part of the first virtual auxiliary trace 3321, that is, the first signal line 310 includes the part of the first virtual auxiliary trace 3321 located in the auxiliary display region AA2.

[0070] With reference to FIGS. 11 and 12, the data signal line 320 includes a first data signal line 321, at least part of the first data signal line 321 is located in the auxiliary display area AA2; the first virtual auxiliary trace 3321 includes a first sub-virtual auxiliary trace 3321a, at least part of the first sub-virtual auxiliary trace 3321a is located in the auxiliary display area AA2; the first data signal line 321 is arranged adjacent to the first sub-virtual auxiliary trace 3321a.

[0071] The data signal line 320 includes the first data signal line 321, and the first data signal line 321 is at least partially located in the auxiliary display area AA2. In combination with FIGS. 11 and 12, it can be understood that the display panel 10 includes a plurality of data signal lines 320 extending along the third direction X3, and the first data signal line 321 is present in the plurality of data signal lines 320. The first data signal line 321 is partially arranged in the auxiliary display area AA2, that is, the first data signal line 321 is arranged closer to the light transmission hole 100 than other data signal lines 320. Therefore, the arrangement of the first data signal line 321 will affect the light transmittance of the light transmission hole 100 in the auxiliary display area AA2.

[0072] For example, in combination with FIGS. 11 and 12, when the first signal line 310 is the first virtual auxiliary trace 3321, the first virtual auxiliary trace 3321 includes the first sub-virtual auxiliary trace 3321a, that is, the first sub-virtual auxiliary trace 3321a can be understood as a trace structure on both sides of the first break 310a along the third direction X3. Optionally, referring to FIGS. 11 and 12, the auxiliary display area AA2 includes at least part of the first sub-virtual auxiliary trace 3321a and at least part of the first data signal line 321, and the first data signal line 321 is arranged adjacent to the first sub-virtual auxiliary trace 3321a. The relative positions of the first data signal line 321 and the first sub-virtual auxiliary trace 3321a can be adjusted to achieve differential adjustment of the light transmittance of the light transmission hole 100. In general, the first virtual auxiliary trace 3321 extending along the third direction X3 is the first signal line 310, and the first break 310a is arranged in the first virtual auxiliary trace 3321, and the traces on both sides of the first break 310a are the first sub-virtual auxiliary trace 3321a. By arranging the first break 310a, light blocking can be effectively avoided, thereby increasing the light transmittance of the light transmission hole 100 and improving the light transmittance of the display panel 10.

[0073] Continuing to refer to FIG. 12, the first data signal line 321 is located on the side of the first sub-virtual auxiliary trace 3321a close to the light transmission hole 100; the first data signal line 321 comprises a first main body part 3211 and a first bending part 3212 electrically connected; along the fourth direction X4, the orthogonal projection of the first bending part 3212 on the substrate 200 and the orthogonal projection of the light transmission hole 100 on the substrate 200 overlap; along the third direction X3, the orthogonal projection of the first bending part 3212 on the substrate 200 and the orthogonal projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 overlap.

[0074] Optionally, referring to FIG. 12, the first data signal line 321 comprises the first main body part 3211 and the first bending part 3212, wherein the first main body part 3211 can be understood as a main trace structure extending along the third direction X3, and the first bending part 3212 (referring to the area C1 shown in FIG. 12) can be understood as a trace structure protruding or bending compared with the first main body part 3211 in the first data signal line 321, that is, the first bending part 3212 has at least part of the extension direction intersecting with the extension direction of the first main body part 3211.

[0075] Optionally, along the fourth direction X4, the orthogonal projection of the first bending part 3212 on the substrate 200 and the orthogonal projection of the light transmission hole 100 on the substrate 200 overlap, that is, the orthogonal projection of the first bending part 3212 on the substrate 200 and the orthogonal projection of the light transmission hole 100 on the substrate 200 are compared, and the two projections overlap along the fourth direction X4. Alternatively, it can be understood that, referring to FIG. 12, in the plan view (top view) without considering the position relationship of the film layers where the first bending part 3212 and the light transmission hole 100 are located, the first bending part 3212 and the light transmission hole 100 overlap along the fourth direction X4.

[0076] Optionally, referring to FIG. 12, the first data signal line 321 is located on the side of the first sub-virtual auxiliary trace 3321a close to the light transmission hole 100, and in combination with the position relationship between the first bending part 3212 and the light transmission hole 100, it can be known that the setting position of the first data signal line 321 will directly block the light transmitted to the light transmission hole 100, thereby affecting the light transmittance of the light transmission hole 100, that is, affecting the light transmittance of the display panel 10. In combination with the first break 310a arranged in the first signal line 310, by adjusting the first data signal line 321, the light transmittance of the light transmission hole 100 can be increased, thereby improving the light transmittance of the display panel 10.

[0077] For example, along the third direction X3, the orthogonal projection of the first bending portion 3212 on the substrate 200 and the orthogonal projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 overlap, that is, the orthogonal projection of the first bending portion 3212 on the substrate 200 and the orthogonal projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 at least partially overlap along the third direction X3. Alternatively, it can be understood that, referring to FIG. 12, the first bending portion 3212 extends to the first break 310a of the first signal line 310, so along the third direction X3, the orthogonal projection of the first bending portion 3212 on the substrate 200 and the orthogonal projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 overlap, that is, in the plan view (top view) without considering the positional relationship between the film layer where the first bending portion 3212 and the first signal line 310 are located, the first bending portion 3212 extends to the first break 310a, and the two projections at least partially overlap along the third direction X3.

[0078] Alternatively, referring to FIG. 8 and FIG. 12, by setting the first break 310a on the first signal line 310, and extending the part of the structure of the first data signal line 321 located on the first signal line 310 close to the light transmission hole 100 to the first break 310a, the first data signal line 321 can further avoid blocking the light, effectively increase the light transmission rate of the light transmission hole 100, and further improve the overall light transmission rate of the display panel 10.

[0079] FIG. 13 is an enlarged schematic view of a fifth auxiliary display area provided by an embodiment of the present application. Referring to FIG. 9 and FIG. 13, the first data signal line 321 is located on one side of the first sub-virtual auxiliary trace 3321a close to the light transmission hole 100; the first data signal line 321 includes a first main body portion 3211 and a first bending portion 3212 electrically connected; along the fourth direction X4, the orthogonal projection of the first bending portion 3212 on the substrate 200 and the orthogonal projection of the light transmission hole 100 on the substrate 200 overlap; and along the third direction X3, the orthogonal projection of the first bending portion 3212 on the substrate 200 and the orthogonal projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 do not overlap.

[0080] Optionally, referring to FIG. 13, along the third direction X3, the orthographic projection of the first bending portion 3212 on the substrate 200 and the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 overlap, that is, the orthographic projection of the first bending portion 3212 on the substrate 200 and the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 are compared, and the two projections do not overlap along the third direction X3, that is, in the plan view (top view) that does not consider the positional relationship of the film layers where the first bending portion 3212 and the first sub-virtual auxiliary trace 3321a are located, the two projections do not overlap along the third direction X3. Alternatively, it can be understood that, referring to FIG. 13, the first bending portion 3212 does not extend to the first breakage 310a of the first signal line 310, or the first bending portion 3212 extends to the first breakage 310a of the first signal line 310, but the first bending portion 3212 does not extend to the area where the first breakage 310a is located. Therefore, along the third direction X3, the orthographic projection of the first bending portion 3212 on the substrate 200 and the orthographic projection of the first sub-virtual auxiliary trace 3321a on the substrate 200 do not overlap.

[0081] Optionally, referring to FIG. 13, in the case where the first breakage 310a is provided on the first signal line 310, the first data signal line 321 does not need to be adjusted greatly, which can reduce the process difficulty of the first data signal line 321 in preparation. Optionally, although there is the first bending portion 3212 between the first breakage 310a and the light-transmitting hole 100, by designing the breakage on the first signal line 310 and the first signal line 310 being relatively close to the light-transmitting hole 100 relative to other traces, the light transmittance of the display panel 10 can also be effectively improved.

[0082] Continuing to refer to FIGS. 9 and 11, the first data signal line 321 is located on the side of the first sub-virtual auxiliary trace 3321a away from the light-transmitting hole 100; in the thickness direction of the display panel 10, the first breakage 310a and the light-transmitting hole 100 overlap.

[0083] Optionally, referring to FIG. 11, the first data signal line 321 is located on the side of the first sub-virtual auxiliary trace 3321a away from the light-transmitting hole 100, that is, the first signal line 310 is located on the side of the first data signal line 321 close to the light-transmitting hole 100.

[0084] Optionally, referring to FIG. 11, the first signal line 310 includes a first break 310a, and the first break 310a overlaps the light transmission hole 100 in the substrate 200 along the thickness direction of the display panel 10. It can be understood that the first signal line 310 is closer to one side of the light transmission hole 100 than other signal lines 300, and then a part of the trace corresponding to the light transmission hole 100 is provided with a break, i.e., the first break 310a, which can directly avoid the trace from blocking the light, thereby directly increasing the light transmittance of the light transmission hole 100, and further improving the overall light transmittance of the display panel 10.

[0085] Optionally, referring to FIG. 7 and FIG. 11, by providing the first break 310a on the first signal line 310, the area in FIG. 7 which is not provided with a break will block the light transmission hole 100, thereby affecting the light transmittance of the light transmission hole 100; while in FIG. 11, the first signal line 310 is provided with a break, i.e., the first break 310a, which will not block the light, thereby directly increasing the light transmittance of the light transmission hole 100, and further improving the overall light transmittance of the display panel 10.

[0086] FIG. 14 is an enlarged schematic view of a sixth auxiliary display area provided by an embodiment of the present application, and FIG. 15 is an enlarged schematic view of a seventh auxiliary display area provided by an embodiment of the present application. Referring to FIG. 9, FIG. 14 and FIG. 15, the first sub-virtual auxiliary trace 3321a includes a first trace part 3321a1 and a second trace part 3321a2 located on two sides of the first break 310a respectively; a plurality of first trace parts 3321a1 arranged along the fourth direction X4 are electrically connected through the second virtual auxiliary trace 3322; and / or a plurality of second trace parts 3321a2 arranged along the fourth direction X4 are electrically connected through the second virtual auxiliary trace 3322.

[0087] Specifically, referring to FIG. 9, the virtual auxiliary line 332 includes the first virtual auxiliary trace 3321 and the second virtual auxiliary trace 3322 which are electrically connected, and the first virtual auxiliary trace 3321 and the second virtual auxiliary trace 3322 have different extension directions. Referring to FIG. 14 and FIG. 15, the first virtual auxiliary trace 3321 can be the first signal line 310, and the first virtual auxiliary trace 3321 includes the first sub-virtual auxiliary trace 3321a. The first sub-virtual auxiliary trace 3321a includes the first trace part 3321a1 and the second trace part 3321a2 located on two sides of the first break 310a respectively. Optionally, the first trace part 3321a1 and the second trace part 3321a2 are adjusted to input a potential signal, i.e., the virtual auxiliary line 332 is used to transmit a related potential signal.

[0088] For example, referring to FIG. 14, for the plurality of first trace sections 3321a1 arranged along the fourth direction X4, the second virtual auxiliary trace 3322 can be used for electrical connection, i.e., when the virtual auxiliary line 332 transmits an electrical signal, the electrical connection between the first trace sections 3321a1 can be achieved through the second virtual auxiliary trace 3322 (i.e., electrical connection through a via, as shown in the area marked as w in FIG. 14). Alternatively, when the plurality of first trace sections 3321a1 arranged along the fourth direction X4 are electrically connected through the second virtual auxiliary trace 3322, the plurality of second trace sections 3321a2 arranged along the fourth direction X4 can be directly electrically connected to the signal bus transmitting the electrical potential signal to obtain the relevant electrical potential signal; or, referring to FIG. 15, for the plurality of second trace sections 3321a2 arranged along the fourth direction X4, the second virtual auxiliary trace 3322 can also be used for electrical connection, i.e., when the virtual auxiliary line 332 transmits an electrical signal, the electrical connection between the second trace sections 3321a2 can be achieved through the second virtual auxiliary trace 3322. It should be noted that in FIG. 14, the first sub-virtual auxiliary trace 3321a is located on the side of the first data signal line 321 away from the light transmission hole 100, and in FIG. 15, the first sub-virtual auxiliary trace 3321a is located on the side of the first data signal line 321 close to the light transmission hole 100.

[0089] Similarly, for the plurality of second trace sections 3321a2 arranged along the fourth direction X4, the second virtual auxiliary trace 3322 can be used for electrical connection, and for the plurality of first trace sections 3321a1 arranged along the fourth direction X4, the signal bus transmitting the electrical potential signal can be directly used for electrical connection to obtain the relevant electrical potential signal; or, referring to FIG. 15, for the plurality of second trace sections 3321a2 arranged along the fourth direction X4, the second virtual auxiliary trace 3322 can also be used for electrical connection, i.e., when the virtual auxiliary line 332 transmits an electrical signal, the electrical connection between the second trace sections 3321a2 can be achieved through the second virtual auxiliary trace 3322.

[0090] In other words, for the first virtual auxiliary trace 3321, a break, i.e., the first break 310a, can be provided at the auxiliary display area AA2, but the first virtual auxiliary trace 3321 can be electrically connected to the second virtual auxiliary trace 3322, so that the first virtual auxiliary trace 3321 with the break can still receive the relevant electrical signal. However, in this case, the second virtual auxiliary trace 3322 extending along the fourth direction X4 needs to ensure the direct electrical connection of the first virtual auxiliary trace 3321, so for the second virtual auxiliary trace 3322 with part of the structure arranged in the auxiliary display area AA2, the second virtual auxiliary trace 3322 is arranged as a trace continuously arranged along the fourth direction X4 without a break.

[0091] In general, the electrical connection manners of the first routing part 3321a1 and the second routing part 3321a2 are various, and examples are not listed herein.

[0092] FIG. 16 is a structural schematic diagram of a third display panel according to an embodiment of the present application, FIG. 17 is a structural schematic diagram of a fourth display panel according to an embodiment of the present application, and FIG. 18 is a structural schematic diagram of a fifth display panel according to an embodiment of the present application. Referring to FIGS. 9, 16 to 18, the display panel 10 further includes a signal bus 340 located in the non-display area NA, and the second virtual auxiliary routing 3322 is electrically connected with the signal bus 340. The signal bus 340 is located on at least one side of the display area AA along the fourth direction X4.

[0093] Specifically, referring to FIGS. 16 to 18, the display panel 10 further includes the signal bus 340, and the signal bus 340 is located in the non-display area NA of the display panel 10. The electrical signal transmitted in the signal bus 340 is electrically connected with the signal line 300 located in the display area AA. Optionally, referring to FIGS. 16 to 18, the signal bus 340 is electrically connected with the metal pad 341 corresponding to the non-display area NA. For example, the signal bus 340 can be used to transmit a power signal, such as a negative power signal (PVEE). The type of signal transmitted by the signal bus 340 is not limited herein.

[0094] Specifically, referring to FIGS. 16 to 18, the second auxiliary virtual routing 3322 can be electrically connected with the signal bus 340, that is, the virtual auxiliary line 332 is used to transmit the electrical signal provided by the signal bus 340. For the first sub-virtual auxiliary routing 3321a (that is, the first auxiliary virtual routing 3321 located in the auxiliary display area AA2), in order to ensure that the first sub-virtual auxiliary routing 3321a can obtain the related electrical signal, the first virtual auxiliary routing 3321a is adjusted to be electrically connected with the second auxiliary virtual routing 3322, so as to realize the acquisition and transmission of the electrical signal.

[0095] Optionally, the signal bus 340 arranged in the non-display area NA has flexibility in the arrangement position. Referring to FIG. 16, the signal bus 340 is arranged around the display area AA, that is, the signal bus 340 surrounds the display area AA for one round. Alternatively, referring to FIG. 17, along the fourth direction X4, the signal bus 340 is located on one side of the display area AA. Alternatively, referring to FIG. 18, along the fourth direction X4, the signal bus 340 is located on both sides of the display area AA. The arrangement manner of the signal bus 340 in the non-display area NA has flexibility, and can be various according to the different requirements of the display panel 10 or the different arrangement of the non-display area NA in the display panel 10. Examples are not listed herein.

[0096] Optionally, the second auxiliary virtual wire 3322 electrically connected with the signal bus 340 extends along the fourth direction, so as to adjust the setting position of the signal bus 340 to be located on at least one side of the display area AA along the fourth direction X4, so as to ensure that the electrical connection between the second virtual auxiliary wire 3322 and the signal bus 340 is simple, and the electrical signal transmitted in the signal bus 340 can be directly transmitted to the virtual auxiliary wire 332 at a shorter distance, so as to ensure the stability and reliability of the transmission of the electrical signal, thereby improving the overall effect of the display panel 10.

[0097] Optionally, the second virtual auxiliary wire 3322 receives a fixed potential signal.

[0098] Optionally, the second virtual auxiliary wire 3322 is electrically connected with the signal bus 320, and the second virtual auxiliary wire 3322 receives a fixed potential signal transmitted in the signal bus 320. The second virtual auxiliary wire 3322 is electrically connected with the first virtual auxiliary wire 3321, that is, the virtual auxiliary wire 332 is used to receive and transmit a fixed potential signal.

[0099] Optionally, on the one hand, the virtual auxiliary wire 332 can avoid coupling other signals to interfere with the display panel 10, and on the other hand, the virtual auxiliary wire 332 is connected in parallel with the fixed potential signal line, which can reduce the resistance on the fixed potential signal line and ensure that the loss of the fixed potential signal in the transmission process is small.

[0100] FIG. 19 is a structural schematic diagram of a first pixel circuit according to an embodiment of the present application, FIG. 20 is a timing of an embodiment of signals provided to the pixel circuit shown in FIG. 19 in a driving cycle according to an embodiment of the present application, FIG. 21 is a structural schematic diagram of a second pixel circuit according to an embodiment of the present application, and FIG. 22 is a timing of an embodiment of signals provided to the pixel circuit shown in FIG. 21 in a driving cycle according to an embodiment of the present application. Referring to FIGS. 1, 19 to 22, the fixed potential signal includes a power supply signal, an initialization signal, or a bias adjustment signal.

[0101] In the display panel 10, the display area AA further includes a plurality of pixel circuits, and the pixel circuit is electrically connected with the light emitting element 400 to drive the light emitting element 400 and ensure the light emitting display of the light emitting element 400. Optionally, the signal line 200 in the display panel 10 can be configured to provide a voltage signal and / or a current signal to the pixel circuit, thereby realizing the driving of the light emitting element 400 by the pixel circuit.

[0102] The pixel circuit has various setting modes, and the display panel 10 also has various setting types. For example, referring to FIG. 19, the pixel circuit is exemplified as “7T1C”. Based on the setting mode of the pixel circuit, those skilled in the art can make adaptive adjustment according to the needs. The pixel circuit can include a first light-emitting control transistor T1, a data writing transistor T2, a driving transistor T3, a threshold compensation transistor T4, an initialization reset transistor T5, a second light-emitting control transistor T6, an anode reset transistor T7, and a storage capacitor Cst. Optionally, the types of transistors in the pixel circuit can be various. The transistors can include low temperature poly-silicon transistors (LTPS), which have the advantages of high switching speed, high carrier mobility, and small power.

[0103] Specifically, referring to FIG. 20, the timing operation of the pixel circuit is illustrated as follows. The scan signal line (shown as S1 in the figure) connected to the control terminal of the initialization reset transistor T5 can control the on and off of the initialization reset transistor T5, and write the initialization signal in the initialization signal line (shown as Vref1 in the figure) connected to the input terminal of the initialization reset transistor T5 to the gate of the driving transistor T3 when the initialization reset transistor T5 is turned on, i.e., the initialization signal includes the gate initialization signal, and reset the first node N1. The storage capacitor Cst can ensure the stability of the potential of the first node N1. The scan signal line (shown as SP in the figure) connected to the control terminal of the data writing transistor T2 can control the on and off of the data writing transistor T2, and write the data signal on the data signal line (shown as Vdata in the figure) to the first electrode of the driving transistor T3 when the data writing transistor T2 is turned on. The scan signal line (shown as S2 in the figure) connected to the control terminal of the threshold compensation transistor T4 can control the on and off of the threshold compensation transistor T4, and compensate the threshold voltage of the driving transistor T3 when the threshold compensation transistor T4 is turned on. Meanwhile, the scan signal line (shown as SP in the figure) connected to the control terminal of the anode reset transistor T7 can control the on and off of the anode reset transistor T7, and reset the anode of the light emitting element 400 connected to the pixel circuit when the anode reset transistor T7 is turned on, i.e., write the initialization signal on the anode initialization signal line (shown as Vref2 in the figure) to the anode of the light emitting element 400, i.e., the initialization signal includes the anode initialization signal. The light emitting control signal line (shown as Emit in the figure) connected to the control terminal of the first light emitting control transistor T1 and the control terminal of the second light emitting control transistor T6 can control the on and off of the control terminal of the first light emitting control transistor T1 and the second light emitting control transistor T6, and write the power signal transmitted by the positive power signal line PVDD to the anode of the light emitting element 400 when the first light emitting control transistor T1 and the second light emitting control transistor T6 are turned on, and the cathode of the light emitting element 400 is connected to the negative power signal line PVEE, thereby realizing the display and light emission of the light emitting element 400. For example, referring to FIG. 20, one frame time of the display panel 10 includes at least the initialization writing stage P1, the data writing stage P2 and the light emitting stage P3. In the initialization stage P1, the initialization reset transistor T5 is turned on under the control of the scan signal line (shown as S1 in the figure), and the initialization signal in the initialization signal line (shown as Vref1 in the figure) is written to the first node N1 electrically connected to the gate of the driving transistor T3 to initialize the gate of the driving transistor T3. Meanwhile, since the threshold compensation transistor T4 is turned on, the initialization signal in the gate initialization signal line (shown as Vref1 in the figure) is also written to the second electrode of the driving transistor T3, i.e., the N3 node.In the data writing stage P2, the data writing transistor T2 is turned on under the control of a scan signal line (shown as SP in the figure), and the threshold compensation transistor T4 is turned on under the control of a scan signal line (shown as S2 in the figure), so that the data signal Vdata is written into the gate of the drive transistor T3 through the data writing transistor T2, the drive transistor T3 and the threshold compensation transistor T4 in turn. At the same time, in the data writing stage P2, the anode reset transistor T7 is turned on under the control of a scan signal line (shown as SP in the figure), and the initialization signal in the anode initialization signal line (shown as Vref2 in the figure) is written into the anode of the light emitting element 400 to initialize the anode of the light emitting element 400. In the light emitting stage P3, the first light emitting transistor T1 and the second light emitting control transistor T6 are turned on under the control of the light emitting control signal Emit, so that the drive current generated by the drive transistor T3 can be transmitted to the anode of the light emitting element 400, thereby driving the light emitting element 400 to emit light.

[0104] Optionally, referring to FIG. 19, the fixed potential signals in the access pixel circuit can include power supply signals and initialization signals, wherein the power supply signals include a positive power supply signal PVDD and a negative power supply signal PVEE, and the initialization signals include a gate initialization signal and an anode initialization signal. Therefore, the second virtual auxiliary wire 3322 receiving the fixed potential signals can be the power supply signals and / or the initialization signals.

[0105] Optionally, referring to FIGS. 21 and 22, the pixel circuit is exemplified as “8T1C”. The pixel circuit can include the first light emitting control transistor T1, the data writing transistor T2, the drive transistor T3, the threshold compensation transistor T4, the initialization reset transistor T5, the second light emitting control transistor T6, the anode reset transistor T7, the bias transistor T8 and the storage capacitor Cst. Optionally, for the pixel circuit shown in FIG. 17, the low-temperature polysilicon transistor and the oxide transistor (Indium Gallium Zinc Oxide, IGZO) can also be included. The oxide transistor has the advantages of small leakage current, and the low-temperature polysilicon transistor has the advantages of high switching speed, high carrier mobility and small power.

[0106] The working process of the pixel circuit is similar to that of the pixel circuit corresponding to FIG. 19, and is not described herein. Optionally, in the pixel circuit of FIG. 21, the scan signal line (shown as SP* in the figure) connected to the control end of the bias transistor T8 can control the turn-on and turn-off of the bias transistor T8, and when the bias transistor T8 is turned on, the bias adjustment signal transmitted by the bias adjustment signal line (shown as DVH in the figure) is written into the bias transistor T8, and the second node N2 is adjusted.

[0107] Specifically, referring to FIG. 22, in one driving period Q of the pixel circuit, the driving period Q includes a data writing stage Q1, a light emitting stage Q2 and a light emitting maintaining stage Q3. The data writing stage Q1 includes a non-enabling stage of the light emitting control signal Emit, the light emitting stage Q2 includes an enabling stage of the light emitting control signal Emit, and the light emitting maintaining stage Q3 includes a plurality of non-enabling stages and at least one enabling stage (one enabling stage is taken as an example in FIG. 22). The level of the bias adjustment signal on the bias adjustment signal line (DVH in the figure) in the data writing stage Q1 and the light emitting stage Q2 can be the same as the level of the bias adjustment signal on the bias adjustment signal line (DVH in the figure) in the light emitting maintaining stage Q3. The data writing stage Q1 includes a first bias adjustment stage Q11. In the first bias adjustment stage Q11, the signal transmitted by the scan signal line (SP* in the figure) includes at least one low voltage period, and the signal transmitted by the scan signal line (S2N in the figure) includes at least one high voltage period. In other words, in the first bias adjustment stage Q11, at least the bias transistor T8 and the threshold compensation transistor T4 are turned on, the bias adjustment signal on the bias adjustment signal line (DVH in the figure) is transmitted to the driving transistor T3 through the bias transistor T8, and is further transmitted to the gate of the driving transistor T3 through the threshold compensation transistor T4, that is, in the first bias adjustment stage Q11, the bias signal can perform bias adjustment on the first node N1, the second node N2 and the third node N3. The data writing stage Q1 further includes an initialization and second bias adjustment stage Q12. In the initialization and second bias adjustment stage Q12, the signal transmitted by the scan signal line (S2N in the figure) includes at least one high voltage period, and the signal transmitted by the scan signal line (S2N in the figure) includes at least one high voltage period. In other words, in the initialization and second bias adjustment stage Q12, the initialization transistor T5 is turned on, and the threshold compensation transistor T4 is also turned on later, the gate initialization reset signal on the initialization signal line (Vref1 in the figure) can adjust the gate of the driving transistor T3 through the initialization transistor T5, and the initialization signal line (Vref1 in the figure) can also adjust the third node N3 through the initialization transistor T5 and the threshold compensation transistor T4.The data writing stage Q1 further comprises a data signal writing stage Q13, in which the signal transmitted by the scan signal line (shown as S2N in the figure) comprises a period of high level, and the signal transmitted by the scan signal line (shown as SP** in the figure) comprises at least one period of low level, in other words, in the data signal writing stage Q13, the data writing transistor T2 and the threshold compensation transistor T4 are turned on, and the data signal (shown as Vdata in the figure) in the data signal line can be transmitted to the gate of the driving transistor T3 through the data writing transistor T2 and the threshold compensation transistor T4. The data writing stage Q1 further comprises a third bias adjusting stage Q14, in which the signal transmitted by the scan signal line (shown as SP* in the figure) comprises at least one period of low level, and in this period, the second stage N2 can be further biased by the bias transistor T8.

[0108] Optionally, referring to FIG. 21, the fixed potential signals in the access pixel circuit can comprise power supply signals, initialization signals and bias adjusting signals, wherein the power supply signals comprise a positive power supply signal PVDD and a negative power supply signal PVEE, and the initialization signals comprise a gate initialization reset signal and an anode reset signal. Therefore, the second virtual auxiliary wire 3322 receiving the fixed potential signals can be at least one of the power supply signals, the initialization signals or the bias adjusting signals.

[0109] The types of the fixed potential signals received by the second virtual auxiliary wire 3322 are diverse, and can be adaptively adjusted according to different display panels 10, which will not be illustrated one by one in the embodiments of the present application.

[0110] FIG. 23 is a first enlarged schematic view of the region D in FIG. 1, FIG. 24 is a second enlarged schematic view of the region D in FIG. 1, and FIG. 25 is a third enlarged schematic view of the region D in FIG. 1. Referring to FIGS. 23-25, the data signal line 320 comprises a second data signal line 322 located in the main display area AA1, and the second data signal line 322 comprises a second main body portion 3221 and a second bending portion 3222 electrically connected.

[0111] For example, FIGS. 23-24 are enlarged schematic views of the region D in FIG. 1, i.e., FIGS. 23-24 are an enlarged schematic view of the display panel 10 in the main display area AA1. For example, the data signal line 320 comprises a first data signal line 321 and a second data signal line 322, the first data signal line 321 is at least partially located in the auxiliary display area AA2, and the second data signal line 322 is located in the main display area AA1.

[0112] Optionally, referring to FIG. 24, the second data signal line 322 includes a second main body portion 3221 and a second bending portion 3222, and the second main body portion 3221 and the second bending portion 3222 are electrically connected. In combination with FIGS. 12, 13 and 24, the first data signal line 321 includes a first main body portion 3211 and a first bending portion 3212, that is, the data signal line 320 is arranged in a consistent manner, and both the first data signal line 321 and the second data signal line 322 have a main body portion and a bending portion. In this way, the process preparation difficulty of the data signal line 320 can be simplified. Optionally, referring to FIGS. 11 and 23, the first data signal line 321 and the second data signal line 322 are the same.

[0113] Optionally, referring to FIG. 25, the second data signal line 322 located in the main display area AA1 can also not have the second bending portion 3222, so that the occupied space of the data signal line 320 in the main display area AA1 can be reduced, and more space can be provided for other wiring.

[0114] Optionally, referring to FIGS. 11, 12, 23 and 24, the data signal line 320 includes the first data signal line 321, at least part of a first data signal line 321 is located in the auxiliary display area AA2; the first data signal line 321 includes a first main body portion 3211 and a first bending portion 3212 which are electrically connected; along the fourth direction X4, the orthogonal projection of the first bending portion 3212 on the substrate 200 and the orthogonal projection of the light transmission hole 100 on the substrate 200 overlap; two adjacent first data signal lines 321 include two adjacent first bending portions 3212, and the distance between the two adjacent first bending portions 3212 is L1; two adjacent second data signal lines 320 include two adjacent second bending portions 3222, and the distance between the two adjacent second bending portions 3222 is L2; wherein L1≥L2.

[0115] For example, referring to FIG. 11, each of the two adjacent first data signal lines 321 includes two adjacent first bending portions 3212, and the distance between the two adjacent first bending portions 3212 is L1 in the fourth direction X4. Alternatively, referring to FIG. 23, each of the two adjacent second data signal lines 322 includes two adjacent second bending portions 3222, and the distance between the two adjacent second bending portions 3222 is L2 in the fourth direction X4, where L1 and L2 satisfy: L1≥L2. It can be understood that the setting trend or manner of the second bending portion 3222 in the second data signal line 322 located in the main display area AA1 is the same as or similar to that of the first bending portion 3212 in the first data signal line 321 located in the auxiliary display area AA2. That is, the setting of the data signal line 320 in the main display area AA1 and the auxiliary display area AA2 is balanced, which is beneficial to ensure the uniform display effect of the display panel 10.

[0116] Similarly, referring to FIG. 12, each of the two adjacent first data signal lines 321 includes two adjacent first bending portions 3212, and the distance between the two adjacent first bending portions 3212 is L1 in the fourth direction X4. Alternatively, referring to FIG. 24, each of the two adjacent second data signal lines 322 includes two adjacent second bending portions 3222, and the distance between the two adjacent second bending portions 3222 is L2 in the fourth direction X4, where L1 and L2 satisfy: L1≥L2. It can be understood that the setting trend or manner of the second bending portion 3222 in the second data signal line 322 located in the main display area AA1 is the same as or similar to that of the first bending portion 3212 in the first data signal line 321 located in the auxiliary display area AA2.

[0117] Continuing to refer to FIGS. 23-25, the first virtual auxiliary line 3321 includes a second sub-virtual auxiliary line 3321b, and the second sub-virtual auxiliary line 3321b is located in the main display area AA1; the second sub-virtual auxiliary line 3321b is adjacent to the second data signal line 320.

[0118] Alternatively, referring to FIG. 23, the first virtual auxiliary line 3321 includes a first sub-virtual auxiliary line 3321a and a second sub-virtual auxiliary line 3321b, where the first sub-virtual auxiliary line 3321a is at least partially located in the auxiliary display area AA2, and the second sub-virtual auxiliary line 3321b is located in the main display area AA1. Similarly, referring to FIGS. 24 and 25, in the auxiliary display area AA2, the first virtual auxiliary line 3321 includes the second sub-virtual auxiliary line 3321b.

[0119] Optionally, at the auxiliary display area AA2, the partial first sub-virtual auxiliary wire 3321a is arranged adjacent to the first data signal line 321; at the main display area AA1, the second sub-virtual auxiliary wire 3321b is arranged adjacent to the second data signal line 320. In other words, at the main display area AA1, there is also a virtual auxiliary line 332, and the virtual auxiliary line 332 is arranged adjacent to the data signal line 320 at the auxiliary display area AA2, and the virtual auxiliary line 332 is also arranged adjacent to the data signal line 320 at the main display area AA1. The arrangement of the signal line 300 at the main display area AA1 and the auxiliary display area AA2 has similarity.

[0120] Referring to FIGS. 23 and 24, along the fourth direction X4, the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 and the orthogonal projection of the second bending portion 3222 on the substrate 200 overlap.

[0121] Optionally, along the fourth direction X4, the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 and the orthogonal projection of the second bending portion 3222 on the substrate 200 overlap, that is, comparing the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 and the orthogonal projection of the second bending portion 3222 on the substrate 200, the two projections overlap along the fourth direction X4. Or it can be understood that, referring to FIGS. 23 and 24, in the plan view (top view) without considering the positional relationship of the film layers where the second sub-virtual auxiliary wire 3321b and the second bending portion 3222 are located, along the fourth direction X4, the second bending portion 3222 overlaps the second sub-virtual auxiliary wire 3321b. That is, the second sub-virtual auxiliary wire 3321b is different from the first sub-virtual auxiliary wire 3321a, the first sub-virtual auxiliary wire 3321a has the first break 310a, but the second sub-virtual auxiliary wire 3321b is not provided with a break, and the second sub-virtual auxiliary wire 3321b is an extended wire as a whole, so that the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 and the orthogonal projection of the second bending portion 3222 on the substrate 200 overlap along the fourth direction X4.

[0122] Optionally, the second sub-virtual auxiliary wire 3321b located at the main display area AA1 is not provided with a break, so that the continuity of the signal transmitted in the second sub-virtual auxiliary wire 3321b can be ensured, and the transmission effect of the signal in the display panel 10 can be ensured.

[0123] Optionally, compared with FIG. 23 and FIG. 11, or compared with FIG. 24 and FIG. 12, for the auxiliary display area AA2, the transmittance of the area needs to be improved, that is, the light transmittance of the light transmission hole 100 needs to be improved, so the second virtual auxiliary trace 3321a is designed to have a break, that is, the first break 310a is added. For the main display area AA1, the light transmittance of the display panel 10 does not need to be considered, so the second virtual auxiliary trace 3321b can not be designed to have a break. When the potential signal is transmitted through the virtual auxiliary line 332, this case can reduce the process of crossing the via connection, thereby reducing the process preparation cost of the display panel 10.

[0124] FIG. 26 is a fourth enlarged schematic view of the area D in FIG. 1, and FIG. 27 is a fifth enlarged schematic view of the area D in FIG. 1. Referring to FIG. 26 and FIG. 27, the second virtual auxiliary trace 3321b includes a second break 3321b1; along the fourth direction X4, the orthographic projection of the second break 3321b1 on the substrate 200 and the orthographic projection of the second bending portion 3222 on the substrate 200 overlap.

[0125] Optionally, referring to FIG. 26 and FIG. 27, the second virtual auxiliary trace 3321b includes a second break 3321b1; along the fourth direction X4, the orthographic projection of the second break 3321b1 on the substrate 200 and the orthographic projection of the second bending portion 3222 on the substrate 200 overlap, that is, the orthographic projection of the second break 3321b1 on the substrate 200 and the orthographic projection of the second bending portion 3222 on the substrate 200 are compared, and the two projections overlap along the fourth direction X4. Alternatively, it can be understood that, referring to FIG. 26 and FIG. 27, in a plan view (top view) that does not consider the positional relationship of the film layers in which the second virtual auxiliary trace 3321b and the second bending portion 3222 are located, along the fourth direction X4, the second bending portion 3222 and the projection of the second break 3321b1 overlap. That is, the second virtual auxiliary trace 3321b is similar to the first virtual auxiliary trace 3321a, the first virtual auxiliary trace 3321a has a first break 310a, and the second virtual auxiliary trace 3321b also has a break, and the second virtual auxiliary trace 3321b includes a second break 3321b1.

[0126] Optionally, the second sub-virtual auxiliary wire 3321b located in the main display area AA1 is also provided with a breakage. When the first virtual auxiliary wire 3321 is prepared, the first virtual auxiliary wire 3321 located in the main display area AA1 can be provided with a breakage (i.e., the first breakage 310a), and the first virtual auxiliary wire 3321 located in the auxiliary display area AA2 can also be provided with a breakage (i.e., the second breakage 3321b1). In this way, the first virtual auxiliary wire 3321 can have the same or similar arrangement rule, thereby simplifying the difficulty of preparing the first virtual auxiliary wire 3321, i.e., simplifying the process preparation difficulty of the display panel 10 wire.

[0127] Optionally, as shown in FIG. 26 and FIG. 11, or as shown in FIG. 27 and FIG. 12, for the auxiliary display area AA2, it is necessary to improve the transmittance of this area and reduce the layer shielding of light by the wire, i.e., to improve the light transmittance of the through hole 100, so the second virtual auxiliary wire 3321a is provided with a breakage, i.e., the first breakage 310a is increased. For the main display area AA1, although the light transmittance of the display panel 10 does not need to be considered, in order to ensure the uniformity of the wire, the second virtual auxiliary wire 3321b can also be provided with a breakage, thereby reducing the process preparation difficulty of the display panel 10.

[0128] Continuing to refer to FIG. 27, along the third direction X3, the orthogonal projection of the second bending part 3222 on the substrate 200 and the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 overlap.

[0129] For example, along the third direction X3, the orthogonal projection of the second bending part 3222 on the substrate 200 and the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 overlap, i.e., the orthogonal projection of the second bending part 3222 on the substrate 200 and the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 are compared, and the two projections overlap along the third direction X3. Alternatively, it can be understood that, as shown in FIG. 23, the second bending part 3222 can extend to the second breakage 3321b1 of the second sub-virtual auxiliary wire 3321b, so along the third direction X3, the orthogonal projection of the second bending part 3222 on the substrate 200 and the orthogonal projection of the second sub-virtual auxiliary wire 3321b on the substrate 200 overlap.

[0130] Optionally, at the auxiliary display area AA2, referring to FIG. 12, part of the structure of the first data signal line 321 can be extended to the first break 310a, so as to effectively increase the light transmittance of the light transmission hole 100, and further improve the light transmittance of the display panel 10 as a whole. In order to ensure the uniformity of the overall wiring, at the main display area AA1, referring to FIG. 27, part of the structure of the second data signal line 322 can also be extended to the second break 3321b1, so as to ensure the regularity of the overall wiring of the display panel 10.

[0131] FIG. 28 is an enlarged schematic view of an eighth auxiliary display area provided by an embodiment of the present application. Referring to FIGS. 9 and 28, the data auxiliary line 331 includes a first data auxiliary wire 3311 and a second data auxiliary wire 3312 electrically connected, the first data auxiliary wire 3311 extends along the third direction X1 and is electrically connected with the fan-out wire S0, and the second data auxiliary wire 3312 extends along the fourth direction X4 and is electrically connected with the data signal line 320; the virtual auxiliary line 332 includes a first virtual auxiliary wire 3321 and a second virtual auxiliary wire 3322 electrically connected, the first virtual auxiliary wire 3321 extends along the third direction X1, and the second virtual auxiliary wire 3322 extends along the fourth direction X4; the first virtual auxiliary wire 3321 is insulatively arranged in the same layer as the first data auxiliary wire 3311, and the second virtual auxiliary wire 3322 is insulatively arranged in the same layer as the second data auxiliary wire 3312; the first signal line 310 includes at least part of the second virtual auxiliary wire 3322; the first direction X1 and the fourth direction X4 are the same direction, and the second direction X2 and the third direction X3 are the same direction.

[0132] Similarly, referring to FIG. 9, the data auxiliary line 331 includes a first data auxiliary wire 3311 and a second data auxiliary wire 3312 electrically connected, the first data auxiliary wire 3311 extends in the same direction as the data signal line 320, and the second data auxiliary wire 3312 extends in a direction intersecting the data signal line 320. Specifically, in the part of the data signal line 320 in the area B2 in FIG. 9, the data signal line 320 is first electrically connected with the second data auxiliary wire 3312 extending along the fourth direction X4, the second data auxiliary wire 3312 is then electrically connected with the first data auxiliary wire 3311 extending along the third direction X3, the first data auxiliary wire 3311 is then electrically connected with the fan-out wire S0 in the fan-out area A1, so as to realize the transmission of the data signal in the fan-out wire S0 to the data signal line 320 through the data auxiliary line 331.

[0133] Optionally, referring to FIG. 9, the virtual auxiliary line 332 includes a first virtual auxiliary trace 3321 and a second virtual auxiliary trace 3322 electrically connected, the first virtual auxiliary trace 3321 is in the same direction as the first data auxiliary trace 3311, and the first virtual auxiliary trace 3321 and the first data auxiliary trace 3311 are insulatively arranged; the second virtual auxiliary trace 3322 is in the same direction as the second data auxiliary trace 3311, and the second virtual auxiliary trace 3322 and the second data auxiliary trace 3312 are insulatively arranged; by arranging the first virtual auxiliary trace 3321 and the first data auxiliary trace 3311, the trace arrangement of the display panel 10 in the third direction X3 and the fourth direction X4 can be balanced, and the trace arrangement density of different areas can be balanced, so as to avoid the situation that the display panel 10 has different light reflectivity due to unbalanced trace arrangement, and the display effect of the display panel 10 is unbalanced.

[0134] Optionally, referring to FIG. 28, the fourth direction X3 can be the same as the first direction X1, and the third direction X3 can be the same as the second direction X2, so that the first signal line 310 can be understood as extending in the fourth direction X4. The second virtual auxiliary trace 3322 is the virtual auxiliary line 332, and the second virtual auxiliary trace 3322 extends in the fourth direction X4, so the second virtual auxiliary trace 3322 can be at least partially located in the auxiliary display area AA2, and the first signal line 310 includes at least part of the second virtual auxiliary trace 3322, that is, the first signal line 310 includes the part of the second virtual auxiliary trace 3322 located in the auxiliary display area AA2. Optionally, the second virtual auxiliary trace 3322 and the first virtual auxiliary trace 3321 are similar to the first signal line 310, and the embodiments of the second virtual auxiliary trace 3322 will not be described again.

[0135] FIG. 29 is another enlarged view of the area B in FIG. 1, and FIG. 30 is a sectional view of FIG. 29 along the section line F-F'. Referring to FIGS. 1, 29 and 30, the display panel 10 includes a plurality of light emitting elements 400, and each light emitting element 400 includes a first electrode 401, a second electrode 402 and a light emitting layer 403 between the first electrode 401 and the second electrode 402. In the thickness direction of the display panel 10, the first electrode 401 overlaps the first break 310a.

[0136] Specifically, referring to FIG. 1 and FIG. 29, the display panel 10 includes a plurality of light emitting elements 400, and the display function of the display panel 10 is realized by the light emitting elements 400. Optionally, referring to FIG. 30, the light emitting element 400 includes a first electrode 401, a second electrode 402 and a light emitting layer 403, wherein the first electrode 401 is located on the side of the second electrode 402 close to the sink 200, and the light emitting layer 403 is located between the first electrode 401 and the second electrode 402.

[0137] Optionally, referring to FIG. 29, along the thickness direction of the display panel 10, the first electrode 401 covers the first fracture 310a. It should be noted that the second electrode 402 and the light emitting layer 403 can be laid in the whole area, and the second electrode 402 and the light emitting layer 403 are not shown in FIG. 25, and only the first electrode 401 of the light emitting element 400 is shown. By covering the first fracture 310a by the first electrode 401, that is, by shielding the fracture of the wire by the first electrode 401, the color deviation caused by the fracture to the light transmission can be avoided, thereby ensuring the display effect of the display panel 10 as a whole. At the same time, the first electrode 401 shields the first fracture 310a, which is also beneficial to improve the flatness of the display panel 10 as a whole.

[0138] Based on the same application concept, the embodiment of the present application also provides a display device. FIG. 31 is a structural schematic diagram of a display device provided by an embodiment of the present application. As shown in FIG. 31, the display device 1 includes the display panel 10 described in any of the above embodiments. Therefore, the display device 1 provided by the embodiment of the present application has the corresponding beneficial effects of the above embodiments, which will not be described here. Optionally, the display device 1 further includes a light sensing element 20, and along the thickness direction of the display device 10, the light transmission hole overlaps the light sensing element 20. For example, the display device 1 can be a mobile phone, a computer, a smart wearable device (for example, a smart watch) and a vehicle-mounted display device, etc. The light sensing element 20 can be a under-screen camera, a fingerprint recognition module or an ambient light sensor, etc. The embodiment of the present application is not limited thereto. It should be noted that the number of light sensing elements 20 arranged in the display device 1 is diverse. FIG. 31 only shows one light sensing element 20, or it can be understood that FIG. 31 shows the arrangement area of at least one light sensing element. The specific arrangement of the light sensing element can be adjusted adaptively according to the display device 1.

Claims

1. A display panel comprising a display area and a non-display area, the non-display area at least partially surrounding the display area; the display area comprising a main display area and a sub-display area, the main display area at least partially surrounding the sub-display area; the sub-display area comprising a light transmission hole for transmitting light to a light sensing element; the display panel further comprising a substrate and a plurality of signal lines, the signal lines comprising first signal lines, the first signal lines extending along a first direction; the first signal lines comprising first breaks; along a second direction, a projection of the first breaks on the substrate overlaps with a projection of the light transmission hole on the substrate; wherein the first direction and the second direction intersecting.

2. The display panel of claim 1, wherein, the signal lines further comprising data signal lines, the data signal lines extending along a third direction and being arranged along a fourth direction; the third direction and the fourth direction intersecting; the signal lines further comprising a plurality of auxiliary lines; the non-display area comprising a fan-out area located at a side of the display area, the fan-out area comprising a plurality of fan-out traces; the auxiliary lines comprising data auxiliary lines, at least part of a data auxiliary line being located in the display area; at least part of the data signal lines being electrically connected through the data auxiliary lines and the fan-out traces; the auxiliary lines further comprising virtual auxiliary lines located in the display area, the virtual auxiliary lines being insulatively arranged with the data auxiliary lines in a same layer; the first signal lines comprising the virtual auxiliary lines.

3. The display panel of claim 2, wherein, the data auxiliary lines comprising electrically connected first data auxiliary traces and second data auxiliary traces, the first data auxiliary traces extending along the third direction and being electrically connected with the fan-out traces, the second data auxiliary traces extending along the fourth direction and being electrically connected with the data signal lines; the virtual auxiliary lines comprising electrically connected first virtual auxiliary traces and second virtual auxiliary traces, the first virtual auxiliary traces extending along the third direction, the second virtual auxiliary traces extending along the fourth direction; the first virtual auxiliary traces being insulatively arranged with the first data auxiliary traces in a same layer, the second virtual auxiliary traces being insulatively arranged with the second data auxiliary traces in a same layer; the first signal lines comprising at least part of the first virtual auxiliary traces; the first direction and the third direction being the same direction, the second direction and the fourth direction being the same direction.

4. The display panel of claim 3, wherein, the data signal lines comprising first data signal lines, at least part of a first data signal line being located in the sub-display area; the first virtual auxiliary traces comprising first sub-virtual auxiliary traces, at least part of a first sub-virtual auxiliary trace being located in the sub-display area; the first data signal lines being arranged adjacent to the first sub-virtual auxiliary traces.

5. The display panel of claim 4, wherein, the first data signal lines being located at a side of the first sub-virtual auxiliary traces close to the light transmission hole; the first data signal lines comprising electrically connected first main portions and first bending portions; along the fourth direction, a projection of the first bending portions on the substrate overlaps with a projection of the light transmission hole on the substrate; In the third direction, the first bending portion on the substrate and the first sub-virtual auxiliary trace on the substrate are overlapped.

6. The display panel of claim 4, wherein, The first data signal line is located on one side of the first sub-virtual auxiliary trace away from the light transmission hole. The first data signal line comprises a first main body portion and a first bending portion electrically connected; in the fourth direction, the first bending portion on the substrate and the light transmission hole on the substrate are overlapped. In the third direction, the first bending portion on the substrate and the first sub-virtual auxiliary trace on the substrate are not overlapped.

7. The display panel of claim 4, wherein, The first data signal line is located on one side of the first sub-virtual auxiliary trace away from the light transmission hole; in the thickness direction of the display panel, the first break and the light transmission hole are overlapped.

8. The display panel of claim 4, wherein, The first sub-virtual auxiliary trace comprises a first trace sub-portion and a second trace sub-portion located on two sides of the first break respectively; A plurality of the first trace sub-portions arranged in the fourth direction are electrically connected through the second virtual auxiliary trace; And / or, a plurality of the second trace sub-portions arranged in the fourth direction are electrically connected through the second virtual auxiliary trace.

9. The display panel of claim 8, further comprising a signal bus located in a non-display area, the second virtual auxiliary trace is electrically connected with the signal bus; The signal bus is located on at least one side of the display area in the fourth direction.

10. The display panel of claim 8, wherein, The second virtual auxiliary trace receives a fixed potential signal.

11. The display panel of claim 10, wherein, The fixed potential signal comprises a power supply signal, an initialization signal or a bias adjustment signal.

12. The display panel of claim 3, wherein, The data signal line comprises a second data signal line located in the main display area, the second data signal line comprises a second main body portion and a second bending portion electrically connected.

13. The display panel of claim 12, wherein, The data signal line comprises a first data signal line, at least part of one of the first data signal lines is located in the auxiliary display area; the first data signal line comprises a first main body portion and a first bending portion electrically connected; in the fourth direction, the first bending portion on the substrate and the light transmission hole on the substrate are overlapped; Two adjacent first data signal lines comprise two adjacent first bending portions, the distance between the two adjacent first bending portions is L1; Two adjacent second data signal lines comprise two adjacent second bending portions, the distance between the two adjacent second bending portions is L2; Wherein, L1≥L2.

14. The display panel of claim 12, wherein, The first virtual auxiliary trace comprises a second sub-virtual auxiliary trace, the second sub-virtual auxiliary trace is located in the main display area; The second sub-virtual auxiliary trace and the second data signal line are adjacent.

15. The display panel of claim 14, wherein, In the fourth direction, the second sub-virtual auxiliary trace on the substrate and the second bending portion on the substrate are overlapped.

16. The display panel of claim 14, wherein, The second sub-virtual auxiliary trace comprises a second break; In the fourth direction, the second break on the substrate and the second bending portion on the substrate are overlapped.

17. The display panel of claim 16, wherein, In the third direction, a projection of the second bending portion on the substrate and a projection of the second sub-virtual auxiliary trace on the substrate overlap.

18. The display panel of claim 2, wherein, The data auxiliary line includes a first data auxiliary trace and a second data auxiliary trace electrically connected, the first data auxiliary trace extending in the third direction and electrically connected with the fan-out trace, and the second data auxiliary trace extending in the fourth direction and electrically connected with the data signal line; The virtual auxiliary line includes a first virtual auxiliary trace and a second virtual auxiliary trace connected, the first virtual auxiliary trace extending in the third direction, and the second virtual auxiliary trace extending in the fourth direction; the first virtual auxiliary trace is insulatively arranged with the first data auxiliary trace in the same layer, and the second virtual auxiliary trace is insulatively arranged with the second data auxiliary trace in the same layer; The first signal line includes at least part of the second virtual auxiliary trace; the first direction and the fourth direction are the same direction, and the second direction and the third direction are the same direction.

19. The display panel of claim 1, comprising a plurality of light emitting elements, the light emitting element comprising a first electrode, a second electrode, and a light emitting layer between the first electrode and the second electrode; In a thickness direction of the display panel, the first electrode and the first break overlap.

20. A display device comprising the display panel of any one of claims 1-19. The display device further comprises a light sensing element. In a thickness direction of the display device, the light transmission hole and the light sensing element overlap.

Images