Cache resource management method, electronic device, readable medium, and product

Abstract

The present disclosure provides a cache resource management method, comprising: in response to a target write request, determining a management dimension of the target write request, wherein the management dimension is determined on the basis of a write channel and a read channel of the write request, and write requests having the same write channel and the same read channel belong to the same management dimension; determining whether there is a cache resource block used by the management dimension; if there is the cache resource block used by the management dimension, writing data of the target write request into the cache resource block; and if there is no cache resource block used by the management dimension, allocating, to the management dimension of the target write request, a cache resource block that is not used by another management dimension, and writing the data of the target write request into the cache resource block. The present disclosure further provides an electronic device, a readable medium, and a product.

Description

Cache resource management method, electronic device, readable medium and product TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of multi-core, and particularly relates to a cache resource management method, an electronic device, a readable medium and a product. BACKGROUND

[0002] With the development of information intelligent network, the requirement of network switching chip on bandwidth throughput is higher and higher, and the processing capacity of single-core chip cannot adapt to the demand of high-performance network processor. Therefore, the architecture of multi-core parallel processing combined with storage resource sharing is widely applied in the design of high-performance network processing chip.

[0003] In the architecture of multi-core parallel processing combined with storage resource sharing, there is a conflict problem of multi-path concurrent writing and multi-path concurrent reading. SUMMARY

[0004] The present disclosure provides a cache resource management method, an electronic device, a readable medium and a product.

[0005] The present disclosure provides a cache resource management method, which comprises the following steps: in response to a target write request, determining a management dimension of the target write request, wherein the management dimension is determined according to a write channel and a read channel of the write request, and write requests with the same write channel and read channel belong to the same management dimension; judging whether there is a cache resource block used by the management dimension; in the case that there is a cache resource block used by the management dimension, writing data of the target write request into the cache resource block; in the case that there is no cache resource block used by the management dimension, allocating a cache resource block not used by other management dimensions to the management dimension of the target write request, and writing data of the target write request into the allocated cache resource block.

[0006] The present disclosure provides an electronic device, which comprises a memory and a processor, wherein the memory stores a computer program executable by the processor, and the computer program is executed by the processor to implement the cache resource management method provided by the present disclosure.

[0007] The present disclosure provides a computer readable medium, which stores a computer program, and the computer program is executed by a processor to implement the cache resource management method provided by the present disclosure.

[0008] The present disclosure provides a computer program product, which comprises a computer program, and the computer program is executed by a processor to implement the cache resource management method provided by the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0009] In the drawings of the present disclosure:

[0010] FIG. 1 is a flowchart of a cache resource management method according to an embodiment of the present disclosure;

[0011] FIG. 2 is an application scenario diagram of a cache resource management method according to an embodiment of the present disclosure;

[0012] FIG. 3 is a schematic diagram of a cache resource management apparatus according to an embodiment of the present disclosure;

[0013] FIG. 4 is a schematic diagram of pre-configured cache resources according to an embodiment of the present disclosure;

[0014] FIG. 5 is a schematic diagram of writing data according to an embodiment of the present disclosure;

[0015] FIG. 6 is a schematic diagram of reading data according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0016] In order to make the technical solution of the present disclosure better understood by those skilled in the art, the embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0017] The embodiments of the present disclosure will be described more fully hereinafter with reference to the accompanying drawings, but the embodiments shown can be embodied in different forms and the present disclosure should not be construed as being limited to the embodiments set forth herein. Rather, the purpose of providing these embodiments is to make the present disclosure thorough and complete and to fully enable a person skilled in the art to understand the scope of the present disclosure.

[0018] The accompanying drawings of the embodiments of the present disclosure are used to provide a further understanding of the embodiments of the present disclosure and constitute a part of the specification, which are used together with the detailed embodiments to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing the detailed embodiments with reference to the accompanying drawings.

[0019] The present disclosure can be described with reference to plan views and / or sectional views by means of ideal schematic diagrams of the present disclosure. Therefore, the example diagrams can be modified according to manufacturing techniques and / or tolerances.

[0020] The embodiments of the present disclosure and the features in the embodiments can be combined with each other without conflict.

[0021] The terminology used by the present disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used in the present disclosure, the term "and / or" includes any and all combinations of one or more of the associated listed items. As used in the present disclosure, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. The term "includes" and / or "made of" means that existence of the described features, integers, steps, operations, elements, and / or components is not excluded, but one or more other features, integers, steps, operations, elements, components and / or groups thereof are not excluded.

[0022] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted in an overly literal or overly formal sense unless expressly so defined herein.

[0023] In the architecture of multi-core parallel processing combined with shared storage resources, the problem of multi-path concurrent conflict can be solved by expanding physical storage resources and combining with pre-set read-write avoidance mode. However, the expansion of physical storage resources leads to the problem of reduction of available cache resources in the same physical area.

[0024] In another related technology, the physical cache resources are split into several cache resource blocks, and when concurrent writing is performed, random writing is performed into different cache resource blocks. However, due to the randomness of writing, there may be a situation of multi-path concurrent reading of a cache resource block when reading out, which not only causes conflict between writing and reading out operations, but also inevitably has the risk of insufficient reading out bandwidth.

[0025] Embodiments of the present disclosure provide a cache resource management method, an electronic device, a readable medium and a product, to solve the conflict of concurrent multi-path read-write operation and the risk of insufficient bandwidth.

[0026] Embodiments of the present disclosure provide a cache resource management method.

[0027] FIG. 1 is a flowchart of a cache resource management method provided by embodiments of the present disclosure.

[0028] As shown in FIG. 1, the cache resource management method according to the embodiments of the present disclosure includes the following steps S101-S104.

[0029] In step S101, in response to a target write request, a management dimension of the target write request is determined.

[0030] The write channel and the read channel are carried in the target write request, and the management dimension is determined according to the write channel and the read channel carried in the write request. The write requests with the same write channel and read channel belong to the same management dimension.

[0031] In some embodiments, the write channel is used for writing data, that is, the data is written into the cache resource through the write channel. The read channel is used for reading out data, that is, the data is read out from the cache resource block through the read channel.

[0032] For example, if the multi-core system includes m write channels and n read channels, the multi-core system can include m*n management dimensions, where m and n are integers greater than 1.

[0033] In some embodiments, the number of write channels and read channels can be the same or different. Each write channel can correspond to one or more read channels, and each read channel can also correspond to one or more write channels. The management dimension records the correspondence relationship between the write channel and the read channel. Each management dimension includes a write channel, a read channel, and the correspondence relationship between the write channel and the read channel.

[0034] For example, if the multi-core system includes write channels A, B, and C, and read channels a and b, there are six management dimensions. The first management dimension records the correspondence relationship between the write channel A and the read channel a, the second management dimension records the correspondence relationship between the write channel A and the read channel b, the third management dimension records the correspondence relationship between the write channel B and the read channel a, the fourth management dimension records the correspondence relationship between the write channel B and the read channel b, the fifth management dimension records the correspondence relationship between the write channel C and the read channel a, and the sixth management dimension records the correspondence relationship between the write channel C and the read channel b. According to the management dimension, it can be determined which write channel and which read channel correspond.

[0035] When the number of write channels and read channels is consistent and there is a one-to-one relationship between the write channel and the read channel, the number of management dimensions can be determined according to the number of read channels. For example, when the number of write channels and read channels is n and there is a one-to-one relationship between the write channel and the read channel, the multi-core system includes n management dimensions.

[0036] Step S102, it is judged whether there is a cache resource block used by the management dimension.

[0037] The cache resource block is a resource used for caching data obtained by splitting the cache resource.

[0038] In some embodiments, the number of cache resource blocks is related to the number of management dimensions. For example, the number of cache resource blocks is k times the number of management dimensions, that is, the cache resource is split into cache resource blocks whose number is k times the number of management dimensions, and k is an integer greater than or equal to 2. For example, when the multi-core system includes 16 management dimensions, the cache resource can be split into 32, 64 or more cache resource blocks.

[0039] In some embodiments, each cache resource block can be provided with a cache resource block code (bank_id) by which the cache resource block can be identified.

[0040] In some embodiments, each cache resource block can only be occupied by a single write request or read request at a certain time period. Therefore, after receiving a target write request, it is determined whether there is a cache resource block used by the management dimension corresponding to the target write request, that is, whether there is a cache resource block used by the management dimension. If there is, the target write request can directly use the cache resource block; if there is not, a new cache resource block can be allocated for the target write request.

[0041] FIG. 2 is an application scenario diagram of the cache resource management method provided by the embodiments of the present disclosure.

[0042] As shown in FIG. 2, the cache resource management module 10 is configured to manage operation requests, wherein the operation requests include write requests and read requests. The cache resource management module 10 can receive one or more write requests, for example, the cache resource management module 10 can receive M+1 write requests, i.e., write request 0, write request 1, …, write request M, or receive N+1 read requests, i.e., read request 0, read request 1, …, read request N. The M+1 write requests and the N+1 read requests can be issued to the cache resource management module 10 in parallel or sequentially.

[0043] When the cache resource management module 10 receives a target write request, it first determines the management dimension of the target write request, then determines whether there is a cache resource block used by the management dimension, and then performs corresponding operations according to the determination result.

[0044] Step S103, in the case where there is a cache resource block used by the management dimension, data of the target write request is written into the cache resource block.

[0045] If the cache resource management module 10 determines that there is a cache resource block used by the management dimension, the data of the target write request is written into the cache resource block.

[0046] Step S104, in the case where there is no cache resource block used by the management dimension, a cache resource block not used by other management dimensions is allocated for the management dimension of the target write request, and the data of the target write request is written into the allocated cache resource block.

[0047] If the cache resource management module 10 determines that there is no cache resource block used by the management dimension, a cache resource block not used by other management dimensions needs to be allocated for the management dimension, and then the data of the target write request is written into the allocated cache resource block.

[0048] In some embodiments, the cache resource blocks include exclusive cache resource blocks and shared cache resource blocks. Each management dimension can use one exclusive cache resource block and multiple shared cache resource blocks. The exclusive cache resource block is a cache resource block exclusively used by the management dimension, and cannot be used by other management dimensions; the shared cache resource block is a cache resource block that can be shared by different management dimensions, and can be allocated to the current management dimension as long as the cache resource block is not used by other management dimensions.

[0049] For example, the multi-core system includes 16 management dimensions, and the cache resource is divided into 32 cache resource blocks. 16 cache resource blocks can be used as exclusive cache resource blocks, and the other 16 cache resource blocks can be used as shared cache resource blocks. For any management dimension, 17 / 32*T of the cache resource can be obtained, where T is the total size of the cache resource.

[0050] When it is necessary to further improve the utilization of the cache resource, the cache resource can be divided into 64 or more cache resource blocks. For example, the cache resource is divided into 64 cache resource blocks, 16 cache resource blocks are used as exclusive cache resource blocks for the 16 management dimensions, and the other 48 cache resource blocks are used as shared cache resource blocks. For any management dimension, 49 / 64*T of the cache resource can be obtained.

[0051] According to the embodiments of the present disclosure, the cache resource is divided into multiple cache resource blocks, and when multiple operation requests are concurrently performed, parallel operations can be performed on different cache resource blocks to realize parallel operations of multiple operation requests.

[0052] In some embodiments, allocating, for the management dimension of the target write request, a cache resource block that is not used by other management dimensions and writing data of the target write request into the allocated cache resource block (i.e., step S104) includes: in the case where there is an available shared cache resource block, selecting a cache resource block that is not used by other management dimensions from the shared cache resource block, and writing data of the target write request into the cache resource block; in the case where there is no available shared cache resource block, writing data of the target write request into the exclusive cache resource block corresponding to the management dimension of the target write request.

[0053] In the case where there is no cache resource block used by the management dimension, a shared cache resource block that is not used by other management dimensions is first selected from the shared cache resource blocks to ensure that only one management dimension uses the shared cache resource block at a certain time period, the shared cache resource block is determined as a target cache resource block, and data of the target write request is written into the target cache resource block. In the case where there is no available shared cache resource block, i.e., there is no shared cache resource block that is not used by other management dimensions, the exclusive cache resource block corresponding to the management dimension of the target write request is used as the target cache resource block, and data of the target write request is written into the target cache resource block.

[0054] In the embodiments of the present disclosure, each management dimension preferentially uses a shared cache resource block, and after all the shared cache resource blocks are exhausted, the corresponding exclusive cache resource block of the management dimension is used. After a shared cache resource block is applied to a certain management dimension, the management dimension is not allowed to apply other shared cache resource blocks before the shared cache resource block is completely used and exhausted. In this way, it can be ensured that the cache resource block is occupied by only one management dimension in a certain time period, and different read channels and write channels do not affect each other, thereby ensuring that the bandwidth is not lost during reading and writing.

[0055] In the embodiments of the present disclosure, the exclusive cache resource block is used as a supplement after the shared cache resource blocks are exhausted, which can effectively avoid the defect that in some extreme congestion environments, the congestion channel occupies the cache resource, causing some non-congestion channels to also be unable to use the cache space.

[0056] In some embodiments, the cache resource management apparatus is used to manage the cache resource blocks and manage write requests, read requests and other operation requests.

[0057] FIG. 3 is a schematic diagram of a cache resource management apparatus provided by the embodiments of the present disclosure.

[0058] As shown in FIG. 3, the cache resource management apparatus includes a cache address resource pool 31, a cache resource 32, and a cache management module 33. The cache resource 32 is used to provide a space for storing data, and the cache resource is split into a plurality of cache resource blocks. The cache address resource pool 31 stores and manages cache addresses, and the cache addresses have a corresponding relationship with the cache resource blocks. Each cache resource block can have one or more cache addresses. The cache address resource pool 31 is split into a plurality of cache address blocks.

[0059] For ease of management, the cache resource management apparatus can also uniformly encode the cache resource blocks. For example, when the cache resource is split into 32 cache resource blocks, the 32 cache resource blocks can be sequentially encoded from 0 to 31. When the cache resource is split into 64 cache resource blocks, the 64 cache resource blocks can be sequentially encoded from 0 to 63.

[0060] In some embodiments, writing the data of the target write request into the cache resource block includes: applying a target cache address from the cache resource block, wherein the cache resource block includes at least one cache address, and the target cache address is one of the at least one cache address; and writing the data of the target write request into the target cache address.

[0061] In the embodiments of the present disclosure, each cache resource block includes at least one cache address, and for any one write request, a target cache resource block is first determined, and then a target cache address is determined.

[0062] If the cache resource management apparatus finds an existing shared cache resource block being used, the shared cache resource block being used is taken as a target cache resource block, a target cache address is applied from the target cache resource block, and then the write data is written into the target cache address. If there is no shared cache resource block being used, a shared cache resource block not used by other management dimensions is applied from a shared cache resource block pool as a target cache resource block, a target cache address is applied from the target cache resource block, and then the data is written into the target cache address. If the shared cache resource block pool is empty, it means that there is no available shared cache resource block, and a private cache resource block needs to be taken as a target cache resource block, a target cache address is applied from the private cache resource block, and then the write data is written into the target cache address in the private cache resource block.

[0063] In some embodiments, after the data of the target write request is written into the allocated cache resource block (i.e., step S104), the method further includes binding the allocated cache resource block with the management dimension.

[0064] After the data of the target write request is written into the allocated cache resource block, the cache resource management apparatus binds (latches) the allocated cache resource block with the management dimension, to indicate that the cache resource block has been used by the management dimension, and other management dimensions cannot use the cache resource block.

[0065] In some embodiments, determining whether there is a cache resource block used by a management dimension (i.e., step S102) includes: in the case that the management dimension has been bound with a cache resource block, determining that there is a cache resource block used by the management dimension.

[0066] The cache management module can determine whether there is a cache resource block used by a management dimension according to the binding of the management dimension with the cache resource block. If the management dimension has been bound with a cache resource block, it is determined that there is a cache resource block used by the management dimension. If the management dimension is not bound with a cache resource block, it is determined that there is no cache resource block used by the management dimension, and a cache resource block not used by other management dimensions can be allocated for the management dimension.

[0067] When the cache resource block is bound, the bound cache resource block cannot be used by other management dimensions, and only when the space of the cache resource block is completely exhausted, the management dimension can enable (bind) a new cache resource block. Compared with random storage, the use rate of the cache resource can be improved.

[0068] In some embodiments, the cache resource management method provided by the embodiments of the present disclosure further includes: in the case that it is determined that the cache resource block is damaged and / or idle, closing the cache resource block.

[0069] For example, when a certain cache resource block is damaged, the damaged cache resource block can be closed without affecting the use of other cache resource blocks, so as to improve the yield of the multi-core chip, thereby improving the performance of the multi-core system.

[0070] When the demand for cache resource blocks is insufficient, part of the cache resource blocks can be closed, and only a part of the cache resource blocks is used, so as to reduce the power consumption of the multi-core system.

[0071] It should be noted that when part of the cache resource blocks is closed, the shared cache resource blocks are closed, and the exclusive cache resource blocks are not closed, that is, the power consumption of the shared cache resource blocks is reduced, thereby reducing the overall power consumption of the multi-core system.

[0072] When the damaged cache resource block is closed and part of the cache resource blocks is closed, the encoding of the closed cache resource block is removed from the shared cache resource block pool, so as to avoid that the write channel uses the closed cache resource block.

[0073] In some embodiments, the cache resource management method provided by the embodiments of the present disclosure further includes: in response to a target read request, determining a read channel of the target read request; determining a cache resource block based on the read channel; and obtaining read-out data of the target read request from a target cache address of the cache resource block.

[0074] When multiple concurrent read requests are received, the cache resource block is determined based on the read channel in the read request. Since the cache resource block is determined based on the management dimension, when each data is written, the data of different read channels is stored in different cache resource blocks. The multiple concurrent read requests can read the data from the corresponding cache resource blocks without conflict and send the data to the subsequent module.

[0075] In some embodiments, after obtaining the read-out data of the target read request from the target cache address of the cache resource block, the method further includes: releasing the target cache address to a cache address resource pool, wherein the cache address resource pool is used to store cache addresses; and in a case where all cache addresses corresponding to the cache resource block are released, unbundling the cache resource block from the management dimension.

[0076] When the data is read out from the target cache address, the target cache address is released to the cache address resource pool. When all cache addresses in the cache resource block are released, the cache resource block is put back into the shared cache resource block pool, and the cache resource block is unbundled from the management dimension for use by other management dimensions. If the cache addresses of the cache resource block are not all recycled after the data is read out, the unbundling operation is not performed, and the cache resource block is still used by the original management dimension, and data can continue to be written.

[0077] In some embodiments, in response to the target write request, determining the management dimension of the target write request (i.e., step S101) comprises: in response to the target write request, looking up the management dimension table to determine the management dimension of the target write request, wherein the management dimension table is used to record the correspondence between the write channel, the read channel and the management dimension.

[0078] The cache management module can manage the write request, the read request and the management dimension through the management dimension table. The management dimension table is pre-configured and is used to record the correspondence between the write channel, the read channel and the management dimension.

[0079] When the cache management module receives multiple write requests, the management dimension table can be queried through the management dimension of the write request to find that the shared cache resource block in use exists for the management dimension, the shared cache resource block in use is taken as the target cache resource block, and the data of the write request is written into the target cache resource block. If no shared cache resource block in use for the management dimension is found, a shared cache resource block not used by other management dimensions is found as the target cache resource block according to the management dimension table, and the data of the write request is written into the target cache resource block.

[0080] When the cache management module receives multiple concurrent read requests, the cache resource block can be determined based on the read request and the management dimension table. Since the data of different read channels is stored in different cache resource blocks when each data is written, the multiple concurrent read requests can be read from the cache resource blocks without conflict.

[0081] In some embodiments, before the multi-core system is used, the cache resource can be pre-configured through an external configuration module.

[0082] FIG. 4 is a schematic diagram of pre-configuring the cache resource in the embodiment of the present disclosure.

[0083] As shown in FIG. 4, the cache address resource pool 31 and the cache resource 32 are configured by the configuration module 34. The cache resource 32 is split into a plurality of cache resource blocks, such as a bank0 cache resource block, a bank1 cache resource block, a bank2 cache resource block, a bank3 cache resource block, a bank5 cache resource block, a bank6 cache resource block, a bank7 cache resource block, a bank8 cache resource block, and a bank… cache resource block. The cache address resource pool 31 is split into a plurality of cache address blocks, such as a bank0 cache address block, a bank1 cache address block, a bank2 cache address block, a bank3 cache address block, a bank5 cache address block, a bank6 cache address block, a bank7 cache address block, a bank8 cache address block, and a bank… cache address block. The plurality of cache resource blocks and the plurality of cache address blocks have a one-to-one correspondence relationship, such as a bank0 cache resource block corresponding to a bank0 cache address block, a bank1 cache resource block corresponding to a bank1 cache address block, and so on.

[0084] If the bank0 cache resource block, the bank1 cache resource block, the bank2 cache resource block, and the bank3 cache resource block are exclusive cache resource blocks, and the bank5 cache resource block, the bank6 cache resource block, the bank7 cache resource block, the bank8 cache resource block, and the bank… cache resource block are shared cache resource blocks, the bank0 cache address block, the bank1 cache address block, the bank2 cache address block, and the bank3 cache address block are set in the exclusive pool 311 in the cache address resource pool 31, and the bank5 cache address block, the bank6 cache address block, the bank7 cache address block, the bank8 cache address block, and the bank… cache address block are set in the shared pool 312 in the cache address resource pool 31.

[0085] The cache address resource pool 31 further includes a shared cache resource block code set 313 for managing the codes of the shared cache resource blocks, such as recording whether the shared cache resource blocks are latched, whether the shared cache resource block pool is empty, and the like.

[0086] In the embodiments of the present disclosure, any one of the cache resource blocks can be set as a shared cache resource block or an exclusive cache resource block.

[0087] In the configuration, if the damaged cache resource block is known, the damaged cache resource block can be marked, closed and removed from the shared cache resource block encoding set 313. For example, if the bank7 cache resource block is damaged, the bank7 cache address block in the shared pool 312 is marked, the bank7 cache resource block is closed and the encoding of the bank7 cache resource block is removed from the shared cache resource block encoding set 313, that is, the shared cache resource block encoding set 313 only records the bank5 cache address block, the bank6 cache address block, the bank8 cache address block, the bank… cache address block.

[0088] After the configuration is completed, the above steps S101 to S104 can be automatically performed.

[0089] FIG. 5 is a schematic diagram of writing data in the embodiment of the present disclosure.

[0090] As shown in FIG. 5, in writing data, the write request is managed by the cache management module 51, the cache management module 51 obtains the write channel and the read channel from the write request, determines the management dimension from the management dimension table through the write channel and the read channel, and queries the management dimension table based on the management dimension and determines the cache resource block.

[0091] In the embodiment of the present disclosure, whether the management dimension corresponding to the write request has a shared cache resource block available can be obtained through the read channel of the write request. If it is found that there is a shared cache resource block being used, the shared cache resource block being used is determined as the target cache resource block, a target cache address is applied from the target cache resource block, and data is written into the cache resource corresponding to the target cache address.

[0092] If it is found that there is no shared cache resource block being used, a shared cache resource block is selected from the unused shared cache resource blocks in the shared cache resource block encoding set 313 as the target cache resource block, a target cache address is applied from the target cache resource block, and data is written into the cache resource corresponding to the target cache address. At the same time, the target cache resource block is latched with the management dimension, that is, the encoding of the target cache resource block is sent to the cache management module 51, and the cache management module 51 records the correspondence between the target cache resource block and the management dimension.

[0093] If it is found that there is no shared cache resource block being used, and all shared cache resource blocks in the shared cache resource block encoding set 313 are used, that is, the shared cache resource block pool is empty, the exclusive cache resource block corresponding to the management dimension of the write request is used as the target cache resource block, a target cache address is applied from the target cache resource block, and data is written into the cache resource corresponding to the target cache address.

[0094] When reading out data, since the data of different read channels has been stored in different cache resource blocks during writing, multiple concurrent read requests can be read out from the corresponding cache resource blocks without conflict.

[0095] FIG. 6 is a schematic diagram of reading out data in an embodiment of the present disclosure.

[0096] As shown in FIG. 6, after the data is read out, the cache resource corresponding to the data is released, the cache address code is collected back to the cache address resource pool 31, and it is determined whether the cache addresses of the cache resource block have all been released. If the cache addresses of the data read out this time are collected back, the cache addresses of the cache resource block are all collected back, the code of the cache resource block is added to the shared cache resource block code set again, and a command for releasing the cache resource block is sent to the cache management module 51, so as to release the binding of the cache resource block and the management dimension. The cache resource block after being unbound can be selected and used by other management dimensions. If the cache addresses of the data read out this time are collected back, the cache addresses of the cache resource block are not all collected back, and no operation is performed. At this time, the cache resource block is still bound to the corresponding management dimension and is used to store subsequent write data.

[0097] The cache resource management method provided in the embodiments of the present disclosure can be applied to an Ethernet switch chip, and is suitable for a high-bandwidth Ethernet switch chip, such as a multi-core chip. When the cache resource management method is applied to a multi-core chip, the conflict problem of multiple concurrent operation requests can be solved by using the cache resource management method.

[0098] It should be noted that in FIGS. 2 to 6, the solid line with a solid arrowhead represents the transmission direction of the operation request, the dashed line with a solid arrowhead represents obtaining the code of the cache resource block, and the dashed line with a hollow arrowhead represents releasing the code of the cache resource block.

[0099] According to the cache resource management method in the embodiments of the present disclosure, since the cache resource is split into multiple cache resource blocks, when multiple operation requests of different transmission channels are received, the cache resource block corresponding to each operation request is determined according to the management dimension table. The management dimension table records the correspondence between the transmission channel and the management dimension. The transmission channel can be known from the operation request, and therefore the management dimension corresponding to the operation request can be determined by using the management dimension table. Each management dimension uses only one cache resource block at the same time, and therefore different operation requests can correspond to different cache resource blocks. The writing is no longer random writing, the conflict problem of multiple concurrent operations is solved, and the bandwidth of the operation request can be guaranteed.

[0100] The embodiments of the present disclosure further provide an electronic device, comprising a memory and a processor; the memory stores a computer program executable by the processor, and the computer program is executed by the processor to implement any of the cache resource management methods of the embodiments of the present disclosure.

[0101] For example, the processor can be configured to: receive a plurality of operation requests from different transmission channels concurrently; determine a target cache resource block corresponding to each operation request based on a preset management dimension table, wherein the management dimension table is used to record the correspondence between the transmission channel and the management dimension, and the target cache resource block is one of the cache resource blocks obtained by splitting the cache resource; and perform an operation on the target cache resource block based on the operation request.

[0102] The embodiments of the present disclosure further provide a computer readable medium, which stores a computer program, and the program is executed by the processor to implement any of the cache resource management methods.

[0103] The embodiments of the present disclosure further provide a computer program product, comprising computer readable code or a non-volatile computer readable storage medium carrying computer readable code, and when the computer readable code is run in the processor of the electronic device, the processor in the electronic device implements any of the cache resource management methods.

[0104] The processor is a device with data processing capability, including but not limited to a central processing unit (CPU) and the like; the memory is a device with data storage capability, including but not limited to a random access memory (RAM, more specifically SDRAM, DDR, etc.), a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), and a flash memory (FLASH); the I / O interface (read-write interface) is connected between the processor and the memory, and can realize the information interaction between the memory and the processor, including but not limited to a data bus (Bus) and the like.

[0105] Those skilled in the art can understand that all or some of the functional modules / units in the above disclosed steps, systems, and devices can be implemented as software, firmware, hardware, and appropriate combinations thereof.

[0106] In the hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components, for example, one physical component can have multiple functions, or one function or step can be performed by several physical components in cooperation.

[0107] Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit (CPU), a digital signal processor, or a microprocessor, or hardware, or a combination of software and / or hardware. Such software can be distributed on computer readable media, which can comprise computer storage media (or non-transitory media), and communication media (or transitory media). Computer storage media, as used herein, includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, random access memory (RAM), such as SDRAM, DDR, or other RAM, read only memory (ROM), electrically erasable programmable read only memory (EEPROM), flash memory, or other memory technology, compact disc read only memory (CD-ROM), digital versatile disks (DVDs) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by a computer. Further, it should be appreciated that a computer program product can be tangibly embodied as computer-readable instructions on the computer-readable medium, as program modules or other computer code on the computer-readable medium, or as a computer program product. The computer-readable medium can be a computer- readable storage medium or a computer-readable transmission medium.

[0108] The present disclosure has disclosed example embodiments, and while specific terminology has been employed, such should not be taken in a limiting sense, but rather should be understood to be in a generic sense unless otherwise indicated. In some instances, it will be apparent to those skilled in the art that features, characteristics or / and elements described in connection with a particular embodiment can be used, either alone or in combination with other embodiments, unless otherwise explicitly noted. Accordingly, it will be understood that various modifications can be made in form and details without departing from the scope of the present disclosure as set forth in the following claims.

Claims

1. A cache resource management method, comprising: determining a management dimension of a target write request in response to the target write request, wherein the management dimension is determined according to a write channel and a read channel of the write request, and write requests with the same write channel and read channel belong to the same management dimension; judging whether there is a cache resource block used by the management dimension; in a case where there is a cache resource block used by the management dimension, writing data of the target write request into the cache resource block; in a case where there is no cache resource block used by the management dimension, allocating a cache resource block not used by other management dimensions to the management dimension of the target write request, and writing data of the target write request into the allocated cache resource block.

2. The method of claim 1, wherein, The cache resource block includes a private cache resource block and a shared cache resource block, and each management dimension is allocated with one private cache resource block and a plurality of shared cache resource blocks. Allocating a cache resource block not used by other management dimensions to the management dimension of the target write request and writing data of the target write request into the allocated cache resource block comprises: in a case where there is an available shared cache resource block, selecting a cache resource block not used by other management dimensions from the shared cache resource block, and writing data of the target write request into the cache resource block; in a case where there is no available shared cache resource block, writing data of the target write request into a private cache resource block corresponding to the management dimension of the target write request.

3. The method of claim 1, wherein, After writing data of the target write request into the allocated cache resource block, the method further comprises: binding the allocated cache resource block with the management dimension.

4. The method of claim 3, wherein, Judging whether there is a cache resource block used by the management dimension comprises: in a case where the management dimension has been bound with a cache resource block, determining that there is a cache resource block used by the management dimension. 5.The method of claim 1, further comprising: in a case where it is determined that the cache resource block is damaged and / or idle, closing the cache resource block.

6. The method of any one of claims 1-5, wherein, Writing data of the target write request into a cache resource block comprises: applying a target cache address from the cache resource block, wherein the cache resource block includes at least one cache address, and the target cache address is one of the at least one cache address; writing data of the target write request into the target cache address. 7.The method of claim 6, further comprising: determining a read channel of a target read request in response to the target read request; determining the cache resource block based on the read channel; obtaining readout data of the target read request from a target cache address of the cache resource block.

8. The method of claim 7, wherein, After obtaining readout data of the target read request from a target cache address of the cache resource block, the method further comprises: releasing the target cache address to a cache address resource pool, wherein the cache address resource pool is used to store cache addresses; in a case where all cache addresses corresponding to the cache resource block are released, unbinding the cache resource block from the management dimension.

9. The method of claim 1, wherein, Determining a management dimension of a target write request in response to the target write request comprises: In response to a target write request, a management dimension table is searched to determine a management dimension of the target write request, wherein the management dimension table is used to record a corresponding relationship among a write channel, a read channel and a management dimension.

10. An electronic device comprising: A memory and a processor; The memory stores a computer program capable of being executed by the processor, The computer program is executed by the processor, and the processor implements the cache resource management method according to any one of claims 1-9.

11. A computer readable medium having a computer program stored thereon, wherein the computer program is executed by a processor, and the processor implements the cache resource management method according to any one of claims 1-9.

12. A computer program product comprising a computer program, wherein the computer program is executed by a processor, and the processor implements the cache resource management method according to any one of claims 1-9.

Images