Light-emitting device and pixel current detection method

Abstract

The present application discloses a light-emitting device such as an organic EL display device capable of accurately deriving, through a simpler process, the value of a drive current for individual pixel circuits required for external compensation or the like. An organic EL display device comprises a current measurement circuit that is inserted into a power supply line where pixel currents of all pixel circuits merge, in order to derive, as a pixel current value, the value of the drive current of each pixel circuit required for external compensation for, inter alia, the characteristics of a drive transistor of each pixel circuit. A sequence of data voltages that correspond to respective column vectors of a positive-side matrix Hp and a negative-side matrix Hn obtained from an Hadamard matrix H of an order corresponding to the number of columns of a pixel array in a display unit is sequentially written to all rows of the pixel array, and a current measurement value Im is acquired for each row by a current measurement circuit when only a pixel circuit of the row is activated. The pixel current value of each pixel circuit is calculated by multiplying a matrix configured from the current measurement value Im acquired as described above by an inverse matrix of the Hadamard matrix.

Description

Light-emitting device and pixel current detection method

[0001] The present invention relates to a light-emitting device, and more specifically, to a light-emitting device that functions as a display device equipped with multiple current-driven light-emitting elements as display elements, such as an organic EL (Electro-Luminescence) display device, a light-emitting device that functions as an exposure device, such as a line head containing multiple current-driven light-emitting elements in an electrophotographic printer, and a method for detecting the pixel current flowing through each pixel circuit in such a light-emitting device.

[0002] Organic EL displays are known as thin, high-resolution, and low-power display devices. Active-matrix organic EL displays have multiple pixel circuits arranged in two dimensions, and each pixel circuit includes an organic EL element, a driving transistor, and a holding capacitor. The organic EL element is a self-emissive display element whose brightness changes according to the driving current. The driving transistor controls the driving current flowing to the organic EL element according to the data voltage written to the holding capacitor.

[0003] Generally, thin-film transistors (TFTs) are used as drive transistors in pixel circuits. The gain of MOS (Metal-Oxide-Semiconductor) transistors such as TFTs is determined by mobility, channel width, channel length, gate dielectric capacitance, etc., and the amount of current flowing through a MOS transistor changes according to the gate-source voltage, gain, threshold voltage, etc. When TFTs are used as drive transistors, variations in characteristics such as threshold voltage and mobility occur due to manufacturing variations and degradation over time, which in turn causes variations in the amount of drive current flowing through the organic EL element. As a result, brightness unevenness occurs in the displayed image, and the display quality deteriorates.

[0004] In contrast, to suppress brightness unevenness in the displayed image and burn-in caused by variations in the characteristics of the drive transistors, an organic EL display device is known that measures the drive current to be supplied from the drive transistors to the organic EL elements by taking it outside the pixel circuit and correcting the data voltage to be written to each pixel circuit based on the measurement results so that the characteristic variations are compensated for. This method of compensating for variations in the characteristics of the drive transistors will be referred to as the "external compensation method" below.

[0005] Patent Document 1 (International Publication No. 2014 / 021201) discloses an organic EL display device employing such an external compensation method. In this organic EL display device, a data driver transmits first and second measurement data corresponding to the first and second measurement data voltages, respectively, to a controller 10. The controller updates threshold voltage correction data and gain correction data based on the first and second measurement data, and corrects the video data based on the threshold voltage correction data and gain correction data. As a result, both threshold voltage compensation and gain compensation of the drive transistors are performed for each pixel circuit while displaying an image.

[0006] Furthermore, in the organic electroluminescent display device described in Patent Document 2 (International Publication No. 2018 / 167884), multiple current measurement patterns are provided, which are image patterns having portions that change sinusoidally or cosinely in the horizontal and vertical directions. A two-dimensional discrete inverse Fourier transform is performed on multiple current values ​​obtained by sequentially displaying these multiple current measurement patterns and measuring the current flowing through all organic EL elements in the display unit. This generates a current distribution pattern, and the video signal is corrected based on this current distribution pattern to suppress brightness unevenness on the display screen.

[0007] International Publication No. 2014 / 021201 Pamphlet; International Publication No. 2018 / 167884 Pamphlet; Japanese Patent Publication No. 2011-053634; Japanese Patent Publication No. 2007-237412

[0008] However, the external compensation method described in Patent Document 1 above requires the measurement of the drive current flowing through the organic EL element for each pixel circuit, which complicates the components and increases costs. Furthermore, because the current being measured is small compared to the surrounding noise and has a poor signal-to-noise ratio, high-performance components are required to accurately measure the drive current.

[0009] In contrast, the organic electroluminescent display device described in Patent Document 2 above allows for the acquisition of a current distribution pattern without measuring the driving current of the organic EL element for each pixel circuit, and the video signal is corrected based on this current distribution pattern. However, generating a current distribution pattern accurately from multiple measured current values ​​requires complex processing, making it difficult to simplify the configuration without increasing processing time.

[0010] Furthermore, in electrophotographic printers such as the one described in Patent Document 4 above, even in light-emitting devices that function as exposure devices, such as line heads containing multiple current-driven light-emitting elements, it is necessary to determine the pixel current value, which is the value of the driving current of each light-emitting element, in order to equalize the luminescence brightness of the multiple light-emitting elements.

[0011] Therefore, in light-emitting devices such as current-driven display devices like organic EL displays, there is a need to accurately determine the drive current value for each pixel circuit, i.e., the pixel current value, which is necessary for external compensation and other purposes, using a simpler process.

[0012] A light-emitting device according to several embodiments of the present invention includes a light-emitting section including a pixel array consisting of a plurality of pixel circuits arranged in a row or matrix and a power line, a drive circuit for driving the plurality of pixel circuits, a light-emitting control circuit for controlling the drive circuit, and a current measuring circuit for measuring the sum of the currents flowing from the plurality of pixel circuits to the power line, each of the plurality of pixel circuits includes a current-driven light-emitting element, a holding capacitor, and a drive transistor that supplies the light-emitting element with an amount of current corresponding to the voltage held in the holding capacitor by writing a data voltage to the pixel circuit, the drive circuit is configured to control the writing of data voltages to the plurality of pixel circuits and the activation and deactivation of the plurality of pixel circuits on a row-by-row basis, and the light-emitting control circuit is N linearly independent N-dimensional vectors of a number equal to nb × M, which is the product of nb, a natural number predetermined as a divisor of the number of rows n of the pixel array, and M, a natural number with a number of columns m or more, which is the number of pixel circuits in one row of the pixel array, and each element of each vector is either "1", "0", or "-1", are selected in advance, and the nb row of the pixel array is taken as the row to be measured, and the nb × m pixel circuits constituting the nb row are corresponding to the nb × m elements in each of the N N-dimensional vectors. After controlling the drive circuit so that for each of the N N-dimensional vectors, an on-time data voltage is written to the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, and an off-time data voltage is written to the pixel circuit corresponding to the "0" element and the "-1" element in the vector among the nb × m pixel circuits, an off-time data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, a positive-side current measurement process is performed to obtain the sum measured by the current measurement circuit as the positive-side current measurement value when the drive circuit is controlled so that the nb × m pixel circuits constituting the nb row in the pixel array are in an activated state and the pixel circuits constituting rows other than the nb row are in an inactivated state,After controlling the drive circuit so that, for each of the N N-dimensional vectors, the on-time data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, and the off-time data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, a negative current measurement process is performed to obtain the sum measured by the current measurement circuit as the negative current measurement value when the drive circuit is controlled so that the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated. N differential current values ​​are obtained by subtracting the N negative current measurements obtained by the negative current measurement process from the N positive current measurements obtained by the positive current measurement process for each of the N N-dimensional vectors. From these N differential current values ​​and the inverse matrix of an N-order square matrix where the N N-dimensional vectors are column vectors or row vectors, the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the row to be measured is calculated as the pixel current value.

[0013] A pixel current detection method according to several embodiments of the present invention includes a light-emitting unit having a pixel array consisting of a plurality of pixel circuits arranged in a row or matrix and a power line, wherein each of the plurality of pixel circuits includes a current-driven light-emitting element, a holding capacitor, and a drive transistor that supplies the light-emitting element with an amount of current corresponding to the voltage held in the holding capacitor by writing a data voltage to the pixel circuit, and the pixel current detection method for detecting the current flowing from each of the plurality of pixel circuits to the power line as a pixel current, comprising a vector selection step of pre-selecting N linearly independent N-dimensional vectors equal to the product nb × M of a natural number nb, which is a natural number with a predetermined number of rows n of the pixel array and m or more, which is the number of columns m, which is the number of pixel circuits in one row of the pixel array, and each element of each vector being either "1", "0", or "-1", A vector mapping step in which, with row nb of the pixel array as the row to be measured, the nb × m pixel circuits constituting the nb row correspond to the nb × m elements in each of the N N-dimensional vectors; a positive side measurement writing step in which, for each of the N N-dimensional vectors, an illumination data voltage is written to the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits to turn on the light-emitting element, and an illumination data voltage is written to the pixel circuit corresponding to the "0" element and the "-1" element in the vector among the nb × m pixel circuits to turn off the light-emitting element; After the positive side measurement writing step has written the on-time data voltage or the off-time data voltage to each of the nb × m pixel circuits, the positive side current measurement step measures the sum of the currents flowing from the plurality of pixel circuits to the power line when the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated, and obtains this as the positive side current value.A negative side measurement writing step in which, for each of the N N-dimensional vectors, the on-time data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, and the off-time data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits; after the on-time data voltage or the off-time data voltage has been written to each of the nb × m pixel circuits by the negative side measurement writing step, the nb × m pixel circuits constituting the nb row in the pixel array are set to an activated state and the pixel circuits constituting rows other than the nb row are set to an inactive state, and the sum of the currents flowing from the plurality of pixel circuits to the power line is measured and obtained as a negative side current value; The system includes a pixel current calculation step, which calculates the value of the current that flows from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the row to be measured, by subtracting the N negative current values ​​obtained by the negative current measurement step from each of the N positive current values ​​obtained by the positive current measurement step for each of the N N-dimensional vectors, and then calculates the value of the current that flows from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the row to be measured, from the N negative current values ​​and the inverse matrix of an N-order square matrix in which the N N-dimensional vectors are column vectors or row vectors, as the pixel current value.

[0014] In some embodiments of the present invention, a light-emitting unit is provided, which includes a pixel array consisting of a plurality of pixel circuits arranged in a row or matrix and a power line, and each of the plurality of pixel circuits includes a current-driven light-emitting element, a holding capacitor, and a drive transistor that supplies the light-emitting element with an amount of current corresponding to the voltage held in the holding capacitor by writing a data voltage to the pixel circuit. The current measurement is performed based on N linearly independent N-dimensional vectors of a number equal to nb × M, which is the product of a natural number nb, a predetermined natural number that is a divisor of the number of rows n of the pixel array, and a natural number M that is the number of columns m or more, which is the number of pixel circuits in one row of the pixel array, and each element of each vector is either "1", "0", or "-1". That is, the nb × m pixel circuits constituting the nb row as the row to be measured in the pixel array are associated with nb × m elements among the N elements in each of the N N-dimensional vectors, and based on this association, the following positive-side current measurement process and negative-side current measurement process are performed. In the positive current measurement process, for each of the N N-dimensional vectors, an on-time data voltage is written to the pixel circuit corresponding to the "1" element in the nb row among the nb × m pixel circuits constituting the nb row, and an off-time data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "-1" element in the vector. Then, when only the nb × m pixel circuits constituting the nb row in the pixel array are in an activated state, the sum of the currents flowing from the multiple pixel circuits to the power line is measured and obtained as the positive current value. In the negative current measurement process, for each of the N N-dimensional vectors, an on-data voltage is written to the pixel circuit corresponding to the "-1" element in the nb row among the nb × m pixel circuits constituting the nb row, and an off-data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector. Then, when only the nb × m pixel circuits constituting the nb row in the pixel array are activated, the sum of the currents flowing from the multiple pixel circuits to the power line is measured and obtained as the negative current value.Subsequently, N differential current values ​​are obtained by subtracting the N negative current values ​​obtained by the negative current measurement process for each of the N column vectors from the N positive current values ​​obtained by the positive current measurement process for each of the N N-dimensional vectors. Here, since the current flowing from the pixel circuit on which the off data voltage is written and the pixel circuit in the inactive state to the power line is zero, if the natural number M that determines the number of vectors N = nb × M is equal to the number of columns m, then an N-dimensional square matrix with the N N-dimensional vectors as column vectors or row vectors and the N differential current values ​​are used to obtain a system of N linear equations (N = nb × m) in which the value of the current flowing from each pixel circuit to the power line when the on data voltage is written to each of the nb × m pixel circuits constituting the nb row of measurement is obtained, with the value of the current flowing from each pixel circuit to the power line as the unknown variable. Furthermore, if the natural number M that determines the number of vectors N = nb × M is greater than the number of columns m, then by assuming a virtual pixel array of n rows and M columns in which a dummy pixel circuit with a pixel current of always zero is added to each row of the pixel array, a system of N equations can be obtained using the N x N square matrix and the N differential current values, with the unknown variable being the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × M pixel circuits constituting the nb row in the virtual pixel array. (N = nb × M) Therefore, from the N differential current values ​​and the inverse matrix of the N x N square matrix, the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the nb row, which is the row to be measured, can be calculated as the pixel current value.

[0015] In this way, according to some embodiments of the present invention, after a lighting data voltage or an extinguishing data voltage, which is a measurement data voltage determined by each of the N vectors in the N-dimensional vector, is written to each of the nb × m pixel circuits constituting the nb row as the row to be measured, the sum of the currents flowing from the multiple pixel circuits (all pixel circuits) constituting the pixel array to the power line is measured. Such measurements are performed N times according to the N vectors in the N-dimensional vector, and by using the N positive current values ​​and N negative current values ​​obtained as measurement results, the current value flowing from each pixel circuit of the nb × m pixel circuits constituting the nb row to the power line is calculated as the pixel current value. Therefore, by using the N positive current values ​​and N negative current values ​​for each nb row in the pixel array, the pixel current value for each pixel circuit of the multiple pixel circuits constituting the pixel array can be determined. As a result, compared to conventional light-emitting devices as display devices with an external compensation method in which the drive current of each pixel circuit is measured individually by a large number of measurement circuits, the influence of measurement variations for each measurement circuit can be avoided.

[0016] Furthermore, if the column or row vectors of an N-th order Hadamard matrix are selected as the N N-dimensional vectors, the inverse of that Hadamard matrix is ​​(1 / N)H, so the current value of each pixel can be easily calculated from the positive and negative current values. Also, in a Hadamard matrix, the number of "1"s or "-1"s in each row or column is generally about half the order of the Hadamard matrix on average. Therefore, compared to conventional externally compensated display devices that measure the current for each pixel circuit, the acquired positive and negative current values ​​are larger, thus reducing measurement errors.

[0017] Furthermore, when external compensation is performed by correcting characteristic values ​​such as threshold voltage and gain of the drive transistor in each pixel circuit using the pixel current value of each pixel circuit calculated as described above (by updating the characteristic values ​​of the drive transistor stored for each pixel circuit as correction parameters), variations and fluctuations in the characteristic values ​​of the drive transistor can be compensated accurately with a simpler configuration than in the past.

[0018] This is a block diagram showing the overall configuration of the display device according to the first embodiment. This is a block diagram showing the configuration of the display control circuit in the first embodiment. This is a timing chart for explaining the operation (display operation) of the display device according to the first embodiment in normal display mode. This is a circuit diagram showing an example of the configuration of the pixel circuit in the first embodiment. This is a timing chart for explaining the data writing operation to the pixel circuit in the first embodiment. This is a timing chart for explaining the measurement operation of the pixel current (drive current) of the pixel circuit in the first embodiment. This is a timing chart for explaining the operation (current measurement operation) of the display device according to the first embodiment in current measurement mode. This is a diagram for explaining the current measurement operation in the first embodiment. This is a diagram for explaining the data voltage to be written to the pixel circuit for current measurement in the first embodiment. This is a diagram for explaining the procedure of the current measurement operation when writing the data voltage corresponding to the positive side code in the first embodiment. This is a diagram for explaining the procedure of the current measurement operation when writing the data voltage corresponding to the negative side code in the first embodiment. This is a diagram for explaining the effects in the first embodiment. This is a diagram for explaining a virtual pixel array for performing current measurement using an Hadamard matrix of a greater order than the number of pixel circuits in each row of the pixel array. This figure illustrates the pixel current (drive current) of each pixel circuit included in the virtual pixel array shown in Figure 10. This is a block diagram showing the overall configuration of the display device according to the second embodiment. This is a circuit diagram showing the configuration of the pixel circuit in the second embodiment. This is a timing chart illustrating the current measurement operation in the second embodiment. This is a circuit diagram showing the configuration of the pixel circuit in a modified example of the second embodiment. This is a flowchart showing the procedure for current measurement mode processing (current measurement, pixel current calculation, and correction parameter update processing) in the display device according to the third embodiment. This is a flowchart showing the procedure for current measurement processing in the third embodiment. This is a flowchart showing the procedure for display drive processing with current measurement processing in the display device according to the fourth embodiment. This is a flowchart showing the procedure for current measurement processing in the fourth embodiment.This is a flowchart illustrating the procedure for pixel data refresh processing in the fourth embodiment described above. This is a flowchart illustrating the procedure for pixel current calculation processing in the fourth embodiment described above. This is a diagram illustrating the positive data voltage to be written to the pixel circuit for current measurement in the third modified example of each embodiment described above. This is a diagram illustrating the negative data voltage to be written to the pixel circuit for current measurement in the third modified example described above. This is a diagram illustrating the procedure for current measurement operation when writing data voltage corresponding to positive code in the third modified example described above. This is a diagram illustrating the procedure for current measurement operation when writing data voltage corresponding to negative code in the third modified example described above. This is a diagram illustrating the data voltage sequence to be written to the pixel circuit for current measurement in the fifth modified example of each embodiment described above. This is a circuit diagram showing the configuration of the pixel circuit for current measurement in other modified examples of each embodiment described above. This is a schematic diagram illustrating a light-emitting device that functions as an exposure device in an electrophotographic printer as another embodiment.

[0019] The embodiments will be described below with reference to the attached drawings. In each transistor mentioned below, the gate terminal corresponds to the control terminal, one of the drain terminal and the source terminal corresponds to the first conduction terminal, and the other corresponds to the second conduction terminal. Furthermore, the transistors in each embodiment are, for example, thin-film transistors, but the present invention is not limited thereto. Moreover, in this specification, "connection" means "electrical connection" unless otherwise specified, and to the extent that it does not depart from the gist of the present invention, it includes not only direct connections but also indirect connections via other elements.

[0020] <1. First Embodiment> <1.1 Overall Configuration> Figure 1 is a block diagram showing the overall configuration of an active-matrix type organic EL display device, which is a light-emitting device according to the first embodiment. This organic EL display device includes a display control circuit 20 as a light-emitting control circuit, a data-side drive circuit 30, a scanning-side drive circuit 40, and a display panel 11 (hereinafter referred to as "display unit 11") as a display unit. The data-side drive circuit 30 and the scanning-side drive circuit 40 constitute a drive circuit that drives n × m pixel circuits 15 provided on the display unit 11, and one or both of the data-side drive circuit 30 and the scanning-side drive circuit 40 may be integrally formed with the display unit 11. Furthermore, this organic EL display device is equipped with a power supply circuit 50 that generates a high-level power supply voltage ELVDD and a low-level power supply voltage ELVSS, which are to be supplied to the display unit 11 as a light-emitting unit, a current measurement circuit 60 that measures the sum of the pixel currents, which are the drive currents flowing through the n × m pixel circuits 15 provided in the display unit 11, and an ambient temperature sensor 21 for detecting the ambient temperature around the organic EL display device. The power supply circuit 50 also includes a circuit that generates the power supply voltages to be supplied to the display control circuit 20, the data-side drive circuit 30, and the scanning-side drive circuit 40. In the example shown in Figure 1, the current measurement circuit 60 is composed of a resistor Rm inserted into the power line through which the drive currents Id of all the pixel circuits 15 in the display unit 11 converge, and an AD converter ADC that converts the voltage across the resistor into a digital value, but the configuration of the current measurement circuit 60 is not limited to this. The drive current Id of each pixel circuit 15 corresponds to the pixel current of that pixel circuit, and this pixel current flows from each pixel circuit 15 to the power line (low-level power line described later).

[0021] As shown in Figure 1, the display unit 11 is provided with n scan signal lines SC1 to SCn and m data signal lines D1 to Dm that intersect with the n scan signal lines SC1 to SCn, and n × m pixel circuits 15 arranged in a matrix along the n scan signal lines SC1 to SCn and the m data signal lines D1 to Dm. The display unit 11 is also provided with n light emission control lines EM1 to EMn arranged along the n scan signal lines SC1 to SCn, a first power line (hereinafter referred to as the "high-level power line," and denoted by the same symbol "ELVDD" as the high-level power supply voltage) for supplying a high-level power supply voltage ELVDD to each pixel circuit 15, and a second power line (hereinafter referred to as the "low-level power line," and denoted by the same symbol "ELVSS" as the low-level power supply voltage) for supplying a low-level power supply voltage ELVSS to each pixel circuit 15. Each pixel circuit 15 corresponds to one scan signal line SCi from the n scan signal lines SC1 to SCn, one data signal line Dj from the m data signal lines D1 to Dm, and one light emission control line EMI from the n light emission control lines EM1 to EMn (hereinafter, when distinguishing each pixel circuit 15, the pixel circuit corresponding to the i-th scan signal line and the j-th data signal line Dj will be referred to as the "i-th row, j-th column pixel circuit" and will be denoted by the symbol "Pix(i,j)"). The n × m pixel circuits Pix(1.1) to Pix(n,m) provided in the display unit 11 are arranged in an n-row, m-column matrix to constitute a pixel array.

[0022] Figure 2 is a block diagram showing the configuration of the display control circuit 20. The display device according to this embodiment is an externally compensated organic EL display device having two operating modes: a normal display mode and a current measurement mode. Accordingly, as shown in Figure 2, the display control circuit 20 includes a drive control circuit 250 that generates the data-side control signal Scd and the scanning-side control signal Scs, and a control unit 210 that includes a CPU (Central Processing Unit) and memory as a program storage area and working area for the CPU. In addition, it includes a RAM (Radom Access Memory) 220 that functions as a correction parameter storage unit 221 and a measurement data storage unit (corresponding to a two-dimensional memory described later) 223, and a flash memory 230 as a non-volatile memory. The control unit 210 controls the drive control circuit 250 according to the operating mode and writes and reads data to be stored in the RAM 220 and data to be stored in the flash memory 230.

[0023] The correction parameter storage unit 221 in the RAM 220 stores, for example, the gain β and threshold voltage Vt described later, as correction parameters for each pixel circuit 15. The control unit 210 in the display control circuit 20 generates image data Dv1 to be supplied to the data-side drive circuit 30 from image data Dv0, which is image information included in the input signal Sin, i.e., image data indicating the grayscale value of each pixel of the image to be displayed, using the correction parameters stored in the correction parameter storage unit 221. This image data Dv1 is data representing the image to be displayed in the display unit 11, and in normal display mode, it is provided to the data-side drive circuit 30 via the drive control circuit 250 as part of the data-side control signal Scrd. Furthermore, in current measurement mode, the control unit 210 controls the drive control circuit 250 so that current measurement data pre-stored in the flash memory 230 is written to the n × m pixel circuits constituting the pixel array in the display unit 11. It also stores the current measurement value Im received from the current measurement circuit 60 in the measurement data storage unit 223 and updates the correction parameters in the correction parameter storage unit 221 based on the pixel current value of each pixel circuit 15 calculated from the stored current measurement values. In addition, when the power to the display device is cut off, the control unit 210 reads the correction parameters stored in the RAM 220 and writes them to the flash memory 230. When the power is turned on, the display control circuit 20 reads the correction parameters stored in the flash memory 230 and writes them to the correction parameter storage unit 221 of the RAM 220.

[0024] The data-side drive circuit 30, acting as a data signal line drive circuit, drives the data signal lines D1 to Dm based on the data-side control signal Scd from the display control circuit 20. That is, in normal display mode, the data-side drive circuit 30 generates data signals D(1) to D(m) representing the image to be displayed based on the image data Dv1 included in the data-side control signal Scd, and applies them to the data signal lines D1 to Dm, respectively. The operation of the data-side drive circuit 30 in current measurement mode will be described later.

[0025] The scanning drive circuit 40 functions as a scanning signal line drive circuit that drives n scanning signal lines SC1 to SCn and a light emission control line drive circuit that drives light emission control lines EM1 to EMn, based on the scanning control signal Scs from the display control circuit 20. More specifically, in the normal display mode, the scanning drive circuit 40, as a scanning signal line drive circuit, sequentially selects n scanning signal lines SC1 to SCn for predetermined periods corresponding to one horizontal period, based on the scanning control signal Scs during each frame period Tf. It applies an active signal to the selected scanning signal line SCk (where k is an integer such that 1 ≤ k ≤ n) and an inactive signal to the unselected scanning signal line. As a result, m pixel circuits Pix(k,1) to Pix(k,m) corresponding to the selected scanning signal line SCk are selected collectively. As shown in Figure 4 below, in this embodiment, the scanning signal line SCi is connected to the gate terminal of the N-channel transistor in the pixel circuit 15 (i = 1 to n). Therefore, a high-level (H-level) voltage is applied as an active signal to the selected scanning signal line SCi, and a low-level (L-level) voltage is applied as an inactive signal to the unselected scanning signal line SCi. The operation of the scanning-side drive circuit 40 as a scanning signal line drive circuit in current measurement mode will be described later.

[0026] Further, in the normal display mode, the scanning-side drive circuit 40 drives the emission control lines EM1 to EMn in each frame period Tf so that they are selectively deactivated in conjunction with the driving of the scanning signal lines SC1 to SCn. That is, the scanning-side drive circuit 40, as an emission control line drive circuit, based on the scanning-side control signal Scs, applies an emission control signal indicating non-emission to the i-th emission control line EMi during a predetermined period including the i-th horizontal period, and applies an emission control signal indicating emission during other periods (i = 1 to n). The organic EL elements in the pixel circuits (hereinafter also referred to as "pixel circuits in the i-th row") Pix(i, 1) to Pix(i, m) corresponding to the i-th scanning signal line SCi emit light with a luminance corresponding to the data voltage written in each of the pixel circuits Pix(i, 1) to Pix(i, m) in the i-th row while the emission control line EMi is in an active state (in this embodiment, while the voltage of the emission control line EMi is at the H level). The operation of the scanning-side drive circuit 40 as an emission control line drive circuit in the current measurement mode will be described later.

[0027] <1.2 Schematic Operation> As described above, the display device according to this embodiment displays the image represented by the image information included in the input signal Sin on the display unit 11 in the normal display mode, and in the current measurement mode, performs current measurement and calculation of pixel current values necessary for updating correction parameters for external compensation. First, referring to FIG. 3, the schematic operation of the display device in the normal display mode will be described.

[0028] The input signal Sin from the outside includes an operation mode signal Sm indicating in which operation mode, either the normal display mode or the current measurement mode, the display unit 11 is to be driven. When this operation mode signal Sm indicates the normal display mode, the display control circuit 20 generates a data-side control signal Scd and a scanning-side control signal Scs for displaying the image represented by the image information included in the input signal Sin by the drive control circuit 250.

[0029] FIG. 3 is a timing chart for explaining the schematic operation of the display device in the normal display mode. In FIG. 3, the symbol "SC(i)" indicates the scan signal applied from the scan-side drive circuit 40 to the i-th scan signal line SCi, the symbol "EM(i)" indicates the emission control signal applied from the scan-side drive circuit 40 to the i-th emission control line EMi, and the symbol "D(j)" indicates the data signal applied from the data-side drive circuit 30 to the j-th data signal line Di (i = 1 to n, j = 1 to m) (the same applies to FIGS. 6 and 14 described later).

[0030] By the scan signals SC(1) to SC(n) as shown in FIG. 3, in each frame period Tf, the n scan signal lines SC1 to SCn are sequentially selected at predetermined intervals corresponding to one horizontal period, and m data signals D(1) to D(m) applied to the data signal lines D1 to Dm are written as pixel data into the m pixel circuits Pix(k,1) to Pix(k,m) corresponding to the selected scan signal line SCk. Also, by the emission control signals EM(1) to EM(n) as shown in FIG. 3, the i-th emission control line EMi is in an inactive state during a predetermined period including the i-th horizontal period and in an active state during periods other than the predetermined period (i = 1 to n).

[0031] In the normal display mode, the scan signal lines SC1 to SCn, the emission control lines EM1 to EMn, and the data signal lines D1 to Dm are driven by the scan signals SC(1) to SC(n), the emission control signals EM(1) to EM(n), and the data signals D(1) to D(m) as shown in FIG. 3. Thereby, pixel data corresponding to the image information in the input signal Sin is written as a data voltage into each pixel circuit Pix(i,j) every frame period, and each pixel circuit Pix(i,j) emits light with a luminance corresponding to the data voltage written therein. In this way, the image represented by the image information in the input signal Sin is displayed on the display unit 11.

[0032] The input signal Sin includes information indicating whether or not an operation to cut off the power to the display device (hereinafter referred to as "power-off operation") has been performed (hereinafter referred to as "power-off information"). Based on this power-off information, the display control circuit 20 provides a power control signal Spw to the power supply circuit 50. If the power-off information included in the input signal Sin indicates that a power-off operation has been performed, the display control circuit 20 controls the power supply circuit 50 with this power control signal Spw to adjust the timing of cutting off the power to the display device. An example of how the power-off timing is adjusted in this way will be explained in the third embodiment described later.

[0033] <1.3 Pixel Circuit Configuration and Operation> Figure 4 is a circuit diagram showing an example configuration of the pixel circuit 15 in this embodiment. More specifically, it is a circuit diagram showing an example configuration of the pixel circuit 15 corresponding to the i-th scan signal line SCi and the j-th data signal line Dj, i.e., the i-th row, j-th column pixel circuit Pix(i,j) (1≦i≦n, 1≦j≦m). This pixel circuit 15 includes an organic EL element OL, which is a light-emitting element that functions as a display element, three transistors T1 to T3 (hereinafter referred to as "write control transistor T1", "drive transistor T2", and "light emission control transistor T3"), and one holding capacitor Cst. Transistors T1 to T3 are N-channel thin-film transistors. The holding capacitor Cst is a capacitive element having two electrodes consisting of a first electrode and a second electrode. In the pixel circuit 15 in this embodiment, transistors T1 and T3 other than the drive transistor T2 function as switching elements. The configuration of the pixel circuit Pix(i,j) is not limited to the configuration shown in Figure 4. Any configuration that writes and holds the voltage of the data signal line Dj in a capacitor, supplies a drive current Id from the drive transistor to the display element according to the held voltage of the capacitor, and can cut off the supply of the drive current Id as needed is acceptable (this is the same in other embodiments as well). In the following, the state in which the drive current Id (pixel current) is cut off in the pixel circuit 15 (in the example shown in Figure 4, this is done by turning off the light emission control transistor T3 by deactivating the light emission control line EMI) is referred to as deactivation of the pixel circuit 15, and the state in which the drive current Id (pixel current) can flow in the pixel circuit 15 (in the example shown in Figure 4, this is done by turning on the light emission control transistor T3 by activating the light emission control line EMI) is referred to as activation of the pixel circuit 15.

[0034] The pixel circuit Pix(i,j) is connected to a corresponding scan signal line SCi (hereinafter also referred to as the "corresponding scan signal line" in the explanation focusing on the pixel circuit), a corresponding light emission control line EMI (hereinafter also referred to as the "corresponding light emission control line" in the explanation focusing on the pixel circuit), a corresponding data signal line Dj (hereinafter also referred to as the "corresponding data signal line" in the explanation focusing on the pixel circuit), a high-level power line ELVDD, and a low-level power line ELVSS. As shown in Figure 4, the drain terminal of the drive transistor T2 is connected to the high-level power line ELVDD, the source terminal is connected to the anode of the organic EL element via the light emission control transistor T3, and the cathode of the organic EL element OL is connected to the low-level power line ELVSS. In addition, the gate terminal of the drive transistor T2 is connected to the high-level power line ELVDD via the holding capacitor Cst, and is also connected to the corresponding data signal line Dj via the write control transistor T1. The gate terminal of the write control transistor T1 is connected to the corresponding scan signal line SCi, and the gate terminal of the light emission control transistor T3 is connected to the corresponding light emission control line EMI.

[0035] In normal display mode, the corresponding scan signal line SCi, corresponding light emission control line EMI, and corresponding data signal line Dj of the pixel circuit Pix(i,j) are driven as shown in Figure 3. As a result, in the pixel circuit Pix(i,j), when the corresponding light emission control line EMI is inactive and the corresponding scan signal line SCi is selected, the voltage of the corresponding data signal line Dj (the voltage of the data signal D(j)) is written to and held as a data voltage in the holding capacitor Cst. While the corresponding light emission control line EMI is active, a drive current Id corresponding to the data voltage held in the holding capacitor Cst is supplied from the drive transistor T2 to the organic EL element OL via the light emission control transistor T3.

[0036] In current measurement mode, the data voltage for current measurement is written one row at a time to the pixel array consisting of n x m pixel circuits in the inactive state on the display unit 11. Then, the n x m pixel circuits are sequentially activated one row at a time, and the current measurement value Im is acquired by the current measurement circuit 60. Figure 5A is a timing chart to explain the writing operation of the data voltage for current measurement in the i-th row, j-th column pixel circuit Pix(i,j), and Figure 5B is a timing chart to explain the operation when the i-th row, j-th column pixel circuit Pix(i,j) is in an activated state and the pixel current value of the said pixel circuit Pix(i,j) is measured. Figure 6 is a timing chart to explain the operation (current measurement operation) of the display device in current measurement mode according to this embodiment.

[0037] In current measurement mode, in the display device according to this embodiment, the scanning signal lines SC1 to SCn, the light emission control lines EM1 to EMn, and the data signal lines D1 to Dm are driven so that the scanning signals SC(1) to SC(n), the light emission control signals EM(1) to EM(n), and the data signals D(1) to D(m) shown in Figure 6 sequentially write one line of current measurement data voltage corresponding to a code equivalent to an m-dimensional vector consisting of elements of "1" or "0" to n × m pixel circuits, one line at a time, and the current measurement frame period TMk sequentially activates the n × m pixel circuits one line at a time to acquire a current measurement value Im by the current measurement circuit 60, with the scanning signals SC(1) to SC(n), the light emission control signals EM(1) to EM(n), and the data signals D(1) to D(m) appear alternately (k = 1, 2, 3, ...).

[0038] In current measurement mode, the corresponding scan signal line SCi, corresponding light emission control line EMI, and corresponding data signal line Dj for the pixel circuit Pix(i,j) are driven as shown in Figure 6. As a result, during the measurement write frame period TWmk, the corresponding light emission control line EMI is deactivated by applying an L-level voltage, keeping the pixel circuit Pix(i,j) inactive. When the corresponding scan signal line SCi is selected by applying an H-level voltage to the pixel circuit Pix(i,j), as shown in Figure 5A, the voltage of the corresponding data signal line Dj (voltage of data signal D(j)) is written to and held in the holding capacitor Cst as the data voltage for current measurement. Furthermore, during the current measurement frame period TMk, the corresponding scan signal line SCi is kept in an unselected state by applying an L-level voltage, and when the pixel circuit Pix(i,j) is activated by applying an H-level voltage to the corresponding light emission control line EMI, as shown in Figure 5B, the current measurement circuit 60 acquires the measured current value Im. During the current measurement frame period TMk, the corresponding data signal line Dj (data signal D(j)) is maintained in a high impedance state (HiZ) or at a fixed voltage.

[0039] <1.4 Current Measurement Operation and Pixel Current Calculation Process> Next, the details of the current measurement operation and pixel current calculation process during the measurement write frame period TWmk will be described. For the sake of explanation, it will be assumed that the display unit 11 is provided with 4 rows and 4 columns of pixel circuits Pix(1,1) to Pix(4,4). That is, n = m = 4. In this embodiment, in the current measurement mode, the measurement data voltage written to the pixel circuit 15 (or its holding capacitor Cst) during the measurement write frame period TWmk is either a predetermined data voltage V1 that turns on the pixel circuit 15 (or its organic EL element OL) (hereinafter referred to as the "on data voltage"), or a predetermined data voltage V0 that turns off the pixel circuit 15 (or its organic EL element OL). More precisely, the off data voltage V0 is the data voltage that makes the drive current Id that should be supplied from the drive transistor T2 to the organic EL element OL zero. In the following, as shown in Figure 7, the value of the drive current Id(i,j) of the pixel circuit Pix(i,j), which is the pixel circuit 15 in the i-th row and j-th column, when the lighting data voltage V1 is written to the said pixel circuit Pix(i,j), will be denoted by the sign "xij". This pixel current value xij is the current that flows from the pixel circuit Pix(i,j) in the i-th row and j-th column to the low-level power line ELVSS.

[0040] Figure 8A is a diagram illustrating the data voltage to be written to the pixel circuit 15 during the measurement write frame period TWmk. In this embodiment, the data voltage to be written to the pixel circuits Pix(1,1) to Pix(n,m) in the display unit 11 during the measurement write frame period TWmk is determined based on m linearly independent m-dimensional vectors having a number of elements equal to the number of columns m in the n × m pixel circuits Pix(1,1) to Pix(n,m) that constitute the pixel array in the display unit 11, and which contain only elements of "1" and "-1".

[0041] Here, m vectors obtained from an m-order Hadamard matrix as follows are used as m m-dimensional vectors to determine the data voltage to be written to the pixel circuit during the measurement write frame period TWmk. As previously mentioned, for the sake of explanation, if we set n = m = 4 (see Figure 7), we obtain four 4-dimensional vectors from the 4-order Hadamard matrix H shown in equation (1) below. That is, the Hadamard matrix H shown in equation (1) is decomposed into a matrix Hp obtained by replacing all "-1" elements in the Hadamard matrix H with "0" (hereinafter referred to as the "positive matrix"), and a matrix Hn obtained by replacing all "1" elements in the Hadamard matrix H with "0" and replacing all "-1" elements with "1" (hereinafter referred to as the "negative matrix") (see equations (2) and (3) below). These positive matrix Hp and negative matrix Hn satisfy equation (4) below.

[0042] The four column vectors in the positive matrix Hp are called "positive vectors," and these four column vectors are referred to as the "first vector," "second vector," "third vector," and "fourth vector," respectively. Similarly, the four column vectors in the negative matrix Hn are called "negative vectors," and these four column vectors are referred to as the "first vector," "second vector," "third vector," and "fourth vector," respectively. The first to fourth vectors as positive vectors and the first to fourth vectors as negative vectors are shown in Figure 8A. In this embodiment, each of the eight vectors has four elements, and these are associated with m pixel circuits Pix(i,1) to Pix(i,m) in each row of the 4x4 pixel array (1 ≤ i ≤ n). The data voltage to be written to the pixel circuit corresponding to the "1" element of each vector among the m pixel circuits Pix(i,1) to Pix(i,m) in each row is defined as the on-data voltage V1, and the data voltage to be written to the pixel circuit corresponding to the "0" element of each vector among the m pixel circuits Pix(i,1) to Pix(i,m) in each row is defined as the off-data voltage V0. Therefore, the relationship between each of the eight vectors and the four (m) data voltages to be written to the four (m) pixel circuits Pix(i,1) to Pix(i,m) in each row that are associated with the four (m) elements of each vector is as shown in Figure 8A.

[0043] In this embodiment, as described above, four (m) data voltages (see Figure 8A) determined by each of the eight (2m) vectors obtained from the 4th (m) order Hadamard matrix H are written to the pixel circuits Pix(i,1) to Pix(i,4) in each row, and the current measurement value Im is acquired by the current measurement circuit 60. The current measurement operation will be described below with reference to Figures 8B and 8C. In the following, the j-th vector as the positive vector or the j-th vector as the negative vector that determines the four data voltages to be written to the four pixel circuits Pix(i,1) to Pix(i,4) (1≦i≦4) constituting each row of the pixel array in the current measurement operation will be referred to as the "positive j-th code" or the "negative j-th code," respectively (j=1 to 4). Furthermore, the positive j-th code will be denoted as "(cp1, cp2, cp3, cp4)" and the negative j-th code will be denoted as "(cn1, cn2, cn3, cn4)". However, cpk is the k-th element of the positive j-th vector, and cnk is the k-th element of the negative j-th vector (k = 1 to 4). Figure 8B is a diagram illustrating the procedure for current measurement when writing data voltages corresponding to the positive codes, and Figure 8C is a diagram illustrating the procedure for current measurement when writing data voltages corresponding to the negative codes.

[0044] In this current measurement operation, the control unit 210 in the display control circuit 20 shown in Figure 2 controls the data-side drive circuit 30 and the scanning-side drive circuit 40 via the drive control circuit 250, and receives the current measurement value Im from the current measurement circuit 60, thereby executing the following operations OP1 to OP10 in order in the display device according to this embodiment (see Figure 8B for operations OP1 to OP9, and Figure 8C for operation OP10).

[0045] (OP1) The pixel circuits Pix(1,1) to Pix(4,4) in all rows of the pixel array (4x4 pixel circuits) are deactivated, and four data voltages V1, V1, V1, V1 determined by the positive first code (1,1,1,1) are written to the four pixel circuits Pix(i,1) to Pix(i,4) in each row of the pixel array (i=1 to 4) (see Figures 7, 8A, and 8B).

[0046] (OP2) In the pixel array, the pixel circuits Pix(1,1) to Pix(1,4) of the first row are activated, and the pixel circuits Pix(i,1) to Pix(i,4) (i=2 to 4) of the other rows are deactivated, and the current measurement circuit 60 acquires the measured current Im as the current value yp11 of the first row according to the positive first code. Here, from the above operation OP1, the following equation holds (see Figure 8B): x11 + x12 + x13 + x14 = yp11 ... (5a)

[0047] (OP3) In the pixel array, the pixel circuits Pix(2,1) to Pix(2,4) of the second row are activated, and the pixel circuits Pix(i,1) to Pix(i,4) (i=1,3,4) of the other rows are deactivated. The current measurement circuit 60 obtains the measured current Im as the current value yp21 of the second row according to the positive first code. Here, from (OP1) above, the following equation holds (see Figure 8B): x21 + x22 + x23 + x24 = yp21 …(5b)

[0048] (OP4) In the pixel array, the pixel circuits Pix(3,1) to Pix(3,4) in the third row are activated, and the pixel circuits Pix(i,1) to Pix(i,4) (i=1,2,4) in the other rows are deactivated, and the current measurement value Im is obtained by the current measurement circuit 60 as the current value y31p of the third row according to the positive first code. Here the following equation holds (see Figure 8B): x31 + x32 + x33 + x34 = yp31 ... (5c) (OP5) In the pixel array, the pixel circuits Pix(4,1) to Pix(4,4) in the fourth row are activated, and the pixel circuits Pix(i,1) to Pix(i,4) (i=1 to 3) in the other rows are deactivated, and the current measurement value Im is obtained by the current measurement circuit 60 as the current value y41p of the fourth row according to the positive first code. From the above (OP1), the following equation holds (see Figure 8B): x41 + x42 + x43 + x44 = yp41 …(5d)

[0049] (OP6) The four data voltages V1, V0, V1, V0 determined by the positive second code (1,0,1,0) are written to the four pixel circuits Pix(i,1) to Pix(i,4) in each row of the pixel array (i=1 to 4) (see Figures 7, 8A, and 8B).

[0050] (OP7) In the same manner as operations OP2 to OP5 above, the current measurement circuit 60 obtains four current measurement values ​​Im1 to Im4 as the current value yp12 of the first row by the positive second code, the current value yp22 of the second row by the positive second code, the current value yp32 of the third row by the positive second code, and the current value yp42 of the fourth row by the positive second code, respectively. Here, from operation OP6 above, the following equations hold (see Figure 8B): x11 + x13 = yp12 …(6a) x21 + x23 = yp22 …(6b) x31 + x33 = yp32 …(6c) x41 + x43 = yp42 …(6d)

[0051] (OP8) For the positive third code (1,1,0,0), data voltages are written to the pixel circuits Pix(i,1) to Pix(i,4) of each row of the pixel array in the same manner as in operation OP1 (i=1 to 4), and four current measurement values ​​Im1 to Im4 are obtained by the current measurement circuit 60 in the same manner as in operations OP2 to OP5, as the current value yp13 for the first row based on the positive third code, the current value yp23 for the second row based on the positive third code, the current value yp33 for the third row based on the positive third code, and the current value yp43 for the fourth row based on the positive third code, respectively. Here the following equation holds (see Figure 8B). x11+x12 =yp13...(7a) x21+x22 =yp23...(7b) x31+x32 =yp33...(7c) x41+x42 =yp43...(7d)

[0052] (OP9) For the positive fourth code (1,0,0,1), data voltages are written to the pixel circuits Pix(i,1) to Pix(i,4) of each row of the pixel array in the same manner as in OP1 (i=1 to 4) (see Figures 7, 8A, and 8C), and the four current measurement values ​​Im1 to Im4 detected by the current measurement circuit 60 are obtained as the current value yp14 of the first row based on the positive fourth code, the current value yp24 of the second row based on the positive fourth code, the current value yp34 of the third row based on the positive fourth code, and the current value yp44 of the fourth row based on the positive fourth code, respectively. Here the following equation holds (see Figure 8B). x¹¹ + x¹⁴ = yp¹⁴ …(8a) x²¹ + x²⁴ = yp²⁴ …(8b) x³¹ + x³⁴ = yp³⁴ …(8c) x⁴¹ + x⁴⁴ = yp⁴⁴ …(8d) Rewriting the above equations (5a) to (8d) using matrices yields the following equations.

[0053] (OP10) For the negative first vector to the negative fourth vector, data voltages are written to the pixel circuits Pix(i,1) to Pix(i,4) of each row of the pixel array (i=1 to 4) in the same manner as (OP1) to (OP9) above, and the current measurement values ​​detected by the current measurement circuit 60 are obtained as the current values ​​for the first to fourth rows according to the negative first code to the negative fourth code. Here, if the current value of the i-th row according to the negative j-th code is denoted by the sign "ynij", then the following equation holds (see Figures 7, 8A, and 8C).

[0054] In this way, equations (9) and (10) are obtained based on the current values ​​ypij and ynij (i=1 to 4, j=1 to 4) as the result of the current measurement operation by OP1 to OP10. Now, considering equations (2) to (4) described above, equation (11) below is obtained from equations (9) and (10). Therefore, when the same lighting data voltage V1 is written to each pixel circuit Pix(i,j), the pixel current value xij, which is the value of the drive current Id that flows through the drive transistor T2 of each pixel circuit Pix(i,j), is calculated using the following formula (i=1 to 4, j=1 to 4): X = (Yp - Yn)H -1 ... (12a) H -1 = (1 / 4)H ... (12b) Here, X is a matrix whose (i,j) component is the pixel current value xij (hereinafter referred to as the "pixel current value matrix"). Yp is a matrix whose (i,j) component is the above current value ypij according to the positive code (hereinafter referred to as the "positive current value matrix"). Yn is a matrix whose (i,j) component is the above current value ynij according to the negative code (hereinafter referred to as the "negative current value matrix").

[0055] The pixel current value xij of each pixel circuit Pix(i,j) calculated in this manner is stored in the measurement data storage unit 223 within the display control circuit 20, in association with the lighting data voltage V1 written to each pixel circuit Pix(i,j) in the current measurement mode.

[0056] The above equations (12a) and (12b) assume that the pixel array is composed of 4x4 pixel circuits Pix(1,1) to Pix(4,4). However, for pixel arrays composed of other nxm pixel circuits Pix(1,1) to Pix(n,m), the pixel current value xij of each pixel circuit Pix(i,j) can be calculated in the same manner as above by using the m-th order Hadamard matrix H (i=1 to n, j=1 to m). In this case, the inverse matrix of the Hadamard matrix H is H -1 = (1 / m)H, where m is assumed to be a power of 2. If m is not a power of 2, an m-th order Hadamard matrix may not exist; the method for calculating the pixel current value in this case will be described later. Furthermore, a more specific procedure for the current measurement operation will be explained exemplified as a third embodiment (see Figures 16A and 16B below).

[0057] <1.5 Correction Processing Based on Current Measurement Operation> When the pixel current value xij (= Id(i,j)) of each pixel circuit Pix(i,j) is calculated by the current measurement operation as described above, a correction process is performed based on these pixel current values ​​xij. This correction process calculates a new correction parameter using the pixel current value xij of each pixel circuit Pix(i,j) calculated in the current measurement mode, and updates the correction parameter stored in the correction parameter storage unit 221 with the new correction parameter. When the correction parameter in the correction parameter storage unit 221 is updated with the new correction parameter in the current measurement mode, in the subsequent normal display mode, the data voltage Vdata to be written to each pixel circuit Pix(i,j) is calculated using the gradation value Lij of the pixel to be formed by each pixel circuit Pix(i,j) as image information included in the input signal Sin, and the new correction parameter.

[0058] In this correction process, the threshold voltage Vt and gain β of the drive transistor T2 in each pixel circuit Pix(i,j) can be used as the above correction parameters. The correction process in this case will be described below.

[0059] In this correction example, the drive current Id flowing through the drive transistor T2 in each pixel circuit Pix(i,j) is given by the following equation: Id = (β / 2)(Vgs-Vt) 2 …(13a) β = μ × (W / L) × Cox …(13b) In equations (13a) and (13b) above, Vgs, Vt, μ, W, L, and Cox are the gate-source voltage, threshold voltage, mobility, gate width, gate length, and gate insulating film capacitance per unit area of ​​the drive transistor T2, respectively.

[0060] In this example of the correction process, the above-described current measurement operation, which was described with reference to FIGS. 8A to 8C, is performed twice by changing the value of the lighting data voltage V1. That is, the current measurement operation when the lighting data voltage V1 is the first lighting data voltage V1a and the current measurement operation when the lighting data voltage V1 is the second lighting data voltage V1b are performed. When the pixel circuit Pix(i, j) has the configuration shown in FIG. 4, if the data voltage, which is the voltage of the data signal D(j) to be written to this pixel circuit Pix(i, j), is denoted by "Vdata", then Vgs = Vdata - Va... (14) Therefore, Id = (β / 2)(Vdata - Va - Vt) 2 ... (15)

[0061] Here, if the pixel current value xij of the pixel circuit Pix(i, j) calculated based on the current measurement operation when the first lighting data voltage V1a is written to the pixel circuit Pix(i, j) is denoted as Ida, and the pixel current value xij of the pixel circuit Pix(i, j) calculated based on the current measurement operation when the second lighting data voltage V1b is written to the pixel circuit Pix(i, j) is denoted as Idb, then the following equation holds from the above equation (15). Ida = (β / 2)(V1a - Va - Vt) 2 ... (16a) Idb = (β / 2)(V1b - Va - Vt) 2 ... (16b) Solving the above equations (16a) and (16b) for β and Vt gives β = 2·Idb·{1 - √(Ida / Idb)} 2 / (V1a - V1b) 2 ... (17a) Vt = V1b - Va + (V1a - V1b) / {1 - √(Ida / Idb)}... (17b) The values of β and Vt calculated from these equations are taken as the gain β(i, j) and the threshold voltage Vt(i, j) that constitute the correction parameters of the pixel circuit Pix(i, j), respectively. Note that Va is the anode voltage when the drive current Ida flows through the organic EL element OL, and is also the anode voltage when the drive current Idb flows through the organic EL element OL. If the forward voltage of the organic EL element OL is denoted as Vf, then Va = ELVSS + Vf... (18) and it can be treated as a known value.

[0062] In this way, by performing a current measurement operation using the two lighting data voltages V1a and V1b as data voltages, the gain β(i,j) and threshold voltage Vt(i,j) are calculated as new correction parameters for each pixel circuit Pix(i,j). The previously calculated gain β(i,j) and threshold voltage Vt(i,j) stored in the correction parameter storage unit 221 are then overwritten with the newly calculated gain β(i,j) and threshold voltage Vt(i,j). Note that the correction process described above is just one example, and any other correction method may be used as long as it involves newly calculating and updating characteristic values ​​such as the gain β and / or threshold voltage Vt of the drive transistor T2 based on the measurement data voltage (lighting data voltage) and the calculated pixel current for each pixel circuit Pix(i,j).

[0063] <1.6 Display Operation Based on Correction Processing> Once the correction parameters for each pixel circuit Pix(i,j) are updated as described above, the data voltage Vdata to be written to each pixel circuit Pix(i,j) in normal display mode is then calculated using the updated correction parameters, gain β(i,j) and threshold voltage Vt(i,j). That is, from equation (15) above, Vdata = √(2・Id / β) + Va + Vt …(19), so by substituting β = β(i,j) and Vt = Vt(i,j) into equation (19), the data voltage Vdata(i,j) to be written to each pixel circuit Pix(i,j) is calculated by the following equation. Vdata(i,j) = √(2・Id(i,j) / β(i,j)) + Va + Vt(i,j) ... (20) Here, Id(i,j) is the drive current (pixel current) of each pixel circuit Pix(i,j), and is obtained from the gradation value Lij of each pixel circuit Pix(i,j) indicated by the image information in the input signal Sin. That is, a lookup table (LUT) is created in advance that associates the gradation value Lij of the pixel that each pixel circuit Pix(i,j) should form with the value of the drive current Id(i,j) of each pixel circuit Pix(i,j), and using this LUT, the value of the drive current Id(i,j) for light emission at that gradation value Lij is obtained from each gradation value Lij indicated by the image information in the input signal Sin. The value of the data voltage Vdata(i,j) obtained by substituting the value of this drive current Id(i,j) into the above equation (20) is sent from the display control circuit 20 to the data-side drive circuit 30 as a signal that constitutes the data-side control signal Scrd.

[0064] In normal display mode, under the control of the display control circuit 20, the scanning drive circuit 40 drives the scanning signal lines SC1 to SCn and the light emission control lines EM1 to EMn, and the data drive circuit 30 drives the data signal lines D1 to Dm based on the data voltage Vdata(i,j) (i=1 to n, j=1 to m), so that the image represented by the image information in the input signal Sin is displayed on the display unit 11.

[0065] As described above, in the correction process and the calculation of data voltage values ​​in the normal display mode based thereon, the gain β and threshold voltage Vt of the drive transistor T2 of each pixel circuit Pix(i,j) are used as correction parameters, and the correction parameters are updated by solving equations (16a) and (16b) based on each pixel current value xij calculated from each current measurement Im for β and Vt. However, the correction parameters and the method of updating them are not limited to the above, and other characteristic values ​​of the drive transistor T2 of each pixel circuit Pix(i,j) (for example, only one of the gain β or threshold voltage Vt) may be used as correction parameters, and the correction parameters may be updated by a method different from the above.

[0066] <1.7 Effects> According to this embodiment as described above, the sum of the drive currents (pixel currents) for each pixel circuit in the display unit 11 is measured by a single current measurement circuit 60 by changing the data voltage to be written to the pixel circuit, and the pixel current value of each pixel circuit is calculated based on the current measurement value Im obtained from the current measurement circuit 60. For this reason, compared to conventional display devices with an external compensation method in which the drive current of each pixel circuit is measured individually by a large number of measurement circuits, the influence of measurement variations for each measurement circuit can be avoided. Furthermore, according to this embodiment, each pixel current value can be easily calculated from the current measurement value Im by using the inverse matrix of the Hadamard matrix (see equations (12a) and (12b)).

[0067] Furthermore, in this embodiment, a current measurement value Im is acquired by the current measurement circuit 60 for each row of the pixel array in the display unit 11 (see Figures 8A to 8C and the operations OP1 to OP10 described above). The current measurement value Im is actually the sum of the pixel currents of the pixel circuits Pix(i,1) to Pix(i,m) that constitute the row, on which the lighting data voltage V1 is written during the current measurement operation. At this time, the number of pixel circuits on which the lighting data voltage V1 is written in the row is equal to the number of "1"s in the code for current measurement, which corresponds to the number of "1"s or "-1"s in each column or row of the Hadamard matrix H. In a Hadamard matrix, generally, the number of "1"s or "-1"s in each row or column is, on average, about half the order m of the Hadamard matrix. For example, as shown in Figure 9, in a 16th-order Hadamard matrix, the number of "1"s in each row or column is, on average, about 8, which is half the order of 16. Therefore, compared to conventional externally compensated display devices that measured the current for each pixel circuit, the acquired current measurement value Im is larger, thus reducing measurement errors. Since this current measurement value Im increases with the number of columns m in the pixel array, as the resolution of the display unit 11 increases, the order of the Hadamard matrix used in the current measurement operation also increases accordingly. For this reason, for example, if the number of columns m in the pixel array is around 1000, the error in current measurement becomes significantly smaller compared to conventional methods.

[0068] Thus, according to this embodiment, in current-driven display devices such as organic EL displays, the pixel current value, which is the driving current for each pixel circuit necessary for external compensation, can be accurately determined with a simpler configuration and processing. Furthermore, even in organic EL displays with internal compensation, this embodiment is effective in that it can accurately detect the pixel current of each pixel circuit with a simpler configuration and processing compared to conventional methods, not only when compensating for variations and fluctuations in the threshold voltage of the driving transistors, but also when compensating for variations and fluctuations in other characteristics such as the mobility of the driving transistors.

[0069] <1.8 Modification of the First Embodiment> <1.8.1 First Modification> Focusing on one row of the pixel array in the display unit 11 (pixel circuits Pix(i,1) to Pix(i,m)), for example, one row of the activated state in the pixel array in Figures 8B and 8C, and observing the state of the pixel array in the left-right direction, four linearly independent column vectors (m column vectors) in the Hadamard matrix H of the above equation (4) are sequentially assigned to the row, and the four positive codes obtained from the four column vectors are (1,1,1,1), (1,0,1,0), (1,1,0,1), One possible approach is to write one data voltage sequence each to the four (m) pixel circuits Pix(i,1) to Pix(i,4) in a single row, corresponding to (1,0,1,1) and the four negative codes (0,0,0,0), (0,1,0,1), (0,0,1,1), and (0,1,1,0), and then obtain the current measurement value Im using the current measurement circuit 60. This would involve writing one data voltage sequence each to the four (m) pixel circuits Pix(i,1) to Pix(i,4) in the row. In this way, even when the current measurement operation is performed by sequentially focusing on the pixel circuits Pix(i,1) to Pix(i,4) (i=1 to 4) of four rows in a pixel array consisting of 4x4 pixel circuits, and sequentially writing the four positive data voltage sequences and four negative data voltage sequences corresponding to the four positive codes and four negative codes mentioned above to the pixel circuits Pix(k,1) to Pix(k,4) (1≦k≦4) of the row being focused on, equation (11) above can be obtained in the same way as when the current measurement operation is performed using the previously described procedure (see operations OP1 to OP10). Therefore, the pixel current value xij, i.e., the drive current value Id(i,j), of each pixel circuit Pix(i,j) can be calculated using equations (12a) and (12b) above, in the same way as when the current measurement operation is performed using the previously described procedure (see operations OP1 to OP10).

[0070] <1.8.2 Second Modification> In the first embodiment described above, the current measurement operation is performed based on a Hadamard matrix H of order equal to the number of columns m of the pixel array consisting of n × m pixel circuits provided in the display unit 11. Here, a Hadamard matrix is ​​an orthogonal matrix that is a square matrix in which each element is either 1 or -1, and a method for creating a Hadamard matrix whose order is a power of 2 is known. It is also expected that there are Hadamard matrices whose order is a multiple of 4, but it is unclear whether Hadamard matrices whose order is a multiple of 4 always exist.

[0071] Therefore, if the number of columns m in the pixel array is not a power of 2, then 2 for each column m of the pixel array. r > Let s be the smallest integer r that satisfies m, then N = 2 s It is conceivable to perform current measurement similar to the current measurement operation in the first embodiment using an Adamard matrix of order N. A display device that performs current measurement using such an Adamard matrix of order N will be described below as a "second modified example."

[0072] In this modified example, we assume a virtual pixel array having the following configuration, which includes n × m pixel circuits as a pixel array provided in the display unit 11 in the first embodiment. That is, this virtual pixel array is an n x N pixel circuit, and the i-th row, j-th column pixel circuit Pix(i,j) in this virtual pixel array is the i-th row, j-th column pixel circuit in the pixel array consisting of the n × m pixel circuits (which is also called a "real pixel array" when it should be distinguished from the virtual pixel array) when 1 ≤ i ≤ n and 1 ≤ j ≤ m, and when m + 1 ≤ j ≤ N, the i-th row, j-th column pixel circuit is a virtual pixel circuit (hereinafter referred to as a "dummy pixel circuit") whose pixel current is always zero regardless of the drive by the drive circuit. Figure 10 schematically shows a virtual pixel array 110b obtained by adding N-m virtual pixel columns to a real pixel array 110a when the order N of the Hadamard matrix H is greater than the number of columns m of the real pixel array 110a, which has n rows and m columns (N > m). In this virtual pixel array 110b, the rectangle enclosed by the thick solid line corresponds to the real pixel array, and each of the added virtual pixel columns consists of n dummy pixel circuits Pix(1,q) to Pix(n,q) (m+1 ≤ q ≤ N). Figure 11 shows the value of the drive current Id, i.e., the pixel current value xij, that flows through the drive transistor T2 of each pixel circuit Pix(i,j) included in the virtual pixel array 110b of Figure 10 (i = 1 to n, j = 1 to N). Of these pixel current values ​​xij, the pixel current value xpq (p=1 to n, q=m+1 to N) of the dummy pixel circuit Pix(p,q) is always zero.

[0073] In this modified example, the current measurement operation for an n x N pixel circuit Pix(i,j) (i=1 to n, j=1 to N), which is a virtual pixel array 110b, is performed using an N-order Hadamard matrix H (N=2 s>m) The current measurement operation is performed in the same manner as in the first embodiment described above (see Figures 8A to 8C). That is, the N-order Hadamard matrix H is decomposed into a positive matrix Hp and a negative matrix Hn (H = Hp - Hn), and N data voltage sequences corresponding to the N positive codes corresponding to the N column vectors of the positive matrix Hp (each data voltage is either an on-data voltage V1 or an off-data voltage V0) and N data voltage sequences corresponding to the N negative codes corresponding to the N column vectors of the negative matrix Hn (each data voltage is either an on-data voltage V1 or an off-data voltage V0) are written sequentially to the pixel circuits Pix(i,1) to Pix(i,N) of each row in the virtual pixel array (1 ≤ i ≤ m), and then the current measurement value Im is obtained by the current measurement circuit 60 by sequentially activating the n rows of pixel circuits in the virtual pixel array 110b one row at a time.

[0074] Here, the sum of the pixel currents of the pixel circuits Pix(i,1) to Pix(i,N) in the i-th row (hereinafter referred to as the "current value of the i-th row due to the positive j-th code") when the i-th row is activated after writing the data voltage sequence corresponding to the positive j-th code to the i-th row of the virtual pixel array 110b, is denoted by "ypij", and the sum of the pixel currents of the pixel circuits Pix(i,1) to Pix(i,N) in the i-th row (hereinafter referred to as the "current value of the i-th row due to the negative j-th code") when the i-th row is activated after writing the data voltage sequence corresponding to the negative j-th code to the i-th row of the virtual pixel array 110b, is denoted by "ynij". In this modified example, as previously described, N > m, and the pixel current value xiq of the dummy pixel circuits Pix(i,q) to Pix(i,q) constituting the virtual pixel sequence is always zero (i = 1 to n, q = m + 1 to N). Therefore, the i-th current value ypij for the positive j-th code is equal to the current measurement value Im actually obtained by the current measurement circuit 60 as the sum of the pixel currents of the pixel circuits Pix(i,1) to Pix(i,m) in the i-th row of the real pixel array 110a when the i-th row is activated after writing the data voltage sequence corresponding to the positive j-th code to the i-th row of the virtual pixel array 110b, and the i-th row is activated, and the i-th current value ynij for the negative j-th code is equal to the current measurement value Im actually obtained by the current measurement circuit 60 as the sum of the pixel currents of the pixel circuits Pix(i,1) to Pix(i,m) in the i-th row of the real pixel array 110a, when the i-th row is activated after writing the data voltage sequence corresponding to the negative j-th code to the i-th row of the virtual pixel array 110b, and the i-th row is activated, and the i-th current value ynij for the negative j-th code is equal to the current measurement value Im actually obtained by the current measurement circuit 60 as the sum of the pixel currents of the pixel circuits Pix(i,1) to Pix(i,m) in the i-th row of the real pixel array 110a. Therefore, by following the same procedure as operations OP1 to OP10 in the first embodiment described above, an equation similar to equation (11) described above can be obtained, and each pixel current value xij can be calculated by equations similar to equations (12a) and (12b) described above (i=1 to n, j=1 to N). However, in this modified example, the pixel current value matrix X is an n x N matrix, the Hadamard matrix H is an N x N matrix, and the positive current value matrix Yp and the negative current value matrix Yn are both n x N matrices.

[0075] Although the pixel current value xiq (i=1 to n, q=m+1 to N) of the dummy pixel circuit Pix(i,q) in the virtual pixel array 110b is always zero (see Figures 10 and 11), in this modified example as well, the same correction process as in the first embodiment can be performed using the pixel current value xij (i=1 to n, j=1 to m) of the pixel circuit Pix(i,j) that constitutes the actual pixel array 110a, which is calculated as described above.

[0076] <2. Second Embodiment> Figure 12 is a block diagram showing the overall configuration of an active-matrix type organic EL display device, which is a light-emitting device according to the second embodiment. This organic EL display device has substantially the same configuration as the organic EL display device according to the first embodiment, except for the display unit 11 as a light-emitting unit, the scanning-side drive circuit 40, and the current measurement circuit 60. Therefore, the same reference numerals are used for the same or corresponding parts, and detailed explanations are omitted. Note that for this embodiment, the configurations and operations that are not newly described below are the same as those of the first embodiment.

[0077] As shown in Figure 12, similar to the first embodiment described above (see Figure 1), the display unit 11 is provided with n scan signal lines SC1 to SCn, m data signal lines D1 to Dm that intersect with the n scan signal lines SC1 to SCn, n light emission control lines EM1 to EMn arranged along the n scan signal lines SC1 to SCn, a high-level power line as a first power line for supplying a high-level power supply voltage ELVDD to each pixel circuit 16 (indicated by the same symbol "ELLVDD" as the high-level power supply voltage), and a low-level power line as a second power line for supplying a low-level power supply voltage ELVSS to each pixel circuit 16 (indicated by the same symbol "ELVSS" as the low-level power supply voltage). In this embodiment, in addition to the above, n monitor control lines SM1 to SMn are provided, arranged along the n scan signal lines SC1 to SCn, respectively, and a current monitor line Imon is provided, connected to each pixel circuit 16. The current monitor line Imon functions as a low-level power supply line for measurement and is configured to merge the drive current Id (pixel current) of all pixel circuits Pix(1,1) to P(n,m).

[0078] As shown in Figure 12, unlike the current measurement circuit 60 in the first embodiment described above, the current measurement circuit 60 is inserted into the portion of the current monitor line Imon where the drive currents Id (pixel currents) of all the pixel circuits 16 in the display unit 11 converge (hereinafter referred to as the "current monitor trunk line Imon"), and the current monitor trunk line Imon is connected to the low-level power line ELVSS via the current measurement circuit 60.

[0079] Figure 13 is a circuit diagram showing the configuration of the pixel circuit 16 in this embodiment, and more specifically, it is a circuit diagram showing an example configuration of the pixel circuit Pix(i,j) in the i-th row and j-th column, corresponding to the i-th first scan signal line SC1i and the j-th data signal line Dj (1 ≤ i ≤ n, 1 ≤ j ≤ m). As shown in Figure 13, this pixel circuit 16, like the pixel circuit 15 in the first embodiment (Figure 4), includes an organic EL element OL which is a light-emitting element that functions as a display element, a write control transistor T1, a drive transistor T2, a light emission control transistor T3, and a holding capacitor Cst, and the connection relationships between these elements are also the same as those of the pixel circuit 15 in the first embodiment. In addition, the pixel circuit Pix(i,j) in the i-th row and j-th column, which is the pixel circuit 16 in this embodiment, includes a monitor control transistor T4, and the source terminal of the drive transistor T2 is connected to the anode of the organic EL element OL via the light emission control transistor T3 and is also connected to the current monitor line Imon via the monitor control transistor T4. The gate terminal of the write control transistor T1 is connected to the corresponding scan signal line SCi, the gate terminal of the light emission control transistor T3 is connected to the corresponding light emission control line EMI, and the gate terminal of the monitor control transistor T4 is connected to the corresponding monitor control line SMi. In the pixel circuit 16, transistors T1, T3, and T4, other than the drive transistor T2, function as switching elements.

[0080] The display device according to this embodiment also has two operating modes, a normal display mode and a current measurement mode, similar to the first embodiment described above. In the normal display mode, the monitor control signals SM(1) to SM(n) transmitted via the monitor control lines SM1 to SMn are inactive (low level), thereby keeping the monitor control transistor T4 in each pixel circuit 16 in the off state. The scanning signal lines SC1 to SCn, the light emission control lines EM1 to EMn, and the data signal lines D1 to Dm are driven in the same manner as in the first embodiment (see Figure 3), thereby displaying the image represented by the image information in the input signal Sin on the display unit 11.

[0081] Figure 14 is a timing chart illustrating the current measurement operation of the display device according to this embodiment in current measurement mode. Similar to the first embodiment described above (see Figure 6), the display device according to this embodiment operates in a current measurement mode in such a way that a measurement write frame period TWmk, in which a data voltage for current measurement for one row corresponding to a code equivalent to an m-dimensional vector consisting of elements of "1" or "0" is sequentially written to an n-row m-column pixel circuit (pixel array) one row at a time, and a current measurement frame period TMk, in which the n-row m-column pixel circuit (pixel array) is sequentially activated one row at a time to acquire a current measurement value Im by the current measurement circuit 60, appear alternately (k = 1, 2, 3, ...). However, in this embodiment, unlike the first embodiment described above, during the current measurement mode, the light emission control signals EM(1) to EM(n) are set to a low level (L level), so that the light emission control transistor T3 of each pixel circuit Pix(i,j) is kept in the off state. As a result, the current supply to the organic EL element OL is cut off for each pixel circuit Pix(i,j), and it remains in a non-light-emitting state. Meanwhile, the scanning drive circuit 40, acting as a monitor control line drive circuit, drives the monitor control lines SM1 to SMn with monitor control signals SM(1) to SM(n) as shown in Figure 14. This activates the n-row, m-column pixel circuit (pixel array) row by row during the current measurement frame period TMk, and the current measurement circuit 60 acquires the measured current Im. At this time, the drive current Id (pixel current) flowing through the drive transistor T2 in each of the activated pixel circuits Pix(i,1) to Pix(i,m) flows to the current monitor line Imon via the ON-state monitor control transistor T4, as shown by the thick dotted line in Figure 13. The sum of the pixel current values ​​xi1 to xim of these pixel circuits Pix(i,1) to Pix(i,m) is acquired by the current measurement circuit 60 as the measured current Im. During the measurement write frame period TWm, the monitor control signals SM(1) to SM(n) are inactive (low level), and the monitor control transistor T4 of each pixel circuit Pix(i,j) is kept in the off state.

[0082] The details of the current measurement operation and pixel current calculation process during the measurement write frame period TWmk are the same as in the first embodiment described above. By the operations OP1 to OP10 described above, the pixel current value xij of each pixel circuit Pix(i,j) is calculated when the lighting data voltage V1 is written to each pixel circuit Pix(i,j). Furthermore, based on the calculated pixel current value xij of each pixel circuit Pix(i,j), the same correction process as in the first embodiment is performed. In the subsequent normal display mode, the data signal lines D1 to Dm are driven based on the data voltage Vdata(i,j) that reflects the correction process, i.e., the data voltage Vdata(i,j) calculated using the correction parameters updated by the correction process, so that the image represented by the image information in the input signal Sin is displayed on the display unit 11.

[0083] According to this embodiment as described above, the same effects as in the first embodiment can be obtained when it is not necessary to measure the current through the organic EL element OL as a display element. In addition, according to this embodiment, it is possible to avoid the flow of a current based on a measurement data voltage unrelated to the data signal D(j) representing the image to be displayed through the organic EL element OL as a display element, thus eliminating abnormal image display in the display unit 11 based on current measurement operation. For this reason, this embodiment is particularly effective when it takes time for the value of the drive current Id in each pixel circuit Pix(i,j) to stabilize in order to measure the current.

[0084] In this embodiment, as shown in Figure 13, the source terminal of the drive transistor T2 in each pixel circuit 16 is connected to the current monitor line Imon via the monitor control transistor T4. Alternatively, as shown in Figure 15, the source terminal of the drive transistor T2 in each pixel circuit 16b may be connected to the low-level power line ELVSS via the monitor control transistor T4. In this case, the current monitor line Imon is unnecessary, and the current measurement circuit 60 is inserted into the low-level power line ELVSS, where the drive currents Id of all the pixel circuits 16b in the display unit 11 converge, as in the first embodiment (see Figure 1).

[0085] <3. Third Embodiment> Next, an active-matrix type organic EL display device, which is a light-emitting device according to the third embodiment, will be described. The overall configuration and basic operation of the display device according to this embodiment are the same as the second modified example of the first embodiment described above, so the same or corresponding parts of the configuration of the display device according to this embodiment are denoted by the same reference numerals and detailed descriptions are omitted. This embodiment shows a detailed example of current measurement operation, and the following description will focus on this point. Note that the configuration and operation of this embodiment that are not newly described below are the same as the second modified example of the first embodiment described above.

[0086] In the first and second embodiments described above, it is conceivable that current measurement and pixel current calculation in current measurement mode be performed when the user is not using the display device. In this embodiment, based on the configuration of the display device according to the second modification of the first embodiment described above, the current measurement operation is activated when the user performs an operation to cut off the power to the display device (hereinafter referred to as "power off operation").

[0087] Figure 16A is a flowchart showing the procedure for current measurement, pixel current calculation, and correction parameter update processing (hereinafter referred to as "current measurement mode processing") performed in the current measurement mode of this embodiment. In this embodiment, the current measurement mode processing is started when the power off information included in the input signal Sin provided to the display control circuit 20 as a light emission control circuit indicates that a power off operation has been performed, and the operation mode signal Sm included in the input signal Sin indicates the current measurement mode. In this current measurement mode processing, the CPU in the control unit 210 included in the display control circuit 20 operates as follows based on a predetermined program stored in the memory of the control unit 210.

[0088] First, the system confirms the completion of receiving the input image data (data indicating the grayscale value of each pixel of the image to be displayed), which is image information contained in the input signal Sin, and then controls the power supply circuit 50 with a power control signal Spw to ensure that power is supplied to each part of the display device thereafter (step S10). Subsequently, it determines whether the measurement environment is at an appropriate temperature (whether the detected temperature is within a predetermined appropriate temperature range) based on the ambient temperature of the display device detected by the ambient temperature sensor 21 (step S12). If, as a result of this determination, the detected temperature is not within an appropriate temperature range, the current measurement mode processing is terminated without performing current measurement or pixel current calculation, and the power supply circuit 50 is controlled with a power control signal Spw to cut off the power supply to each part of the display device.

[0089] If, as a result of the determination in step S12, the ambient temperature of the display device detected by the ambient temperature sensor 21 is within an appropriate temperature range, the process proceeds to step S14, where the measurement write code selection counter (hereinafter also simply referred to as the "code selection counter") IA is initialized to "1", and then the measurement write code polarity selection counter (hereinafter also simply referred to as the "polarity selection counter") IB is initialized to "0", indicating positive polarity (step S16).

[0090] Subsequently, in order to perform current measurement based on an Adamard matrix H of order N corresponding to the number of columns m of the pixel array in the display unit 11, the IA-th column vector of the N column vectors that constitute the polarity matrix indicated by the polarity selection counter IB (H = Hp - Hn) obtained by decomposing the N-order Adamard matrix H is used as the IA-th code for measurement writing (see equations (1) to (4) described above, Figures 8A and 8B). Then, the data-side drive circuit 30 and the scanning-side drive circuit 40 are driven via the drive control circuit 250 so that a data voltage sequence (a measurement data voltage for one row consisting of an on-data voltage V1 or an off-data voltage V0) corresponding to the IA-th code as pixel row data is written to all pixel rows (step S18) (see operation OP1 in the first embodiment described above). At this point, since IB = 0, the IA-th column vector among the N column vectors that make up the positive matrix Hp becomes the IA code (also called the "positive IA code"). However, when IB = 1, the IA-th column vector among the N column vectors that make up the negative matrix Hn becomes the IA code (also called the "negative IA code").

[0091] The order N of the Hadamard matrix H used here is a power of 2. If the number of columns m in the pixel array of the display unit 11 is a power of 2, then N = m. However, if the number of columns m in the pixel array of the display unit 11 is not a power of 2, then N = m. r >When s is the smallest integer r that satisfies m, N=2 sIn this case, i.e., when N > m, instead of the actual pixel array (real pixel array 110a) consisting of n × m pixel circuits provided in the display unit 11, a virtual pixel array 110b is used in the current measurement mode processing, which is obtained by adding N-m virtual pixel sequences to the real pixel array 110a (see Figure 10). Each of the added virtual pixel sequences consists of n dummy pixel circuits Pix(1, q) to Pix(n, q) (m + 1 ≤ q ≤ N), and the pixel current value xpq of each dummy pixel circuit Pix(p, q) (1 ≤ p ≤ n, m + 1 ≤ q ≤ N), i.e., the value of the current flowing from each dummy pixel circuit Pix(p, q) to the low-level power line ELVSS, is always zero. From this, when N > m, in step S18, the data voltages from the 1st to the mth in the data voltage sequence as pixel row data corresponding to the IA code are actually written to all pixel rows of the real pixel array 11a.

[0092] As described above, once the data voltage sequence corresponding to the IA code is written to all pixel rows in step S18, the measurement target row counter IC is initialized to "1" (step S20). Subsequently, the current measurement process is performed when the IC row is selected based on the IA code of the matrix with IB polarity among the positive matrix Hp and the negative matrix Hn (step S22).

[0093] Figure 16B is a flowchart showing the procedure for this current measurement process. In this current measurement process, the CPU in the control unit 210 operates as follows.

[0094] First, the light emission control signal EM(IC) of the selected row, which is the row to be measured, is activated, and the light emission control signals EM(i) (i≠IC) of the unselected rows, which are rows other than the row to be measured, are deactivated (step S110). As a result, the pixel circuits Pix(IC,1) to Pix(IC,N) of the first IC row are activated, that is, the light emission control transistor T3 is turned on in the pixel circuits Pix(IC,1) to Pix(IC,N) of the first IC row, causing a drive current Id corresponding to the amount of pixel row data written to the IA code to flow through the drive transistor T2.

[0095] Next, step S112 is repeatedly performed to monitor the current measurement value Im obtained by the current measurement circuit 60 and determine whether the sum of all pixel currents has settled into a stable state. Once the sum has settled into a stable state, the process proceeds to step S114, where the current measurement value Im obtained by the current measurement circuit 60 at that point is acquired as the sum of all pixel currents.

[0096] Next, it is determined whether the value of the polarity selection counter IB is "0" or not (positive polarity or not). If the result of this determination is that the value of the polarity selection counter IB is "0", the process proceeds to step S122, and the current measurement value Im is written to address (IA, IC) of the two-dimensional memory, which serves as the measurement data storage unit 223. After that, the process returns from the current measurement process shown in Figure 16B to the main routine shown in Figure 16A, and it is determined whether the value of the measurement target row counter IC is equal to the number of rows n in the pixel array (step S24).

[0097] If the result of the determination in step S24 is that the value of the row counter IC to be measured is not equal to the number of rows n in the pixel array, the process proceeds to step S26, incrementing the value of the row counter IC by "1", and then returning to step S20. Thereafter, steps S20 to S26 are repeatedly executed until the value of the row counter IC reaches the number of rows n in the pixel array, and when the value of the row counter IC reaches the number of rows n in the pixel array, the process proceeds to step S28. At this point, the values ​​yp11 to ypN1 in the first column of the positive current value matrix Yp are stored in the measurement data storage unit 223.

[0098] If the result of the determination in step S24 indicates that the value of the row counter IC to be measured has reached the number of rows n in the pixel array, the process proceeds to step S28 to determine whether the value of the polarity selection counter IB is "1" or not (whether it is negative polarity or not). If the result of this determination indicates that the value of the polarity selection counter IB is not "1", the value of the polarity selection counter IB is increased by "1", and then the process returns to step S18, where steps S18 to S28 are executed again. In the current measurement process in step S22 at this time (Figure 16B), it is determined in step S116 that the value of the polarity selection counter IB is not "0", so the process proceeds to step S118.

[0099] In step S118, the data at address (IA, IC) of the two-dimensional memory serving as the measurement data storage unit 223 is read as the positive current value Imp, and the current measurement value Im obtained in step S114 two steps prior is subtracted from this positive current value Imp to obtain the new current value Im (step S120). Then, this new current value Im is written to address (IA, IC) of the two-dimensional memory serving as the measurement data storage unit 223 (step S122). As a result, the value ypij (i=IC, j=IA) in the IC row and IA column of the matrix Yp-Yn (hereinafter referred to as the "measurement difference matrix") obtained by subtracting the negative current value matrix Yn from the positive current value matrix Yp is stored at address (IA, IC) of the two-dimensional memory. After that, the current measurement process is terminated and the system returns to the main routine shown in Figure 16A.

[0100] Subsequently, if it is determined in step S28 that the value of the polarity selection counter IB is "1" (negative polarity), the process proceeds to step S32, where it is determined whether the value of the code selection counter IA is equal to the number of columns N in the pixel array.

[0101] If the result of the determination in step S32 is that the value of the code selection counter IA is not equal to the number of columns N in the pixel array, the value of the code selection counter IA is incremented by "1", and then the process returns to step S16. Thereafter, steps S16 to S34 are repeatedly executed until the value of the code selection counter IA reaches the number of columns N in the pixel array, and when the value of the code selection counter IA reaches the number of columns N in the pixel array, the process proceeds to step S36. At this point, each element ypij-ynij in the measurement difference matrix Yp-Yn is stored at address (j,i) of the two-dimensional memory serving as the measurement data storage unit 223 (i=1 to n, j=1 to N).

[0102] In this way, similar to the second modification of the first embodiment described above, an equation similar to equation (11) described above can be obtained. However, the pixel current value matrix X is an n x N matrix, the Hadamard matrix H is an N x N matrix, and the positive current value matrix Yp and the negative current value matrix Yn are both n x N matrices. Here, if the number of columns m of the actual pixel array 110a, which is a pixel array provided in the display unit 11, is a power of 2, then N = m, and if the number of columns of the actual pixel array 110a is not a power of 2, then 2 r >When s is the smallest integer r that satisfies m, N=2 s That is the case.

[0103] Therefore, the pixel current value matrix X, whose (i,j) component is the pixel current value xij of each pixel circuit Pix(i,j) when the lighting data voltage V1 is written, is calculated by the following equation (step S36): X = (Yp - Yn)H -1 ... (21)

[0104] Subsequently, the pixel current value xij calculated by the above formula is stored in the measurement data storage unit 223 (step S38). However, if the order N of the Hadamard matrix H is greater than the number of columns m of the pixel array (real pixel array 110a) in the display unit 11, the pixel circuit Pix(i,j) (1≦i≦n, m+1≦j≦N) is a dummy pixel circuit, and therefore the pixel current value xij of these dummy pixel circuits is not stored in the measurement data storage unit 223.

[0105] As described above, when the lighting data voltage V1 is written to each pixel circuit Pix(i,j) as the measurement data voltage Vdata, the value of the drive current Id flowing through the drive transistor T2 of each pixel circuit Pix(i,j) is calculated as the pixel current value xij. Next, the correction parameter is updated for each pixel circuit Pix(i,j) using this pixel current value xij (step S40).

[0106] As previously described, when a data voltage Vdata is written to each pixel circuit Pix(i,j), the drive current Id that flows through the drive transistor T2 of that pixel circuit Pix(i,j) is given by the following equation: Id = (β / 2)(Vdata - Va - Vt) 2…(22) When the lighting data voltage V1 is written as the data voltage Vdata, the value of the drive current is the pixel current value xij calculated as described above. If we set this to Id1 = xij, the following equation can be obtained from the above formula: Id1 = (β / 2)(V1 - Va - Vt) 2 ... (23) In equation (23) above, gain β and threshold voltage Vt can be considered as parameters that should be corrected in order to compensate for variations and fluctuations in the characteristics of the drive transistor T2.

[0107] If we assume that the gain β is a predetermined value and that only the threshold voltage Vt is the parameter to be corrected, then we can solve equation (23) for Vt and treat this as the correction parameter Vt(i,j) for the pixel circuit Pix(i,j). In this case, in step S40, for each pixel circuit Pix(i,j), the threshold voltage Vt(i,j) that has already been calculated and stored in the correction parameter storage unit 221 is overwritten with the new Vt(i,j) calculated in this way.

[0108] In contrast, if both the gain β and threshold voltage Vt of the drive transistor T2 of the pixel circuit Pix(i,j) are parameters to be corrected, then, as explained in the correction process in the first embodiment above, the current measurement operation must be performed twice, changing the value of the lighting data voltage. That is, for the case where the lighting data voltage V1 is the first lighting data voltage V1a and the case where it is the second lighting data voltage V1b, the current measurement operation consisting of steps S14 to S38 in Figure 16A is performed. Here, if Ida is the pixel current value xij of the pixel circuit Pix(i,j) calculated based on the current measurement operation when the first lighting data voltage V1a is written to the pixel circuit Pix(i,j), and Idb is the pixel current value xij of the pixel circuit Pix(i,j) calculated based on the current measurement operation when the second lighting data voltage V1b is written to the pixel circuit Pix(i,j) (1≦i≦n, 1≦j≦m), then the following equation holds from equation (23) above. Ida = (β / 2)(V1a - Va - Vt) 2 ...(24a) Idb=(β / 2)(V1b-Va-Vt) 2…(24b) Solve equations (24a) and (24b) above for β and Vt, and these will be the gain β(i,j) and threshold voltage Vt(i,j) that constitute the correction parameters of the pixel circuit Pix(i,j).

[0109] In this way, a current measurement operation (steps S14 to S38) is performed using the two lighting data voltages V1a and V1b as data voltages, and based on the two pixel current values ​​xij(Ida and Idb) obtained for each pixel circuit Pix(i,j), a gain β(i,j) and a threshold voltage Vt(i,j) are calculated as new correction parameters for the pixel circuit Pix(i,j). The gain β(i,j) and threshold voltage Vt(i,j) that were previously calculated and stored in the correction parameter storage unit 221 are then overwritten with the newly calculated gain β(i,j) and threshold voltage Vt(i,j) (step S40).

[0110] After the correction parameters described above have been calculated and updated, the current mode processing in this embodiment is terminated, and the power supply circuit 50 is controlled by the power control signal Spw to shut off the power supply to each part of the display device.

[0111] Subsequently, when the power of the display device is turned on (power-on operation), it enters normal display mode. In the same manner as in the first embodiment described above, for each pixel circuit Pix(i,j), the data voltage Vdata(i,j) is determined from the drive current Id(i,j) corresponding to the grayscale value Lij of the pixel circuit Pix(i,j) included in the image information of the input signal Sin, using the updated correction parameters, gain β(i,j) and threshold voltage Vt(i,j) of the pixel circuit Pix(i,j) (see equation (20) described above). Then, under the control of the display control circuit 20, the scanning side drive circuit 40 drives the scanning signal lines SC1 to SCn and the light emission control lines EM1 to EMn, and the data side drive circuit 30 drives the data signal lines D1 to Dm based on the data voltage Vdata(i,j) (i=1 to n, j=1 to m), so that the image represented by the image information of the input signal Sin is displayed on the display unit 11.

[0112] According to this embodiment described above, in addition to obtaining the same effects as the first embodiment and its second modified form, current measurement mode processing (current measurement, pixel current calculation, correction parameter update) is performed each time the power is turned off, as long as the ambient temperature of the display device is at an appropriate temperature. Therefore, even if the user is not aware of the need for current measurement to compensate for the characteristics of the drive transistors of the pixel circuit, the correction processing based on the current measurement compensates for variations and fluctuations in the drive transistors of the pixel circuit, and good display operation is maintained.

[0113] Furthermore, in a display device equipped with the pixel circuit 16 (Figure 13) in the second embodiment described above, and a corresponding configuration thereof, if the current measurement mode processing in this embodiment (Figures 16A and 16B) is performed, when the power is turned off, the current measurement mode processing is performed with the organic EL elements OL of each pixel circuit 16 turned off. Therefore, no abnormal display for current measurement operation is visible after the power is turned off, and the power is cut off after the current measurement, pixel current calculation, and correction parameter update are completed.

[0114] <4. Fourth Embodiment> Next, an active-matrix type organic EL display device, which is a light-emitting device according to the fourth embodiment, will be described. The overall configuration and basic operation of the display device according to this embodiment are the same as those of the second embodiment described above, so the same or corresponding parts of the configuration of the display device according to this embodiment are given the same reference numerals and detailed explanations are omitted (see Figures 12 and 13). This embodiment, like the third embodiment described above, shows a detailed example of current measurement operation. However, in this embodiment, instead of performing current measurement, pixel current calculation, and correction parameter update all at once by current measurement mode processing after the power off operation, the current measurement of, for example, one row of pixel circuits in the pixel array is performed during the period of rewriting the data voltage as pixel data for one frame in normal display operation, so that the current measurement results of the pixel circuits are accumulated one row at a time as the frame progresses, and when the current measurement results of all rows of pixel circuits are obtained, the pixel current value xij is calculated. This embodiment differs from the third embodiment described above in this respect. Note that the configuration and operation of this embodiment that are not newly described below are the same as those of the second embodiment described above.

[0115] Figure 17A is a flowchart showing the procedure for the display driving process with current measurement processing (hereinafter referred to as "display driving process with current measurement processing") in this embodiment. Unlike the first embodiment described above, in this embodiment there is no distinction between normal display mode and current measurement mode, and the display driving process with current measurement processing shown in Figure 17A is started when normal display operation begins.

[0116] In this display driving process with current measurement processing, the CPU in the control unit 210 included in the display control circuit 20 operates as follows based on a predetermined program stored in the memory of the control unit 210.

[0117] First, the accumulated usage time stored in a predetermined address in the memory of the control unit 210 is initialized to "0" (step S50). This accumulated usage time is then read out, and based on this accumulated usage time, it is determined whether or not a predetermined periodic calibration time has arrived, and whether or not the measurement environment is at an appropriate temperature (whether or not the detected temperature is within a predetermined appropriate temperature range) based on the ambient temperature of the display device detected by the ambient temperature sensor 21 (step S52). If, as a result of this determination, the periodic calibration time has not arrived or the measurement environment is not at an appropriate temperature, the process proceeds to step S54, where the data-side drive circuit 30 and the scanning-side drive circuit 40 are controlled via the drive control circuit 250 to perform normal display of the video frame (step S54). The accumulated usage time is updated according to the time of this normal display (step S56), and the process returns to step S51. From this point onward, steps S51 to S56 are repeatedly executed until the periodic calibration period arrives and the measurement environment reaches an appropriate temperature. If, during this execution, it is determined in step S52 that the periodic calibration period has arrived and the measurement environment is at an appropriate temperature, the process proceeds to step S58, in which the measurement write code selection counter (hereinafter also simply referred to as the "code selection counter") IA is initialized to "1". Next, the measurement target row counter IB is initialized to "1" (step S60), and then the rewrite target row counter IC is initialized to "1" (step S62).

[0118] Subsequently, the light emission control signal EM (IC) for the first IC row is deactivated (L level), and it is determined whether the value of the row counter IB is equal to the value of the row counter IC to be rewritten (step S66). If, as a result of this determination, the value of the row counter IB is different from the value of the row counter IC to be rewritten, the process proceeds to step S70, and the pixel data refresh process for the first IC row is performed.

[0119] Figure 17C is a flowchart showing the procedure for this pixel data refresh process. In this pixel data refresh process, the CPU in the control unit 210 operates as follows.

[0120] In this embodiment, the image information in the input signal Sin provided to the display control circuit 20 is temporarily stored in an image buffer provided in the memory of the control unit 210 as grayscale values ​​L(1,1) to L(n,m) of pixels constituting the image to be displayed. As shown in Figure 17C, in the pixel data refresh process, first, the grayscale values ​​L(IC,1) to L(IC,m) of the pixels in the n x m pixel array of the display unit 11 are read from the image buffer (step S180). Next, m data voltages Vdata(IC,1) to Vdata(IC,m) corresponding to these m grayscale values ​​L(IC,1) to L(IC,m) are calculated. That is, the drive current Id(IC,j) corresponding to each grayscale value L(IC,j) in the IC row is determined in advance using an LTU or the like (j=1 to n), and the data voltage Vdata(IC,j) is calculated from this drive current Id(IC,j) (see equation (20) described above). The data voltages Vdata(IC,1) to Vdata(IC,m) calculated in this way are written as pixel data for the first IC row to the pixel circuits Pix(IC,1) to Pix(IC,m) of the first IC row in the pixel array, respectively (step S182). This completes the pixel data refresh process, and the system returns to the main routine shown in Figure 17A.

[0121] Furthermore, as in the first or third embodiment described above, if the gain β(i,j) and / or threshold voltage Vt(i,j) of each pixel circuit Pix(i,j) are stored in the correction parameter storage unit 221 as correction parameters and updated based on the current measurement results, then the data voltage Vdata(IC,j) is calculated from the drive current Id(IC,j) using the correction parameters stored in the correction parameter storage unit 221 (see equation (20) described above).

[0122] Subsequently, the light emission control signal EM(IC) of the first IC row is set to the activated state (H level) (step S72).

[0123] Next, it is determined whether the value of the rewritable row counter IC is equal to the number of rows n in the pixel array (actual pixel array 110a) in the display unit 11 (step S74). If, as a result of this determination, the value of the rewritable row counter IC is different from the number of rows n in the pixel array, the process proceeds to step S76, where the value of the rewritable row counter IC is increased by "1", and then the process returns to step S64. Thereafter, steps S64 to S76 are repeatedly executed until the value of the rewritable row counter IC reaches the number of rows n in the pixel array. In the process of repeatedly executing these steps S64 to S76, if it is determined in step S66 that the value of the measurement target row counter IB is different from the value of the rewritable row counter IC, step S68 is not executed. However, if it is determined in step S66 that the value of the measurement target row counter IB is equal to the value of the rewritable row counter IC, then step S68 is executed.

[0124] In step S68, a current measurement process is performed when the IC row is selected based on the IA code of the positive and negative matrices. Here, the positive and negative matrices are both square matrices consisting of elements of "1" or "0", and, as in the third embodiment described above, they are the positive matrix Hp and negative matrix Hn obtained by decomposing an N-order Hadamard matrix H in order to perform current measurement based on an Adamard matrix H of order N corresponding to the number of columns m of the pixel array (real pixel array 110a) in the display unit 11 (H = Hp - Hn) (see equations (1) to (4) described above). The order N of the Adamard matrix H used here is a power of 2, and if the number of columns m of the pixel array in the display unit 11 is a power of 2, then N = m, but if the number of columns m of the pixel array is not a power of 2, then 2 r >When s is the smallest integer r that satisfies m, N=2 sIn this case, i.e., when N > m, a virtual pixel array 110b is used in the current measurement process, which is obtained by adding N-m virtual pixel sequences to the actual pixel array 110a, instead of the actual pixel array 110a consisting of n × m pixel circuits provided in the display unit 11 (real pixel array 110a) (see Figure 10). Each of the added virtual pixel sequences consists of n dummy pixel circuits Pix(1, q) to Pix(n, q) (m + 1 ≤ q ≤ N), and the pixel current value xpq of each dummy pixel circuit Pix(p, q) (1 ≤ p ≤ n, m + 1 ≤ q ≤ N), that is, the value of the pixel current flowing from each dummy pixel circuit Pix(p, q) to the low-level power line ELVSS, is always zero.

[0125] Figure 17B is a flowchart showing the procedure for the current measurement process in step S68. In this current measurement process, the CPU in the control unit 210 operates as follows.

[0126] First, the scanning drive circuit 40 is controlled via the drive control circuit 250 so that the monitor control signal SM(IC) of the first IC row is activated (L level) (step S150) (see Figure 13).

[0127] Next, the data-side drive circuit 30 and the scanning-side drive circuit 40 are controlled via the drive control circuit 250 so that pixel row data (a row of measurement data voltages consisting of the illuminating data voltage V1 or the extinguishing data voltage V0) corresponding to the positive-side IA code, which corresponds to the IA-th column vector in the positive-side matrix Hp, is written to the pixel circuits Pix(IC,1) to Pix(IC,N) in the IC row (step S152). However, if N > m, the pixel circuits Pix(IC,m+1) to Pix(IC,N) in the IC row are dummy pixel circuits, so in reality, the 1st to mth data voltages in the data voltage sequence are written to the pixel circuits Pix(IC,1) to Pix(IC,m) in the IC row of the real pixel array 110a as pixel row data corresponding to the positive-side IA code.

[0128] Subsequently, the current measurement value Im obtained by the current measurement circuit 60 is monitored, and the operation of determining whether the sum of all pixel currents has settled into a stable state is repeated (step S154). If it is determined that the sum has settled into a stable state, the process proceeds to step S156, where the current measurement value Im from the current measurement circuit 60, which represents the sum of all pixel currents at that point, is obtained as the positive current value Imp. Here, the current measurement value Im from the current measurement circuit 60 is the current measurement value at the current monitor trunk line Imon, which is the point where the currents flowing from each of the pixel circuits 16 in the display unit 11 to the current monitor line Imon converge (see Figures 12 and 13). However, at the time of measurement in step S156, only the monitor control signal SM(IC) of the first IC row (= first IB row) is in an activated state (H level), while the other monitor control signals SM(i) (i≠IC) are in an inactivated state (L level). Therefore, this current measurement value Im is actually the sum of the currents (currents corresponding to the drive current Id) flowing from each of the pixel circuits Pix(IC,1) to Pix(IC,m) in the first IC row to the current monitor line Imon. This is also true for the current measurement value Im obtained as the negative current value Imn in step S162 described later.

[0129] Next, the data-side drive circuit 30 and the scanning-side drive circuit 40 are controlled via the drive control circuit 250 so that pixel row data corresponding to the negative IA code, which corresponds to the IA-th column vector in the negative matrix Hn (a row of measurement data voltages consisting of the on-data voltage V1 or the off-data voltage V0), is written to the pixel circuits Pix(IC,1) to Pix(IC,N) in the IC row (step S158). However, if N > m, in reality, the 1st to mth data voltages in the data voltage sequence are written to the pixel circuits Pix(IC,1) to Pix(IC,m) in the IC row of the actual pixel array 110a as pixel row data corresponding to the negative IA code.

[0130] Subsequently, the current measurement value Im obtained by the current measurement circuit 60 is monitored, and the operation of determining whether the sum of all pixel currents has settled into a stable state is repeated (step S160). If it is determined that the sum has settled into a stable state, the process proceeds to step S162, where the current measurement value Im obtained by the current measurement circuit 60, which represents the sum of all pixel currents at that point, is acquired as the negative current value Imn. Subsequently, the scanning drive circuit 40 is controlled via the drive control circuit 250 so that the monitor control signal SM (IC) of the first IC row is inactive (H level) (step S163).

[0131] Next, the value Imp-Imn, obtained by subtracting the negative current value Imn from the positive current value Imp, is set as the new current value Im (step S164), and this new current value Im is written to address (IA, IB) of the two-dimensional memory serving as the measurement data storage unit 223 (step S166). After that, the current measurement process is terminated and the system returns to the main routine shown in Figure 17A.

[0132] In the process of repeatedly executing steps S64 to S76 in the main routine shown in Figure 17A, if it is determined in step S74 that the value of the rewrite target row counter IC has reached the number of rows n in the pixel array, the process proceeds to step S78.

[0133] In step S78, it is determined whether the value of the measurement target row counter IB is equal to the number of rows n in the pixel array (actual pixel array 110a) of the display unit 11.

[0134] If the result of the determination in step S78 is that the value of the row counter IB is different from the number of rows n in the pixel array, the process proceeds to step S80, incrementing the value of the row counter IB by "1", and then returning to step S62. Thereafter, steps S62 to S80 are repeatedly executed until the value of the row counter IB reaches the number of rows n in the pixel array, and when the value of the row counter IB reaches the number of rows n in the pixel array, the process proceeds to step S82.

[0135] In step S82, it is determined whether the value of the code selection counter IA is equal to the order N of the Hadamard matrix H.

[0136] If the result of the determination in step S82 is that the value of the code selection counter IA is different from the order N of the Hadamard matrix, the process proceeds to step S84, incrementing the value of the code selection counter IA by "1", and then returning to step S60. Thereafter, steps S60 to S84 are repeatedly executed until the value of the code selection counter IA reaches the order N of the Hadamard matrix H, and when the value of the code selection counter IA reaches the order N of the Hadamard matrix H, the process proceeds to step S86. At this point, the difference current values ​​ypij - ynij, which are each (i,j) component in the measured value difference matrix Yp - Yn when the pixel row data corresponding to each code from the positive and negative first code to the positive and negative nth code is written to each pixel circuit Pix(i,1) to Pix(i,N) (1≦i≦n) from the first to the nth row of the pixel array, are stored at address (j,i) of the two-dimensional memory serving as the measurement data storage unit 223 (i=1 to n, j=1 to N). Note that when N > m, the pixel circuit Pix(p,q) (1≦p≦n, m+1≦q≦N) is a dummy pixel circuit, and its pixel current value xij (1≦i≦n, m+1≦j≦N) is always zero. From this, even when the order N of the Hadamard matrix H is not equal to the number of columns in the real pixel array 110a, that is, not only when N = m but also when N > m, the following equation holds when the pixel current value matrix X is a matrix (1 ≤ i ≤ n, 1 ≤ j ≤ N) with components (i, j) where the pixel current value xij is, X・H = Yp - Yn …(25)

[0137] In step S86, the measurement completion flag is set, and the process returns to step S51. Steps S51 to S86 are then repeatedly executed until the power to the display device is cut off. The measurement completion flag is referenced in the pixel current calculation process (Figure 17D), which is executed as a parallel process as described later.

[0138] Figure 17D is a flowchart showing the procedure for the pixel current calculation process in this embodiment. In this embodiment, the display driving process with current measurement processing shown in Figure 17A and the pixel current calculation process shown in Figure 17D are executed as two different processes operating in parallel under the operating system (hereinafter abbreviated as "OS") that runs in the control unit 210 of the display control circuit 20, but these processes may be configured to run as a single process. The pixel current calculation process is started when the power to the display device is turned on and remains resident until the power is turned off. The OS also has a process management function, and the OS provides system functions such as inter-process communication via shared memory. The measurement completion flag, which is set in step S86 in Figure 17A and reset in step S210 in Figure 17D, is stored in memory shared between parallel processes.

[0139] In the pixel current calculation process shown in Figure 17D, the CPU in the control unit 210 operates as follows.

[0140] First, step S202, which determines whether or not the measurement completion flag is set, is repeatedly executed until the measurement completion flag is set. When the measurement completion flag is set in the display drive process with current measurement processing (see step S86 in Figure 17A), the process proceeds to step S206.

[0141] As previously described, at the time the measurement completion flag is set in step S86 of the display driving process with current measurement processing shown in Figure 17A, the above equation (25), which corresponds to the above-described equation (11), holds true regardless of whether the order N of the Hadamard matrix H is equal to the number of columns m of the actual pixel array 110a (not only when N=m but also when N>m). Therefore, in step S206, each pixel current value xij is calculated using each element ypij-ynij (i=1 to n, j=1 to N) of the measurement difference matrix Yp-Yn stored in the measurement data storage unit 223 by the following equation. In the following equation, matrix X is a pixel current value matrix with the pixel current value xij as the (i,j) component. X = (Yp-Yn)H -1 ... (26)

[0142] Subsequently, the pixel current value xij calculated by the above formula (26) is stored in the measurement data storage unit 223 (step S208). However, if the order N of the Hadamard matrix H is greater than the number of columns m of the actual pixel array 110a, the pixel circuits Pix(i,j) (1≦i≦n, m+1≦j≦N) are dummy pixel circuits, and the pixel current values ​​xij of these dummy pixel circuits are not stored in the measurement data storage unit 223.

[0143] Once the current value xij (1 ≤ i ≤ n, 1 ≤ j ≤ m) for each pixel is stored in the measurement data storage unit 223, the measurement completion flag is reset (step S210), and the process returns to step S202. Thereafter, steps S202 to S210 are repeatedly executed until the power supply to the display device is cut off.

[0144] In this embodiment, unlike the first and third embodiments described above, the circuit configuration shown in Figures 12 and 13 is adopted. Therefore, in each pixel circuit Pix(IB, j) (j=1 to m, IB=IC) in the row selected as the row to be measured, the current Id flowing through the drive transistor T2 flows to the current monitor line Imon via the monitor control transistor T4, and the current measurement value Im is acquired by the current measurement circuit 60 at the point where the currents Id (pixel currents) flowing from each pixel circuit 16 to the current monitor line Imon converge (current monitor trunk line). For this reason, in the current measurement process, the pixel circuits 16 in rows other than the row to be measured IB operate in the same way as normal display operation without being deactivated. For this reason, in this embodiment, current measurement similar to the current measurement in the current measurement mode of the third embodiment can be performed during the normal display operation without affecting the visual appearance.

[0145] As described above, in this embodiment, during the normal drive processing for image display, one frame's worth of pixel data (data voltage) is written to the pixel circuit in the pixel array in a period slightly shorter than the one frame period for updating the display image based on the input signal Sin, thereby securing time for current measurement processing. During this time, the same current measurement is performed row by row in the pixel array without visually affecting the image display (see steps S66 and S68 in Figure 17A). Then, the pixel current calculation process (Figure 17D) operates in parallel with the display drive processing with current measurement processing (Figures 17A, 17B, and 17C). Once the current measurement results (Yp - Yn) for all rows in the pixel array are obtained, the pixel current value xij of each pixel circuit Pix(i,j) is calculated using the current measurement results (Yp - Yn) (i = 1 to n, j = 1 to m). Therefore, according to the embodiment described above, as in the third embodiment, there is no need to set aside time (see Figure 16A) for writing the data voltage corresponding to each code based on the Hadamard matrix H to the pixel circuit of each row in the pixel array and performing current measurement. Instead, current measurement similar to that in the current measurement mode of the third embodiment can be performed during the normal display driving process, and the pixel current value xij of each pixel circuit Pix(i,j) can be calculated.

[0146] In this embodiment as well, similar to the first and third embodiments described above (see step S40 in Figure 16A), correction parameters (characteristic values ​​such as the gain β(i,j) and threshold voltage Vt(i,j) of the drive transistor of each pixel circuit Pix(i,j)) may be updated by performing correction processing using the calculated pixel current value xij. In this case, in step S182 in Figure 17C, the data voltage Vdata(IC,j) to be written to each pixel circuit Pix(IC,j) in the IC row for normal display operation is calculated using the updated correction parameters stored in the correction parameter storage unit 221. With this configuration, variations and fluctuations in the drive transistor characteristics of each pixel circuit Pix(i,j) can be accurately compensated with a simpler configuration than in the conventional method.

[0147] <5. Modifications> The present invention is not limited to the embodiments or modifications described above, and various modifications can be made without departing from the scope of the present invention. Hereinafter, modifications of the embodiments other than the first and second modifications described above will be explained.

[0148] <5.1 Third Modification> In each of the above embodiments, during the current measurement operation, 2m data voltage sequences corresponding to m column vectors (positive codes) of the positive matrix Hp or m column vectors (negative codes) of the negative matrix Hn are sequentially written to one row of the pixel array consisting of n × m pixel circuits in the display unit 11, activating only that one row, and the current measurement value Im is acquired by the current measurement circuit 60. That is, in the first embodiment, during the current measurement operation, the current measurement value Im is acquired for each row of the pixel array. However, instead of measuring the current for each row in this way, the current measurement value Im may be acquired for every multiple rows of the pixel array. More generally, nb may be a natural number predetermined as a divisor of the number of rows n of the pixel array, and the current measurement value Im may be acquired for every nb rows of the pixel array.

[0149] For example, in a configuration where the current measurement value Im is acquired every two rows in a pixel array (when nb = 2), the current measurement operation is performed according to the following procedure. For the sake of explanation, in the following, we assume that n = m = 4 (see Figure 7), and that the data voltage sequences corresponding to the positive and negative codes, respectively, based on the nb × m (8th order) Hadamard matrix H shown in equation (27) below, are written to the pixel circuits constituting each nb row (2 rows each) in the pixel array to perform current measurement. The positive matrix Hp and the negative matrix Hn of this Hadamard matrix H are as shown in equations (28) and (29), respectively. The positive code consists of the first to eighth codes, which correspond to the first to eighth positive vectors as eight column vectors in the positive matrix Hp, and the negative code consists of the first to eighth codes, which correspond to the first to eighth negative vectors as eight column vectors in the negative matrix Hn.

[0150] Figures 18A and 18B illustrate the data voltages to be written to the pixel circuits during the measurement write frame period TWmk shown in Figure 6 in this modified example. In this modified example, eight linearly independent vectors, each containing only elements of "1" and "-1", are determined based on eight vectors, each having a number of elements equal to nb × m (= 2 × 4) for the nb rows of pixel circuits Pix(1,1) to Pix(n,m) in the n × m pixel array of the display unit 11, and each vector contains only elements of "1". In other words, of the positive matrix Hp and negative matrix Hn obtained from the 8th order Hadamard matrix H shown in equation (27) above, eight positive data voltage sequences are determined as shown in Figure 18A based on the positive vectors consisting of the first to eighth vectors as eight column vectors in the positive matrix Hp, and eight negative data voltage sequences are determined as shown in Figure 18B based on the negative vectors consisting of the first to eighth vectors as eight column vectors in the negative matrix Hn. Each of these eight positive data voltage sequences and eight negative data voltage sequences consists of eight positive or negative data voltages, which are either the on-data voltage V1 or the off-data voltage V0.

[0151] Figure 18C is a diagram illustrating the procedure for current measurement when writing a data voltage sequence corresponding to a positive code, and Figure 18D is a diagram illustrating the procedure for current measurement when writing a data voltage sequence corresponding to a negative code. In the following, in the current measurement operation, the j-th vector as a positive vector or the j-th vector as a negative vector that determines the eight data voltages to be written to the eight pixel circuits Pix(2i-1,1) to Pix(2i-1,4) and Pix(2i,1) to Pix(2i,4) (1≦i≦2) in each of the two rows (each nb row) of the above pixel array (4×4 pixel circuits) will be referred to as the "positive j-th code" or the "negative j-th code," respectively (j=1 to 8). The positive j-th code corresponds to the j-th column vector of the positive matrix Hp, which is obtained from the above 8th order Hadamard matrix H, and the negative j-th code corresponds to the j-th column vector of the negative matrix Hn.

[0152] In the current measurement operation of this modified example, the control unit 210 in the display control circuit 20 shown in Figure 2 controls the data-side drive circuit 30 and the scanning-side drive circuit 40 via the drive control circuit 250, and receives the current measurement value Im from the current measurement circuit 60, thereby executing the operation shown in Figure 18C, which corresponds to the operation shown in Figure 8B in the first embodiment (see operations OP1 to OP9 described above), and the operation shown in Figure 18D, which corresponds to the operation shown in Figure 8C in the first embodiment (see operation OP10 described above).

[0153] In the operation shown in Figure 18C, two rows (nb rows) of data voltages corresponding to each of the first to eighth positive codes based on the positive matrix Hp are sequentially written to the pixel circuits Pix(1,1) to Pix(4,4) of the pixel array, and two rows (nb rows) of the pixel circuits in the pixel array are activated, and the current measurement value Im is obtained. Here, if we denote the current measurement value Im obtained when the two rows of pixel circuits Pix(2i-1,1) to Pix(2i-1,4) and Pix(2i,1) to Pix(2i,4), respectively, which consist of the second i-1 row and the second i row, are activated, as denoted by the symbol "ypij" (i=1 to 2, j=1 to 8), then the following equation holds.

[0154] In the operation shown in Figure 18D, two rows (nb rows) of data voltages corresponding to each of the negative first to negative eighth codes based on the negative matrix Hn are sequentially written to the pixel circuits Pix(1,1) to Pix(4,4) of the pixel array, and two rows (nb rows) of the pixel circuits in the pixel array are activated, and the current measurement value Im is obtained. If the current measurement value Im obtained when the two rows of pixel circuits Pix(2i-1,1) to Pix(2i-1,4) and Pix(2i,1) to Pix(2i,4), respectively, which consist of the negative data voltage sequence (eight positive data voltages) corresponding to the negative j-th code are activated, then the current measurement value Im is denoted by the symbol "ynij" (i=1 to 2, j=1 to 8), and the following equation holds true.

[0155] Here, if we define the pixel current value matrix X, the positive current value matrix Yp, and the negative current value matrix Yn as shown in the following equation, then from equations (30), (31), and (32) above, X・H = X(Hp - Hn) = Yp - Yn. Therefore, in this modified example as well, the pixel current value xij, which is the value of the drive current Id that flows through the drive transistor T2 of each pixel circuit Pix(i,j) when the same lighting data voltage V1 is written to each pixel circuit Pix(i,j), is calculated using the following formula: X = (Yp - Yn)H -1 ... (36)

[0156] According to the modified example described above, current measurement values ​​Im are acquired by activating the pixel circuits in multiple rows at a time in the pixel array (two rows at a time in the example shown in Figures 18A to 18D). As a result, current measurements can be performed with even greater accuracy compared to the first embodiment. Consequently, the accuracy of each pixel current value xij calculated based on these current measurement results is also improved.

[0157] In the above example, the multiplication value nb × m = 2 × 4 = 8 obtained by multiplying the natural number nb (= 2) by the number of columns m in the pixel array of the display unit 11 is a power of 2, and the order N of the Hadamard matrix H is nb × m = 8. However, if the multiplication value nb × m is not a power of 2, then, as in the second modification described above, a virtual pixel array 110b is assumed in which a virtual pixel column consisting of dummy pixels is added to the pixel array (real pixel array 110a) of the display unit 11 (see Figure 10). In this case, when the number of columns of the virtual pixel array 110b is M (> m), the order N of the Hadamard matrix H is nb × M, so the number of columns M is such that the natural number nb is a power of 2. r > When s is the smallest integer r that satisfies nb × M, then nb × M = 2 s An integer that satisfies the condition is selected. In this way, even if the multiplicative value nb × m obtained by multiplying the above natural number nb by the number of columns m of the actual pixel array 110a is not a power of 2, current measurement can be performed with greater accuracy than in the first embodiment or the second modified example, and the current value xij of each pixel can be easily calculated from the current measurement results using the inverse matrix of the Hadamard matrix H.

[0158] <5.2 Fourth Modification> In each of the above embodiments and modifications, the data voltage sequence to be written to the pixel circuits Pix(i,1) to Pix(i,m) (1≦i≦n) in each row of the n x m pixel array in the display unit 11 during the current measurement operation (a data voltage sequence consisting of a lighting data voltage V1 or an extinguishing data voltage V0) is determined based on the Hadamard matrix H (see equations (1) to (4), Figure 8A, equations (27) to (30), Figure 18A, Figure 18B, etc. described above). However, instead of the Hadamard matrix H, the data voltage sequence to be written to the pixel circuits Pix(i,1) to Pix(i,m) in each row of the pixel array during the current measurement operation may be determined based on the following matrix G. That is, the matrix G is a square matrix whose column vectors are m linearly independent m-dimensional vectors, and each element of each column vector is either "1", "0", or "-1". This matrix G corresponds to a higher-level concept than the Hadamard matrix H.

[0159] If none of the column vectors constituting the matrix G contain an element of "-1", then when the data voltage sequence corresponding to the j-th column vector of the matrix G is written to the i-th row pixel circuits Pix(i,1) to Pix(i,m) in the pixel array, and only the i-th row is activated, the current measurement value Im obtained by the current measurement circuit 60, let yij be the value of xij (= Id(i,j)) when the lighting data voltage V1 is written to the i-th row, j-th column pixel circuit Pix(i,j) in the pixel array, then the following equation holds: X・G = Y …(37) Here, when the lighting data voltage V1 is written to the i-th row, j-th column pixel circuit Pix(i,j) in the pixel array, the pixel current value of said pixel circuit Pix(i,j) is xij (= Id(i,j)), then matrix X is a matrix with xij as its (i,j) component, and matrix Y is a matrix with yij as its (i,j) component. The matrix G is invertible because its m column vectors are linearly independent. Therefore, each pixel current value xij can be calculated by the following equation: X = Y・G -1 ... (38)

[0160] If each column vector constituting the matrix G contains an element of "-1", the matrix G is decomposed into a positive matrix Gp and a negative matrix Gn (G = Gp - Gn) in the same manner as in the first embodiment. Then, m data voltage sequences corresponding to m positive codes corresponding to m column vectors in the positive matrix Gp, and m data voltage sequences corresponding to m negative codes corresponding to m column vectors in the negative matrix Gn are written to the pixel circuits Pix(i,1) to Pix(i,m) of each row in the pixel array (1 ≤ i ≤ n). In this way, the current measurement operation can be performed in the same manner as in the first embodiment (see Figures 8A to 8C and the operations OP1 to OP10 described above). Therefore, the following equation (39) holds, and the pixel current value xij of each pixel circuit Pix(i,j) when the lighting data voltage V1 is written to that pixel circuit Pix(i,j) can be calculated using the following equation (40). X・G=Yp−Yn…(39) X=(Yp−Yn)G -1 …(40) Here, if we write a data voltage sequence corresponding to the j-th column vector of the positive matrix Gp to the i-th row of pixel circuits Pix(i,1) to Pix(i,m) in the pixel array, and then activate only the i-th row, the current measurement value Im obtained by the current measurement circuit 60 is denoted as ypij, and if we write a data voltage sequence corresponding to the j-th column vector of the negative matrix Gn to the i-th row of pixel circuits Pix(i,1) to Pix(i,m), and then activate only the i-th row, the current measurement value Im obtained by the current measurement circuit 60 is denoted as ynij, then matrix Yp is the positive current value matrix with ypij as the (i,j) component, and matrix Yn is the negative current value matrix Yn with ynij as the (i,j) component.

[0161] <5.3 Fifth Modification> In each of the above embodiments, the data voltage to be written to each pixel circuit of the row to be measured for current measurement is determined to be either an on-data voltage V1 or an off-data voltage V0, depending on the elements of the positive vector or the negative vector corresponding to each pixel circuit constituting the row to be measured (Figures 8A, 18A, and 18B). Here, the positive vector is the column vector of the positive matrix Hp obtained by decomposing the Hadamard matrix H, and the negative vector is the column vector of the negative matrix Hn obtained by decomposing the Hadamard matrix H (see equations (1) to (4) etc. described above). However, instead of using such positive matrix Hp and negative matrix Hn, the pixel circuits constituting the row to be measured may be associated with the elements of each column vector in the Hadamard matrix, and the data voltage to be written to each pixel circuit in the row to be measured may be determined to be either an on-data voltage V1 or an off-data voltage V0, depending on the elements of each column vector in the Hadamard matrix corresponding to the pixel circuits constituting the row to be measured.

[0162] In this configuration, for example as shown in Figure 19, when measuring current to obtain a current measurement value ypij based on the positive vector for each column vector in the Hadamard matrix, the on-data voltage V1 is written to the pixel circuit corresponding to the "1" element in the column vector among the pixel circuits constituting the row to be measured, and the off-data voltage V0 is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "-1" element in the column vector. On the other hand, when measuring current to obtain a current measurement value ynij based on the negative vector, the on-data voltage V1 is written to the pixel circuit corresponding to the "-1" element in the column vector among the pixel circuits constituting the row to be measured, and the off-data voltage V0 is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the column vector.

[0163] <5.4 Sixth Modification> In each of the above embodiments and modifications, current measurement and calculation of each pixel current value are performed based on an Adamard matrix of order N corresponding to the number of columns m of the pixel array (real pixel array 110a) consisting of n × m pixel circuits arranged in an n x m matrix on the display unit 11. In the current measurement, the pixel circuits constituting the row to be measured in the pixel array are associated with the constituent elements in each of the N column vectors that constitute the Adamard matrix. For example, if current measurement processing is performed on nb rows of n × m pixel circuits constituting the pixel array, based on a natural number nb predetermined as a divisor of the number of rows n of the pixel array, then the nb × m pixel circuits constituting the row to be measured are associated with the nb × m elements in each of the N column vectors. This correspondence is intended to obtain the following system of N linear equations, where the pixel current value xij of the pixel circuit Pix(i,j) in the i-th row and j-th column, when the lighting data voltage V1 is written to the said pixel circuit Pix(i,j), is the unknown variable, and the corresponding Hadamard matrix is ​​H: X・H = Yp - Yn …(41)

[0164] Here, X is a matrix whose (i,j) component is the pixel current value xij of the pixel circuit Pix(i,j) in the i-th row and j-th column when the lighting data voltage V1 is written to the said pixel circuit Pix(i,j), and the order N of the Hadamard matrix H is equal to the product nb × M of the above natural number nb, which indicates the number of rows of the row to be measured, and M, which is a natural number of m or more, which is the number of columns of the pixel array (real pixel array 110a). For the j-th vector in the N column vectors constituting this Hadamard matrix H, if the on-time data voltage V1 is written to the pixel circuit corresponding to the "1" element in the i-th row of measurement (nb row) among the pixel circuits constituting the i-th row of measurement (nb row), and the off-time data voltage V0 is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "-1" element in the vector, and then the nb × m pixel circuits constituting the nb row of measurement (nb row) in the pixel array are set to an activated state and the pixel circuits constituting rows other than the nb row are set to an inactive state, and the current measurement value Im obtained by the current measurement circuit 60 is the positive-side current value ypij, then the matrix Yp is a matrix whose (i,j) component is the positive-side current value ypij. Furthermore, for the j-th vector in the above N column vectors, after the on-time data voltage V1 is written to the pixel circuit corresponding to the "-1" element in the nb row, which is the i-th row to be measured, and the off-time data voltage V0 is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector, and then the nb × m pixel circuits constituting the nb row, which is the row to be measured, are activated and the pixel circuits constituting rows other than the nb row are deactivated, the current measurement value Im obtained by the current measurement circuit 60 is denoted as the negative current value ynij, and the matrix Yn is a matrix whose (i,j) component is the negative current value ynij.

[0165] Furthermore, since the pixel current value, which is the value of the current flowing from the pixel circuit to the power line when the off data voltage V0 is written to it and from the inactive pixel circuit, is zero, if the natural number M that determines the order N = nb × M of the Hadamard matrix H is equal to the number of columns m, then equation (41) above shows a system of N linear equations for i = 1 to n / nb, where the unknown variable is the pixel current value, which is the value of the current flowing from each pixel circuit to the power line when the on data voltage V1 is written to each of the nb × m pixel circuits that constitute the nb row as the i-th row to be measured (N = nb × m). Furthermore, if the natural number M that determines the order N = nb × M of the Hadamard matrix H is greater than the number of columns m, then if we assume a virtual pixel array of n rows and M columns obtained by adding a dummy pixel circuit, whose pixel current value is always zero, to each row of the pixel array, then equation (41) shows a system of N equations for i = 1 to n / nb, where the unknown variable is the pixel current value, which is the value of the current flowing from each pixel circuit to the power line when the lighting data voltage V1 is written to each of the nb × M pixel circuits constituting the i-th row of the virtual pixel array (nb row as the row to be measured).

[0166] As previously described, equation (41) above is obtained by associating the nb × m elements in each of the N column vectors constituting the Hadamard matrix H with the nb × m pixel circuits constituting the row to be measured. Here, instead of the N column vectors, the nb × m elements in each of the N row vectors constituting the N-th order Hadamard matrix H may be associated with the nb × m pixel circuits constituting the target of measurement. In this case, the transpose of matrix X is t If we let X be X, then the following equation can be obtained instead of equation (41) above. H. tX = Yp - Yn …(42) When the natural number M that determines the order N = nb × M of the above Hadamard matrix H is equal to the number of columns m, this equation (42), like equation (41) above, shows a system of N equations for i = 1 to n / nb, where the unknown variable is the pixel current value, which is the value of the current flowing from each pixel circuit to the power line when the lighting data voltage V1 is written to each of the nb × m pixel circuits that constitute the nb row as the i-th row to be measured (N = nb × m). Furthermore, even when the natural number M that determines the order N = nb × M of the Hadamard matrix H is greater than the number of columns m, equation (42), like equation (41), shows a system of N equations for i = 1 to n / nb, where the unknown variable is the pixel current value, which is the value of the current flowing from each pixel circuit to the power line when the lighting data voltage V1 is written to each pixel circuit in the n × M pixel circuits that constitute the i-th row of the measurement target in a virtual pixel array of n rows and M columns in which a dummy pixel circuit with a pixel current value of always zero is added to each row of the pixel array (N = nb × M).

[0167] <5.5 Seventh Modification> In the sixth modification described above, as in the fourth modification described above, a matrix G composed of N column vectors, each consisting of N linearly independent N-dimensional vectors with elements of either "1", "0", or "-1", may be used instead of the Hadamard matrix H. In this case, the following equation is obtained as the equation corresponding to equation (41) above: X・G = Yp - Yn ... (43) Also, when a matrix G composed of N row vectors, each consisting of N linearly independent N-dimensional vectors with elements of either "1", "0", or "-1", is used instead of the Hadamard matrix H, the following equation is obtained as the equation corresponding to equation (43) above: G・ t X=Yp-Yn...(44)

[0168] Considering the above, more generally, a configuration in which the control unit 210 within the display control circuit 20 performs the following processing, based on the hardware configuration in the first embodiment described above. That is, instead of matrices such as the Hadamard matrix H and the matrix G, N linearly independent N-dimensional vectors, each consisting of one of the elements "1", "0", or "-1", are selected in advance, and the control unit 210 takes nb as a natural number predetermined as a divisor of the number of rows n of the pixel array (real pixel array 110a) consisting of n × m pixel circuits provided in the display unit 11, and performs the following positive-side current measurement processing and negative-side current measurement processing based on the N N-dimensional vectors, with nb rows for each of the n × m pixel circuits constituting the pixel array as the rows to be measured. In these current measurement processing, the measurement data voltage to be written to each pixel circuit is determined as follows based on the N N-dimensional vectors. Here, N is a natural number equal to the product of the natural number nb and a natural number M which is equal to or greater than the number of columns m of the pixel array, nb × M.

[0169] In the positive-side current measurement process, for the j-th vector in the N N-dimensional vectors, the data-side drive circuit 30 and the scanning-side drive circuit 40 are controlled via the drive control circuit 250 so that, for each j-th vector in the i-th row of measurement (nb row), an on-up data voltage V1 is written to the pixel circuit corresponding to the "1" element in that vector, and an off-up data voltage V0 is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "-1" element in that vector. Then, the scanning-side drive circuit 40 is controlled via the drive control circuit 250 so that in the pixel array, the nb × m pixel circuits constituting the nb row are activated and the pixel circuits constituting rows other than the nb row are deactivated. The current value Im measured by the current measurement circuit 60 is obtained as the positive-side current value ypij (i = 1 to n / nb, j = 1 to N).

[0170] In the negative current measurement process, for the j-th vector in the N N-dimensional vectors, the data-side drive circuit 30 and the scanning-side drive circuit 40 are controlled via the drive control circuit 250 so that, for each j-th vector in the i-th row of measurement (nb row), an on-data voltage V1 is written to the pixel circuit corresponding to the "-1" element in that vector among the nb × m pixel circuits, and an off-data voltage V0 is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in that vector among the nb × m pixel circuits. Then, the scanning-side drive circuit 40 is controlled via the drive control circuit 250 so that the nb × m pixel circuits constituting the nb row in the pixel array are in an activated state and the pixel circuits constituting rows other than the nb row are in an inactivated state. The current value Im measured by the current measurement circuit 60 is obtained as the negative current value ynij (i = 1 to n / nb, j = 1 to N).

[0171] Since the pixel current values ​​of the pixel circuits on which the off data voltage V0 is written and the pixel circuits in the inactive state are zero, if we let G be a matrix with the above N N-dimensional vectors as column vectors, then equation (43) described above can be obtained from the positive current value ypij and negative current value ynij obtained in the above manner. Also, if we let G be a matrix with the above N N-dimensional vectors as row vectors, then equation (44) described above can be obtained from the positive current value ypij and negative current value ynij obtained in the above manner. In equations (43) and (44), matrix Yp is a matrix with the positive current value ypij as its (i,j) component, and matrix Yn is a matrix with the negative current value ynij as its (i,j) component. Therefore, the control unit 210 calculates the positive current value ypij and the negative current value ynij (i=1 to n / nb, j=1 to N) and the inverse matrix G of the matrix G based on the above formula (43) or (44). -1 From this, the pixel current value xij of each pixel circuit Pix(i,j) in the above pixel array is calculated when the lighting data voltage V1 is written to the said pixel circuit Pix(i,j).

[0172] <5.6 Other Modifications and Other Embodiments> In each of the above embodiments, the pixel circuit Pix(i,j) is configured using an N-channel transistor, but it may be configured using a P-channel transistor instead. Also, in the display devices according to each of the above embodiments, an external compensation method is employed to compensate for variations and fluctuations in the characteristics of the driving transistors of the pixel circuit, but instead of the pixel circuit 15 configured in Figure 4, a pixel circuit 17 with an internal compensation method, such as the one shown in Figure 20, may be used.

[0173] The pixel circuit Pix(i,j) in the i-th row and j-th column, which is pixel circuit 17 shown in Figure 20, includes an organic EL element OL, a drive transistor M1, a write control transistor M2, a threshold compensation transistor M3, a first initialization transistor M4, a power supply transistor M5, a light emission control transistor M6, a second initialization transistor M7, and a holding capacitor Cs. These elements OL, M1 to M7, and Cs are connected to a scan signal line SCi, a scan signal line SCi-1 immediately preceding the scan signal line SCi, a light emission control line EMI, a data signal line Dj, an initialization voltage line Vini, a high-level power supply line ELVDD, and a low-level power supply line ELVSS, as shown in Figure 20. In this pixel circuit 17, during the initialization period provided before the write period for writing the data voltage to the holding capacitor Cs, the first initialization transistor M4 is turned ON, thereby initializing the voltage Vg at the gate terminal of the drive transistor M1 and the holding capacitor Cs. During the subsequent writing period, the first initialization transistor M4 is in the off state, and the write control transistor M2 and threshold compensation transistor M3 are in the on state. The voltage of the data signal line Dj is written as the data voltage to the holding capacitor Cs via the write control transistor M2, the drive transistor M1, and the threshold compensation transistor M3 (see the dotted line path in Figure 20). At this time, the drive transistor M1 is in a diode connection state due to the on state of the threshold compensation transistor M3, so this writing operation holds a voltage in the holding capacitor corresponding to the threshold-compensated data voltage. Subsequently, the write control transistor M2 and the threshold compensation transistor M3 are in the off state, and the power supply transistor M5 and the light emission control transistor M6 are in the on state. A drive current Id corresponding to the voltage held in the holding capacitor Cs is supplied from the drive transistor M1 to the organic EL element OL. The organic EL element OL emits light with a brightness corresponding to its drive current Id. At this time, the holding capacitor Cs holds a data voltage that has been threshold-compensated, so the organic EL element OL emits light with a brightness corresponding to the data voltage supplied from the data signal line Dj during the writing period, regardless of the threshold voltage of the driving transistor M1.

[0174] Thus, when using the internal compensation method pixel circuit 17 as shown in Figure 20, variations and fluctuations in the threshold voltage of the drive transistor M1 can be compensated within the pixel circuit 17. However, variations and fluctuations in other characteristics such as the mobility of the drive transistor cannot be compensated within the pixel circuit 17. In each of the above embodiments, a configuration using such an internal compensation method pixel circuit 17 can be considered. With this configuration, variations and fluctuations in the threshold voltage of the drive transistor can be compensated within the pixel circuit 17, and variations and fluctuations in other characteristics such as the mobility of the drive transistor can be compensated by the external compensation method based on the current measurement operation described above.

[0175] Furthermore, although the above embodiments have been described using organic EL display devices as examples, the present invention is not limited to organic EL display devices, but can be applied to any display device that uses an electric current-driven light-emitting element as a display element. Examples of usable light-emitting elements include organic EL elements, i.e., organic light-emitting diodes (OLEDs), as well as inorganic light-emitting diodes and quantum dot light-emitting diodes (QLEDs).

[0176] Furthermore, the present invention is applicable not only to light-emitting devices that function as display devices using multiple current-driven light-emitting elements, but also to light-emitting devices that function as exposure devices, such as line heads containing multiple current-driven light-emitting elements in electrophotographic printers. Such light-emitting devices will be described below as "other embodiments." Figure 21 is a schematic diagram illustrating a light-emitting device according to such other embodiments, showing a side view of the main part of an electrophotographic printer equipped with an exposure device consisting of a line head (hereinafter referred to as "LED line head") in which LEDs such as OLEDs are arranged in a linear fashion as light-emitting elements. This light-emitting device can also be used as an exposure device in an image forming apparatus that functions as a multifunction device, such as a copier, printer, and facsimile.

[0177] In printers and multifunction devices that use the light-emitting device according to the other embodiment as an exposure device (LED line head), as shown in Figure 21, the device includes an image forming mechanism 500 which comprises a photosensitive drum 517 that has a drum shape and rotates in the direction of the arrow, and an image forming mechanism 500 which includes a developing roller 518, a transfer roller 519, a cleaning device 520, a static elimination device (not shown), a main charging device 521, and an LED line head 522 as an exposure device, arranged around the photosensitive drum 517 along the direction of the arrow.

[0178] The image forming mechanism 500 receives paper from a paper feeding mechanism (not shown) which includes a paper cassette containing the paper and various rollers, etc., through a predetermined transport path 536. After the toner image formed on the photosensitive drum 517 is transferred to the paper in the image forming mechanism 500, the paper is discharged from the image forming mechanism 500 by a paper discharge mechanism (not shown) which includes a paper discharge tray and various rollers, etc. At the upstream end (paper feeding mechanism side) of the transport path 536, a registration roller 543 is provided for aligning the toner image on the photosensitive drum 517 with the paper. At a predetermined position downstream of the transfer roller 519 in the transport path 536, a fixing roller 544 is provided, consisting of a pair of rollers that heat and press the toner image transferred onto the paper. The paper with the transferred toner image is sent to the paper discharge mechanism via this fixing roller 44.

[0179] In the LED line head 522 as a light-emitting device according to this other embodiment, LEDs such as OLEDs as light-emitting elements are arranged in a linear (single-row) configuration, and a pixel circuit including each light-emitting element and a drive transistor that supplies a drive current to it is integrated and incorporated. When the light-emitting elements are arranged in a single row, the scanning-side drive circuit 40 is not required, but the other functional or circuit configurations can be the same as those shown in Figures 1, 2, 4, or 12 and 13. The LED line head 522 may also have a configuration in which LEDs such as OLEDs as light-emitting elements are arranged in multiple rows. Furthermore, for each pixel circuit in the LED line head 522, the pixel current value can be determined by the same procedure as the current measurement mode processing in the third embodiment, and processing for updating correction parameters can be performed similarly based on the pixel current value obtained in this way. In this case, light-emitting data corresponding to the image data Dv1 to be provided to the data-side drive circuit 30 is generated from the light-emitting information corresponding to the image information in the first embodiment, etc., using the correction parameters. In the data-side drive circuit 30, based on this light emission data, data voltages to be supplied to each pixel circuit via data signal lines D1 to Dm are generated.

[0180] According to the other embodiments described above, the pixel current value of each pixel circuit in the LED line head (light-emitting device) 522 as an exposure device (the value of the drive current flowing through the drive transistor in each pixel circuit) can be accurately determined with a simple configuration. Furthermore, by updating the correction parameters based on this pixel current value, variations and fluctuations in element characteristics such as the threshold voltage of the drive transistor in each pixel circuit can be compensated for. As a result, the luminescence brightness of the light-emitting elements included in the LED line head 522 is made uniform, and as a result, the quality of images formed in printers and multifunction devices that use the LED line head 522 as an exposure device can be improved and maintained well.

[0181] Furthermore, any combination of the first to fourth embodiments, the other embodiments, and any modifications thereof may be used, provided that it does not contradict the spirit of the present invention and is not technically inconsistent.

[0182] 11 ... Display unit (light-emitting unit) 15, 16, 17 ... Pixel circuit 20 ... Display control circuit (light-emitting control circuit) 21 ... Ambient temperature sensor 30 ... Data side drive circuit (data signal line drive circuit) 40 ... Scan side drive circuit (scan signal line drive circuit, light-emitting control line drive) 50 ... Power supply circuit 60 ... Current measurement circuit 210 ... Control unit 220 ... RAM 221 ... Correction parameter storage unit 223 ... Measurement data storage unit 250 ... Drive control circuit T1 ... Write control transistor T2 ... Drive transistor T3 ... Light-emitting control transistor T4 ... Monitor control transistor OL ... Organic EL element (OLED) Cs ... Holding capacitor D1 to Dm ... Data signal line SC1 to SCn ... Scan signal line EM1 to EMn ... Light-emitting control line ELVDD ... High-level power line ELVSS ... Low-level power line Imon ... Current monitor line (low-level power line for measurement) TWmk ...Measurement write frame period (k = 1, 2, 3, ...) TMk ...Current measurement frame period (k = 1, 2, 3, ...) Im ...Current measurement value

Claims

1. A light-emitting unit comprising a pixel array consisting of a plurality of pixel circuits arranged in a row or matrix and a power line, a drive circuit for driving the plurality of pixel circuits, a light-emitting control circuit for controlling the drive circuit, and a current measuring circuit for measuring the sum of the currents flowing from the plurality of pixel circuits to the power line, wherein each of the plurality of pixel circuits includes a current-driven light-emitting element, a holding capacitor, and a drive transistor that supplies the light-emitting element with an amount of current corresponding to the voltage held in the holding capacitor by writing a data voltage to the pixel circuit, the drive circuit is configured to control the writing of data voltages to the plurality of pixel circuits and the activation and deactivation of the plurality of pixel circuits on a row-by-row basis, and the light-emitting control circuit is N linearly independent N-dimensional vectors of a number equal to nb × M, which is the product of nb, a natural number predetermined as a divisor of the number of rows n of the pixel array, and M, a natural number of m or more columns which is the number of pixel circuits in one row of the pixel array, where each element of each vector is either "1", "0", or "-1", are selected in advance, and the nb row of the pixel array is designated as the row to be measured, and the nb × m pixel circuits constituting the nb row are corresponding to the nb × m elements in each of the N N-dimensional vectors. After controlling the drive circuit so that for each of the N N-dimensional vectors, an on-time data voltage is written to the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, and an off-time data voltage is written to the pixel circuit corresponding to the "0" element and the "-1" element in the vector among the nb × m pixel circuits, an off-time data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, a positive-side current measurement process is performed to obtain the sum measured by the current measurement circuit as the positive-side current measurement value when the drive circuit is controlled so that the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated,After controlling the drive circuit so that, for each of the N N-dimensional vectors, the on-time data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, and the off-time data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, a negative current measurement process is performed to obtain the sum measured by the current measurement circuit as the negative current measurement value when the drive circuit is controlled so that the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated. A light-emitting device that obtains N differential current values ​​by subtracting N negative current measurements obtained by the negative current measurement process from N positive current measurements obtained by the positive current measurement process for each of the N N-dimensional vectors, and calculates the value of the current that flows from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the row to be measured, from these N differential current values ​​and the inverse matrix of an N-order square matrix in which the N N-dimensional vectors are column vectors or row vectors, as the pixel current value.

2. The light-emitting device according to claim 1, wherein the product of the natural number nb and the column number m is nb × m, which is a power of 2, the natural number M is equal to the column number m, N = nb × m, and the N N-dimensional vectors are column vectors or row vectors of an Adamard matrix of degree N.

3. The product of the natural number nb and the column number m, nb × m, is not a power of 2, but rather the natural number nb is a power of 2. r >When s is the smallest integer r that satisfies nb × m, N = nb × M = 2 s The light-emitting device according to claim 1, wherein the N N-dimensional vectors are column vectors or row vectors of a Hadamard matrix of order N.

4. The light-emitting device according to claim 1, wherein the number N of linearly independent vectors is equal to the product of the natural number nb and the number of columns m, nb × mnb.

5. The pixel array consists of n × m pixel circuits arranged in an n x m matrix, the light-emitting unit further includes n scan signal lines, n light-emitting control lines corresponding to each of the n scan signal lines, and m data signal lines, and is configured to function as a display unit, each of the n × m pixel circuits corresponds to one scan signal line from the n scan signal lines, one light-emitting control line from the n light-emitting control lines, and one data signal line from the m data signal lines, and further includes a write control switching element having a control terminal connected to one scan signal line, and a light-emitting control switching element having a control terminal connected to one light-emitting control line and connected in series with the light-emitting element and the drive transistor, the drive circuit includes a scan signal line drive circuit for driving the n scan signal lines, a light-emitting control line drive for driving the n light-emitting control lines, and a data signal line drive circuit for driving the m data signal lines, the power lines include a first power line and a second power line, and the drive transistor is The light emission control circuit has a control terminal connected to the holding capacitor and connected to the one data signal line via the write control switching element, a first conductive terminal connected to the first power line, and a second conductive terminal connected to the second power line via the light-emitting element, and in the positive current measurement process, for each of the N vectors of the N dimensions, the lighting data voltage is written to the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, and the off data voltage is written to the pixel circuit corresponding to the "0" element and the "-1" element in the vector among the nb × m pixel circuits, and then the scanning signal line drive circuit, data signal line drive circuit, and light emission control line drive circuit are controlled by turning the light emission control switching element on or off so that the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated.In the negative current measurement process, for each of the N column vectors, the lighting data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, and the off-light data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, and then the scanning signal line drive circuit, data signal line drive circuit, and light emission control line drive circuit are controlled by turning the light emission control switching element on or off so that the nb × m pixel circuits constituting the nb row in the pixel array are in an activated state and the pixel circuits constituting rows other than the nb row are in an inactivated state, as described in claim 1.

6. The pixel array consists of n × m pixel circuits arranged in an n x m matrix, the light-emitting unit further includes n scan signal lines, n light-emitting control lines corresponding to each of the n scan signal lines, n monitor control lines corresponding to each of the n scan signal lines, and m data signal lines, and is configured to function as a display unit, each of the n × m pixel circuits corresponds to one scan signal line from the n scan signal lines, one light-emitting control line from the n light-emitting control lines, one monitor control line from the n monitor control lines, and one data signal line from the m data signal lines, and further includes a write control switching element having a control terminal connected to one scan signal line, a light-emitting control switching element having a control terminal connected to one light-emitting control line, and a monitor control switching element having a control terminal connected to one monitor control line, the drive circuit includes a scan signal line drive circuit for driving the n scan signal lines, and a light-emitting control line drive circuit for driving the n light-emitting control lines, The power supply includes a monitor control line drive circuit for driving the n monitor control lines and a data signal line drive circuit for driving the m data signal lines, the power supply includes a first power supply line, a second power supply line, and a current monitor line, the drive transistor has a control terminal connected to the holding capacitor and connected to one data signal line via the write control switching element, a first conductive terminal connected to the first power supply line, and a second conductive terminal connected to the second power supply line via the light emission control switching element and the light-emitting element and connected to the current monitor line via the monitor control switching element, the light emission control circuit isIn the positive current measurement process, the light emission control switching element in each pixel circuit is kept in the off state, and for each of the N N-dimensional vectors, the illumination data voltage is written to the pixel circuit corresponding to the "1" element in that vector among the nb × m pixel circuits, and the deactivation data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "-1" element in that vector among the nb × m pixel circuits. Then, by turning the monitor control switching element on or off, the scan signal line drive circuit, data signal line drive circuit, light emission control line drive circuit, and monitor control line drive circuit are controlled such that the nb × m pixel circuits constituting the nb row in the pixel array are in an activated state and the pixel circuits constituting rows other than the nb row are in an inactivated state. In the negative current measurement process, the light emission control switching element in each pixel circuit is kept in the off state, and for each of the N N-dimensional vectors, the illumination data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, and the deactivation data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, and then the scan signal line drive circuit, data signal line drive circuit, light emission control line drive circuit, and monitor control line drive circuit are controlled by turning the monitor control switching element on or off so that the nb × m pixel circuits constituting the nb row in the pixel array are in an activated state and the pixel circuits other than the nb row are in an inactivated state, as described in claim 1.

7. The light-emitting device according to any one of claims 1 to 6, wherein the natural number nb is 1.

8. The light-emitting control circuit includes a correction parameter storage unit that stores characteristic values ​​of the drive transistors of each pixel circuit in the plurality of pixel circuits as correction parameters, and calculates a data voltage to be written to each pixel circuit in the plurality of pixel circuits from predetermined light-emitting information and the correction parameters stored in the correction parameter storage unit, and controls the drive circuit so that the calculated data voltage is written to each pixel circuit, and performs the positive-side current measurement process and the negative-side current measurement process on the plurality of pixel circuits constituting the pixel array, with nb rows as measurement target rows, and based on the positive-side current measurement value and the negative-side current measurement value obtained, a pixel current value is calculated as the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each pixel circuit in the plurality of pixel circuits, and the correction parameters stored in the correction parameter storage unit are updated with the newly calculated correction parameters, as described in any one of claims 1 to 4.

9. The light-emitting control circuit includes a correction parameter storage unit that stores characteristic values ​​of the drive transistors of each pixel circuit in the n × m pixel circuits as correction parameters, receives an input signal including image information representing an image to be displayed, calculates a data voltage to be written to each pixel circuit in the n × m pixel circuits from the image information and the correction parameters stored in the correction parameter storage unit, controls the drive circuit so that the calculated data voltage is written to each pixel circuit, and performs the positive-side current measurement process and the negative-side current measurement process on the n × m pixel circuits constituting the pixel array, with nb rows as measurement target rows. Based on the positive-side current measurement value and the negative-side current measurement value obtained, the light-emitting control circuit calculates a pixel current value as the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each pixel circuit in the n × m pixel circuits, and updates the correction parameters stored in the correction parameter storage unit with the newly calculated correction parameters, as described in claim 5 or 6.

10. The light-emitting control circuit includes a measurement data storage unit for storing pixel current values ​​for each of the plurality of pixel circuits, and is configured to control the maintenance and interruption of the power supply to the light-emitting device, and when it receives an input signal from the outside including power-off information indicating a power-off operation, it performs the positive-side current measurement process and the negative-side current measurement process on the plurality of pixel circuits constituting the pixel array, treating each of the nb rows as measurement target rows, and calculates the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each pixel circuit in the plurality of pixel circuits as the pixel current value from the N differential current values ​​obtained by the execution of the positive-side current measurement process and the negative-side current measurement process and the inverse matrix of the matrix, stores the calculated pixel current value in the measurement data storage unit, and after the pixel current value has been calculated for each of the plurality of pixel circuits constituting the pixel array and stored in the measurement data storage unit, it interrupts the power supply to the light-emitting device, as described in any one of claims 1 to 4.

11. The natural number nb is 1, and the light emission control circuit is configured to receive an input signal containing image information representing an image to be displayed, and to perform a frame rewriting process which sequentially executes a target row rewriting process for each of the n × m pixel circuits constituting a target row in the pixel array, controlling the drive circuit so that m data voltages corresponding to the image information are written to each of the m pixel circuits constituting a target row, which is one row in the pixel array, one row at a time, and the frame rewriting process includes a current measurement process which, immediately before executing the target row rewriting process for one row in the pixel array, obtains one positive current measurement value and one negative current measurement value by performing the positive current measurement process and the negative current measurement process with one row in each of the N N-dimensional vectors as the target row for measurement, and calculates one differential current value by subtracting the one negative current measurement value from the one positive current measurement value, The light-emitting device according to claim 5 or 6, which functions as a display device, wherein the light-emitting control circuit performs a process for each of the N vectors of the N dimensions to obtain n differential current values ​​corresponding to each of the n rows of the pixel array by performing the frame rewriting process n times while sequentially changing the row to be measured, and calculates the value of the current that flows from each of the n x m pixel circuits to the power line when the lighting data voltage is written to each of the n x m pixel circuits from the n x N differential current values ​​obtained by the process for the N of the N dimensions and the inverse matrix of the matrix, and 12. A light-emitting device having a light-emitting section including a pixel array consisting of a plurality of pixel circuits arranged in a row or matrix and a power line, wherein each of the plurality of pixel circuits includes a current-driven light-emitting element, a holding capacitor, and a drive transistor that supplies an amount of current to the light-emitting element corresponding to the voltage held in the holding capacitor by writing a data voltage to the pixel circuit, a pixel current detection method for detecting the current flowing from each of the plurality of pixel circuits to the power line as a pixel current, comprising: a vector selection step of pre-selecting N linearly independent N-dimensional vectors of a number equal to nb × M, which is the product of a natural number nb predetermined as a divisor of the number of rows n of the pixel array and a natural number M of the number of columns m or more, which is the number of pixel circuits in one row of the pixel array, wherein each element of each vector is either "1", "0", or "-1"; a vector mapping step of assigning the nb row of the pixel array to the nb × m pixel circuits constituting the nb row to the nb × m elements in each of the N N-dimensional vectors, respectively, A positive side measurement writing step, in which, for each of the N N-dimensional vectors, a lighting data voltage is written to the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits, and a deactivation data voltage is written to the pixel circuit corresponding to the "0" element and the "-1" element in the vector among the nb × m pixel circuits, in which the light-emitting element is deactivated; a positive side current measurement step, in which, after the lighting data voltage or the deactivation data voltage has been written to each of the nb × m pixel circuits in the positive side measurement writing step, the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated, and the sum of the currents flowing from the plurality of pixel circuits to the power line is measured and obtained as a positive side current value;A negative side measurement writing step in which, for each of the N N-dimensional vectors, the on-time data voltage is written to the pixel circuit corresponding to the "-1" element in the vector among the nb × m pixel circuits, and the off-time data voltage is written to the pixel circuit corresponding to the "0" element and the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits; after the on-time data voltage or the off-time data voltage has been written to each of the nb × m pixel circuits by the negative side measurement writing step, the nb × m pixel circuits constituting the nb row in the pixel array are set to an activated state and the pixel circuits constituting rows other than the nb row are set to an inactive state, and the sum of the currents flowing from the plurality of pixel circuits to the power line is measured and obtained as a negative side current value; A pixel current detection method comprising: a pixel current calculation step, which calculates N differential current values ​​by subtracting N negative current values ​​obtained by the negative current measurement step from N positive current values ​​obtained by the negative current measurement step for each of the N N-dimensional vectors; and a pixel current calculation step, which calculates the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the row to be measured, as the pixel current value, from the N differential current values ​​and the inverse matrix of an N-order square matrix in which the N N-dimensional vectors are column vectors or row vectors.

13. The pixel current detection method according to claim 12, wherein the product of the natural number nb and the column number m, nb × m, is a power of 2, the natural number M is equal to the column number m, N = nb × m, and the N N-dimensional vectors are column vectors or row vectors of an N-th order Hadamard matrix.

14. The multiplication value nb × m is not a power of 2, but the natural number nb is a power of 2. r >When s is the smallest integer r that satisfies nb × m, N = nb × M = 2 s The pixel current detection method according to claim 12, wherein the N N-dimensional vectors are column vectors or row vectors of an N-th order Hadamard matrix.

15. The pixel current detection method according to claim 12, wherein the number N of linearly independent vectors is equal to the product of the natural number nb and the number of columns m, nb × mnb.

16. The pixel current detection method according to any one of claims 12 to 15, wherein the natural number nb is 1.

17. A light-emitting device having a light-emitting section including a pixel array consisting of a plurality of pixel circuits arranged in a row or matrix and a power line, wherein each of the n × m pixel circuits includes a current-driven light-emitting element, a holding capacitor, and a drive transistor that supplies the light-emitting element with an amount of current corresponding to the voltage held in the holding capacitor by writing a data voltage to the pixel circuit, a pixel current detection method for detecting the current flowing from each of the plurality of pixel circuits to the power line as a pixel current, comprising: a vector selection step of pre-selecting N linearly independent N-dimensional vectors of a number equal to nb × M, which is the product of a natural number nb, a predetermined natural number that is a divisor of the number of rows n of the pixel array, and a natural number M that is the number of columns m or more, which is the number of pixel circuits in one row of the pixel array, and each element of each vector being either "1" or "0",; a vector mapping step of assigning the nb × m pixel circuits constituting the nb row of the pixel array to the nb × m elements in each of the N N-dimensional vectors, with the nb row of the pixel array being the row to be measured; A measurement writing step in which, for each of the N N-dimensional vectors, an illumination data voltage is written to the pixel circuit corresponding to the "1" element in the vector among the nb × m pixel circuits to illuminate the light-emitting element, and an illumination data voltage is written to the pixel circuit corresponding to the "0" element in the vector among the nb × m pixel circuits to deactivate the light-emitting element; after the illumination data voltage or the illumination data voltage has been written to each of the nb × m pixel circuits in the measurement writing step, the nb × m pixel circuits constituting the nb row in the pixel array are activated and the pixel circuits constituting rows other than the nb row are deactivated, and the sum of the currents flowing from the plurality of pixel circuits to the power line is measured and obtained as a current measurement value;A pixel current detection method comprising: a pixel current calculation step, which calculates the value of the current flowing from each pixel circuit to the power line when the lighting data voltage is written to each of the nb × m pixel circuits constituting the row to be measured, as the pixel current value, from the N current measurement values ​​obtained by the current measurement step for the N N-dimensional vectors and the inverse matrix of an N-order square matrix in which the N N-dimensional vectors are column vectors or row vectors.

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