Power conditioner

Abstract

When the AC side of an inverter is unbalanced, this power conditioner calculates a three-phase voltage command value for controlling the inverter on the basis of a current command value that is obtained by adding a three-phase negative-phase-sequence current command value to a three-phase positive-phase-sequence current command value generated on the basis of a predetermined parameter. When the output current on the AC side of the inverter is less than a first threshold value, the power conditioner calculates a three-phase negative-phase-sequence current command value on the basis of a d-axis negative-phase-sequence current command that is obtained by causing a d-axis negative-phase-sequence voltage to follow a predetermined value and a q-axis negative-phase-sequence current command that is obtained by causing a q-axis negative-phase-sequence reversal voltage obtained by reversing a q-axis negative-phase-sequence voltage to follow a predetermined value. When the output current on the AC side of the inverter is equal to or greater than the first threshold value, the power conditioner calculates a three-phase negative-phase-sequence current command value on the basis of a d-axis negative-phase-sequence current command that is obtained by setting a d-axis negative-phase-sequence voltage to zero and causing the d-axis negative-phase-sequence voltage to follow a predetermined value and a q-axis negative-phase-sequence current command that is obtained by setting a q-axis negative-phase-sequence reversal voltage to zero and causing the q-axis negative-phase-sequence reversal voltage to follow a predetermined value.

Description

Power conditioner

[0001] This disclosure relates to a technique for controlling a power conditioner.

[0002] Patent Document 1 discloses a power conversion device (power conditioner). Specifically, when the reverse voltage on the AC side of the inverter is greater than or equal to a predetermined value, the power conditioner determines that the inverter is operating alone and controls the inverter to stop.

[0003] Japanese Patent No. 7151911

[0004] By the way, when the AC side of the inverter becomes unbalanced, voltage unbalance in the power system may occur. In this case, it may affect the operation of electrical equipment such as generators (motors) and inverters connected to the power system, and there is a risk that the power conversion system cannot operate stably.

[0005] One object of this disclosure is to provide a power conditioner that can stably operate a power conversion system when the AC side of the inverter becomes unbalanced.

[0006] One aspect of this disclosure relates to a power conditioner. The power conditioner comprises an inverter that converts DC power supplied from a DC power source into AC power and supplies AC power to a power grid, and a controller that controls the inverter. The controller calculates the d-axis positive-sequence voltage, d-axis negative-sequence voltage and q-axis negative-sequence voltage based on the AC output voltage of the inverter, and calculates the d-axis positive-sequence current and d-axis negative-sequence current based on the AC output current of the inverter. The controller also determines whether the AC side of the inverter is unbalanced based on the d-axis positive-sequence voltage, d-axis positive-sequence current, d-axis negative-sequence voltage and d-axis negative-sequence current. If the AC side of the inverter is determined to be unbalanced, the controller calculates a three-phase voltage command value for controlling the inverter based on a current command value obtained by adding a three-phase negative-sequence current command value to a three-phase positive-sequence current command value generated based on predetermined parameters. If the AC output current of the inverter is less than the first threshold, the controller calculates the three-phase reverse-phase current command value based on the d-axis reverse-phase current command obtained by making the q-axis reverse-phase inverted voltage (obtained by inverting the q-axis reverse-phase voltage) track a predetermined value, and the q-axis reverse-phase current command obtained by making the d-axis reverse-phase voltage track a predetermined value. If the AC output current of the inverter is equal to or greater than the first threshold, the controller calculates the three-phase reverse-phase current command value based on the d-axis reverse-phase current command obtained by making the q-axis reverse-phase inverted voltage zero and track a predetermined value, and the q-axis reverse-phase current command obtained by making the d-axis reverse-phase voltage zero and track a predetermined value.

[0007] According to this disclosure, whether the AC side of the inverter is unbalanced is determined based on the d-axis positive-sequence voltage, d-axis positive-sequence current, d-axis negative-sequence voltage, and d-axis negative-sequence current. If the AC side of the inverter is determined to be unbalanced, a three-phase voltage command value for controlling the inverter is calculated based on a current command value obtained by adding a three-phase negative-sequence current command value to a three-phase positive-sequence current command value generated based on predetermined parameters. If the output current on the AC side of the inverter is less than a first threshold, a three-phase negative-sequence current command value is calculated based on a d-axis negative-sequence current command obtained by making the q-axis negative-sequence inverted voltage (obtained by inverting the q-axis negative-sequence voltage) follow a predetermined value, and a q-axis negative-sequence current command obtained by making the d-axis negative-sequence voltage follow a predetermined value. When the AC output current of the inverter exceeds a first threshold, the three-phase reverse-phase current command value is calculated based on the d-axis reverse-phase current command obtained by setting the q-axis reverse-phase inversion voltage to zero and tracking a predetermined value, and the q-axis reverse-phase current command obtained by setting the d-axis reverse-phase voltage to zero and tracking a predetermined value. As a result, when the AC side of the inverter is unbalanced, control is performed to suppress voltage imbalance in the power system. Furthermore, control is performed to prevent overcurrent caused by the occurrence of voltage imbalance. Therefore, the power conversion system can be operated stably without affecting the operation of electrical equipment connected to the power system.

[0008] This is a diagram illustrating the outline of a power conversion system according to an embodiment. This is a block diagram showing an example of the function of a controller according to an embodiment. This is a block diagram showing a specific example of a voltage unbalance suppression control unit according to an embodiment. This is a block diagram showing a specific example of an unbalance determination unit according to an embodiment. This is a diagram illustrating an example of processing results when an unbalanced load is applied according to an embodiment. This is a diagram illustrating an example of processing results when an unbalanced load is applied according to an embodiment.

[0009] A power conditioner according to an embodiment of the present disclosure will be described with reference to the attached drawings. In addition, elements common to each figure are denoted by the same reference numerals, and redundant explanations are omitted.

[0010] 1. Diagram 1 of the power conversion system is a diagram illustrating the outline of the power conversion system 1 according to an embodiment. The power conversion system 1 includes a DC power supply 11, a power conditioner 10, a transformer 20, a power grid 30, a circuit breaker 40, and an unbalanced load 50. The power conditioner 10 is configured to include an inverter 12 and a controller 100. The unbalanced load 50 includes three loads (Ra, Rb, Rc). Loads Ra, Rb, and Rc are configured such that, for example, the potential differences generated across the ends of the loads are different for each. The unbalanced load 50 is, for example, a generator.

[0011] The DC power supply 11 is an energy storage device (e.g., a solar cell module) that stores electricity generated from renewable energy sources. Examples of renewable energy sources include solar power, wind power, hydropower, etc.

[0012] The inverter 12 is a device that converts the DC power output from the DC power supply 11 into AC power and supplies the AC power to the power grid 30 via the transformer 20. The inverter 12 is, for example, a voltage-controlled GFM (Grid Forming) inverter.

[0013] The controller 100 is connected to the inverter 12 and controls the inverter 12. The controller 100 receives the output voltage Vs and output current Io from the inverter 12 as inputs. The output voltage Vs consists of three phase voltages (Vsu, Vsv, Vsw), and the output current Io consists of three phase currents (Iou, Iov, Iow). The output voltage Vs input to the controller 100 is, for example, the detected value of the output voltage Vs (also referred to as the Vs detected value). The output current Io input to the controller 100 is the detected value of the output current Io (also referred to as the Io detected value). The Vs detection value includes the Vsu detection value, which is the U-phase detection value of the output voltage Vs; the Vsv detection value, which is the V-phase detection value of the output voltage Vs; and the Vsw detection value, which is the W-phase detection value of the output voltage Vs. The Io detection value includes the Iou detection value, which is the U-phase detection value of the output current Io; the Iov detection value, which is the V-phase detection value of the output current Io; and the Iow detection value, which is the W-phase detection value of the output current Io. These detection values ​​are detected, for example, by a detector (not shown) provided between the inverter 12 and the transformer 20. The output voltage Vs may also include a positive-sequence voltage Vps and a negative-sequence voltage Vns, and the output current Io may include a positive-sequence current Ipo and a negative-sequence current Ino.

[0014] Based on the detected Vs value and Io value, the controller 100 generates a pulse-width modulation signal (PWM signal) to control the output voltage Vs of the inverter 12, and outputs the PWM signal to the inverter 12 so that it operates according to the PWM signal.

[0015] Let's consider the case where the AC side of inverter 12 becomes unbalanced. One example of a case where the AC side of inverter 12 becomes unbalanced is when an unbalanced load 50 is connected to the AC side (grid side) of inverter 12 via circuit breaker 40. In this case, the three-phase voltages (Vsu, Vsv, Vsw) will not be equal, resulting in an unbalanced state. This state is called "voltage unbalance". Also, when the AC side of inverter 12 is unbalanced, the reverse-phase voltage Vns increases. As the reverse-phase voltage Vns increases, the reverse-phase current Io also increases, and it is expected that the output current Io of inverter 12 will exceed the overcurrent threshold. In this case, the AC side of inverter 12 will be overcurrent.

[0016] As described above, when an unbalanced load 50 is applied to the AC side of the inverter 12, the AC side of the inverter 12 becomes voltage unbalanced. Furthermore, the occurrence of voltage unbalance may cause overcurrent on the AC side of the inverter 12. Therefore, the power conditioner 10 (controller 100) performs control to suppress both voltage unbalance and overcurrent when the AC side of the inverter 12 is unbalanced. The details of the controller 100 will be described below.

[0017] 2. Controller 2-1. Example Configuration The controller 100 has hardware that implements various functions. The hardware includes processing circuits capable of high-speed calculations. Examples of processing circuits include FPGAs (Field Programmable Gate Arrays) and ASICs (Application Specific Integrated Circuits). In addition to processing circuits, the hardware may also include a memory device and an arithmetic unit (e.g., CPU) that executes programs stored in the memory device.

[0018] 2-2. Functional Example Figure 2 is a block diagram showing a functional example of the controller 100 according to the embodiment. The controller 100 includes a dq-axis positive-sequence voltage calculation unit 111, a dq-axis negative-sequence voltage calculation unit 112, a dq-axis positive-sequence current calculation unit 113, a dq-axis negative-sequence current calculation unit 114, an unbalance determination unit 120, a voltage unbalance suppression control unit 130, a VSG control unit 140, a voltage adjustment unit 150, a voltage control unit 160, a dq / abc-axis conversion unit 170, a current control unit 180, and a PWM control unit 190.

[0019] The dq-axis positive-sequence voltage calculation unit 111 calculates the positive-sequence voltage of the dq axis based on the detected Vs value. The positive-sequence voltage of the dq axis includes the d-axis positive-sequence voltage Vpd and the q-axis positive-sequence voltage Vpq. The dq-axis positive-sequence voltage calculation unit 111 outputs the d-axis positive-sequence voltage Vpd to the unbalance determination unit 120. The d-axis positive-sequence voltage Vpd and the q-axis positive-sequence voltage Vpq calculated by the dq-axis positive-sequence voltage calculation unit 111 can be expressed, for example, by the following equation (1).

[0020]

[0021] The dq-axis reverse-phase voltage calculation unit 112 calculates the reverse-phase voltage of the dq axis based on the detected Vs value. The reverse-phase voltage of the dq axis includes the d-axis reverse-phase voltage Vnd and the q-axis reverse-phase voltage Vnq. The dq-axis reverse-phase voltage calculation unit 112 outputs the d-axis reverse-phase voltage Vnd and the q-axis reverse-phase voltage Vnq to the unbalance determination unit 120. The dq-axis reverse-phase voltage calculation unit 112 also outputs the d-axis reverse-phase voltage Vnd and the q-axis reverse-phase voltage Vnq to the voltage unbalance suppression control unit 130. The d-axis reverse-phase voltage Vnd and the q-axis reverse-phase voltage Vnq calculated by the dq-axis reverse-phase voltage calculation unit 112 can be expressed, for example, by the following equation (2).

[0022]

[0023] The dq-axis positive-sequence current calculation unit 113 calculates the dq-axis positive-sequence current based on the Io detection value. The dq-axis positive-sequence current includes the d-axis positive-sequence current Ipd and the q-axis positive-sequence current Ipq (not shown). The dq-axis positive-sequence current calculation unit 113 outputs the d-axis positive-sequence current Ipd to the unbalance determination unit 120. The d-axis positive-sequence current Ipd and the q-axis positive-sequence current Ipq calculated by the dq-axis positive-sequence current calculation unit 113 can be expressed, for example, by the following equation (3).

[0024]

[0025] The dq-axis reverse-phase current calculation unit 114 calculates the dq-axis reverse-phase current based on the detected Io value. The dq-axis reverse-phase current includes the d-axis reverse-phase current Ind and the q-axis reverse-phase current Inq (not shown). The dq-axis reverse-phase current calculation unit 114 outputs the d-axis reverse-phase current Ind to the unbalance determination unit 120. The d-axis reverse-phase current Ind and q-axis reverse-phase current Inq calculated by the dq-axis reverse-phase current calculation unit 114 can be expressed, for example, by the following equation (4).

[0026]

[0027] Furthermore, the Vs detection value input to the dq-axis positive-sequence voltage calculation unit 111 and the dq-axis negative-sequence voltage calculation unit 112 may be acquired, for example, via a PLL (Phase Locked Loop) provided in the controller 100. A PLL is a circuit that synchronizes the phase of the input voltage signal and the output voltage signal. This allows the phase of the Vs detection value and the output voltage Vs of the inverter 12 to be synchronized, and the inverter 12 and the power system 30 to be properly connected.

[0028] The unbalance determination unit 120 determines whether the AC side (power system 30) of the inverter 12 is unbalanced or not based on the d-axis positive-sequence voltage Vpd, the d-axis negative-sequence voltage Vnd, the d-axis positive-sequence current Ipd, and the d-axis negative-sequence current Ind. If the AC side of the inverter 12 is determined to be unbalanced, the unbalance determination unit 120 outputs a control start flag flg, which indicates a flag for starting control, to the voltage unbalance suppression control unit 130, with the flag enabled. If the AC side of the inverter 12 is determined to be not unbalanced, that is, if the AC side of the inverter 12 is determined to be balanced, the unbalance determination unit 120 outputs a control start flag flg to the voltage unbalance suppression control unit 130, with the flag disabled. When the control start flag flg is enabled, it means that the AC side of the inverter 12 is unbalanced, that is, a voltage unbalance has occurred. On the other hand, when the control start flag flg is disabled, it means that the AC side of the inverter 12 is balanced, that is, a voltage unbalance has not occurred. Details of the imbalance determination unit 120 will be described later.

[0029] The voltage unbalance suppression control unit 130 executes control to suppress voltage unbalance when the control start flag flg is enabled. If the control start flag flg is disabled, the voltage unbalance suppression control unit 130 does not execute control to suppress voltage unbalance. When executing control to suppress voltage unbalance, the voltage unbalance suppression control unit 130 calculates the three-phase reverse-phase current command value In_uvw based on the detected Io value, the d-axis reverse-phase voltage Vnd, and the q-axis reverse-phase voltage Vnq. The three-phase reverse-phase current command value In_uvw is one of the command values ​​for correcting the reverse-phase voltage Vns to suppress voltage unbalance. Details of the voltage unbalance suppression control unit 130 will be described later.

[0030] The VSG control unit 140 performs VSG (Virtual Synchronous Generator) control. VSG is one example of a method for stabilizing the power system 30, and is a virtual synchronous generator that simulates the dynamic characteristics of a synchronous generator in the inverter 12. In other words, the VSG control unit 140 controls the virtual synchronous generator. The VSG control unit 140 calculates the phase command value θref of the output voltage Vs of the inverter 12 using parameters that represent the dynamic characteristics of the generator. Examples of such parameters include the inertia constant M and the damping constant D.

[0031] The voltage adjustment unit 150 has the function of stabilizing the output voltage Vs of the inverter 12. For example, if the unbalanced load 50 or the power system 30 fluctuates, the voltage adjustment unit 150 performs voltage adjustment to stabilize the output voltage Vs of the inverter 12. The voltage adjustment unit 150 is, for example, an AVR (Automatic Voltage Regulator). In order to stabilize the output voltage Vs of the inverter 12, the voltage adjustment unit 150 calculates the d-axis voltage command value Vdref and the q-axis voltage command value Vqref, respectively. In the example shown in Figure 2, the q-axis voltage command value Vqref is set to zero.

[0032] The voltage control unit 160 generates a d-axis positive-sequence current command value Ipd_ref and a q-axis positive-sequence current command value Ipq_ref based on predetermined parameters. The predetermined parameters include a phase command value θref, a d-axis voltage command value Vdref, and a q-axis voltage command value Vqref. If the q-axis voltage command value Vqref is zero, the q-axis positive-sequence current command value Ipq_ref becomes zero.

[0033] The dq / abc axis conversion unit 170 generates a three-phase positive-sequence current command value Ip_uvw based on the d-axis positive-sequence current command value Ipd_ref and the q-axis positive-sequence current command value Ipq_ref. Specifically, the three-phase positive-sequence current command value Ip_uvw is obtained by converting the d-axis positive-sequence current command value Ipd_ref and the q-axis positive-sequence current command value Ipq_ref to the abc axes.

[0034] The current control unit 180 calculates a voltage command value Vref for controlling the output current Io of the inverter 12 based on a current command value Iins obtained by adding the three-phase negative-sequence current command value In_uvw to the three-phase positive-sequence current command value Ip_uvw. The current control unit 180 is also called a current minor loop. The voltage command value Vref is a three-phase component and is also called the three-phase voltage command value Vref. By injecting the three-phase negative-sequence current command value In_uvw into the three-phase positive-sequence current command value Ip_uvw, the negative-sequence voltage Vns is corrected and voltage imbalance can be suppressed.

[0035] The PWM control unit 190 generates a PWM signal for controlling the inverter 12 based on the voltage command value Vref.

[0036] 2-3. Specific Example of Voltage Unbalance Suppression Control Unit Figure 3 is a block diagram showing a specific example of a voltage unbalance suppression control unit 130 according to an embodiment. The voltage unbalance suppression control unit 130 includes a reverse-phase voltage correction stop determination unit 131, an inversion unit 132, a first proportional control unit 133, a second proportional control unit 134, and a dq / abc axis conversion unit 135.

[0037] The reverse-phase voltage correction stop determination unit 131 corrects the reverse-phase voltage Vns in order to suppress overcurrent associated with reverse-phase voltage correction. Specifically, the reverse-phase voltage correction stop determination unit 131 determines whether the detected Io value is less than the first threshold TH1. If the detected Io value is determined to be less than the first threshold TH1, the reverse-phase voltage correction stop determination unit 131 enables and outputs the determination value S_flg. If the detected Io value is determined to be greater than or equal to the first threshold TH1, that is, if the detected Io value is determined to be greater than or equal to the first threshold TH1, the reverse-phase voltage correction stop determination unit 131 disables (sets to zero) the determination value S_flg and outputs it.

[0038] Let's consider the first threshold TH1. For example, if the three-phase current (Iou, Iov, Iow) exceeds the overcurrent threshold, an overcurrent occurs. Therefore, the first threshold TH1 is set to a predetermined current (e.g., the overcurrent threshold). One example of the first threshold TH1 is 130%.

[0039] The inversion unit 132 inverts the input q-axis inverted voltage Vnq and outputs the q-axis inverted voltage Vnq_inv.

[0040] The first proportional control unit 133 causes the d-axis reverse voltage compensation Vnd_c obtained by multiplying the q-axis reverse-inverted voltage Vnq_inv by the determination value S_flg to follow a predetermined value, and generates a d-axis reverse current command In_d. The predetermined value is, for example, zero. The first proportional control unit 133 may be a PI controller.

[0041] For example, when the determination value S_flg is valid, the d-axis reverse voltage Vnd is set as the d-axis reverse voltage compensation Vnd_c. In this case, the first proportional control unit 133 generates a d-axis reverse current command In_d so that the q-axis reverse-inverted voltage Vnq_inv, which is the d-axis reverse voltage compensation Vnd_c, follows a predetermined value (e.g., zero).

[0042] As another example, when the determination value S_flg is invalid (zero), zero is set as the d-axis reverse voltage compensation Vnd_c. In this case, zero is input to the first proportional control unit 133, and the first proportional control unit 133 causes the d-axis reverse voltage compensation Vnd_c to follow the predetermined value as zero. When the predetermined value is zero, the d-axis reverse current command In_d output from the first proportional control unit 133 maintains the state of the d-axis reverse current command In_d immediately before the determination value S_flg becomes invalid. Thereby, the output current Io becomes less than a predetermined current (e.g., overcurrent threshold value), and overcurrent can be suppressed.

[0043] The second proportional control unit 134 causes the q-axis reverse voltage compensation Vnq_c obtained by multiplying the d-axis reverse voltage Vnd by the determination value S_flg to follow a predetermined value, and generates a q-axis reverse current command In_q. The predetermined value is, for example, zero. The second proportional control unit 134 may be a PI controller.

[0044] For example, when the determination value S_flg is valid, the q-axis reverse-inverted voltage Vnq_inv is set as the q-axis reverse voltage compensation Vnq_c. In this case, the second proportional control unit 134 generates a q-axis reverse current command In_q so that the d-axis reverse voltage Vnd, which is the q-axis reverse voltage compensation Vnq_c, follows a predetermined value (e.g., zero).

[0045] As another example, when the determination value S_flg is invalid (zero), zero is set for the q-axis reverse voltage compensation Vnq_c. In this case, zero is input to the second proportional control unit 134, and the second proportional control unit 134 causes the q-axis reverse voltage compensation Vnq_c to follow a predetermined value as zero. When the predetermined value is zero, the q-axis reverse current command In_q output from the second proportional control unit 134 maintains the state of the q-axis reverse current command In_q immediately before the determination value S_flg becomes invalid. Thereby, the output current Io becomes less than a predetermined current (e.g., overcurrent threshold value), and overcurrent can be suppressed.

[0046] The dq / abc axis conversion unit 135 generates a reverse current command value In_uvw for the dq axes based on the d-axis reverse current command In_d and the q-axis reverse current command In_q. Specifically, the three-phase reverse current command value In_uvw is obtained by converting the d-axis reverse current command In_d and the q-axis reverse current command In_q to the abc axes.

[0047] 2-4. Specific Example of Unbalance Determination Unit FIG. 4 is a block diagram showing a specific example of the unbalance determination unit 120 according to the embodiment. The unbalance determination unit 120 includes a positive-phase impedance calculation unit 121, a reverse-phase impedance calculation unit 122, a reverse-phase voltage calculation unit 123, and a balance suppression start determination unit 124.

[0048] The positive-phase impedance calculation unit 121 calculates a positive-phase impedance Rp based on the d-axis positive-phase voltage Vpd and the d-axis positive-phase current Ipd. Specifically, the positive-phase impedance Rp is obtained by dividing the d-axis positive-phase voltage Vpd by the d-axis positive-phase current Ipd.

[0049] The reverse-phase impedance calculation unit 122 calculates a reverse-phase impedance Rn based on the d-axis reverse-phase voltage Vnd and the d-axis reverse-phase current Ind. Specifically, the reverse-phase impedance Rn is obtained by dividing the d-axis reverse-phase voltage Vnd by the d-axis reverse-phase current Ind.

[0050] The reverse-phase voltage calculation unit 123 calculates the reverse-phase voltage Vn_dq of the dq axis based on the reverse-phase voltage Vnd of the d axis and the reverse-phase voltage Vnq of the q axis. The reverse-phase voltage Vn_dq of the dq axis is expressed in a dq-axis coordinate system in which, for example, the reverse-phase voltage Vnd of the d axis is taken as the real axis and the reverse-phase voltage Vnq of the q axis is taken as the imaginary axis. For example, the reverse-phase voltage Vn_dq of the dq axis is expressed by the following equation (5).

[0051]

[0052] The balance suppression start determination unit 124 generates a control start flag flg based on the positive-sequence impedance Rp, the negative-sequence impedance Rn, and the negative-sequence voltage Vn_dq of the dq axis. Specifically, the balance suppression start determination unit 124 includes a first unbalance determination unit 125, a second unbalance determination unit 126, an AND circuit unit 127, and a delay circuit unit 128.

[0053] The first unbalance determination unit 125 determines whether the AC side (power system 30) of the inverter 12 is unbalanced or not based on the positive-sequence impedance Rp and the negative-sequence impedance Rn. Specifically, the first unbalance determination unit 125 calculates the differential impedance, which is the difference between the positive-sequence impedance Rp and the negative-sequence impedance Rn. Then, the first unbalance determination unit 125 determines whether the absolute value of the differential impedance is greater than the second threshold TH2. If it is determined that the absolute value of the differential impedance is greater than the second threshold TH2, the first unbalance determination unit 125 outputs the first determination value flg1 as 1. If it is determined that the absolute value of the differential impedance is less than or equal to the second threshold TH2, the first unbalance determination unit 125 outputs the first determination value flg1 as 0 (zero).

[0054] Let's consider the second threshold TH2. For example, if the AC side of inverter 12 is unbalanced, the positive-sequence impedance Rp and the negative-sequence impedance Rn are expressed by the relationship Rp ≠ Rn. Therefore, the second threshold TH2 is set to a value that indicates that the absolute value of the differential impedance (the difference between the positive-sequence impedance Rp and the negative-sequence impedance Rn) is unbalanced. One example of the second threshold TH2 is 10%.

[0055] The second unbalance determination unit 126 determines whether the AC side of the inverter 12 (power system 30) is unbalanced based on the reverse-phase voltage Vn_dq of the dq axis. Specifically, the second unbalance determination unit 126 determines whether the reverse-phase voltage Vn_dq of the dq axis is greater than the third threshold TH3. If it is determined that the reverse-phase voltage Vn_dq of the dq axis is greater than the third threshold TH3, the second unbalance determination unit 126 outputs the second determination value flg2 as 1. If it is determined that the reverse-phase voltage Vn_dq of the dq axis is less than or equal to the third threshold TH3, the second unbalance determination unit 126 outputs the second determination value flg2 as 0 (zero).

[0056] Let's consider the third threshold TH3. For example, if the AC side of inverter 12 is unbalanced, the reverse-phase voltage Vn_dq on the dq axis will rise. Therefore, the third threshold TH3 is set to a value that indicates the reverse-phase voltage Vn_dq on the dq axis is unbalanced. One example of the third threshold TH3 is 4%.

[0057] The AND circuit section 127 is a circuit that generates an output value flg3 by multiplying a first determination value flg1 and a second determination value flg2. For example, if both the first determination value flg1 and the second determination value flg2 are 1, the output value flg3 will be 1. If at least one of the first determination value flg1 and the second determination value flg2 is 0 (zero), the output value flg3 will be 0 (zero). When the output value flg3 is 1, the output value flg3 is a signal indicating that the AC side of the inverter 12 is unbalanced. When the output value flg3 is 0 (zero), the output value flg3 is a signal indicating that the AC side of the inverter 12 is not unbalanced.

[0058] The delay circuit section 128 is a circuit that delays the output value flg3 and outputs a control start flag flg. The delay circuit section 128 is, for example, a delay element. The delay circuit section 128 applies a delay of, for example, several milliseconds. In other words, the controller 100 (balance suppression start determination section 124) determines that the AC side of the inverter 12 is unbalanced if the absolute value of the differential impedance is greater than the second threshold TH2 and the inverse phase voltage Vn_dq of the dq axis is greater than the third threshold TH3 for a certain period of time. This makes it possible to determine whether the AC side of the inverter 12 is unbalanced or not and then enable the control start flag flg, thereby preventing misdetermination.

[0059] Furthermore, the reverse-phase voltage Vn_dq of the dq axis used in the unbalance determination unit 120 may be the reverse-phase voltage Vns. In this case, the same processing can be achieved by replacing "reverse-phase voltage Vn_dq of the dq axis" with "reverse-phase voltage Vn" as described above.

[0060] 3. Examples of Processing Results Figures 5 and 6 are diagrams illustrating examples of processing results when an unbalanced load 50 is applied according to the embodiment. For example, if the unbalanced load 50 applied to the AC side of the inverter 12 is composed of load Ra ≠ load Rb ≠ load Rc, the AC side of the inverter 12 will be in an unbalanced state. In this case, as shown in Figure 5, the d-axis reverse-phase voltage Vnd and the q-axis reverse-phase voltage Vnq will rise. Subsequently, the control start flag flg becomes 1 (enabled), and the voltage unbalance suppression control unit 130 is executed. This performs control to correct the reverse-phase voltage of the dq axis. Therefore, as shown in Figure 6, the voltage unbalance in the three-phase voltage (Vsu, Vsv, Vsw) is suppressed, and the unbalanced state is improved.

[0061] Furthermore, if the three-phase currents (Iou, Iov, Iow) in the output current Io are greater than the first threshold TH1, the judgment value S_flg becomes invalid. In this case, the judgment value S_flg may also be invalidated if one of the three-phase currents (Iou, Iov, Iow) is greater than the first threshold TH1. In the example shown in Figure 5, the output current Iou becomes greater than the first threshold TH1 (e.g., 130%). In this case, the d-axis reverse-phase current command In_d is maintained at the d-axis reverse-phase current command In_d just before the judgment value S_flg becomes invalid, and the d-axis reverse-phase voltage Vnd is also maintained at the d-axis reverse-phase voltage Vnd just before the judgment value S_flg becomes invalid. Furthermore, by maintaining the q-axis reverse-sequence current command In_q at the level just before the judgment value S_flg becomes invalid, the q-axis reverse-sequence voltage Vnq is also maintained at the level just before the judgment value S_flg becomes invalid. This makes it possible to prevent the output current Io of the inverter 12 from falling below a predetermined current (e.g., overcurrent threshold) and to suppress overcurrent on the AC side of the inverter 12.

[0062] 4. Effects: The power conditioner 10 (controller 100) determines whether the AC side of the inverter 12 is unbalanced based on the d-axis positive-sequence voltage Vpd, the d-axis positive-sequence current Ipd, the d-axis negative-sequence voltage Vnd, and the d-axis negative-sequence current Ind. If the AC side of the inverter 12 is determined to be unbalanced, a three-phase voltage command value Vref for controlling the inverter 12 is calculated based on a current command value Iins obtained by adding the three-phase negative-sequence current command value In_uvw to the three-phase positive-sequence current command value Ip_uvw, which is generated based on predetermined parameters. If the AC output current Io of the inverter 12 is less than the first threshold TH1, the three-phase reverse-phase current command value In_uvw is calculated based on the d-axis reverse-phase current command In_d, which is obtained by making the q-axis reverse-phase inverted voltage Vnq_inv (obtained by inverting the q-axis reverse-phase voltage) follow a predetermined value, and the q-axis reverse-phase current command In_q, which is obtained by making the d-axis reverse-phase voltage Vnd follow a predetermined value. If the AC output current Io of the inverter 12 is greater than or equal to the first threshold TH1, the three-phase reverse-phase current command value In_uvw is calculated based on the d-axis reverse-phase current command In_d, which is obtained by setting the q-axis reverse-phase inverted voltage Vnq_inv to zero and making it follow a predetermined value, and the q-axis reverse-phase current command In_q, which is obtained by setting the d-axis reverse-phase voltage Vnd to zero and making it follow a predetermined value. As a result, if the AC side of the inverter 12 is unbalanced, control is performed to suppress voltage imbalance on the AC side of the inverter 12. Furthermore, control is implemented to prevent overcurrent caused by voltage imbalance. Therefore, the power conversion system 1 can be operated stably without affecting the operation of electrical equipment such as generators (motors) and inverters 12 connected to the power grid 30.

[0063] 1...Power conversion system, 10...Power conditioner, 11...DC power supply, 12...Inverter, 20...Transformer, 30...Power grid, 40...Circuit breaker, 50...Unbalanced load, 100...Controller

Claims

1. An inverter that converts DC power supplied from a DC power source into AC power and supplies the AC power to a power system; and a controller that controls the inverter, wherein the controller calculates the d-axis reverse-sequence voltage and the q-axis reverse-sequence voltage based on the AC output voltage of the inverter; calculates the d-axis positive-sequence voltage based on the AC output voltage of the inverter; calculates the d-axis positive-sequence current based on the AC output current of the inverter; calculates the d-axis reverse-sequence current based on the AC output current of the inverter; determines whether the AC side of the inverter is unbalanced based on the d-axis positive-sequence voltage, the d-axis positive-sequence current, the d-axis reverse-sequence voltage, and the d-axis reverse-sequence current; and if the AC side of the inverter is determined to be unbalanced, calculates a three-phase voltage command value for controlling the inverter based on a current command value obtained by adding a three-phase reverse-sequence current command value to a three-phase positive-sequence current command value generated based on predetermined parameters. A power conditioner characterized in that, when the output current on the AC side of the inverter is less than a first threshold, the power conditioner calculates the three-phase reverse-phase current command values ​​based on a d-axis reverse-phase current command obtained by making the q-axis reverse-phase inverted voltage (obtained by inverting the q-axis reverse-phase voltage) follow a predetermined value and a q-axis reverse-phase current command obtained by making the d-axis reverse-phase voltage follow the predetermined value, and when the output current on the AC side of the inverter is equal to or greater than the first threshold, the power conditioner calculates the three-phase reverse-phase current command values ​​based on a d-axis reverse-phase current command obtained by making the q-axis reverse-phase inverted voltage zero and follow the predetermined value and a q-axis reverse-phase current command obtained by making the d-axis reverse-phase voltage zero and follow the predetermined value.

2. A power conditioner according to claim 1, wherein the controller is configured to perform a process to determine whether the AC side of the inverter is unbalanced, and to calculate a differential impedance which is the difference between the positive-sequence impedance obtained by dividing the d-axis positive-sequence voltage by the d-axis positive-sequence current and the negative-sequence impedance obtained by dividing the d-axis negative-sequence voltage by the d-axis negative-sequence current, calculate the q-axis negative-sequence voltage based on the output voltage of the AC side of the inverter, calculate the dq-axis negative-sequence voltage based on the q-axis negative-sequence voltage and the d-axis negative-sequence voltage, and determine that the power system is unbalanced if the absolute value of the differential impedance is greater than a second threshold and the dq-axis negative-sequence voltage is greater than a third threshold.

3. A power conditioner according to claim 1, wherein the controller is configured such that, in a process of determining whether the AC side of the inverter is unbalanced, it calculates a differential impedance which is the difference between the positive-sequence impedance obtained by dividing the d-axis positive-sequence voltage by the d-axis positive-sequence current and the negative-sequence impedance obtained by dividing the d-axis negative-sequence voltage by the d-axis negative-sequence current, and determines that the power system is unbalanced if the absolute value of the differential impedance is greater than a second threshold and the negative-sequence voltage on the AC side of the inverter is greater than a third threshold.

4. A power conditioner according to claim 2, wherein the controller is configured to determine that the AC side of the inverter is unbalanced when the absolute value of the differential impedance is greater than a second threshold and the reverse-phase voltage of the dq axis is greater than a third threshold for a certain period of time.

5. A power conditioner according to claim 3, wherein the controller is configured to determine that the AC side of the inverter is unbalanced when the absolute value of the differential impedance is greater than a second threshold and the reverse-phase voltage is greater than a third threshold for a certain period of time.

6. A power conditioner according to claim 1, wherein the predetermined parameters include a phase command value of the output voltage of the inverter calculated based on parameters indicating the dynamic characteristics of a synchronous generator, a d-axis voltage command value, and a q-axis voltage command value, and the three-phase positive-sequence current command value is a voltage obtained by converting the d-axis positive-sequence current command value and the q-axis positive-sequence current command value, which are generated based on the phase command value, the d-axis voltage command value, and the q-axis voltage command value, into three-phase components.

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