Communication method and apparatus

By designing low-complexity phase detection and correlation detection for synchronization sequences, the problem of synchronization accuracy and power consumption of traditional IoT devices in extreme environments is solved, realizing synchronization accuracy and low power consumption detection for battery-free communication devices, meeting the needs of extremely small devices and long lifespan.

WO2026097368A1PCT designated stage Publication Date: 2026-05-15HUAWEI TECH CO LTD
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Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
HUAWEI TECH CO LTD
Filing Date
2024-11-07
Publication Date
2026-05-15

AI Technical Summary

Technical Problem

Traditional IoT devices suffer from high maintenance costs due to their limited battery life, difficulty in operating normally in extreme environments, and inability to meet the requirements of ultra-low complexity, extremely small device size, and long lifespan. Existing Wi-Fi IoT technology cannot meet these requirements.

Method used

A synchronization sequence was designed, and a synchronization field was generated by the first and second synchronization sequences. The synchronization accuracy was improved by using low-complexity phase detection and correlation detection, which is suitable for battery-free communication devices.

Benefits of technology

It achieves accurate synchronization and low-power detection of battery-free communication devices in extreme environments, supports active uplink transmission, and meets the needs of extremely small devices and long life cycle.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present application relates to the technical field of communications, and in particular to a communication method and apparatus. For example, the communication method and apparatus support AMP-related standards, or are applicable to the IEEE 802.11a / b / g standards, 802.11n standard, 802.11ac standard, 802.11ax standard, 802.11be standard, or 802.11bn standard, and other standards of the IEEE 802.11 series. An AMP STA may generate and send a synchronization field on the basis of a first synchronization sequence and a second synchronization sequence, the first synchronization sequence being used for phase detection, and the second synchronization sequence being used for correlation detection. Thus, after receiving the synchronization field, an AMP AP can perform coarse synchronization on the basis of the first synchronization sequence, quickly determine the position of the second synchronization sequence, and perform fine synchronization on the basis of the second synchronization sequence, thereby improving synchronization accuracy.
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Description

Communication methods and devices Technical Field

[0001] This application relates to the field of communication technology, and in particular to a communication method and apparatus. Background Technology

[0002] Traditional IoT devices are typically equipped with batteries of limited lifespan, and the need for battery replacement impacts user experience. With the massive growth of IoT networks and devices, maintenance costs (including labor and battery costs) will also increase significantly. First, billions of batteries are discarded annually, with only a small fraction being effectively recycled, causing harmful impacts on the Earth's ecosystem. Second, maintaining IoT network operation and replacing batteries can be extremely difficult under extreme environmental conditions. To address these issues, battery-free IoT communication has been proposed. By harvesting environmental energy, it can effectively improve network performance and sustainability, expanding application scenarios. Furthermore, eliminating batteries can significantly reduce device size and cost, thereby supporting a variety of new applications.

[0003] Wi-Fi communication systems are highly competitive in terms of deployment cost due to the widespread deployment and use of unlicensed frequency bands. However, existing Wi-Fi Internet of Things (IoT) technologies still cannot meet the needs of many use cases due to the following: First, traditional battery-powered devices may not function properly under extreme environmental conditions (e.g., high voltage, extremely high / low temperatures, humid environments). Second, many use cases require maintenance-free devices (e.g., no need / impossible to replace traditional batteries). Finally, some use cases require ultra-low complexity, very small device size (e.g., a few millimeters thick), and longer lifespans. Ambient power (AMP)-based IoT enables battery-free communication and meets the requirements of various vertical applications. Such devices can harvest energy from various sources, including radio waves, light (sunlight), motion, heat, etc., thus eliminating the need for traditional batteries. The IoT powered by ambient power differs from traditional Wi-Fi for the following reasons: 1) Wi-Fi devices are typically powered by conventional power sources; 2) The typical peak power of AMP devices is less than 1 milliwatt (considering device size limitations), far lower than the tens to hundreds of milliwatts of power consumption of traditional Wi-Fi devices; 3) Simpler waveforms, other than orthogonal frequency division multiplexing (OFDM), can be used to reduce complexity and power consumption. Combining AMP-supported IoT with Wi-Fi will enable new IoT services, from which Wi-Fi communication systems will also benefit. AMP devices will be an important device type. Devices that support active uplink transmission are an important type of AMP device.

[0004] For devices that support active uplink transmission, designing the synchronization sequence supported by the device is an urgent issue to be addressed.

[0005] Summary of the Invention

[0006] This application provides a communication method and apparatus, which includes a synchronization sequence that can improve synchronization accuracy.

[0007] In a first aspect, embodiments of this application provide a communication method, which can be applied to a first site, or to a chip or functional module within the first site. The first site may include a WLAN device such as an IoT device or an AMP device. The method includes:

[0008] A synchronization field is generated based on a first synchronization sequence and a second synchronization sequence. The first synchronization sequence includes one or more elements, each element including a first element and a second element, which alternate. The first element consists of n consecutive 1s, and the second element consists of n consecutive 0s, where n is a positive integer. The second synchronization sequence is different from the first synchronization sequence. The synchronization field is then sent.

[0009] In this embodiment, a synchronization field is generated using a first synchronization sequence that meets the above characteristics. This allows the second station to quickly determine the position of the second synchronization sequence based on the first synchronization sequence. Determining the position of the second synchronization sequence using low-complexity phase detection not only reduces computational load but also saves detection power consumption. The second station can then perform precise synchronization based on the second synchronization sequence, achieving true synchronization.

[0010] Secondly, embodiments of this application provide a communication method, which can be applied to a second site, or to a chip or functional module within the second site. The second site may include a WLAN device such as an IoT device or an AMP device. The method includes:

[0011] Receive a synchronization field; perform phase detection based on the synchronization field and a first synchronization sequence. The first synchronization sequence includes one or more elements, each element including a first element and a second element, the first element and the second element appearing alternately, the first element being n consecutive 1s and the second element being n consecutive 0s, where n is a positive integer; perform correlation detection based on the synchronization field and the second synchronization sequence, the second synchronization sequence being different from the first synchronization sequence.

[0012] For an explanation of the beneficial effects of the second aspect, please refer to the first aspect; it will not be elaborated here.

[0013] In conjunction with the first or second aspect, in one possible implementation, the length of the second synchronization sequence is any of the following: 8, 16, 32, 48, 64, or 128.

[0014] In conjunction with the first or second aspect, in one possible implementation, the difference between the number of 1s and the number of 0s in the second synchronization sequence is one of the following: 0, 2, 4, 6, or 10. That is, the absolute value of the difference between the total number of 1s and the total number of 0s in the second synchronization sequence is 0, 2, 4, 6, or 10.

[0015] In conjunction with the first or second aspect, in one possible implementation, the first synchronization sequence corresponds to the modulation and coding scheme (MCS) of the data field, or the first synchronization sequence corresponds to the data rate of the data field, and the data field and the synchronization field are contained in the AMP physical layer protocol data unit (PPDU).

[0016] In conjunction with the first or second aspect, in one possible implementation, the second synchronization sequence is any of the following: the longest linear shift register sequence (such as the M sequence), the barker code sequence, or the device identifier (ID) sequence.

[0017] In one possible implementation, in conjunction with the first or second aspect, the second synchronization sequence corresponds to the MCS of the data field, or the second synchronization sequence corresponds to the data rate of the data field, and the data field and the synchronization field are contained in the AMP PPDU.

[0018] In conjunction with the first or second aspect, in one possible implementation, the synchronization field is generated based on multiple repeated second synchronization sequences, the number of repetitions of which is determined based on the data rate of the data field or the MCS of the data field.

[0019] The multiple repeated second synchronization sequences shown here are merely examples. In a real implementation, the first station can also generate a synchronization field based on a second synchronization sequence.

[0020] Thirdly, embodiments of this application provide a communication method, which can be applied to a first site, or to a chip or functional module within the first site. The first site may include a WLAN device such as an IoT device or an AMP device. The method includes:

[0021] A synchronization field is generated based on a first synchronization sequence and a second synchronization sequence, or a synchronization field is generated based on the second synchronization sequence; the synchronization field is then sent. The first synchronization sequence and the second synchronization sequence are described in a specific embodiment.

[0022] Fourthly, embodiments of this application provide a communication method, which can be applied to a second site, or to a chip or functional module within the second site. The second site may include a WLAN device such as an IoT device or an AMP device. The method includes:

[0023] The system receives a synchronization field and performs relevant detection based on a second synchronization sequence; optionally, it also performs phase detection based on a first synchronization sequence. The first synchronization sequence and the second synchronization sequence are described in a specific embodiment.

[0024] In this embodiment of the application, fine synchronization can be achieved through the second synchronization sequence, which improves the correlation performance and thus improves the synchronization accuracy.

[0025] Fifthly, embodiments of this application provide a first site for executing the methods in the first aspect, the third aspect, or any possible implementation. The first site includes modules for executing the methods in the first aspect, the third aspect, or any possible implementation. For example, the first site may be an AMP STA, or a chip or functional module within the AMP STA.

[0026] Sixthly, embodiments of this application provide a second site for performing the methods of the second aspect, the fourth aspect, or any possible implementation. The second site includes modules for performing the methods of the second aspect, the fourth aspect, or any possible implementation. For example, the second site may be an AMP AP, or a chip or functional module within the AMP AP.

[0027] In a seventh aspect, embodiments of this application provide a first site, the first site including a processor, configured to cause the first site to perform the methods shown in the first aspect, the third aspect, or any possible implementation thereof. Alternatively, the processor is configured to execute a computer program stored in a memory, wherein when the computer program is executed, the methods shown in the first aspect, the third aspect, or any possible implementation thereof are performed.

[0028] In one possible implementation, the memory is located outside the first site mentioned above.

[0029] In one possible implementation, the memory is located within the aforementioned first site.

[0030] In this embodiment, the processor and memory can also be integrated into a single device, meaning they can be combined. For example, the first station can be a chip.

[0031] In one possible implementation, the first station also includes a transceiver for receiving or sending signals. For example, the transceiver can also be used to send synchronization fields, such as when the first station is a complete device.

[0032] Eighthly, embodiments of this application provide a second site, the second site including a processor, configured to cause the second site to perform the methods shown in the second aspect, the fourth aspect, or any possible implementation thereof. Alternatively, the processor is configured to execute a computer program stored in memory, wherein when the computer program is executed, the methods shown in the second aspect, the fourth aspect, or any possible implementation thereof are performed.

[0033] In one possible implementation, the memory is located outside the aforementioned second site.

[0034] In one possible implementation, the memory is located within the aforementioned second site.

[0035] In this embodiment, the processor and memory can also be integrated into a single device, meaning they can be combined. For example, the second station can be a chip.

[0036] In one possible implementation, the second station also includes a transceiver for receiving or sending signals. For example, the transceiver could be used to receive a synchronization field, such as when the second station is a complete device.

[0037] Ninthly, embodiments of this application provide a first site, the first site including logic circuitry and an interface, the logic circuitry and the interface being coupled; the interface is used for inputting and / or outputting information, and the logic circuitry is used to cause the first site to perform the methods described in the first aspect, the third aspect, or any possible implementation.

[0038] For example, an interface for outputting information may include: an interface for outputting data fields; or, for example, logic circuitry for generating the synchronization field, etc.

[0039] In a tenth aspect, embodiments of this application provide a second site, the second site including logic circuitry and an interface, the logic circuitry and the interface being coupled; the interface is used for inputting and / or outputting information, and the logic circuitry is used to cause the second site to perform the methods described in the second aspect, the fourth aspect, or any possible implementation thereof.

[0040] For example, the interface for outputting information includes: an interface for inputting data fields. For example, logic circuitry for processing the synchronization field, etc.

[0041] Eleventhly, embodiments of this application provide a computer-readable storage medium for storing a computer program that, when run on a computer (such as the site shown above), causes the methods shown in any of the first to fourth aspects or any possible implementation thereof to be executed.

[0042] In a twelfth aspect, embodiments of this application provide a computer program product comprising a computer program that, when run on a computer (such as the site shown above), causes the methods shown in any of the first to fourth aspects or any possible implementation thereof to be executed.

[0043] In a thirteenth aspect, embodiments of this application provide a computer program that, when run on a computer, executes the methods shown in any of the first to fourth aspects or any possible implementations described above.

[0044] In a fourteenth aspect, embodiments of this application provide a communication system comprising a first station and a second station, wherein the first station is configured to perform the methods described in the first aspect, the third aspect, or any possible implementation thereof, and the second station is configured to perform the methods described in the second aspect, the fourth aspect, or any possible implementation thereof. Attached Figure Description

[0045] Figure 1 is a schematic diagram of the architecture of the communication system provided in an embodiment of this application;

[0046] Figure 2a is a schematic diagram of monostationary backscattering provided in an embodiment of this application;

[0047] Figure 2b is a schematic diagram of bistatic backscattering provided in an embodiment of this application;

[0048] Figure 3 is a schematic diagram of the uplink PPDU format provided in an embodiment of this application;

[0049] Figure 4 is a flowchart illustrating the communication method provided in an embodiment of this application;

[0050] Figure 5 is a schematic diagram of the synchronization field provided in an embodiment of this application;

[0051] Figure 6a is a schematic diagram of the phase change corresponding to the first synchronization sequence with alternating 0 and 1 provided in the embodiment of this application;

[0052] Figures 6b and 6c are schematic diagrams of phase changes corresponding to a first synchronization sequence in which a series of consecutive 1s and a series of consecutive 0s alternate, provided in an embodiment of this application.

[0053] Figure 7 is a related schematic diagram provided in the embodiments of this application;

[0054] Figure 8 is a schematic diagram of the generation of random variables in the relevant results provided in the embodiments of this application;

[0055] Figure 9 is a schematic diagram of the device provided in an embodiment of this application;

[0056] Figure 10 is a schematic diagram of the device provided in an embodiment of this application;

[0057] Figure 11 is a schematic diagram of the chip provided in an embodiment of this application. Detailed Implementation

[0058] To facilitate understanding of the technical solution of this application, the application will be further described below with reference to the accompanying drawings.

[0059] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used only to distinguish different objects and not to describe a specific order. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to these processes, methods, products, or apparatuses.

[0060] The term "embodiment" as used herein means that a particular feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The appearance of this phrase in various places throughout the specification does not necessarily refer to the same embodiment, nor is it a separate or alternative embodiment mutually exclusive with other embodiments. It will be explicitly and implicitly understood by those skilled in the art that the embodiments described herein can be combined with other embodiments.

[0061] In this application, "at least one (item)" refers to one or more, "more than" refers to two or more, "at least two (items)" refers to two or three or more, and "and / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. "Or" indicates that there can be two relationships, such as only A exists and only B exists; when A and B are not mutually exclusive, it can also mean that there are three relationships, such as only A exists, only B exists, and both A and B exist simultaneously. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c".

[0062] In this application, "send" and "receive" indicate the direction of signal transmission. For example, "send information to XX" can be understood as the destination of the information being XX, which can include direct transmission via the air interface or indirect transmission via the air interface from other units or modules. "Receive information from YY" can be understood as the source of the information being YY, which can include direct reception from YY via the air interface or indirect reception from YY via the air interface from other units or modules. "Send" can also be understood as the "output" of a chip interface, and "receive" can also be understood as the "input" of a chip interface. In other words, sending and receiving can occur between devices, such as between network devices and terminal devices, or within a device, such as between components, modules, chips, software modules, or hardware modules within the device via buses, traces, or interfaces.

[0063] The following describes the communication system involved in the embodiments of this application.

[0064] The technical solutions provided in this application can be applied to WLAN systems, such as Wi-Fi or AMP. For example, the technical solutions provided in this application can be applied to the Institute of Electrical and Electronics Engineers (IEEE) 802.11 series standards (or protocols), such as the 802.11b standard, 802.11be standard, 802.11bn standard (or Wi-Fi 8, also known as ultra-high reliability (UHR) or ultra-high reliability and throughput (UHRT)), or next-generation standards of the 802.11bn standard, or standards supporting ambient power (AMP), etc., and will not be listed exhaustively. The technical solutions provided in this application can also be applied to wireless personal area networks (WPANs) that support integrated millimeter wave (IMMW) and ultra-wideband (UWB) technologies. The technical solutions provided in the embodiments of this application can be applied to the IEEE 802.15 series standards, such as the 802.15.4a, 802.15.4z, or 802.15.4ab standards, or future UWB WPAN standards, etc., and will not be listed one by one. The technical solutions provided in the embodiments of this application can also be applied to the Spark Link or NearLink standards. The technical solutions provided in the embodiments of this application can also be applied to the following communication systems, such as Internet of Things (IoT) systems, vehicle-to-everything (V2X, where X can represent anything), device-to-device (D2D), narrowband Internet of Things (NB-IoT) systems, long term evolution (LTE) systems, 5th generation (5G) communication systems, and new communication systems that will emerge in the future development of communication, etc.For example, V2X can include vehicle-to-vehicle (V2V), vehicle-to-infrastructure (V2I), vehicle-to-pedestrian (V2P), or vehicle-to-network (V2N) communication.

[0065] WLAN systems can provide high-speed, low-latency transmission. As WLAN application scenarios continue to evolve, WLAN systems will be applied to more scenarios or industries, such as the Internet of Things industry, the Internet of Vehicles industry, the banking industry, enterprise offices, stadiums and exhibition halls, concert halls, hotel rooms, dormitories, hospital wards, classrooms, shopping malls, squares, streets, production workshops and warehouses, etc. Of course, devices that support WLAN communication or sensing (such as access points or sites) can be sensor nodes in smart cities (such as smart water meters, smart electricity meters, and smart air monitoring nodes), smart devices in smart homes (such as smart cameras, projectors, displays, televisions, speakers, refrigerators, and washing machines), nodes in the Internet of Things (IoT), entertainment terminals (such as wearable devices for augmented reality (AR) and virtual reality (VR), smart devices in smart offices (such as printers, projectors, loudspeakers, and speakers), vehicle-to-everything (V2X) devices, infrastructure in daily life scenarios (such as vending machines, self-service navigation kiosks in supermarkets, self-service checkout machines, and self-service ordering machines), and equipment in large sports and music venues.

[0066] Although the embodiments of this application primarily use WLAN as an example, especially networks applied to the IEEE 802.11 series of standards, the various aspects involved in the embodiments of this application can be extended to other networks employing various standards or protocols. For example, Bluetooth, high-performance radio LAN (HIPERLAN) (a wireless standard similar to the IEEE 802.11 standard), and wide area networks (WANs) or other networks now known or developed in the future. Therefore, regardless of the coverage area and wireless access protocol used, the various aspects provided in this application can be applied to any suitable wireless network.

[0067] The method provided in this application embodiment can be implemented by a communication device in a communication system. For example, the communication device can be an access point (AP) or a station (STA). This communication device includes, but is not limited to, communication servers, routers, switches, bridges, computers, mobile phones, smart home devices, tags, and other central control points. For example, access points and stations can be devices used in vehicle networks, IoT nodes and sensors in IoT, smart cameras, smart remote controls, smart water and electricity meters in smart homes, and sensors in smart cities. The following is a detailed description:

[0068] An Access Point (AP) serves as an access point for a STA (such as a mobile phone) to access a wired (or wireless) network. It is primarily deployed in homes, buildings, and campuses, with a typical coverage radius of tens to hundreds of meters. Outdoor deployments are also possible. An access point acts as a bridge between wired and wireless networks, connecting various wireless network clients and then connecting the wireless network to the Ethernet. Specifically, an access point can be a terminal device (such as a mobile phone) with a Wi-Fi chip or a network device (such as a router). Access points can support the 802.11be standard. They can also be devices supporting various WLAN standards of the 802.11 standard, such as 802.11bp, 802.1bn, 802.11be, 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a. An access point (AP) is a device with wireless communication capabilities. The AP can be a complete device, or it can be a chip, processing system, or functional module installed within a complete device. The device with these chips, processing systems, or functional modules installed can implement the methods and functions of the embodiments in this application under the control of these chips, processing systems, or functional modules. The access point in this application can be an AMP AP, a high-efficiency (HE) AP, or an extremely high-throughput (EHT) AP, or it can be an access point applicable to a future generation of Wi-Fi standards.

[0069] The AP in the embodiments of this application may include an AMP AP or a reader, and the above description of the AP also applies to an AMP AP or a reader. For ease of description, the method embodiments shown below will all use an AMP AP as an example for illustration.

[0070] A Station (STA) can be a wireless communication chip, wireless sensor, or wireless communication terminal, and can also be referred to as a user. For example, a station can be a mobile phone supporting Wi-Fi communication, a tablet computer supporting Wi-Fi communication, a set-top box supporting Wi-Fi communication, a smart TV supporting Wi-Fi communication, a smart wearable device supporting Wi-Fi communication, an in-vehicle communication device supporting Wi-Fi communication, a computer supporting Wi-Fi communication, a tag supporting Wi-Fi communication, or a sensor supporting Wi-Fi communication. Optionally, the station can support various wireless local area networks (WLAN) standards of the 802.11 family, such as 802.11bp, 802.11bn, 802.11be, 802.11ax, 802.11ac, 802.11n, 802.11g, 802.11b, and 802.11a. The STA in this application can be an HE STA supporting AMP, an EHT STA supporting AMP, or an STA supporting AMP that is compatible with a future generation of Wi-Fi standards. A STA is a device with wireless communication capabilities. The STA can be a complete device, or it can be a chip, processing system, or functional module installed in a complete device. Devices with these chips, processing systems, or functional modules installed can implement the methods and functions of the embodiments of this application under the control of the chips, processing systems, or functional modules.

[0071] In the embodiments of this application, the STA may include an AMP STA, a tag, or an excitation source, and the above description of the STA also applies to the AMP STA, tag, or excitation source. For ease of description, the method embodiments shown below all use an AMP STA as an example. The AMP AP and AMP STA involved in this application can be collectively referred to as AMP devices.

[0072] Figure 1 is a schematic diagram of the architecture of a communication system provided in an embodiment of this application. Figure 1 exemplarily shows one AP and six STAs, such as STA1 to STA6. As shown in Figure 1, the embodiments of this application can be applied to scenarios such as communication, sensing, or power transmission between APs and STAs, between APs, or between STAs in a WLAN, and the embodiments of this application do not limit this. For example, the AP can communicate, sense, or transmit power with a single STA, or the AP can communicate, sense, or transmit power with multiple STAs simultaneously. For example, communication, sensing, or power transmission between the AP and multiple STAs can be divided into downlink transmission where the AP simultaneously sends signals to multiple STAs, and uplink transmission where multiple STAs send signals to the AP. The number of APs and non-AP STAs shown in Figure 1 are only examples. In specific implementations, the number of APs or non-AP STAs can be more or less, and the embodiments of this application do not limit this.

[0073] The following describes the AMP STA involved in the embodiments of this application.

[0074] An AMP STA is a device that supports environmental energy harvesting. For example, an AMP STA supports radio frequency energy harvesting, such as converting the harvested radio frequency energy into direct current (DC).

[0075] Generally speaking, AMP STA can include four types, or four different capabilities. These four types can be as follows:

[0076] Type A: Functions the same as existing Wi-Fi devices, but also features environmental energy harvesting capabilities.

[0077] Type B has a strong energy storage capacity and can support active uplink transmission.

[0078] Type C1 has weak energy storage capacity and supports single-station backscatter communication.

[0079] Type C2 has weak energy storage capacity and supports dual-station backscatter communication.

[0080] The energy storage capacity of Type B devices is relative to that of Type C1 or Type C2 devices. In other words, Type B devices have a stronger energy storage capacity compared to Type C1 and Type C2 devices. Type B devices support active uplink transmission relative to Type C1 or Type C2 devices. In other words, Type B devices support active uplink transmission compared to Type C1 and Type C2 devices.

[0081] The above classification is merely illustrative and is not intended to limit the embodiments of this application. As standards evolve, other types may emerge in the future, and this application does not limit them.

[0082] Figure 2a is a schematic diagram of a single-station backscattering system provided in an embodiment of this application. For single-station backscattering communication, the excitation source (or carrier source) is physically integrated with the AMP AP. As shown in Figure 2a, the AMP AP includes two antennas: a transmit antenna (TX antenna, abbreviated as TX) and a receive antenna (RX antenna, abbreviated as RX). TX is used to transmit the input carrier (i.e., the excitation signal) required for backscattering, and RX is used to receive the backscattering signal. Single-station backscattering communication can operate in the 2.4 GHz band or below 1 GHz, etc., which will not be listed here. As shown in Figure 2a, the AMP AP includes: an AMP module, a low noise amplifier (LNA), TX, and RX. The AMP STA includes: logic devices and energy harvesting devices. Figure 2a also exemplarily shows the antenna.

[0083] For example, a monostation backscattering device satisfies at least one of the following: (1) it can operate in the 2.4 GHz band or below the 1 GHz band; (2) the excitation source is physically integrated with the AMP AP; (3) it supports full-duplex mode; (4) the AMP AP includes two antennas, one of which is used to transmit the input carrier (i.e., excitation) required for directional scattering, and the other antenna is used to receive the backscattering signal.

[0084] Figure 2b is a schematic diagram of bistatic backscattering provided in an embodiment of this application. For bistatic backscattering communication, the excitation source and the AMP AP are physically separated. The excitation source can be used to transmit the input carrier required for backscattering. The AMP STA receives the input carrier and transmits the backscattered signal. The AMP AP receives the backscattered signal. Bistatic backscattering communication can operate in the 2.4 GHz band or below 1 GHz, etc., and will not be listed here. The coverage distance of bistatic backscattering communication can be greater than that of monostatic backscattering communication.

[0085] For example, the excitation source in Figure 2b could be a type B device. The direct path interference in Figure 2b indicates that when a carrier source provides an input carrier to the AMP STA, this carrier is also transmitted over the air interface to the AMP AP.

[0086] The devices shown in Figures 2a and 2b are merely examples and are not intended to limit the embodiments of this application.

[0087] Before introducing the methods involved in the embodiments of this application, the PPDU involved in the embodiments of this application will be introduced below. The PPDU can be used for uplink transmission or downlink transmission. That is, the PPDU shown in Figure 3 can be an uplink PPDU or a downlink PPDU. For ease of description, the following description uses the uplink PPDU as an example. The description of the uplink PPDU below also applies to the downlink PPDU, and will not be repeated below.

[0088] An uplink PPDU is a PPDU sent from the AMP STA to the AMP AP. Taking Figure 2b as an example, the uplink PPDU is a PPDU sent from the excitation source to the AMP AP. The uplink PPDU includes a synchronization field and a data field. Optionally, the uplink PPDU also includes a SIG field.

[0089] Figure 3 is a schematic diagram of the uplink PPDU format provided in an embodiment of this application. As shown in Figure 3, the uplink PPDU includes AMP synchronization (AMP-SYNC) and AMP data. Optionally, as shown in Figure 3, the uplink PPDU also includes at least one of the following: Wi-Fi preamble (or Wi-Fi preamble code), AMP signal (AMP-SIG), or energizer symbols. AMP data can also be called control payload. The order or position of the various fields shown in Figure 3 is merely an example and is not intended to limit the embodiments of this application. Figure 3 illustrates AMP as an example; in specific implementations, the uplink PPDU shown in Figure 3 can also be applied to other fields, and this application embodiment does not limit it. The functions of each field are illustrated below.

[0090] The Wi-Fi preamble field is used to instruct other devices to circumvent this PPDU transmission. Other devices refer to devices other than the device sending the PPDU and the device receiving the PPDU.

[0091] The AMP-SYNC field is used for synchronization at the receiving end, such as for synchronization of an AMP AP. For example, the AMP AP can determine the start position of subsequent fields based on this AMP-SYNC field.

[0092] The AMP-SIG field is used to carry information for demodulating subsequent fields, such as information used to demodulate AMP data fields.

[0093] AMP data fields are used to hold data.

[0094] The excitation symbol field is used to carry the excitation signal.

[0095] This application embodiment designs a synchronization sequence corresponding to the synchronization field. Through this synchronization sequence, the AMP AP can achieve synchronization, thereby improving the synchronization accuracy.

[0096] Figure 4 is a flowchart illustrating the communication method provided in an embodiment of this application. The descriptions of the AMP AP and AMP STA involved in this method are as above and will not be detailed here. It is understood that Figure 4 illustrates uplink transmission as an example; the method shown in Figure 4 can also be applied to downlink transmission, which will not be elaborated further below. As shown in Figure 4, the method includes:

[0097] 401. AMP STA generates a synchronization field based on at least one of the first synchronization sequence or the second synchronization sequence.

[0098] Alternatively, AMP STA generates a synchronization field that corresponds to at least one of the first or second synchronization sequences.

[0099] Alternatively, AMP STA generates a synchronization field that carries at least one of a first synchronization sequence or a second synchronization sequence.

[0100] As an example 1, the AMP STA generates a synchronization field based on the second synchronization sequence. That is, the synchronization field can carry only the second synchronization sequence. For example, the modulation method of the synchronization field can be minimum shift keying (MSK) or on-off keying (OOK). Optionally, the second synchronization sequence can also be applied to downlink transmission. For instance, the AMP AP generates a synchronization field based on the second synchronization sequence and sends it; correspondingly, the AMP STA receives the synchronization field and performs relevant detection based on the second synchronization sequence and the synchronization field. For a description of the second synchronization sequence involved in downlink transmission, refer to the description of uplink transmission; it will not be detailed here.

[0101] As another example 2, AMP STA generates a synchronization field based on a first synchronization sequence and a second synchronization sequence. That is, the synchronization field carries a synchronization sequence that includes both the first and second synchronization sequences. For example, the modulation scheme of the synchronization field might be MSK.

[0102] Figure 5 is a schematic diagram of a synchronization field provided in an embodiment of this application. As shown in Figure 5, the synchronization field includes a second part. Optionally, the synchronization field also includes a first part. The first part of the synchronization field precedes the second part.

[0103] The first part is used for phase detection, also known as the phase detection part. This first part corresponds to the first synchronization sequence. The first synchronization sequence is modulated to form a synchronization field. In addition to modulation processing, other processing may be performed to form the synchronization field, which is not limited in the embodiments of this application.

[0104] The second part is used for correlation detection, also known as the correlation-based detection part. This second part corresponds to the second synchronization sequence. The second synchronization sequence is modulated to form a synchronization field. In addition to modulation processing, other processing may be performed to form the synchronization field, which is not limited in the embodiments of this application.

[0105] The synchronization field corresponds to the first synchronization sequence and the second synchronization sequence. The first synchronization sequence can be used to quickly detect the position of the second synchronization sequence, or in other words, the first part is used to quickly confirm the position of the execution-related second part, or the second station can quickly detect the input signal based on the phase change of the first part. This effectively reduces computational load and saves power. This is especially important for AMP devices, which are inherently low-power devices.

[0106] For a detailed explanation of the first and second synchronization sequences, please refer to the following text, which will not be elaborated here.

[0107] 402. The AMP STA sends a synchronization field, and the corresponding AMP AP receives the synchronization field.

[0108] The synchronization field can be included in the uplink PPDU, the format of which is shown in Figure 3 and will not be detailed here. Based on the relationship between the synchronization field and the uplink PPDU, step 402 can also be expressed as follows: The AMP AP sends an uplink PPDU including the synchronization field, and correspondingly, the AMP AP receives the uplink PPDU.

[0109] For an AMP STA, which acts as the transmitter of the synchronization field, the synchronization field is generated based on a second synchronization sequence, or a combination of the second and first synchronization sequences. However, for an AMP AP, which acts as the receiver of the synchronization field, the second synchronization sequence carried by the synchronization field, or the first and second synchronization sequences, may change due to noise during channel transmission.

[0110] 403. The AMP AP performs correlation detection based on the received synchronization field and the second synchronization sequence. Optionally, the AMP AP also performs phase detection based on the received synchronization field and the first synchronization sequence. It should be noted that the second synchronization sequence used here as the comparison object with the received synchronization field, or the first synchronization sequence, is a synchronization sequence stored locally by the AMP AP.

[0111] Taking Example 1 above as an example, the AMP AP performs relevant detections based on the second synchronization sequence carried by the synchronization field and the second synchronization sequence stored locally, thereby detecting the synchronization field and achieving synchronization. For example, the AMP AP determines the specific position of the subsequent fields based on the results of the relevant detections.

[0112] Taking Example 2 above as an example, the AMP AP performs phase detection based on the first synchronization sequence carried by the synchronization field and the first synchronization sequence stored locally, thereby determining the position of the second part in the synchronization field through coarse synchronization. The AMP AP then performs correlation detection based on the second synchronization sequence carried by the synchronization field and the second synchronization sequence stored locally, thereby determining the position of subsequent fields in the synchronization field through fine synchronization. In other words, the AMP AP first performs coarse synchronization through low-complexity phase detection, and then performs fine synchronization through correlation detection, effectively improving synchronization accuracy and reducing complexity.

[0113] Table 1 provides an exemplary comparison of correlation detection and phase detection. However, it is not intended to limit the embodiments of this application.

[0114] Table 1

[0115] As shown in Table 1, when the synchronization field includes both a first and a second part, the fast speed of phase detection facilitates quick identification of the location where the relevant second part needs to be executed, reducing computational load and power consumption. The high accuracy of related detection further enhances the detection of the synchronization field and promotes synchronization.

[0116] In this embodiment, using a second synchronization sequence to generate the synchronization field can achieve precise synchronization and improve synchronization accuracy. Using both the second and first synchronization sequences to generate the synchronization field can effectively reduce synchronization complexity and improve synchronization accuracy.

[0117] The following describes the first synchronization sequence involved in the embodiments of this application.

[0118] The first synchronization sequence includes one or more elements. Each element includes a first element and a second element, which alternate. The first element consists of n consecutive 1s, and the second element consists of n consecutive 0s, where n is a positive integer.

[0119] Alternatively, the first synchronization sequence includes multiple alternating 1s and 0s, or multiple consecutive 1s and multiple consecutive 0s, which alternate.

[0120] Optionally, the first synchronization sequence may also include a 1, a 0, or multiple 1s or multiple 0s. The lengths of the first synchronization sequences listed below are merely examples and are not intended to limit the embodiments of this application. For example, the length of the first synchronization sequence may be 8, 12, 16, 32, 48, 64, or 128, etc., and will not be listed here.

[0121] As an example 'a', the first synchronization sequence includes a segment of elements, which consists of a first element and a second element. The first element is a series of consecutive 1s, and the second element is a series of consecutive 0s. That is, the first synchronization sequence includes a series of consecutive 1s and a series of consecutive 0s. For example, the first synchronization sequence is 11110000. Another example is 0011110000. Yet another example is 1111110000. And yet another example is 1100001111.

[0122] As another example b, the first synchronization sequence includes multiple segments, each segment consisting of a first element and a second element. The first element is a single 1, and the second element is a single 0. That is, the first synchronization sequence includes multiple 10s or multiple 0s. For example, the first synchronization sequence could be 10101010, or 1010101010101010, etc., and will not be listed here. Another example is 01010101, or 0101010101010101, etc., and will not be listed here. Yet another example is 101010100, or 101010101, or 110101010, or 010101010, or 0010101010, etc., and will not be listed here.

[0123] As another example c, the first synchronization sequence consists of multiple segments, each segment containing a first element and a second element. The first element is a series of consecutive 1s, and the second element is a series of consecutive 0s. For example, the first synchronization sequence could be 1111000011110000, or 0000111100001111, etc., and will not be listed here. Another example is 001111000011110000, or 000011111100001111, etc., and will not be listed here.

[0124] Figure 6a is a schematic diagram of the phase change corresponding to the first synchronization sequence with alternating zeros and ones provided in an embodiment of this application. As can be seen from Figure 6a, the phase change of this first synchronization sequence is relatively regular, allowing for rapid detection of the position of the second part in the synchronization field. In Figure 6a, the horizontal axis represents the sample index, and the vertical axis represents the phase, with units of radians. Figure 6a is illustrated using a sampling frequency of 64 MHz samples per second as an example; the sample index refers to the index of the sampling point. Figure 6a exemplarily illustrates the phase of a custom MSK modulated signal.

[0125] Figures 6b and 6c are schematic diagrams of phase changes corresponding to a first synchronization sequence in which a series of consecutive 1s and a series of consecutive 0s alternate, as provided in an embodiment of this application. Figure 6b shows an example with phase expansion, and Figure 6c shows an example with phase non-expansion. Phase expansion means that the phase is not limited to [-π, π]. For further explanation of Figures 6b and 6c, please refer to Figure 6a, which will not be detailed here.

[0126] Optionally, the first synchronization sequence corresponds to the MCS of the data field, or the first synchronization sequence corresponds to the data rate of the data field. For example, the first synchronization sequence may be determined from a plurality of synchronization sequences 1 based on the MCS or data rate of the data field. The synchronization sequence 1 may be standard-defined. All of these plurality of synchronization sequences 1 may satisfy the characteristics satisfied by the first synchronization sequence described above. Alternatively, some of these plurality of synchronization sequences 1 may satisfy the characteristics satisfied by the first synchronization sequence described above.

[0127] For example, if the data rate of the data field is low, the first synchronization sequence can be a sequence that satisfies the characteristics of example b above. In other words, the first synchronization sequence shown above, which alternates between one 0 and one 1, is suitable for lower rates. Because the rate is low, the duration of each bit is longer, and there are more sampling points corresponding to each bit, making it easier to obtain phase changes. Thus, the position of the second part can be detected more effectively.

[0128] For example, if the data rate of the data field is high, the first synchronization sequence can be a sequence that satisfies the characteristics of examples a and c above. In other words, the first synchronization sequence shown above, which alternates between consecutive 1s and consecutive 0s, is suitable for higher rates. Because the rate is high, the duration of each bit is short, and there are fewer sampling points corresponding to each bit, making it easier to extract phase changes through consecutive 1s or consecutive 0s.

[0129] Optionally, the data rate corresponds to the MCS. In other words, the MCS can be used to indicate the data rate. Therefore, the above explanation of the data rate also applies to the MCS, and will not be elaborated upon here. For an explanation of the relationship between the MCS and the data rate, please refer to the following text, which will not be detailed here.

[0130] The following describes the second synchronization sequence involved in the embodiments of this application.

[0131] As one possible implementation, the second synchronization sequence is any of the following: the longest linear shift register sequence (such as the M-sequence, or pseudo-random binary sequence (PRBS)), the barker code sequence, or the device identifier (ID) sequence.

[0132] A device ID sequence is a sequence determined based on a device ID. This sequence can be the device ID itself, a portion of a device ID, or a combination of a portion of a device ID and other sequences; examples are not provided here. For instance, a device ID represented in hexadecimal might be 550e8400-e29b-41d4-a716-446655440000. A device ID sequence can also be a device ID represented in binary, or a portion of a binary device ID, etc.; these are not all illustrated here.

[0133] As an example, the second synchronization sequence is any of the sequences shown in Table 2. Table 2 illustrates the M sequence as the second synchronization sequence, and the sequences shown in Table 2 are merely examples and will not be listed individually here. Table 2 represents the sequences in tabular form, and this tabular representation is not intended to limit the embodiments of this application. The description of the tables herein also applies to the following text and will not be repeated here.

[0134] Table 2

[0135] The sequences obtained after at least one of the cyclic shift, reversal, or inversion operations on the sequences shown in Table 2 still fall within the protection scope of the second synchronization sequence shown in the embodiments of this application. For example, the second synchronization sequence is the sequence obtained by reversing the sequences shown in Table 2. Or, for example, the second synchronization sequence is the sequence obtained by inverting the sequences shown in Table 2. If element 1 in the sequence shown in Table 2 is replaced with element 0, and element 0 is replaced with element 1, the resulting sequence still belongs to the second synchronization sequence. Similarly, if element 1 in the sequence shown in Table 2 is replaced with element -1, and element 0 is replaced with element 1, the resulting sequence still belongs to the second synchronization sequence. Similarly, if element 0 in the sequence shown in Table 2 is replaced with element -1, the resulting sequence still belongs to the second synchronization sequence.

[0136] As another example, the second synchronization sequence is any of the sequences shown in Table 3. Table 3 uses Barker code sequences as examples, and the sequences shown in Table 3 are merely examples and will not be listed individually here.

[0137] Table 3

[0138] The sequences obtained after at least one of the cyclic shift, reversal, or inversion operations shown in Table 3 are still within the protection scope of the second synchronization sequence shown in the embodiments of this application. Further explanation of the inversion operation is given in Table 2 and will not be elaborated here.

[0139] As another possible implementation 2, the second synchronization sequence is any of the sequences shown in Table 4. It is understood that the standard can define one second synchronization sequence, or define one or more second synchronization sequences of different lengths. Therefore, one sequence in Table 4 can serve as a second synchronization sequence, or one of the multiple sequences in Table 4 can serve as a second synchronization sequence.

[0140] Table 4 also shows the length of each sequence. To facilitate comparison of different sequence designs, Table 4 also provides examples of the peak-side lobe ratio (PSLR) for each sequence, whether data is considered, and the PSLR at a confidence level of 0.99. In practical implementations, columns three through five of Table 4 may be omitted; that is, columns three through five are not used as limitations on the second synchronization sequence. For an explanation of columns three through five, please refer to the description of the design methods below; details will not be elaborated here.

[0141] Table 4

[0142] The sequences obtained after at least one of the cyclic shift, reversal, or inversion operations shown in Table 4 are still within the protection scope of the second synchronization sequence shown in the embodiments of this application. Further explanation of the inversion operation is given in Table 2 and will not be elaborated here.

[0143] Generating a synchronization field based on the second synchronization sequence shown above can effectively reduce the sidelobe amplitude of the second synchronization sequence, improve the accuracy of related detection, and thus improve the accuracy of synchronization.

[0144] The design principles of each second synchronization sequence shown in implementation method 2 are described below.

[0145] The sending and receiving parties design a second synchronization sequence based on the design principles described below. Table 4 shows examples of sequences designed based on these principles; other sequences can also be designed using these principles, which will not be elaborated upon here. Alternatively, the sending and receiving parties can directly store the second synchronization sequence designed using the design principles described below. All second synchronization sequences designed based on the design principles described below fall within the protection scope of the embodiments of this application. The relevant descriptions of the design principles also apply to Table 5 and will not be repeated below.

[0146] The design principle of the second synchronization sequence shown in implementation method 2 is explained using MSK modulation as an example. The sequences shown in Table 4 are designed using MSK modulation as an example.

[0147] MSK modulation is a continuous-phase frequency shift keying modulation. An MSK signal can be represented as:

[0148] Among them, E b T represents the energy per bit. b f represents the duration of the bit. c Here, θ(t) is the carrier frequency, and θ(t) is the phase function, which depends on the input binary data and changes continuously. In MSK modulation, minimizing the frequency offset yields two possible frequencies, such as:

[0149] The above introduction to MSK modulation is merely an example. For further explanation of MSK modulation, please refer to existing principles, which will not be elaborated here.

[0150] Figure 7 is a related schematic diagram provided in the embodiments of this application. s represents the synchronization field, d represents the data field, or d represents both the SIG field and the data field. When the receiver calculates the aperiodic correlation, a portion of the local sequence is affected by the data field. The data portion can be considered as random data under Manchester encoding, thus the correlation between the local sequence and the data portion is calculated using the probability distribution of random variables. -(n-1)≤τ≤n-1. τ represents the shift, and n represents the length of the synchronization sequence.

[0151] For different random data, the correlation result of each sequence can be divided into three parts. As shown in Figure 7, the local sequence is correlated with the received signal using a sliding window method. When the local sequence overlaps with part of the synchronization sequence, the correlation result is a fixed value. When the local sequence completely overlaps with the synchronization sequence, the correlation result shows a peak. When the local sequence overlaps with the data field, the correlation result is a random variable. The value of the correlation result at the corresponding position is determined according to the probability distribution and confidence interval of each random variable, such as the confidence interval [a...]. i ,b iThe value of the relevant result is max(|a i |,|b i |).

[0152] The specific implementation of the sequence search algorithm is as follows:

[0153] (1) Determine the optimization index. The optimization index is to optimize W so that W is as small as possible.

[0154] Figure 8 is a schematic diagram illustrating the generation of random variables in the relevant results provided in the embodiments of this application. Figure 8 exemplarily shows the relevant calculations for each given sequence and given shift τ, considering random variables when designing the sequence. It can be understood that in Figure 8, 10 or 01 under Manchester encoding are examples of data, which are actually random variables, and therefore the relevant results are also random variables.

[0155] Let the correlation result of the shift τ be H(τ), then Among them, c τ It is a constant. ( Let n (where n is an even number) be an independent random variable following a {0, 1} distribution. Let H(τ) be a corresponding random variable ξ in Figure 7. i .

[0156] As shown in Figure 8, when Manchester encoding is used for the data portion, the data can include several random 0-1 pairs. s1, ..., s7 are components of the local sequence, with values ​​of 0 and 1. The two sequences are paired up. If they cannot be paired exactly, the result is as shown in Figure 8; if they are paired exactly, then s1 does not exist. The two sequences shown here refer to the local sequence and the received sequence. Because s1 ∈ {1, 0}, the contribution of the corresponding position of s1 to the correlation can be considered as a random variable X following a {0, 1}-distribution. (τ) When s1 does not exist, X (τ) It does not exist. For the remaining positions {s} i ,s i+1 If s i =s i+1 =1, then the contribution of sequence correlation to the pair at that position is 1; if s i =s i+1 =0, then the contribution of sequence correlation to the pair at that position is 0; if s i ≠s i+1 If the sequence correlation at that position pair is 50% 1 and 50% 0, then the contribution is 1. Therefore, for each position pair {s} i ,s i+1 The contribution of a variable to the correlation can be viewed as a random variable. It follows a {0,1}-distribution.

[0157] Thus, H(τ) can be expressed as Let the confidence interval of H(τ) be [a i , b i . Let H τ = max(|a i |, |b i |). Then the weight function W satisfies:

[0158] index ∈ R is the weight exponent, and R represents real numbers. For example, when the weight exponent is 6, etc., they are not listed one by one here. By optimizing W, W can be made as small as possible.

[0159] (2) Select the seed sequence. When searching for the sequence, the number of 1s in the sequence (i.e., the weight of the sequence) needs to be considered. Therefore, a certain important random sequence can be used as the seed sequence.

[0160] For example, select the M-sequence or the modified M-sequence as the seed sequence, so as to make the number of 1s and 0s in the sequence as the same or close as possible.

[0161] (3) Genetic algorithm optimization. For the seed sequence, use the genetic algorithm to continuously optimize until the target sequence is found. For example, the target sequence can make W less than or equal to a certain value. For example, W is less than or equal to 26340.

[0162] The specific process is as follows: calculate the weight function W of the sequence; swap any two positions with different values in the sequence to obtain a new sequence, and calculate the weight function W' of the new sequence; compare the weight functions W, W', if W' < W, then retain the new sequence; otherwise restore it to the original sequence; repeat the above steps until an ideal sequence is found.

[0163] Optionally, using the design method provided in the embodiments of the present application, the difference between the total number of 1s and the total number of 0s in the finally obtained ideal sequence is 0 or 2 or 4 or 6.

[0164] Table 4 indicates whether the weighting function considers the influence of random variables when designing the sequence. "No" indicates that the weighting function considers both fixed values ​​and peak values, meaning the weighting function is determined based on these. "Yes" indicates that the weighting function considers not only fixed values ​​and peak values ​​but also random variables. For an explanation of fixed values, peak values, and random variables, please refer to Figure 7; details are omitted here. Without considering random variables, the PSLR can be calculated. With considering random variables, the PSLR at a confidence level of 0.99 can be calculated. A PSLR at a confidence level of 0.99 means that each random variable in the relevant outcome has a 99% probability that the PSLR will not be lower than the aforementioned PSLR. For example, for the sequence 00010111 of length 8, a PSLR at a confidence level of 0.99 means that each random variable in the relevant outcome has a 99% probability that the PSLR will not be lower than 6.02.

[0165] When designing the second synchronization sequence, by considering the influence of random data on the sequence, the receiver can still effectively and reliably detect the synchronization field even if it correlates the local sequence with the data field.

[0166] When designing the second synchronization sequence, the influence of random data on the sequence can be ignored, which can simplify the sequence design and reduce the implementation complexity.

[0167] As another possible implementation 3, the second synchronization sequence is any of the sequences shown in Table 5. It is understood that the standard can define one second synchronization sequence, or define one or more second synchronization sequences of different lengths. Therefore, one sequence in Table 5 can serve as a second synchronization sequence, or one of the multiple sequences in Table 4 can serve as a second synchronization sequence. Further explanation of Table 5 is given in Table 4 and will not be elaborated upon here.

[0168] Table 5

[0169] The sequences shown in Table 5, after undergoing at least one of the operations of cyclic shift, reversal, or inversion, still fall within the protection scope of the second synchronization sequence shown in the embodiments of this application. Further explanation of the inversion operation is given in Table 2 and will not be elaborated here.

[0170] Generating a synchronization field based on the second synchronization sequence shown above can effectively reduce the sidelobe amplitude of the second synchronization sequence, improve the accuracy of related detection, and thus improve the accuracy of synchronization.

[0171] The design principles of each second synchronization sequence shown in implementation method 3 are described below.

[0172] The design principle of the second synchronization sequence shown in Implementation Method 2 is explained using OOK modulation as an example. The sequences shown in Table 5 are designed using OOK modulation as an example. For an explanation of OOK modulation, please refer to existing principles; details will not be provided here.

[0173] The design principles shown in Implementation Method 2 also apply to Implementation Method 3. The difference between OOK modulation and MSK modulation lies in the determination of the optimization metrics. When using MSK modulation, the synchronization sequence carried by the synchronization field is largely the same as the local sequence. When using OOK modulation, the synchronization sequence carried by the synchronization field is seq, and the local sequence is 2seq-1. This will be explained in detail below.

[0174] The specific implementation of the sequence search algorithm is as follows:

[0175] (1) Determine the optimization indicators.

[0176] Let the correlation result of the shift τ be H(τ), then Among them, c τ It is a constant. ( Let n (where n is an even number) be an independent random variable following a {0, 1} distribution. Let H(τ) be a corresponding random variable ξ in Figure 7. i .

[0177] As shown in Figure 8, when Manchester encoding is used for the data portion, the data can include several random 0-1 pairs. s1, ..., s7 are components of the local sequence, with values ​​of +1 and -1. Pairing the two sequences together, if they cannot be perfectly paired, the result is as shown in Figure 8; if they are perfectly paired, then s1 does not exist. Because s1 ∈ {1, -1}, the contribution of the position corresponding to s1 to the correlation can be considered as a random variable X following a {0, 1}-distribution. (τ) When s1 does not exist, X (τ) It does not exist. For the remaining positions {s} i ,s i+1 If s i =s i+1=1, then the contribution of sequence correlation to the pair at that position is 1; if s i =s i+1 =-1, then the contribution of sequence correlation to the pair at that position is -1; if s i ≠s i+1 If the sequence correlation contributes 1 for 50% and -1 for 50% of the position pair, then the sequence correlation at that position pair is... Therefore, for each position pair {s... i ,s i+1 The contribution of a variable to the correlation can be viewed as a random variable. It follows a {0,1}-distribution.

[0178] Therefore, H(τ) can be expressed as Let the confidence interval of H(τ) be [a i ,b i Let H τ =max(|a i |,|b i |), then the weight function W satisfies:

[0179] index∈R is the weight exponent, where R represents a real number. Examples of weight exponents include 6, etc., which will not be listed here. By optimizing W, W can be made as small as possible.

[0180] (2) Select the seed sequence.

[0181] (3) Optimization of genetic algorithm.

[0182] For explanations of steps (2) and (3), please refer to the design principles of implementation method 2, which will not be detailed here.

[0183] Optionally, by adopting the design method provided in the embodiments of this application, the difference between the total number of 1s and the total number of 0s in the final target sequence is 2, 4, 6, or 10.

[0184] When designing the second synchronization sequence, by considering the influence of random data on the sequence, the receiver can still effectively detect the synchronization field even if it correlates the local sequence with the data field.

[0185] When designing the second synchronization sequence, the influence of random data on the sequence can be ignored, which can simplify the sequence design and reduce the implementation complexity.

[0186] For the Manchester encoding shown in Table 6, the second synchronization sequence shown in Table 4 or Table 5 can be obtained through the above design principles.

[0187] Table 6

[0188] For the Manchester encoding shown in Table 7, the second synchronization sequence shown in Table 8 can be obtained through the above design principles.

[0189] Table 7

[0190] Table 8

[0191] For an explanation of Table 8, please refer to Table 4 or Table 5, etc., and will not be elaborated here.

[0192] The synchronization sequences shown above can be individual embodiments, or the features satisfied by each synchronization sequence can be individual embodiments, or the design ideas of each synchronization sequence can be individual embodiments, or the features satisfied by the synchronization sequence and the synchronization sequence can be combined into an embodiment, etc., which will not be listed here.

[0193] The following describes the MCS and data rate involved in the embodiments of this application.

[0194] Table 9 shows an exemplary MCS table for OOK modulation. Table 10 shows an exemplary MCS table for MSK modulation.

[0195] Table 9

[0196] Table 10

[0197] Based on the relationship between MCS and data rate, the following explanation of MCS and synchronization sequence also applies to the relationship between data rate and synchronization sequence.

[0198] As one possible implementation, a second synchronization sequence can be defined to correspond to different MCSs, or in other words, a second synchronization sequence can be defined for each different MCS. Optionally, a first synchronization sequence can be defined to correspond to different MCSs, or in other words, a first synchronization sequence can be defined for each different MCS. For example, if the MCS of the data field is 0, the second synchronization sequence carried by the synchronization field is 0 0 1 1 0 0 1 0 0 1 1 1 1 0 1 0 (as shown in Table 8). If the MCS of the data field is 1, the second synchronization sequence carried by the synchronization field is still 0 0 1 1 0 0 1 0 0 1 1 1 1 0 1 0. That is, for all uplink MCSs, the synchronization field carries the same first or second synchronization sequence.

[0199] As another possible implementation, the length of the second synchronization sequence corresponds to the MCS, or the length of the second synchronization sequence corresponds to the data rate. Optionally, the length of the first synchronization sequence corresponds to the MCS, or the length of the first synchronization sequence corresponds to the data rate. In other words, different uplink MCSs correspond to second synchronization sequences of different lengths, or different uplink MCSs correspond to first synchronization sequences of different lengths. For example, the higher the data rate corresponding to the MCS, the shorter the length of the second synchronization sequence, or the shorter the length of the first synchronization sequence. Alternatively, the standard can define the relationship between length and MCS. In a specific implementation, the AMP STA can determine the length based on the MCS, and then select a second synchronization sequence of the aforementioned length from among the multiple second synchronization sequences defined in the standard.

[0200] As another possible implementation, the synchronization field is generated based on multiple repeated second synchronization sequences. The number of repetitions of the second synchronization sequence is determined by the data rate of the data field or by the MCS of the data field. Optionally, the synchronization field is generated based on multiple repeated first synchronization sequences. For example, the higher the data rate corresponding to the MCS, the fewer the repetitions. Alternatively, the standard can define one second synchronization sequence or one first synchronization sequence. In a specific implementation, AMP STA can determine the number of repetitions of the second synchronization sequence or the number of repetitions of the first synchronization sequence based on the MCS of the data field, and generate the synchronization field based on multiple repeated second synchronization sequences or multiple repeated first synchronization sequences. Of course, the standard can also define multiple second synchronization sequences or multiple first synchronization sequences.

[0201] As another possible implementation, the duration of each bit in the second synchronization sequence corresponds to the MCS, or the duration of each bit in the second synchronization sequence corresponds to the data rate. Optionally, the duration of each bit in the first synchronization sequence corresponds to the MCS, or the duration of each bit in the first synchronization sequence corresponds to the data rate. For example, the higher the data rate corresponding to the MCS, the shorter the duration of each bit. For another example, the standard can define one second synchronization sequence or one first synchronization sequence. In a specific implementation, the AMP STA can determine the duration of each bit in the second synchronization sequence, or the duration of each bit in the first synchronization sequence, based on the MCS of the data field, and generate and send the synchronization field. Of course, the standard can also define multiple second synchronization sequences or multiple first synchronization sequences.

[0202] As one possible implementation, the modulation method of the synchronization field is the same as that of the data field.

[0203] As another possible implementation, the synchronization field uses OOK modulation. This can reduce the power consumption of the AMP STA.

[0204] As another possible implementation, the modulation scheme of the synchronization field corresponds to the MCS, or the modulation scheme of the synchronization field corresponds to the data rate. For example, OOK modulation can be used for low data rates, and MSK modulation can be used for high data rates. The low data rate and high data rate mentioned here are relative, and the specific values ​​are not limited in the embodiments of this application.

[0205] For any implementation methods or examples shown above that are not described in detail, please refer to other implementation methods or other examples.

[0206] The apparatus provided in the embodiments of this application will be described below.

[0207] This application divides the device into functional modules according to the above method embodiments. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware or as software functional modules. It should be noted that the module division in this application is illustrative and only represents one logical functional division; other division methods may be used in actual implementation. The device of the embodiment of this application will be described in detail below with reference to Figures 9 to 11.

[0208] Figure 9 is a schematic diagram of the device provided in an embodiment of this application. As shown in Figure 9, the device includes a processing module 901 and a transceiver module 902. The transceiver module 902 can implement corresponding communication functions, and the processing module 901 is used to implement corresponding processing functions. For example, the transceiver module 902 can also be referred to as an interface, a communication interface, or a communication module, etc.

[0209] In some embodiments of this application, the device can be used to perform the actions performed by the first station in the above method embodiments. In this case, the device can be the device itself or a chip or functional module configurable in the device. The transceiver module 902 is used to perform the transceiver-related operations of the first station in the above method embodiments, and the processing module 901 is used to perform the processing-related operations of the first station in the above method embodiments.

[0210] Processing module 901 is used to generate synchronization fields;

[0211] The transceiver module 902 is used to send or output synchronization fields.

[0212] Reusing Figure 9, in some other embodiments of this application, the device can be used to perform the actions performed by the second station in the above method embodiments. In this case, the device can be the device itself or a chip or functional module configurable in the device. The transceiver module 902 is used to perform the transceiver-related operations of the second station in the above method embodiments, and the processing module 901 is used to perform the processing-related operations of the second station in the above method embodiments.

[0213] The transceiver module 902 is used to receive or input synchronization fields;

[0214] Processing module 901 is used to process the synchronization field. For example, processing module 901 is used to perform phase detection based on the first synchronization sequence and correlation detection based on the second synchronization sequence.

[0215] For example, the transceiver module 902 described above can be an antenna module. Alternatively, the transceiver module 902 can be an input / output module. Optionally, in the above embodiments, the device may further include a storage module, which can be used to store instructions and / or data. The processing module 901 can read the instructions and / or data from the storage module to enable the device to implement the aforementioned method embodiments. For example, this storage module can be used to store the first synchronization sequence, the second synchronization sequence, etc., as shown above.

[0216] For details regarding the specific explanations of each term, noun, or step in the above embodiments, please refer to the descriptions in the above method embodiments; they will not be detailed here.

[0217] The specific descriptions of the transceiver module and processing module shown in the above embodiments are merely examples. For the specific functions or execution steps of the transceiver module and processing module, please refer to the above method embodiments, which will not be described in detail here.

[0218] It is understandable that the module division in the above-mentioned device is merely a logical functional division. Each function can correspond to a functional module, or two or more functions can be integrated into one functional module. In actual implementation, all or some modules can be integrated into one physical entity, or they can be distributed across different physical entities. Furthermore, the above-mentioned functional modules can be implemented in hardware, software, or a combination of both.

[0219] In one example, the functional unit in any of the above devices may be one or more integrated circuits configured to implement the above methods, such as: one or more application-specific integrated circuits (ASICs), or one or more central processing units (CPUs), one or more microcontroller units (MCUs), one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs), or a combination of at least two of these integrated circuit forms.

[0220] The apparatus of the embodiments of this application has been described above. The possible product forms of the apparatus are described below. Any product possessing the functions of the apparatus described in FIG. 9 above falls within the protection scope of the embodiments of this application. The following description is merely illustrative and does not limit the product form of the apparatus of the embodiments of this application to this.

[0221] In one possible implementation, in the device shown in FIG9, the processing module 901 can be one or more processors, and the transceiver module 902 can be a transceiver, or the transceiver module 902 can also be a transmitting module and a receiving module. The transmitting module can be a transmitter, and the receiving module can be a receiver. The transmitting module and the receiving module are integrated into one device, such as a transceiver. In the embodiments of this application, the processor and the transceiver can be coupled, etc., and the connection method between the processor and the transceiver is not limited in the embodiments of this application. In the process of executing the above method, the process of sending information in the above method can be the process of the processor outputting the above information. When outputting the above information, the processor outputs the above information to the transceiver so that the transceiver can transmit it. After the above information is output by the processor, it may need to undergo other processing before reaching the transceiver. Similarly, the process of receiving information in the above method can be the process of the processor receiving the input above information. When the processor receives the input information, the transceiver receives the above information and inputs it into the processor. Furthermore, after the transceiver receives the above information, the above information may need to undergo other processing before being input into the processor.

[0222] Figure 10 is a schematic diagram of an apparatus provided in an embodiment of this application. As shown in Figure 10, the apparatus 100 includes one or more processors 1020 and transceivers 1010.

[0223] In some embodiments of this application, the above-described apparatus can be used to execute the steps, methods, or functions performed by the first station. For example, the processor 1020 can be used to execute the functions or steps implemented by the processing module 901 shown in FIG. 9, and the transceiver 1010 can be used to execute the functions or steps implemented by the transceiver module 902 shown in FIG. 9. Detailed descriptions of the processor 1020 and transceiver 1010 can be found in FIG. 9 or the method embodiments shown above, and will not be elaborated further here.

[0224] In other embodiments of this application, the above-described apparatus is used to execute the steps, methods, or functions performed by the second station. For example, the processor 1020 can be used to execute the functions or steps implemented by the processing module 901 shown in FIG. 9, and the transceiver 1010 can be used to execute the functions or steps implemented by the transceiver module 902 shown in FIG. 9. Detailed descriptions of the processor 1020 and transceiver 1010 can be found in FIG. 9 or the method embodiments shown above, and will not be elaborated further here.

[0225] The following explanation uses the device shown in Figure 10 as an example of a communication device.

[0226] In various implementations of the communication device shown in Figure 10, the transceiver may include a receiver for performing a receiving function (or operation) and a transmitter for performing a transmitting function (or operation). The transceiver is also used to communicate with other devices / appliances via a transmission medium.

[0227] Optionally, the communication device 100 may further include one or more memories 1030 for storing program instructions and / or data. The memories 1030 are coupled to the processor 1020. The coupling in this embodiment is an indirect coupling or communication connection between communication devices, units, or modules, and can be electrical, mechanical, or other forms, used for information exchange between the communication devices, units, or modules. The processor 1020 may operate in conjunction with the memories 1030. The processor 1020 can execute program instructions stored in the memories 1030. Optionally, at least one of the above-mentioned memories may be included in the processor.

[0228] This application embodiment does not limit the specific connection medium between the transceiver 1010, processor 1020, and memory 1030. In Figure 10, the memory 1030, processor 1020, and transceiver 1010 are connected via a bus 1040, which is represented by a thick line in Figure 10. The connection methods between other components are only illustrative and are not intended to be limiting. The bus can be divided into address bus, data bus, control bus, etc. For ease of illustration, only one thick line is used in Figure 10, but this does not mean that there is only one bus or one type of bus.

[0229] In the embodiments of this application, the processor may be a general-purpose processor, a digital signal processor, an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc., and can implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the methods disclosed in the embodiments of this application can be directly manifested as being executed by a hardware processor, or being executed by a combination of hardware and software modules within the processor.

[0230] In this application embodiment, the memory may include, but is not limited to, non-volatile memory such as hard disk drive (HDD) or solid-state drive (SSD), random access memory (RAM), erasable programmable read-only memory (EPROM), read-only memory (ROM), or compact disc read-only memory (CD-ROM), etc. Memory is any storage medium capable of carrying or storing program code having instruction or data structure forms, and capable of being read and / or written by a computer (such as the communication device shown in this application), but is not limited to this. The memory in this application embodiment may also be a circuit or any other device capable of implementing storage functions, used to store program instructions and / or data.

[0231] The processor 1020 is mainly used to process communication protocols and communication data, control the entire communication device, execute software programs, and process the data of the software programs. The memory 1030 is mainly used to store software programs and data. The transceiver 1010 may include control circuitry and an antenna. The control circuitry is mainly used for converting baseband signals to radio frequency signals and processing radio frequency signals. The antenna is mainly used for transmitting and receiving radio frequency signals in the form of electromagnetic waves. Input / output devices, such as touchscreens, displays, and keyboards, are mainly used to receive user input data and output data to the user.

[0232] When the communication device is powered on, the processor 1020 can read the software program in the memory 1030, interpret and execute the instructions of the software program, and process the data of the software program. When data needs to be transmitted wirelessly, the processor 1020 performs baseband processing on the data to be transmitted and outputs the baseband signal to the radio frequency (RF) circuit. The RF circuit then performs RF processing on the baseband signal and transmits the RF signal outward in the form of electromagnetic waves through the antenna. When data is sent to the communication device, the RF circuit receives the RF signal through the antenna, converts the RF signal into a baseband signal, and outputs the baseband signal to the processor 1020. The processor 1020 converts the baseband signal into data and processes the data.

[0233] In another implementation, the radio frequency circuitry and antenna can be set up independently of the processor performing baseband processing. For example, in a distributed scenario, the radio frequency circuitry and antenna can be arranged remotely, independent of the communication device.

[0234] The communication device shown in this application embodiment may have more components than those in Figure 10, and this application embodiment does not limit this. The methods executed by the processor and transceiver shown above are only examples, and the specific steps executed by the processor and transceiver can be referred to the methods described above. The dashed lines in Figure 10 indicate optional parts.

[0235] In another possible implementation, in the communication device shown in Figure 9, the processing module 901 can be one or more logic circuits, and the transceiver module 902 can be an input / output interface, or a communication interface, or an interface circuit, or an interface, etc. Alternatively, the transceiver module 902 can also be a transmitting module and a receiving module. The transmitting module can be an output interface, and the receiving module can be an input interface. The transmitting module and the receiving module are integrated into one module, such as an input / output interface.

[0236] Figure 11 is a schematic diagram of a chip provided in an embodiment of this application. As shown in Figure 11, the chip includes a logic circuit 1101 and an interface 1102. That is, the processing module 901 can be implemented using the logic circuit 1101, and the transceiver module 902 can be implemented using the interface 1102. The logic circuit 1101 can be a chip, processing circuit, integrated circuit, or system-on-chip (SoC) chip, etc., and the interface 1102 can be a communication interface, input / output interface, pins, etc. For example, Figure 11 illustrates a chip using the aforementioned device as an example, where the chip includes a logic circuit 1101 and an interface 1102.

[0237] In this embodiment, the logic circuit and the interface can also be coupled to each other. The specific connection method of the logic circuit and the interface is not limited in this embodiment. For example, the logic circuit 1101 can be used to execute the functions or steps implemented by the processing module 901 shown in FIG. 9, and the interface 1102 can be used to execute the functions or steps implemented by the transceiver module 902 shown in FIG. 9. For a detailed description of the logic circuit 1101 and the interface 1102, please refer to FIG. 9 or the method embodiment shown above, which will not be detailed here.

[0238] The communication device shown in the embodiments of this application can implement the method provided in the embodiments of this application in hardware form, or it can implement the method provided in the embodiments of this application in software form, etc., and the embodiments of this application do not limit it in this way.

[0239] Furthermore, embodiments of this application also provide a communication system, which includes a first station and a second station, the first station and the second station being used to perform the methods in any of the foregoing embodiments.

[0240] This application also provides a computer program for implementing the operations and / or processes performed by various sites in the methods provided in this application.

[0241] This application also provides a computer-readable storage medium storing computer code that, when executed on a computer, causes the computer to perform the operations and / or processes performed by various communication devices in the methods provided in this application.

[0242] This application also provides a computer program product comprising computer code or a computer program that, when run on a computer, causes the operations and / or processes performed by various entities in the method provided in this application to be executed.

[0243] In the embodiments provided in this application, it should be understood that the disclosed systems, communication devices, and methods can be implemented in other ways. For example, the communication device embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be indirect coupling or communication connection through some interfaces, communication devices, or modules, or it may be an electrical, mechanical, or other form of connection.

[0244] The modules described as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules; that is, they may be located in one place or distributed across multiple network modules. Some or all of the modules can be selected according to actual needs to achieve the technical effects of the solutions provided in the embodiments of this application.

[0245] Furthermore, the functional modules in the various embodiments of this application can be integrated into one processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The integrated modules described above can be implemented in hardware or as software functional modules.

[0246] If the integrated module is implemented as a software functional module and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a readable storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

Claims

1. A communication method, characterized in that, The method includes: A synchronization field is generated based on a first synchronization sequence and a second synchronization sequence. The first synchronization sequence includes one or more elements, each element including a first element and a second element. The first element and the second element alternate. The first element consists of n consecutive 1s, and the second element consists of n consecutive 0s, where n is a positive integer. The second synchronization sequence is different from the first synchronization sequence. Send the synchronization field.

2. The method according to claim 1, characterized in that, The first synchronization sequence corresponds to the modulation and coding strategy (MCS) of the data field, or the first synchronization sequence corresponds to the data rate of the data field. The data field and the synchronization field are contained in the physical layer protocol data unit (PPDU) of the environmental energy AMP.

3. The method according to claim 1 or 2, characterized in that, The first synchronization sequence is any one of the following: 010101;10101010;11110000;00001111;001111000011110000。 4. The method according to any one of claims 1-3, characterized in that, The second synchronization sequence is any one of the following: the longest linear shift register sequence, the Barker code sequence, the pseudo-random binary sequence PRBS, or the device identifier ID sequence.

5. The method according to any one of claims 1-3, characterized in that, The second synchronization sequence has a length of 8, and the second synchronization sequence is any one of the following: 0 1 0 1 0 0 1 1; 0 0 0 1 0 1 1 1; 0 0 1 1 1 0 1 0; 1 1 1 0 1 0 0 1; 0 0 1 0 0 1 1 1。 6. The method according to any one of claims 1-3, characterized in that, The second synchronization sequence has a length of 16 and is any one of the following: 0 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1; 0 0 0 0 0 0 1 1 1 0 0 1 1 1 0 1; 0 1 1 1 0 1 1 1 0 1 0 0 1 0 1 1; 0 0 0 1 0 1 0 1 1 0 1 1 0 0 1 1; 0 0 1 1 1 0 0 1 1 1 1 0 0 1 0 0; 0 1 1 1 0 0 1 1 1 1 1 0 0 1 0 0。 7. The method according to any one of claims 1-3, characterized in that, The length of the second synchronization sequence is 32, and the second synchronization sequence is any one of the following: 1 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1; 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 0 0 0 1 1 1 0 1 1; 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 1 1 1 1 1; 0 1 0 0 1 1 1 0 1 0 1 1 0 0 1 0 0 1 0 1 1 1 1 0 0 1 0 1 1 1 0 0; 0 0 1 1 0 0 1 1 1 0 0 1 0 0 1 0 0 1 1 1 1 1 0 0 1 0 1 0 1 0 1 0; 0 0 1 1 1 0 0 1 1 1 0 0 1 0 0 1 1 1 1 1 1 0 0 1 0 0 1 0 0 1 0 0; 0 1 1 1 1 1 1 1 1 0 0 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 0 1 0 0。 8. The method according to any one of claims 1-3, characterized in that, The length of the second synchronization sequence is 48, and the second synchronization sequence is any one of the following: 1 1 1 1 0 1 1 0 0 0 1 1 0 0 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0 1 0 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 1 1; 0 0 1 1 1 1 1 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0; 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 1 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 0 0 1 0 0 1 0 1 0 0; 1 0 1 1 1 1 0 0 1 0 1 0 1 1 0 0 1 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 0 0 1 0 0 1 1 0 1 0 0 1 1 1 1; 0 0 1 1 1 0 0 1 0 1 0 1 0 0 1 1 1 0 0 1 0 0 1 0 1 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 1 0 1 1 1 0 1 0; 0 1 1 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 0。 9. The method according to any one of claims 1-3, characterized in that, The length of the second synchronization sequence is 64, and the second synchronization sequence is any one of the following: 1 1 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 1 0 0 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 1; 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0 1 1 1 0 1 0 1 1 1 1 0 1 0 1 0 0 1 1 0 1 0 1 1 1 0 1 1 0 1 1 1 1 0 1 1 1; 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 0 1 1 1 0 1 1 0 1 0 1 1 1 1 1 1 1 0 1; 1 0 1 0 0 1 1 0 1 0 0 1 1 1 1 0 0 1 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 0 1 1 1 0 0 1 1 0 1 1 1 1 1 0 0; 0 0 1 0 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 0 0 1 0 1 0 0 1 0 1 1 1 1 1 0 1 0 0 1 0 0 1 0 0; 0 1 1 1 1 1 1 0 0 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0; 0 1 1 1 1 1 1 0 0 1 0 0 1 1 1 1 0 0 1 0 0 1 0 0 1 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 1 1 0 0 1 0 1 0 1 0 0。 10. The method according to any one of claims 1-3, characterized in that, The length of the second synchronization sequence is 128, and the second synchronization sequence is any one of the following: 1 1 1 1 1 1 1 0 1 0 0 1 0 0 1 1 1 0 1 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 0 1 0 0 1 1 1 0 1 1 0 0 0 1 0 0 1 0 1 0 1 1 1 0 0 1 0 0 0 1 0 1 0 0 1 0 0 1 1 1 1 0 0 0 1 1 1 0 0 0 1 1 0 0 1 1 0 1 1 0 0 0 1 1 0 1 0 0 1 1 1 1 1; 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 0 1 0 1 1 1 0 0 0 1 0 0 0 1 0 1 1 0 1 0 1 0 0 0 0 1 1 0 1 0 0 0 0 1 1 1 0 1 1 1 0 1 1 0 0 1 1 1 1 0 1 1 0 0 1 0 0 1 1 0 1 1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 0 1 0 1 1 1 1 0 1 1 1 1 1 1 1 1; 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 1 1 0 0 1 0 0 1 1 1 1 0 1 1 1 0 0 1 0 0 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 0 1 1 1 1 1 0 0 1 0 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 1 1 1 1 1 1 1 0 1 0 0 1 1 0 0 1 1 1 0 0 1 1 1 0 0; 1 0 0 1 0 1 1 1 1 0 1 1 0 0 1 0 1 1 1 0 1 0 1 0 0 1 0 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 1 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0 1 0 0 1 1 1 0 0 1 1 0 1 1 0 0 1 0 1 1 0 0 1 1 0 0 1 1 1 0 0 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 1 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 1 1 0 0 1 0 1 0 0; 0 0 1 1 1 0 0 1 1 1 1 0 0 1 0 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 1 0 1 1 1 1 1 0 1 0 0 1 0 1 1 1 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 0 1 0 1 0 1。 11. The method according to claim 1, characterized in that, The second synchronization sequence corresponds to the MCS of the data field, or the second synchronization sequence corresponds to the data rate of the data field, and the data field and the synchronization field are contained in the AMP PPDU.

12. The method according to claim 1, characterized in that, The synchronization field is generated based on multiple repeated second synchronization sequences, the number of repetitions of which is determined based on the data rate of the data field or the MCS of the data field.

13. A communication method, characterized in that, The method includes: Receive synchronization fields; Phase detection is performed based on the synchronization field and the first synchronization sequence. The first synchronization sequence includes one or more elements, each element including a first element and a second element. The first element and the second element appear alternately. The first element consists of n consecutive 1s, and the second element consists of n consecutive 0s, where n is a positive integer. Correlation detection is performed based on the synchronization field and the second synchronization sequence, where the second synchronization sequence is different from the first synchronization sequence.

14. The method according to claim 13, characterized in that, The first synchronization sequence is any one of the following: 010101;10101010;00001111;001111000011110000;1110000001111000。 15. The method according to claim 13, characterized in that, The second synchronization sequence is any one of the following: the longest linear shift register sequence, the Barker code sequence, the pseudo-random binary sequence PRBS, or the device identifier ID sequence.

16. The method according to claim 13, characterized in that, The second synchronization sequence has a length of 8, and the second synchronization sequence is any one of the following: 0 1 0 1 0 0 1 1; 0 0 0 1 0 1 1 1; 0 0 1 1 1 0 1 0; 1 1 1 0 1 0 0 1; 0 0 1 0 0 1 1 1。 17. The method according to claim 13, characterized in that, The second synchronization sequence has a length of 16 and is any one of the following: 0 0 1 0 1 0 0 1 1 0 0 0 1 0 1 1; 0 0 0 0 0 0 1 1 1 0 0 1 1 1 0 1; 0 1 1 1 0 1 1 1 0 1 0 0 1 0 1 1; 0 0 0 1 0 1 0 1 1 0 1 1 0 0 1 1; 0 0 1 1 1 0 0 1 1 1 1 0 0 1 0 0; 0 1 1 1 0 0 1 1 1 1 1 0 0 1 0 0。 18. The method according to claim 13, characterized in that, The length of the second synchronization sequence is 32, and the second synchronization sequence is any one of the following: 1 1 1 0 1 0 0 1 1 0 0 0 1 0 1 0 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 1; 0 0 0 0 0 1 1 0 0 0 0 0 1 1 1 1 0 0 0 1 1 0 0 0 0 0 1 1 1 0 1 1; 0 0 0 0 0 0 1 0 0 0 0 1 1 1 1 0 0 1 1 0 0 1 1 0 1 0 1 1 1 1 1 1; 0 1 0 0 1 1 1 0 1 0 1 1 0 0 1 0 0 1 0 1 1 1 1 0 0 1 0 1 1 1 0 0; 0 0 1 1 0 0 1 1 1 0 0 1 0 0 1 0 0 1 1 1 1 1 0 0 1 0 1 0 1 0 1 0; 0 0 1 1 1 0 0 1 1 1 0 0 1 0 0 1 1 1 1 1 1 0 0 1 0 0 1 0 0 1 0 0; 0 1 1 1 1 1 1 1 1 0 0 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 0 1 0 0。 19. The method according to claim 13, characterized in that, The length of the second synchronization sequence is 48, and the second synchronization sequence is any one of the following: 1 1 1 1 0 1 1 0 0 0 1 1 0 0 0 0 0 1 1 0 1 0 0 0 1 0 1 0 0 1 0 1 0 1 0 0 1 1 0 1 0 0 1 1 0 1 1 1; 0 0 1 1 1 1 1 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0; 0 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 0 0 1 1 1 0 0 1 0 0 1 0 1 0 0 1 0 0 1 1 0 1 0 0 1 0 0 1 0 1 0 0; 1 0 1 1 1 1 0 0 1 0 1 0 1 1 0 0 1 1 1 0 0 1 0 1 0 1 0 1 1 1 0 0 1 0 0 1 0 0 1 1 0 1 0 0 1 1 1 1; 0 0 1 1 1 0 0 1 0 1 0 1 0 0 1 1 1 0 0 1 0 0 1 0 1 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 1 0 1 1 1 0 1 0; 0 1 1 1 1 1 0 0 1 0 0 1 1 0 0 1 1 1 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 1 1 0 0 1 0 1 0。 20. The method according to claim 13, characterized in that, The length of the second synchronization sequence is 64, and the second synchronization sequence is any one of the following: 1 1 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 0 1 1 0 0 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 1 0 1 0 1 0 1 0 1 1 0 0 0 0 1 1 0 1 0 0 1 0 1 1 1 1 1; 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0 0 0 0 0 1 1 0 0 0 1 1 1 0 1 0 1 1 1 1 0 1 0 1 0 0 1 1 0 1 0 1 1 1 0 1 1 0 1 1 1 1 0 1 1 1; 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 0 0 0 0 1 0 0 0 1 1 0 0 1 1 1 0 1 0 1 1 0 1 1 1 0 1 1 1 0 1 1 0 1 0 1 1 1 1 1 1 1 0 1; 1 0 1 0 0 1 1 0 1 0 0 1 1 1 1 0 0 1 1 0 1 0 1 0 0 1 0 1 1 1 0 1 0 0 1 0 1 0 1 0 0 1 1 0 1 0 1 0 0 1 1 1 0 0 1 1 0 1 1 1 1 1 0 0; 0 0 1 0 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 1 1 0 1 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 0 0 1 0 1 0 0 1 0 1 1 1 1 1 0 1 0 0 1 0 0 1 0 0; 0 1 1 1 1 1 1 0 0 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 1 1 1 0 0 1 1 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0 0 1 0 0 1 0 1 0 1 0 1 0; 0 1 1 1 1 1 1 0 0 1 0 0 1 1 1 1 0 0 1 0 0 1 0 0 1 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 0 1 0 1 1 1 0 0 1 0 1 0 1 0 0。 21. The method according to claim 13, characterized in that, The length of the second synchronization sequence is 128, and the second synchronization sequence is any one of the following: 1 1 1 1 1 1 1 0 1 0 0 1 0 0 1 1 1 0 1 0 0 0 1 1 0 1 0 0 1 0 1 1 0 0 1 0 1 0 1 0 1 0 0 0 0 1 0 1 0 0 1 1 0 0 0 0 1 0 0 1 1 1 0 1 1 0 0 0 1 0 0 1 0 1 0 1 1 1 0 0 1 0 0 0 1 0 1 0 0 1 0 0 1 1 1 1 0 0 0 1 1 1 0 0 0 1 1 0 0 1 1 0 1 1 0 0 0 1 1 0 1 0 0 1 1 1 1 1; 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 1 1 1 0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 0 1 0 1 1 1 0 0 0 1 0 0 0 1 0 1 1 0 1 0 1 0 0 0 0 1 1 0 1 0 0 0 0 1 1 1 0 1 1 1 0 1 1 0 0 1 1 1 1 0 1 1 0 0 1 0 0 1 1 0 1 1 0 0 1 1 0 0 1 1 1 1 1 1 1 1 0 1 0 1 1 1 1 0 1 1 1 1 1 1 1 1; 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 1 1 0 0 1 0 0 1 1 1 1 0 1 1 1 0 0 1 0 0 1 0 0 1 1 0 0 1 1 0 0 1 0 1 0 1 0 0 1 1 1 1 1 0 0 1 0 0 1 0 1 0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 0 1 1 1 1 1 1 1 1 0 1 0 0 1 1 0 0 1 1 1 0 0 1 1 1 0 0; 1 0 0 1 0 1 1 1 1 0 1 1 0 0 1 0 1 1 1 0 1 0 1 0 0 1 0 1 0 0 1 1 1 1 0 0 1 1 0 0 1 0 1 1 0 1 1 0 0 1 0 1 0 0 1 0 1 0 1 0 0 1 1 1 0 0 1 1 0 1 1 0 0 1 0 1 1 0 0 1 1 0 0 1 1 1 0 0 1 0 0 1 0 1 0 1 0 1 0 0 1 1 1 1 1 1 0 0 1 0 0 1 1 1 0 0 1 1 1 1 1 0 0 1 0 1 0 0; 0 0 1 1 1 0 0 1 1 1 1 0 0 1 0 1 0 0 1 1 1 1 1 1 0 0 1 1 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 0 0 1 0 1 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 0 1 1 0 0 1 0 1 0 0 1 0 1 0 0 1 0 0 1 0 0 1 1 1 0 1 1 1 1 1 0 1 0 0 1 0 1 1 1 0 1 0 0 1 0 0 1 0 0 1 0 0 1 0 1 0 0 1 0 1 0 1 0 1。 22. A communication device, characterized in that, Includes a module for performing the method as described in any one of claims 1-21.

23. A communication device, characterized in that, Includes a processor, the processor being configured to cause the communication device to implement the method as described in any one of claims 1-21.

24. A chip, characterized in that, It includes logic circuitry and an interface, the logic circuitry and the interface being coupled, the logic circuitry being configured to enable the chip to implement the method as described in any one of claims 1-21.

25. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program, which, when executed by a computer, performs the method as described in any one of claims 1-21.

26. A computer program product, characterized in that, When the computer program product is executed by a computer, the method described in any one of claims 1-21 is performed.

27. A communication system, characterized in that, It includes an ambient energy station AMP STA and an ambient energy access point AMP AP, wherein the AMP STA is used to perform the method as described in any one of claims 1-12, and the AMP AP is used to perform the method as described in any one of claims 13-21.