Aggregated MPDU frame structure

Abstract

Embodiments of the present application provide an aggregated MPDU frame structure, comprising: a first MPDU header, comprising a first MAC header and a first check field, wherein the first check field is located after the first MAC header; and one or more aggregated MSDUs, wherein each aggregated MSDU comprises a respective MSDU and a second check field, and each second check field is located after the corresponding MSDU. The embodiments of the present application can improve the transmission robustness of MSDUs while maintaining low transmission overhead.

Description

Aggregated MPDU frame structure Technical Field

[0001] This application relates to the field of communication technology, specifically to an aggregated MPDU frame structure. Background Technology

[0002] In the 802.11 Medium Access Control (MAC) protocol, when it comes to upper-layer payload carrying, two layers of data structures are involved: Medium Access Control Service Data Unit (MSDU) and Medium Access Control Protocol Data Unit (MPDU). Corresponding to these two layers of data structures, there are two aggregate packet formats: Aggregate MSDU (AMSDU) and Aggregate MPDU (AMPDU).

[0003] In existing technologies, to reduce transmission overhead, multiple MSDUs are aggregated into a single aggregated MSDU, which is then carried within an aggregated MPDU. However, when any one or more bits in this aggregated MPDU are corrupted, the receiver cannot identify which MSDUs are erroneous and often has to discard the entire MPDU, resulting in a very low MSDU transmission success rate.

[0004] There is an urgent need for an aggregated MPDU frame structure that can improve the transmission robustness of MSDU while maintaining low transmission overhead.

[0005] Summary of the Invention

[0006] In view of this, embodiments of this application provide an aggregated MPDU frame structure that can improve the transmission robustness of MSDU while maintaining low transmission overhead.

[0007] To achieve the above objectives, the embodiments of this application provide the following technical solutions.

[0008] In a first aspect, embodiments of this application provide an aggregated MPDU frame structure, including: a first MPDU header, comprising a first MAC header and a first check field, wherein the first check field is located after the first MAC header; and one or more aggregated MSDUs, each aggregated MSDU comprising its own MSDU and a second check field, wherein each second check field is located after the corresponding MSDU.

[0009] Optionally, the first MPDU header further includes a header length field, located before the first MAC header, used to indicate the total length from the first MAC header to the first check field.

[0010] Optionally, the first MPDU header further includes: an encrypted header field, located between the first MAC header and the first verification field, used to indicate information on the secure encryption and / or secure verification of the aggregated MSDU.

[0011] Optionally, the aggregated MPDU frame structure satisfies one or more of the following: the first check field is a frame check sequence field or a cyclic redundancy check field; the first check field is used to check all bits in the first MPDU header that are preceding itself; the first MPDU header further includes: a supplementary field of the first MPDU header; the supplementary field of the first MPDU header is located after the first check field.

[0012] Optionally, each aggregated MSDU may also include: a first MPDU subframe header, located before the MSDU in the aggregated MSDU.

[0013] Optionally, each aggregated MSDU may also include a message complete code field, located between the MSDU and the second check field of the aggregated MSDU.

[0014] Optionally, the computation object of the message complete code in each aggregated MSDU includes one or more of the following: the header of the first MPDU subframe in the aggregated MSDU; the MSDU in the aggregated MSDU; and partial information in the header of the first MPDU.

[0015] Optionally, the first MPDU header further includes: an encryption header field for indicating information on the security encryption and / or security verification of the aggregated MSDU; some information in the first MPDU header includes one or more of the following: some information in the first MAC header; some information in the encryption header field.

[0016] Optionally, each first MPDU subframe header includes one or more of the following: a first sequence number field, used to identify the sequence number of the MSDU in the aggregated MSDU; a first encrypted sequence number field, used to identify the encrypted sequence number of the MSDU in the aggregated MSDU; a destination address field of the MSDU in the aggregated MSDU; a source address field of the MSDU in the aggregated MSDU; and a fragment number field, used to identify the fragments of the MSDU in the aggregated MSDU.

[0017] Optionally, the first MPDU header further includes a second serial number field; wherein the serial number in the second serial number field is used as a base value, and the serial number in the first serial number field is used as an offset value; the sum of the base value and the offset value is used to identify the complete serial number of the MSDU in the aggregated MSDU to which the second serial number field belongs.

[0018] Optionally, the first MPDU header further includes a second encrypted serial number field; wherein, the encrypted serial number in the second encrypted serial number field serves as an encryption base value, and the serial number in the first serial number field serves as an encryption offset value; the sum of the encryption base value and the encryption offset value is used to identify the complete encrypted serial number of the MSDU in the aggregated MSDU to which the second encrypted serial number field belongs.

[0019] Optionally, each aggregated MSDU satisfies one or more of the following: the second check field is a frame check sequence field or a cyclic redundancy check field; the second check field is used to check all bits preceding itself in the aggregated MSDU; each aggregated MSDU also includes: a supplementary field of the aggregated MSDU; the supplementary field of each aggregated MSDU is located after the second check field of the aggregated MSDU; each aggregated MSDU also includes a first MPDU subframe header, the first MPDU subframe header having a fixed known length; each aggregated MSDU also includes a message integrity code field, the message integrity code field having a fixed known length; the second check field having a fixed known length.

[0020] Optionally, the aggregated MPDU frame structure further includes: a first delimiter field; wherein the first delimiter field is located before and adjacent to the first MPDU header; and / or, the first delimiter field corresponds one-to-one with the aggregated MSDU, and is located before and adjacent to the corresponding aggregated MSDU.

[0021] Optionally, the first delimiter field includes: a first indicator field for indicating whether the field adjacent to and following the first delimiter field carries a first MPDU header or an aggregated MSDU; a second indicator field for indicating the type of delimiter carried by the first delimiter field, the type including a first delimiter type and a traditional delimiter type; a length field, in response to the first indicator field indicating a first MPDU header, the length field indicating the length from the first MPDU header to the last aggregated MSDU, or in response to the first indicator field indicating an aggregated MSDU, the length field indicating the length of the aggregated MSDU corresponding to the first delimiter field; a third verification field; and a first delimiter signature field.

[0022] Optionally, the length field satisfies one or more of the following: in response to the first indication field indicating a first MPDU header, and the aggregated MSDU further including a supplementary field after the third check field, the length field is used to indicate the length of the supplementary field from the first MPDU header to the last aggregated MSDU; in response to the first indication field indicating an aggregated MSDU, and the aggregated MSDU further including a supplementary field after the third check field, the length field is used to indicate the length of other fields in the aggregated MSDU corresponding to the first delimiter field, excluding the supplementary field of the aggregated MSDU.

[0023] Optionally, the first delimiter field satisfies one or more of the following: the first indicator field occupies a single bit; the second indicator field occupies a single bit; the number of bits occupied by the first and second indicator fields in the first delimiter is the same as the number of bits occupied by the reserved field in the traditional delimiter; the first indicator field is located before the second indicator field; the third check field is a frame check sequence field or a cyclic redundancy check field; the third check field is used to check all bits in the first delimiter that are located before itself; the definition of the first delimiter signature field is consistent with the definition of the delimiter signature field in the traditional delimiter.

[0024] Secondly, embodiments of this application provide a communication method, including: sending a first message, wherein the first message includes an aggregated MPDU provided in the first aspect.

[0025] Thirdly, embodiments of this application provide a communication method, including: receiving a first message, wherein the first message includes an aggregated MPDU provided in the first aspect.

[0026] Fourthly, embodiments of this application provide a communication device, including: a sending module, configured to send a first message, the first message including the aggregated MPDU provided in the first aspect.

[0027] Fifthly, embodiments of this application provide a communication device, including: a receiving module, configured to receive a first message, the first message including the aggregated MPDU provided in the first aspect.

[0028] In a sixth aspect, embodiments of this application also provide a computer-readable storage medium having a computer program stored thereon, wherein when the computer program is run by a processor, the communication method provided in the second aspect or the communication method provided in the third aspect is executed.

[0029] In a seventh aspect, embodiments of this application provide a WIFI transmitter, including a memory and a processor; the memory stores a computer program that can run on the processor, and the processor executes the communication method provided in the second aspect when running the computer program.

[0030] Eighthly, embodiments of this application provide a WIFI receiver, including a memory and a processor; the memory stores a computer program that can run on the processor, and the processor executes the communication method provided in the third aspect when running the computer program.

[0031] Ninthly, embodiments of this application provide a computer program product, the computer program product including a computer program, which, when run on a computer, causes the computer to execute the communication method provided in the second or third aspect.

[0032] In a tenth aspect, embodiments of this application provide a chip (or communication device) storing a computer program, which, when executed by the chip, causes the communication method provided in the second or third aspect to be executed.

[0033] In the eleventh aspect, embodiments of this application provide a chip module on which a computer program is stored. When the computer program is executed by the chip module, the communication method provided by the second or third aspect is executed.

[0034] In a twelfth aspect, embodiments of this application provide a communication system, the communication system including means for performing the method provided in the second aspect and means for performing the method provided in the third aspect.

[0035] Compared with the prior art, the technical solution of this application embodiment has the following beneficial effects:

[0036] This application provides an aggregated MPDU frame structure, including a first MPDU header and one or more aggregated MSDUs. The first MPDU header includes a first MAC header and a first checksum field. Each aggregated MSDU includes its own MSDU and a second checksum field. This allows for the aggregation of multiple MSDUs, with the first checksum field used to check the first MAC header, and multiple second checksum fields used to check their respective MSDUs. When any one or more bits in this aggregated MPDU are corrupted, the error can be located using the results of the individual checks, without discarding the entire MPDU, effectively improving the transmission robustness of the MSDU. Furthermore, by using aggregated MPDUs, lower transmission overhead can be maintained. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0038] Figure 1 is a schematic diagram of an aggregated MSDU frame structure in the prior art;

[0039] Figure 2 is a schematic diagram of an aggregated MPDU frame structure in the prior art;

[0040] Figure 3 is a schematic diagram of an aggregated MPDU frame structure containing aggregated MSDU in the prior art;

[0041] Figure 4 is a schematic diagram of an aggregated MPDU frame structure containing multiple non-aggregated MSDUs in the prior art;

[0042] Figure 5 is a schematic diagram of the first aggregated MPDU frame structure in the embodiments of this application;

[0043] Figure 6 is a schematic diagram of the field structure of the first MPDU header in the embodiments of this application;

[0044] Figure 7 is a schematic diagram of the field structure of the second type of first MPDU header in an embodiment of this application;

[0045] Figure 8 is a schematic diagram of the field structure of the first aggregated MSDU in the embodiments of this application;

[0046] Figure 9 is a schematic diagram of the field structure of the second type of aggregated MSDU in the embodiments of this application;

[0047] Figure 10 is a schematic diagram of the field structure of a first MPDU subframe header in an embodiment of this application;

[0048] Figure 11 is a schematic diagram of the field structure of a first delimiter field in an embodiment of this application;

[0049] Figure 12 is a schematic diagram of the mapping field of the first type of length field in the embodiments of this application;

[0050] Figure 13 is a schematic diagram of the mapping field of the second type of length field in the embodiments of this application;

[0051] Figure 14 is a schematic diagram of the second type of aggregated MPDU frame structure in the embodiments of this application;

[0052] Figure 15 is a schematic diagram of the third type of aggregated MPDU frame structure in the embodiments of this application;

[0053] Figure 16 is a schematic diagram of a communication method in an embodiment of this application;

[0054] Figure 17 is a schematic diagram of the hardware structure of a communication device according to an embodiment of this application. Detailed Implementation

[0055] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0056] The communication systems applicable to the embodiments of this application include, but are not limited to, third-generation (3G), LTE, fourth-generation (4G), fifth-generation (5G), NR, and future evolution systems or multiple converged communication systems. The 5G system can be a non-standalone (NSA) 5G system or a standalone (SA) 5G system. The solutions of the embodiments of this application can also be applied to various new communication systems in the future, such as 6G and 7G.

[0057] This application mainly relates to communication between WIFI devices (such as WIFI sender and WIFI receiver).

[0058] The WIFI device can be a terminal device (or a terminal) that supports WIFI functionality. In this application embodiment, the terminal can refer to various forms of user equipment (UE), access terminal, user unit, user station, mobile station, mobile station (MS), remote station, remote terminal, mobile device, user terminal, terminal equipment, wireless communication device, user agent, or user device that supports WIFI functionality. The terminal can also be a cellular phone, cordless phone, Session Initiation Protocol (SIP) phone, Wireless Local Loop (WLL) station, Personal Digital Assistant (PDA), handheld device with wireless communication functionality, computing device, or other processing device connected to a wireless modem, in-vehicle device, wearable device, a terminal in a future 5G network, or a terminal in a future evolved Public Land Mobile Network (PLMN), etc. This application embodiment does not limit this to any particular type.

[0059] The peer device can be a network device that supports WIFI or a terminal device that supports WIFI.

[0060] The network device in this application embodiment can also be called an access network device, for example, it can be a base station (BS) (also called a base station device). A network device is a device deployed in a radio access network (RAN) to provide wireless communication functions. For example, in second-generation (2G) networks, equipment providing base station functionality includes base transceiver stations (BTS); in 3G networks, it includes Node Bs; in 4G networks, it includes evolved Node Bs (eNBs); in wireless local area networks (WLANs), it is an access point (AP); in NR, it includes next-generation node base stations (gNBs) and further evolved Node Bs (ng-eNBs). The gNB communicates with the terminal using NR technology, while the ng-eNB communicates with the terminal using evolved Universal Terrestrial Radio Access (E-UTRA) technology. Both gNBs and ng-eNBs can connect to the 5G core network. The network equipment in this application embodiment also includes equipment providing base station functionality in future new communication systems.

[0061] As mentioned earlier, the 802.11 MAC protocol involves MSDU and MPDU. Corresponding to these two layers of data structures, there are two aggregate packet formats: aggregated MSDU and aggregated MPDU.

[0062] MSDU is generally an Ethernet message that, after being processed by the 802.11 MAC layer with the addition of a message integrity code (MIC) for integrity verification, framing, message buffering in power-saving mode, encryption, sequence number assignment, cyclic redundancy check (CRC) verification, and a MAC header, becomes MPDU. MPDU refers to a data frame encapsulated by the 802.11 protocol.

[0063] Referring to Figure 1, which is a schematic diagram of an aggregated MSDU frame structure in the prior art.

[0064] Figure 1 illustrates how aggregated MSDUs combine multiple MSDUs into a larger payload using a specific method. Typically, when an access point (AP) or wireless client receives a message (MSDU) from the protocol stack, it adds an Ethernet header, called an A-MSDU subframe. The aggregated MSDU technology aims to encapsulate several A-MSDU subframes into a single MPDU message unit, i.e., an A-MSDU subframe, according to the 802.11 protocol format.

[0065] As shown in Figure 1, each payload (such as an MSDU) is preceded by a destination address (DA), a source address (SA), and a length field. These three fields constitute the header of an aggregated MSDU subframe (or simply the aggregated MSDU header). After the payload of each aggregated MSDU subframe, there may be a padding field.

[0066] The aggregated MSDU can also include an MPDU header and a frame check sequence (FCS). The FCS is an error detection code added to the frame in the communication protocol.

[0067] Referring to Figure 2, which is a schematic diagram of an aggregated MPDU frame structure in the prior art.

[0068] MPDU aggregation technology combines multiple MPDUs encapsulated according to the 802.11 protocol. Each MPDU can contain a single MSDU or several aggregated MSDU messages. Each MPDU in an aggregated MPDU can also be called an aggregated MPDU subframe.

[0069] As shown in Figure 2, in an aggregated MPDU, each aggregated MPDU subframe is separated by an MPDU delimiter.

[0070] The MPDU delimiter contains its own CRC checksum, a signature field for special identification, and a length field containing the corresponding MPDU.

[0071] In one embodiment, the MPDU delimiter also includes a reserved field, which may contain a preset number of bits or be filled with a preset number of bits.

[0072] As a non-restrictive example, the MPDU delimiter can contain 2 bits, padded with 0s.

[0073] Referring to Figure 3, which is a schematic diagram of an aggregated MPDU frame structure containing an aggregated MSDU in the prior art.

[0074] Specifically, in order to transmit three MSDUs, these three MSDUs can be aggregated into one aggregated MSDU at the 802.11 MAC layer and carried on an MPDU.

[0075] The frame structure shown in Figure 3 considers the case of data encryption. Since encryption in 802.11 is for MPDUs, an encryption header (Security Header, SEC Header) is added after the MAC Header and an encryption tail (Security Tailer, SEC Tailer) is added before the MAC FCS / CRC. In some embodiments, the encryption tail is usually the MIC.

[0076] However, research revealed that because the 802.11 MAC layer encryption / FCS checksum is performed on an MPDU (Multiple Member DU) basis, multiple MSDUs in an aggregated MSDU form a single MPDU, corresponding to only one MAC layer CRC checksum and one MAC layer encryption. This means that at the receiver, if any one or more bits in this MPDU are incorrect, the receiver's CRC checksum will fail. Because the receiver cannot determine which MSDUs are incorrect or correct, the entire MPDU will be discarded, regardless of whether they are correct or incorrect. This situation reduces the success rate of MSDU transmission.

[0077] Referring to Figure 4, which is a schematic diagram of an aggregated MPDU frame structure containing multiple non-aggregated MSDUs in the prior art.

[0078] If aggregated MSDUs are not used, each MSDU will be carried in a separate MPDU. Each MSDU is contained in an MPDU and will have a separate MAC header / encryption header and MAC trailer / encryption trailer (such as MIC / CRC).

[0079] Further research revealed that, in order to prevent a reception error in one MSDU from affecting other MSDUs, the current 802.11 protocol necessitates abandoning the use of aggregated MSDUs. However, without aggregated MSDUs, each MSDU requires a corresponding complete MPDU, which adds overhead to the MPDU layer, including components such as the MAC header / FCS, encryption header / MIC, and MPDU delimiters.

[0080] This application provides an aggregated MPDU frame structure, including a first MPDU header and one or more aggregated MSDUs. The first MPDU header includes a first MAC header and a first checksum field. Each aggregated MSDU includes its own MSDU and a second checksum field. This allows for the aggregation of multiple MSDUs, with the first checksum field used to check the first MAC header, and multiple second checksum fields used to check their respective MSDUs. When any one or more bits in this aggregated MPDU are corrupted, the error can be located using the results of the individual checks, without discarding the entire MPDU, effectively improving the transmission robustness of the MSDU. Furthermore, by using aggregated MPDUs, lower transmission overhead can be maintained.

[0081] To make the above-mentioned objectives, features and beneficial effects of the present invention more apparent and understandable, specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings.

[0082] The aggregated MPDU frame in this application embodiment can be a new 802.11 MAC layer data structure. Here, "new" can correspond to "legacy".

[0083] Referring to Figure 5, which is a schematic diagram of the first aggregated MPDU frame structure in an embodiment of this application.

[0084] The first type of aggregated MPDU frame may include a first MPDU header and one or more aggregated MSDUs.

[0085] The embodiment shown in Figure 5 is illustrated using an example containing 3 MSDUs, but is not limited to this.

[0086] It should be noted that the first MPDU header and each aggregated MSDU can be adjacent and can also have other fields, such as fields used for separation.

[0087] The first MPDU header may include a first MAC header and a first checksum field, wherein the first checksum field is located after the first MAC header.

[0088] The first verification field is located after the first MAC header and can be used to verify some or all of the fields in the first MAC header.

[0089] Each aggregated MSDU can contain its own MSDU and a second check field, with each second check field following the corresponding MSDU.

[0090] Since each second check field is located after the corresponding MSDU, the second check field can be used to check the MSDU.

[0091] This application provides an aggregated MPDU frame structure, including a first MPDU header and one or more aggregated MSDUs. The first MPDU header includes a first MAC header and a first checksum field. Each aggregated MSDU includes its own MSDU and a second checksum field. This allows for the aggregation of multiple MSDUs, with the first checksum field used to check the first MAC header, and multiple second checksum fields used to check their respective MSDUs. When any one or more bits in this aggregated MPDU are corrupted, the error can be located using the results of the individual checks, without discarding the entire MPDU, effectively improving the transmission robustness of the MSDU. Furthermore, by using aggregated MPDUs, lower transmission overhead can be maintained.

[0092] In some embodiments, the new aggregated MPDU frame may contain a single first MPDU header.

[0093] It should be noted that the first MPDU header can be used to indicate a "new" MPDU header (i.e., NEW MPDU Header), which is in contrast to the "legacy" MPDU header (i.e., Legacy MPDU Header).

[0094] The first MAC header can be used to indicate a "new" MAC header (i.e., NEW MAC Header), which is the opposite of the "legacy" MAC header (i.e., Legacy MAC Header).

[0095] Referring to Figure 6, which is a schematic diagram of the field structure of the first MPDU header in the embodiments of this application.

[0096] The first MPDU header also includes a header length field, located before the first MAC header, used to indicate the total length from the first MAC header to the first check field.

[0097] As shown in Figure 6, the header length field is used to represent the total length of the first MAC header and the first checksum field.

[0098] In one specific embodiment, the new MPDU header may include a new header length field before its traditional MPDU MAC header to indicate the length of the current new MPDU header. This length may include the first checksum field (FCS) of the new MPDU header.

[0099] In some embodiments, the first check field is used to check all bits in the first MPDU header that precede itself.

[0100] As shown in Figure 6, the first verification field is used to verify the header length field and the first MAC header.

[0101] In one specific embodiment, the new MPDU header may have a separate first check field at the end, meaning that the first check field of this new MPDU header can be used to check all parts of the new MPDU header except for the first check field.

[0102] Referring to Figure 7, which is a schematic diagram of the field structure of the second type of first MPDU header in an embodiment of this application.

[0103] The first MPDU header also includes a Security Header (SEC Header) field, located between the first MAC header and the first verification field, used to indicate information on the secure encryption and / or secure verification of the aggregated MSDU.

[0104] Specifically, packet security encryption can include two aspects: the first is the encryption of the aggregated MSDU, and the second is the verification of the aggregated MSDU.

[0105] The checksum used to verify the aggregated MSDU can be the Message Complete Code (MIC) field.

[0106] In one specific embodiment, the new MPDU header may contain the contents of the traditional MPDU header, that is, the traditional MPDU MAC header.

[0107] Furthermore, if the data is encrypted, a traditional encryption header (Security Header) can be placed after the traditional MPDU MAC header.

[0108] In one specific embodiment, if there is security protection for the new MPDU header itself (including new MPDU header integrity verification and / or encryption), the new MPDU header may also include a new MPDU header security tail.

[0109] In some embodiments, the first MPDU header of the various embodiments shown in Figures 5 to 7 may also satisfy one or more of the following: the first check field is a frame check sequence field or a cyclic redundancy check field; the first check field is used to check all bits in the first MPDU header that are preceding itself; the first MPDU header further includes: a supplementary field of the first MPDU header; the supplementary field of the first MPDU header is located after the first check field.

[0110] Specifically, a frame check sequence (FCS) is an error detection code added to a frame in a communication protocol.

[0111] Cyclic redundancy check (CRC) is a hash function that generates a short, fixed-length checksum based on data such as network data packets or computer files. It is mainly used to detect or verify errors that may occur after data transmission or storage.

[0112] In some embodiments, the receiver can verify the correctness of the content preceding the FCS / CRC field using the FCS / CRC field. Specifically, the FCS / CRC field can be used to verify all bits in the first MPDU header preceding the FCS / CRC field.

[0113] In some embodiments, the first MPDU header may include a padding field.

[0114] In a specific embodiment, including supplementary fields can provide the sender with more configuration freedom.

[0115] In some embodiments, supplementary fields may be added after the first validation field.

[0116] In a specific embodiment, by setting the first verification field before the supplementary field, the verification of the supplementary field can be avoided, thereby improving the verification pass rate.

[0117] Referring to Figure 8, which is a schematic diagram of the field structure of the first aggregated MSDU in the embodiments of this application.

[0118] Each aggregated MSDU may also include: a New MPDU Subframe Header, which is located before the MSDU in the aggregated MSDU.

[0119] It should be noted that in the embodiments of this application, the aggregated MSDU of the aggregated MPDU frame can also be called the first MPDU subframe, and the header of the first MPDU subframe can also be called the first aggregated MSDU header.

[0120] In the embodiments of this application, the aggregated MSDU of the aggregated MPDU frame can be used to indicate a "new" aggregated MSDU, and the first MPDU subframe can be used to indicate a "new" MPDU subframe (i.e., NEW MPDU Subframe), which is in contrast to the "traditional" MPDU subframe (i.e., Legacy MPDU subframe).

[0121] The first MPDU subframe header can be used to indicate a "new" MPDU subframe header (i.e., NEW MPDU Subframe Header), which is the opposite of the "legacy" MPDU subframe header (i.e., Legacy MPDU Subframe Header).

[0122] In some embodiments, a “new” MPDU subframe may include a “new” MPDU subframe header (i.e., the first MPDU subframe header).

[0123] In some embodiments, an MSDU may follow the header of the first MPDU subframe.

[0124] It should be noted that the MSDU can be a traditional MSDU, and each MSDU corresponds to a "new" MPDU subframe in a "new" aggregated MPDU frame.

[0125] In some embodiments, each aggregated MSDU may further include a Message Complete Code (MIC) field, located between the MSDU and the second verification field of the aggregated MSDU.

[0126] Referring to Figure 9, which is a schematic diagram of the field structure of the second type of aggregated MSDU in the embodiments of this application.

[0127] Specifically, when data encryption (Security) is included in the aggregated MPDU frame, the corresponding encryption part can be carried by the MIC field.

[0128] Following the MSDU section, a New MPDU Subframe Tailer may also be included.

[0129] In some embodiments, where data encryption is present, the second aggregated MSDU may include an encryption tail (e.g., MIC) and a second verification field.

[0130] In some embodiments where no data encryption is used, the second aggregated MSDU may include a second verification field.

[0131] The computational object of the complete message code in each aggregated MSDU includes one or more of the following: the header of the first MPDU subframe in the aggregated MSDU; the MSDU in the aggregated MSDU; and partial information in the header of the first MPDU.

[0132] As shown in Figure 9, the calculation of MIC includes not only the information in the aggregated MSDU (such as the header and MSDU of the first MPDU subframe preceding the MIC), but also some information in the header of the first MPDU.

[0133] In some embodiments, the first MPDU header further includes: a Security Header (SEC Header) field, used to indicate information on the security encryption and / or security verification of the aggregated MSDU; some information in the first MPDU header includes one or more of the following: some information in the first MAC header; some information in the Security Header field.

[0134] In practice, by setting the first MPDU header to also include an encryption header, the need to carry proprietary information corresponding to the encryption function can be met.

[0135] Referring to Figure 10, which is a schematic diagram of the field structure of a first MPDU subframe header in an embodiment of this application.

[0136] In some embodiments, the header of the first MPDU subframe may include one or more of the following: a first sequence number (SN) field, used to identify the sequence number of the MSDU in the aggregated MSDU; a first encrypted sequence number (PN) field, used to identify the encrypted sequence number of the MSDU in the aggregated MSDU; a destination address (DA) field of the MSDU in the aggregated MSDU; a source address (SA) field of the MSDU in the aggregated MSDU; and a fragment number field, used to identify the fragments of the MSDU in the aggregated MSDU.

[0137] In some embodiments, all aggregated MSDUs (i.e., first MPDU subframes) share a first MPDU header and use common first MPDU header information parameters. The independent information parameters of each aggregated MSDU can be included both in its respective first MPDU subframe header and in the first MPDU header.

[0138] In one specific embodiment, the first MPDU header further includes a second serial number field; wherein the serial number in the second serial number field is used as a base value (SN_base), and the serial number in the first serial number field is used as an offset value (SN_offset); the sum of the base value and the offset value is used to identify the complete serial number of the MSDU in the aggregated MSDU to which the second serial number field belongs.

[0139] Specifically, by using the sequence number in the first MPDU header as the base SN_base and filling the corresponding offset value SN_offset in the sequence number field of the corresponding MSDU in the first MPDU subframe header, the purpose of identifying the complete sequence number of the corresponding MSDU in the first MPDU subframe header is achieved, that is, the sum of the base value and the offset value SN_base + SN_offset.

[0140] In one specific embodiment, the first MPDU header further includes a second encrypted serial number field; wherein, the encrypted serial number in the second encrypted serial number field serves as an encryption base value, and the serial number in the first serial number field serves as an encryption offset value; the sum of the encryption base value and the encryption offset value is used to identify the complete encrypted serial number of the MSDU in the aggregated MSDU to which the second encrypted serial number field belongs.

[0141] Specifically, by using the encryption sequence number in the first MPDU header as the encryption base value PN_base, and filling the corresponding encryption offset value PN_offset in the encryption sequence number field of the corresponding MSDU in the first MPDU subframe header, the purpose of identifying the complete encryption sequence number of the corresponding MSDU in the first MPDU subframe header is achieved, that is, the sum of the encryption base value and the encryption offset value PN_base + PN_offset.

[0142] In some embodiments, the second encrypted sequence number field may be located in the encrypted header fields included in the first MPDU header.

[0143] In some embodiments, the aggregated MSDU (also referred to as the first MPDU subframe) of the various embodiments shown in Figures 8 to 10 may also satisfy one or more of the following: the second check field is a frame check sequence field or a cyclic redundancy check field; the second check field is used to check all bits in the aggregated MSDU that are preceding itself; each aggregated MSDU also includes: a supplementary field of the aggregated MSDU; the supplementary field of each aggregated MSDU is located after the second check field of the aggregated MSDU; each aggregated MSDU also includes a first MPDU subframe header, the first MPDU subframe header having a fixed known length; each aggregated MSDU also includes a message integrity code field, the message integrity code field having a fixed known length; the second check field having a fixed known length.

[0144] Specifically, a frame check sequence (FCS) is an error detection code added to frames in a communication protocol.

[0145] Cyclic redundancy check (CRC) is a hash function that generates a short, fixed-length checksum based on data such as network data packets or computer files. It is mainly used to detect or verify errors that may occur after data transmission or storage.

[0146] In some embodiments, the receiver can verify the correctness of the content preceding the FCS / CRC field through the FCS / CRC field. Specifically, the FCS / CRC field can be used to verify all bits in the aggregated MSDU that are preceding the FCS / CRC field.

[0147] In some embodiments, each aggregated MSDU may include a padding field.

[0148] In practice, including supplementary fields can provide the sender with more configuration freedom.

[0149] In some embodiments, a supplementary field for each aggregated MSDU may be added after the second verification field of the aggregated MSDU.

[0150] In practice, by setting the second verification field before the supplementary field, the verification of the supplementary field can be avoided, thereby improving the verification pass rate.

[0151] In some embodiments, each aggregated MSDU further includes a first MPDU subframe header, the first MPDU subframe header having a fixed known length, and each aggregated MSDU further includes a message integrity code field, the message integrity code field having a fixed known length, and a second check field having a fixed known length.

[0152] In practice, since the header field, MIC field, and CRC field of the first MPDU subframe are all of fixed and known length, the actual length of the MSDU can be determined by inputting the length of the aggregated MSDU into the preset MSDU length field.

[0153] As a non-limiting example, the actual MSDU length can be determined by subtracting the length of the first MPDU subframe header field, the length of the MIC field, and the length of the CRC field from the length of the aggregated MSDU.

[0154] In some embodiments, the aggregated MPDU frame structure may further include: a first delimiter field; wherein the first delimiter field is located before and adjacent to the first MPDU header; and / or, the first delimiter field corresponds one-to-one with the aggregated MSDU, and is located before and adjacent to the corresponding aggregated MSDU.

[0155] Referring to Figure 5, the first delimiter field can be located before and adjacent to the first MAC header to achieve the same effect as the first MPDU header.

[0156] The first delimiter field can also correspond one-to-one with the aggregated MSDU. For example, it can be located before MSDU0 and adjacent to MSDU0, or before MSDU1 and adjacent to MSDU1, or before MSDU2 and adjacent to MSDU2.

[0157] Referring to Figure 11, which is a schematic diagram of the field structure of a first delimiter field in an embodiment of this application.

[0158] It should be noted that in the embodiments of this application, the MPDU can be used to indicate a "new" MPDU, and the aggregated MSDU can be used to indicate a "new" aggregated MSDU. A "new" delimiter can be used to separate and identify the various parts. In this application, a "first delimiter" is used, which is in contrast to the "traditional" delimiter (i.e., the Legacy Delimiter).

[0159] In some embodiments, the structure of the first delimiter may be the same as that of a conventional delimiter.

[0160] In some embodiments, the first delimiter used to indicate the first MPDU header may have the same structure as the first delimiter used to indicate the aggregated MSDU.

[0161] Specifically, the first delimiter shown in Figure 11 can use the same structure as the conventional MPDU delimiter.

[0162] In some embodiments, the traditional MPDU delimiter and the new delimiter can be distinguished by using a second indicator field (such as New Delimiter Indication or Delimiter Indication).

[0163] In some embodiments, a first indicator field (such as New MPDU / MSDU Indication or MPDU / MSDU Indication) may be used to distinguish between the MPDU delimiter (also known as the new aggregated MPDU delimiter or new MPDU delimiter) and the MSDU delimiter (also known as the new aggregated MSDU delimiter or new MSDU delimiter).

[0164] The definitions of the remaining fields can remain consistent with the definitions of traditional MPDU delimiters.

[0165] Specifically, the first indication field may be adjacent to the first MPDU header, separating and identifying the MPDU. The first indication field may also be adjacent to the first MPDU subframe header, separating and identifying the aggregated MSDU.

[0166] Specifically, a first indicator field can be set at the beginning of the first MPDU for the separation and identification of the first MPDU.

[0167] In some embodiments, the first indication field (New MPDU Delimiter) here may also be referred to as the first delimiter for the MPDU (New Delimiter for MPDU).

[0168] In some embodiments, the first part after the first delimiter of the MPDU is the first MPDU header.

[0169] Specifically, a first delimiter can be set before each aggregated MSDU (also known as the first MPDU subframe) for separating and identifying MSDU-related information.

[0170] In some embodiments, the first indication field (New MSDU Delimiter) here may also be referred to as the first delimiter of the MSDU (New MSDU Delimiter).

[0171] Further, the first delimiter field may include: a first indicator field for indicating whether the field adjacent to and following the first delimiter field carries a first MPDU header or an aggregated MSDU; a second indicator field for indicating the type of delimiter carried by the first delimiter field, the type including a first delimiter type and a traditional delimiter type; a length field, in response to the first indicator field indicating a first MPDU header, the length field indicating the length from the first MPDU header to the last aggregated MSDU, or in response to the first indicator field indicating an aggregated MSDU, the length field indicating the length of the aggregated MSDU corresponding to the first delimiter field; a third verification field; and a first delimiter signature field.

[0172] The first indication field, also known as the type field, is used to identify the start of an aggregated MPDU (i.e., a “new” MPDU) or an aggregated MSDU (i.e., a “new” MPDU subframe).

[0173] In some embodiments, the first delimiter field may satisfy one or more of the following: the number of bits occupied by the first indicator field is a single bit; the number of bits occupied by the second indicator field is a single bit; the number of bits occupied by the first indicator field and the second indicator field in the first delimiter is the same as the number of bits occupied by the reserved field in the conventional delimiter; the first indicator field is located before the second indicator field;

[0174] In one specific embodiment, the first indicator field and the second indicator field occupy 2 bits in the first delimiter, which is consistent with the 2 bits occupied by the reserved field in the traditional delimiter.

[0175] In this embodiment of the application, by aligning the number of bits occupied by the reserved field in the traditional delimiter, the length of the first delimiter can be made more consistent with the length of the traditional delimiter in the traditional MPDU, which is more conducive to expanding the application scope of the first delimiter.

[0176] In some embodiments, the length field is used to identify part or all of the length of the corresponding aggregated MPDU, or to indicate part or all of the length of the corresponding aggregated MSDU.

[0177] Further, the length field satisfies one or more of the following: in response to the first indication field indicating a first MPDU header, and the aggregated MSDU further including a supplementary field located after the third check field, the length field is used to indicate the length of the supplementary field from the first MPDU header to the last aggregated MSDU; in response to the first indication field indicating an aggregated MSDU, and the aggregated MSDU further including a supplementary field located after the third check field, the length field is used to indicate the length of other fields in the aggregated MSDU corresponding to the first delimiter field, excluding the supplementary field of the aggregated MSDU.

[0178] Referring to Figure 12, which is a schematic diagram of the mapping field of the first type of length field in the embodiments of this application.

[0179] The first delimiter shown in Figure 12 is used to indicate the first MPDU header. The length field in the first delimiter indicates the length of the entire aggregated MPDU, that is, the length of the supplementary field from the first MPDU header to the last aggregated MSDU (i.e., the first MPDU subframe 2 in Figure 12).

[0180] More specifically, the entire aggregated MPDU may include one or more of the following: a first MPDU header, individual aggregated MSDUs (also known as first MPDU subframes), and individual first delimiters for indicating the aggregated MSDU.

[0181] Referring to Figure 13, which is a schematic diagram of the mapping field of the second type of length field in the embodiments of this application.

[0182] The first delimiter shown in Figure 13 is used to indicate the aggregated MSDU (i.e., the first MPDU subframe). The length field in the first delimiter indicates a portion of the length of the aggregated MSDU, excluding the padding field.

[0183] In some embodiments, each aggregated MSDU further includes a first MPDU subframe header, the first MPDU subframe header having a fixed known length; each aggregated MSDU further includes a message integrity code field, the message integrity code field having a fixed known length; and a second check field having a fixed known length.

[0184] In some embodiments, since the header field, MIC field, and CRC field of the first MPDU subframe are all of fixed known length, the length of the actual MSDU can be determined by subtracting the length of the header field of the first MPDU subframe, the length of the MIC field, and the length of the CRC field from the length of the aggregated MSDU in the length field.

[0185] Specifically, the length of the actual MSDU = the length of the aggregated MSDU in the length field - (the length of the first MPDU subframe header field + the length of the MIC field + the length of the CRC field).

[0186] Referring again to Figure 11, the first delimiter field may satisfy one or more of the following: the third verification field is a frame check sequence field or a cyclic redundancy check field; the third verification field is used to verify all bits in the first delimiter that are preceding itself; the definition of the first delimiter signature field is consistent with the definition of the delimiter signature field in a traditional delimiter.

[0187] Specifically, a frame check sequence (FCS) is an error detection code added to frames in a communication protocol.

[0188] Cyclic redundancy check (CRC) is a hash function that generates a short, fixed-length checksum based on data such as network data packets or computer files. It is mainly used to detect or verify errors that may occur after data transmission or storage.

[0189] In some embodiments, the receiver can verify the correctness of the content preceding the FCS / CRC field through the FCS / CRC field. Specifically, the FCS / CRC field can be used to verify all bits in the first delimiter that are preceding the FCS / CRC field.

[0190] The Signature field is used to perform special identification on the first delimiter and is also known as the special identification field.

[0191] In some embodiments, by setting the definition of the first delimiter signature field to be consistent with the definition of the delimiter signature field in the traditional delimiter, the first delimiter signature field can be made more consistent with the first delimiter signature field of the traditional delimiter in the traditional MPDU, which is more conducive to expanding the application scope of the first delimiter.

[0192] Referring to Figure 14, which is a schematic diagram of the second type of aggregated MPDU frame structure in an embodiment of this application.

[0193] In the second type of aggregated MPDU frame structure shown in Figure 14, taking the inclusion of two aggregated MSDUs as an example, that is, including two first MPDU subframes.

[0194] The portion indicated by the length field contained in each of the first delimiters is shown in the figure.

[0195] It should be noted that the first MPDU header in Figure 14 is not limited to this, and any of the first MPDU headers mentioned above and in Figures 6 and 7 can be used; the aggregated MSDU in Figure 14 is not limited to this, and any of the aggregated MSDUs mentioned above and in Figures 8 and 9 can be used.

[0196] Referring to Figure 15, which is a schematic diagram of the third type of aggregated MPDU frame structure in the embodiments of this application.

[0197] In the third type of aggregated MPDU frame structure shown in Figure 15, taking an aggregated MSDU as an example, it contains a first MPDU subframe.

[0198] The portions indicated by each verification field are shown in the figure, as are the portions indicated by the MIC in the aggregated MSDU.

[0199] Combining Figures 9 and 15, the calculation of MIC not only includes information from the aggregated MSDU (e.g., the header and MSDU of the first MPDU subframe preceding the MIC), but may also include some information from the header of the first MPDU.

[0200] In some embodiments, the partial information in the first MPDU header may include one or more of the following: partial information in the first MAC header; partial information in the encrypted header field.

[0201] For more information about MIC, please refer to the description above and Figure 9. It will not be repeated here.

[0202] It should be noted that the first delimiter in Figure 15 is not limited to this. Based on satisfying the correspondence between the first delimiter and the first MPDU header / aggregated MSDU, any of the first delimiters described above can be used. The first MPDU header in Figure 15 is not limited to this. Any of the first MPDU headers described above and in Figures 6 and 7 can be used. The aggregated MSDU in Figure 15 is not limited to this. Any of the aggregated MSDUs described above and in Figures 8 and 9 can be used.

[0203] Referring to Figure 16, which is a schematic diagram of a communication method in an embodiment of this application.

[0204] The communication method can be used by both the WIFI sender and the WIFI receiver.

[0205] In the first communication method, the communication method may include:

[0206] Step S161: The WIFI transmitter sends a first message to the WIFI receiver, the first message containing an aggregated MPDU. Correspondingly, the WIFI receiver receives the first message from the WIFI transmitter.

[0207] Specifically, the first message includes any of the aggregated MPDUs shown above and in Figures 5 to 15.

[0208] It is understandable that, in specific implementation, the above method can be implemented using a software program that runs in the processor integrated inside the chip or chip module; or, the method can be implemented using hardware or a combination of hardware and software, such as using a dedicated chip or chip module, or using a dedicated chip or chip module combined with a software program.

[0209] For more details regarding the WIFI sender and receiver in the specific implementation, please refer to the relevant descriptions above, which will not be repeated here.

[0210] In this application embodiment, a communication device is also disclosed, which can be used as a WIFI sender, and may include: a sending module for sending a first message, wherein the first message includes an aggregated MPDU.

[0211] Specifically, the first message includes any of the aggregated MPDUs shown above and in Figures 5 to 15.

[0212] In this application embodiment, a communication device is also disclosed, which can be used as a WIFI receiver, and may include: a receiving module for receiving a first message, the first message including an aggregated MPDU.

[0213] Specifically, the first message includes any of the aggregated MPDUs shown above and in Figures 5 to 15.

[0214] For more information on the working principle, working method, and beneficial effects of the above-mentioned communication device, please refer to the previous text and the specific description of the communication method in Figure 16. It will not be repeated here.

[0215] This application also provides a computer-readable storage medium storing a computer program thereon. When the computer program is run by a computer, the aforementioned communication method is executed. The storage medium may include read-only memory (ROM), random access memory (RAM), a magnetic disk, or an optical disk, etc. The storage medium may also include non-volatile memory or non-transitory memory, etc.

[0216] This application embodiment also provides a WIFI transmitter, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor runs the computer program, it executes the steps of the communication method described above.

[0217] The sender includes, but is not limited to, terminal devices that provide WIFI functionality, such as mobile phones, computers, tablets, vehicle terminals, and wearable devices.

[0218] This application embodiment also provides a WIFI receiver, including a memory and a processor. The memory stores a computer program that can run on the processor. When the processor runs the computer program, it executes the steps of the communication method described above.

[0219] The recipient includes, but is not limited to, terminal devices that provide WIFI functionality, such as mobile phones, computers, tablets, vehicle terminals, and wearable devices.

[0220] This application also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the above-described communication method.

[0221] Referring to Figure 17, which is a schematic diagram of the hardware structure of a communication device in an embodiment of this application.

[0222] The communication device can be a Bluetooth peripheral device or a BLE central device.

[0223] The terminal shown in Figure 17 includes a memory 171, a processor 172, and a transceiver 173. The processor 172 is coupled to the memory 171 and the transceiver 173. The memory 171 can be located inside or outside the terminal. The memory 171, processor 172, and transceiver 173 can be connected via a communication bus. The transceiver 173 is used to communicate with other devices or communication networks.

[0224] Optionally, the transceiver 173 can be a transmitter. The memory 171 stores a computer program that can run on the processor 172, and when the processor 172 runs the computer program, the transceiver 173 performs the steps in the communication method provided in the above embodiments.

[0225] It should be understood that in the embodiments of this application, the processor can be a central processing unit (CPU), or it can be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor can be a microprocessor or any conventional processor.

[0226] It should also be understood that the memory in the embodiments of this application can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. Non-volatile memory can be ROM, programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. Volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of RAM are available, such as static RAM (SRAM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (ESDRAM), synchronous linked dynamic random access memory (SLDRAM), and direct rambus RAM (DR RAM).

[0227] The above embodiments can be implemented, in whole or in part, by software, hardware, firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer program are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of this application are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means.

[0228] It should be understood that in the various embodiments of this application, the order of the above-mentioned processes does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0229] In the several embodiments provided in this application, it should be understood that the disclosed methods, apparatuses, and systems can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for example, the division of units is only a logical functional division, and there may be other division methods in actual implementation; for example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces, and the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0230] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0231] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can be physically included separately, or two or more units can be integrated into one unit. The integrated units described above can be implemented in hardware or in a combination of hardware and software functional units. For example, for various devices or products applied to or integrated into a chip, each module / unit can be implemented using hardware such as circuits, or at least some modules / units can be implemented using software programs running on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware such as circuits; for various devices or products applied to or integrated into a chip module, each module / unit can be implemented using hardware such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware such as circuits. The components can be implemented using software programs that run on the processor integrated within the chip module. The remaining (if any) modules / units can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its components / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or in different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits.

[0232] The integrated units implemented as software functional units described above can be stored in a computer-readable storage medium. These software functional units, stored in a storage medium, include several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute some steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, random access memory (RAM), magnetic disks, or optical disks.

[0233] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article indicates that the preceding and following related objects have an "or" relationship.

[0234] In the embodiments of this application, "multiple" refers to two or more.

[0235] In this application, "equal to" can be used with "less than" or "greater than", but not simultaneously with both. When "equal to" is used with "less than", it applies to the technical solution adopted by "less than". When "equal to" is used with "greater than", it applies to the technical solution adopted by "greater than".

[0236] The descriptions of "first," "second," etc., appearing in the embodiments of this application are for illustrative purposes and to distinguish the objects being described. They have no order and do not indicate any special limitation on the number of devices in the embodiments of this application, nor do they constitute any limitation on the embodiments of this application.

[0237] While the embodiments disclosed above are described in this application, this application is not limited thereto. Any person skilled in the art can make various modifications and alterations without departing from the spirit and scope of this application; therefore, the scope of protection of this application should be determined by the scope defined in the claims.

Claims

1. An aggregated MPDU frame structure, characterized in that, include: The first MPDU header includes a first MAC header and a first check field, wherein the first check field is located after the first MAC header; One or more aggregated MSDUs, each aggregated MSDU containing its own MSDU and a second check field, with each second check field following the corresponding MSDU.

2. The aggregated MPDU frame structure according to claim 1, characterized in that, The first MPDU header also includes: The header length field, located before the first MAC header, is used to indicate the total length from the first MAC header to the first check field.

3. The aggregated MPDU frame structure according to claim 1, characterized in that, The first MPDU header also includes: An encrypted header field, located between the first MAC header and the first verification field, is used to indicate information on the secure encryption and / or secure verification of the aggregated MSDU.

4. The aggregated MPDU frame structure according to claim 1, characterized in that, Meet one or more of the following: The first verification field is a frame check sequence field or a cyclic redundancy check field; The first check field is used to check all bits in the first MPDU header that precede itself; The first MPDU header also includes: supplementary fields for the first MPDU header; The supplementary field in the first MPDU header is located after the first verification field.

5. The aggregated MPDU frame structure according to claim 1, characterized in that, Each aggregated MSDU also includes: The first MPDU subframe header is located before the MSDU in the aggregated MSDU.

6. The aggregated MPDU frame structure according to claim 5, characterized in that, Each aggregated MSDU also includes: The message complete code field is located between the MSDU and the second check field of the aggregated MSDU.

7. The aggregated MPDU frame structure according to claim 6, characterized in that, The computed object of the complete message code in each aggregated MSDU contains one or more of the following: The header of the first MPDU subframe in the aggregated MSDU; The MSDU in this aggregated MSDU; Partial information in the header of the first MPDU.

8. The aggregated MPDU frame structure according to claim 7, characterized in that, The first MPDU header also includes: an encrypted header field, used to indicate information on the secure encryption and / or security verification of the aggregated MSDU; The information in the first MPDU header includes one or more of the following: Partial information from the first MAC header; Part of the information in the encrypted header field.

9. The aggregated MPDU frame structure according to claim 5, characterized in that, Each first MPDU subframe header contains one or more of the following: The first serial number field is used to identify the serial number of the MSDU in this aggregated MSDU; The first encrypted serial number field is used to identify the encrypted serial number of the MSDU in the aggregated MSDU; The destination address field of the MSDU in this aggregated MSDU; The source address field of the MSDU in this aggregated MSDU; The fragment number field is used to identify the fragments of the MSDU in this aggregated MSDU.

10. The aggregated MPDU frame structure according to claim 9, characterized in that, The first MPDU header also includes a second sequence number field; Wherein, the serial number in the second serial number field is used as the base value, and the serial number in the first serial number field is used as the offset value; The sum of the base value and the offset value is used to identify the complete serial number of the MSDU in the aggregated MSDU to which the second serial number field belongs.

11. The aggregated MPDU frame structure according to claim 9, characterized in that, The first MPDU header also includes a second encrypted sequence number field; Wherein, the encryption serial number in the second encryption serial number field is used as the encryption base value, and the serial number in the first serial number field is used as the encryption offset value; The sum of the encryption base value and the encryption offset value is used to identify the complete encryption serial number of the MSDU in the aggregated MSDU to which the second encryption serial number field belongs.

12. The aggregated MPDU frame structure according to claim 1, characterized in that, Each aggregated MSDU satisfies one or more of the following: The second verification field is either a frame check sequence field or a cyclic redundancy check field; The second verification field is used to verify all bits preceding itself in the aggregated MSDU; Each aggregated MSDU also includes: supplementary fields for that aggregated MSDU; The supplementary fields for each aggregated MSDU are located after the second validation field of that aggregated MSDU; Each aggregated MSDU also includes a first MPDU subframe header, which has a fixed, known length. Each aggregated MSDU also includes a message complete code field, which has a fixed known length; The second verification field has a fixed, known length.

13. The aggregated MPDU frame structure according to claim 1, characterized in that, The aggregated MPDU frame structure also includes: First delimiter field; The first delimiter field is located before and adjacent to the first MPDU header; And / or, the first delimiter field corresponds one-to-one with the aggregated MSDU, and is located before and adjacent to the corresponding aggregated MSDU.

14. The aggregated MPDU frame structure according to claim 13, characterized in that, The first delimiter field includes: A first indicator field is used to indicate whether the field adjacent to and following the first delimiter field carries a first MPDU header or an aggregated MSDU. The second indicator field is used to indicate the type of delimiter carried by the first delimiter field, the type including the first delimiter type and the traditional delimiter type; The length field, in response to the first indication field indicating a first MPDU header, is used to indicate the length from the first MPDU header to the last aggregated MSDU; or, in response to the first indication field indicating an aggregated MSDU, the length field is used to indicate the length of the aggregated MSDU corresponding to the first delimiter field. The third verification field; First delimiter signature field.

15. The aggregated MPDU frame structure according to claim 14, characterized in that, The length field satisfies one or more of the following: In response to the first indication field indicating a first MPDU header, and the aggregated MSDU also including a supplementary field following the third check field, the length field is used to indicate the length from the first MPDU header to the supplementary field of the last aggregated MSDU; In response to the first indication field indicating an aggregated MSDU, and the aggregated MSDU further including a supplementary field following the third verification field, the length field is used to indicate the length of other fields in the aggregated MSDU corresponding to the first delimiter field, excluding the supplementary field of the aggregated MSDU.

16. The aggregated MPDU frame structure according to claim 14, characterized in that, The first delimiter field satisfies one or more of the following: The first indication field occupies a single bit; The second indicator field occupies a single bit; The bits occupied by the first indicator field and the second indicator field in the first delimiter are the same as the bits occupied by the reserved field in the traditional delimiter; The first indicator field precedes the second indicator field; The third verification field is a frame verification sequence field or a cyclic redundancy check field; The third verification field is used to verify all bits in the first delimiter that precede itself; The definition of the first delimiter signature field is consistent with the definition of the delimiter signature field in traditional delimiters.

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