Data access method, heterogeneous system, electronic device, medium, and program product
By constructing virtual serial port devices and access channels in heterogeneous systems, the problem of no direct connection between the host and the on-chip system is solved, enabling direct data access and multi-user support, and expanding the application scenarios.
Patent Information
- Authority / Receiving Office
- WO · WO
- Patent Type
- Applications
- Current Assignee / Owner
- INSPUR SUZHOU INTELLIGENT TECH CO LTD
- Filing Date
- 2025-09-09
- Publication Date
- 2026-05-21
AI Technical Summary
In existing heterogeneous systems, there is no direct data connection between the host and the system-on-a-chip, which increases hardware costs and resource consumption, limiting application scenarios.
By creating a virtual serial port device on the local operating system and using the data buffer in the preset programmable logic device to build a target access channel, direct data access between the host and the on-chip system is realized, and data transmission is performed using a virtual serial port driver.
Without increasing resources, direct access from the host to the on-chip system was achieved, supporting multi-user access requirements, expanding application scenarios, and meeting the needs of firmware updates and algorithm upgrades.
Smart Images
Figure CN2025120143_21052026_PF_FP_ABST
Abstract
Description
Data access methods, heterogeneous systems, electronic devices, media and application products
[0001] Cross-reference to related applications
[0002] This application claims priority to Chinese Patent Application No. 202411622965.4, filed on November 14, 2024, entitled “Data Access Method, Heterogeneous System, Electronic Device, Media and Program Product”, the entire contents of which are incorporated herein by reference. Technical Field
[0003] This application relates to the field of heterogeneous system data access technology, and in particular to a data access method, heterogeneous system, electronic device, medium and program product. Background Technology
[0004] With the advancement of my country's digitalization process, the demand for computing power will continue to grow, and data centers are gradually evolving into computing centers, with computing power becoming a new form of productivity. However, facing the gradual obsolescence of Moore's Law, relying solely on central processing units (CPUs) can no longer meet the massive computing power demands of computing centers. Against this backdrop, heterogeneous computing has experienced rapid development. Various heterogeneous systems, resulting from the integration of multiple types of acceleration hardware such as CPUs, GPUs, system-on-a-chip (SoCs), and field-programmable gate arrays (FPGAs), have greatly promoted the improvement of computing power in data centers.
[0005] Heterogeneous systems centered around Field-Programmable Gate Arrays (FPGAs) offer advantages in network communication and algorithm acceleration due to their high bandwidth, low latency, parallel processing, and reconfigurability. However, they lag behind Systems-on-a-Chip (SoCs) in versatility and complex logic operations. Therefore, such systems are typically combinations of FPGAs and SoCs, with the SoC running an embedded operating system to handle algorithm updates, FPGA status monitoring, and task offloading. However, in current heterogeneous FPGA + SoC systems, there is no direct data path between the host and the SoC. Accessing the SoC's operating system requires either a gigabit network connection or a SATA-to-serial converter, increasing the hardware cost of the heterogeneous system. Furthermore, the lack of a direct data path limits application scenarios. Additionally, the network connection between the FPGA and SoC consumes significant resources within the FPGA itself. Summary of the Invention
[0006] The purpose of this application is to provide a data access method, heterogeneous system, electronic device, medium, and program product that can solve the problems in the prior art, such as increased hardware cost of heterogeneous systems, occupation of a large amount of field-programmable gate array resources, and relatively small application scenarios of the current system, due to the lack of a direct data path between the host and the system on the chip.
[0007] To address the aforementioned technical problems, this application provides a data access method, applied to the access initiator, comprising:
[0008] The login access responder creates a virtual serial port device on the local operating system; the virtual serial port device is a device created by the access responder through a local virtual serial port driver, which is created based on the number of channels of the target access channel in the data buffer of the preset programmable logic device;
[0009] An access request is sent to the local operating system of the access responder so that the access responder can obtain the target response data corresponding to the access request from the local machine and write the target response data into the data cache through the target access channel.
[0010] The target response data is retrieved from the data cache through the target access channel to complete the corresponding data access operation.
[0011] In some embodiments, before logging in to access the virtual serial port device created by the responder on the local operating system, the method further includes:
[0012] The number of target access channels is determined from the data cache based on user needs; the target access channel is the channel used by the access initiator to access the access responder.
[0013] Configure the number of channels to the access responder so that the access responder can create a virtual serial port driver based on the number of channels.
[0014] In some embodiments, the number of channels is configured for the access responder so that the access responder creates a virtual serial port driver based on the number of channels, including:
[0015] The number of channels is configured to the access responder through the dual-access random access memory in the programmable logic device, so that the access responder can create a virtual serial port driver based on the number of channels.
[0016] In some embodiments, the access responder creates a virtual serial port driver based on the number of channels, including:
[0017] Based on the embedded driver architecture and the number of target access channels, a virtual serial port driver is created through software implementation.
[0018] In some embodiments, the process by which the access responder creates a virtual serial port device includes:
[0019] The virtual serial port driver is loaded locally based on the number of channels configured by the access initiator;
[0020] Create a virtual serial port device on the local operating system using a locally loaded virtual serial port driver;
[0021] The number of virtual serial port devices can be one or more.
[0022] In some embodiments, before the access responder loads the virtual serial port driver locally, the method further includes:
[0023] Perform the first initialization operation locally, and after the first initialization operation is completed, register the corresponding operating system console and configure the corresponding console environment;
[0024] Correspondingly, after creating a virtual serial port device on the local operating system using a locally loaded virtual serial port driver, the process also includes:
[0025] Add the virtual serial port device to the operating system console.
[0026] In some embodiments, the first initialization operation includes enabling a local serial port receive interrupt and configuring a local serial port receive processing function.
[0027] In some embodiments, it also includes:
[0028] Perform a second initialization operation after loading the virtual serial port driver locally and before adding the virtual serial port device to the operating system console;
[0029] The second initialization operation involves configuring the hardware serial port address information between the device and the preset programmable logic device.
[0030] In some embodiments, loading the virtual serial port driver locally according to the number of channels configured by the access initiator includes:
[0031] Determine if the number of channels configured by the access initiator is a non-zero value;
[0032] If the number of channels configured by the access initiator is non-zero, the virtual serial port driver will be loaded locally; otherwise, loading the virtual serial port driver locally will be prohibited.
[0033] In some embodiments, if the preset programmable logic device includes at least two data buffers, the method further includes:
[0034] Determine whether the read / write clocks are consistent across all data caches;
[0035] If the read / write clocks of the data buffers are inconsistent, the read / write clocks of the data buffers will be adjusted to be consistent through a preset synchronization method.
[0036] In some embodiments, the preset synchronization method includes delaying the clock cycle or using Gray code conversion.
[0037] In some embodiments, the data buffer is a buffer implemented based on the internal registers of a preset programmable logic device, and the data buffer adopts a first-in-first-out data read / write strategy.
[0038] In some embodiments, writing target response data to a data buffer via a target access channel includes:
[0039] Monitor whether a full signal is received from the data buffer;
[0040] If no write-full signal is detected from the data buffer, the target response data is written to the data buffer through the target access channel; otherwise, writing the target response data to the data buffer is prohibited.
[0041] In some embodiments, the process of the access responder creating a virtual serial port device further includes:
[0042] Configure corresponding device indexes for each created virtual serial port device, and establish a correspondence between different virtual serial port devices and different target access channels;
[0043] Accordingly, the target response data is written to the data buffer through the target access channel, including:
[0044] Determine the target device index corresponding to the virtual serial port device logged in by the current access initiator;
[0045] The target response data is written to the data buffer using the target access channel corresponding to the target device index in each target access channel.
[0046] In some embodiments, it also includes:
[0047] The target response data is read from the data buffer using the target access channel through a preset data receiving tool, and then forwarded to the target virtual serial port device. The target virtual serial port device is the virtual serial port device corresponding to the target access channel for transmitting the target response data, which is determined from among the virtual serial port devices.
[0048] Accordingly, target response data is retrieved from the data cache via the target access channel, including:
[0049] Obtain the target response data from the target virtual serial port device by the preset data receiving tool through the corresponding target access channel.
[0050] In some embodiments, reading target response data from a data buffer using a preset data receiving tool via a target access channel includes:
[0051] Monitor whether a non-empty interrupt signal is received from the data buffer;
[0052] If a non-empty interrupt signal is detected from the data buffer, the target response data in the data buffer is read through the target access channel using the preset data receiving tool; otherwise, reading data from the data buffer is prohibited.
[0053] In some embodiments, the access initiator is a host and the access responder is a system-on-a-chip; or, the access initiator is a system-on-a-chip and the access responder is a host.
[0054] On the other hand, this application provides a data access method applied to an access responder, including:
[0055] The system retrieves the access request initiated by the access initiator to the local operating system after logging into the virtual serial port device. The virtual serial port device is a device pre-created on the local operating system by the access responder through the local virtual serial port driver. The virtual serial port driver is created based on the number of target access channels in the data buffer of the preset programmable logic device.
[0056] The system retrieves the target response data corresponding to the access request from the local machine and writes the target response data to the data cache through the target access channel, so that the access initiator can retrieve the target response data from the data cache through the target access channel.
[0057] On the other hand, this application also provides a heterogeneous system, including: an access initiator, an access responder, and a preset programmable logic device; wherein,
[0058] The pre-programmable logic device is configured to construct a target access channel between the access initiator and the access responder through its own data buffer;
[0059] The initiator is configured to create a virtual serial port device on the local operating system of the responder and initiate an access request to the responder's local operating system, and retrieve the target response data corresponding to the access request from the data buffer through the target access channel; the virtual serial port device is a device created by the responder through a local virtual serial port driver, which is created based on the number of channels of the target access channel.
[0060] The access responder is configured to retrieve the target response data corresponding to the access request from the local machine and write the target response data to the data cache through the target access channel;
[0061] In this case, the initiator of the access is the host and the responder is the on-chip system; or, the initiator of the access is the on-chip system and the responder is the host.
[0062] On the other hand, this application also provides an electronic device, including:
[0063] Memory, configured to store computer programs;
[0064] The processor is configured to execute a computer program to implement the steps of the data access method described above.
[0065] On the other hand, this application also provides a non-volatile storage medium on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the above-described data access method.
[0066] On the other hand, this application also provides a computer program product, including a computer program / instructions that, when executed by a processor, implement the steps of the data access method described above.
[0067] As can be seen from the above technical solution, this application provides a data access method applied to the access initiator, including: logging into a virtual serial port device created by the access responder on its local operating system; the virtual serial port device is a device created by the access responder through a local virtual serial port driver, the virtual serial port driver being created based on the number of target access channels in the data buffer of a preset programmable logic device; initiating an access request to the access responder's local operating system so that the access responder can obtain the target response data corresponding to the access request from the local system, and write the target response data into the data buffer through the target access channel; and obtaining the target response data from the data buffer through the target access channel to complete the corresponding data access operation. Therefore, logging into the virtual serial port device created by the access responder on its local operating system in this application is equivalent to building a direct connection between the access initiator and the access responder, which can meet the access initiator's need to directly access the access responder through an internal channel, and under this access method, realize the access initiator's needs for common firmware updates, algorithm upgrades, and status monitoring of the access responder. Furthermore, the virtual serial port driver in this application is created based on the number of channels. Therefore, this application can achieve the purpose of multi-user access without increasing resources, further expanding the application scenarios of the data access method provided in this application. Attached Figure Description
[0068] To more clearly illustrate the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0069] Figure 1 is a flowchart of a data access method provided in an embodiment of this application;
[0070] Figure 2 is a schematic diagram of the first structure of a heterogeneous system in the prior art;
[0071] Figure 3 is a schematic diagram of the second structure of a heterogeneous system in the prior art;
[0072] Figure 4 is a framework diagram of the virtual serial port driver provided in the embodiments of this application;
[0073] Figure 5 is a flowchart of the creation process of the virtual serial port device provided in the embodiment of this application;
[0074] Figure 6 is a logic diagram of the data buffer implementing data transmission provided in the embodiment of this application;
[0075] Figure 7 is a flowchart of data writing provided in an embodiment of this application;
[0076] Figure 8 is a flowchart of data reading provided in an embodiment of this application;
[0077] Figure 9 is a system framework diagram provided in an embodiment of this application;
[0078] Figure 10 is a flowchart of the data access method provided in an embodiment of this application;
[0079] Figure 11 is a structural diagram of an electronic device provided in an embodiment of this application. Detailed Implementation
[0080] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the protection scope of this application.
[0081] The terms "comprising" and "having," and any variations thereof, in the specification and accompanying drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may include steps or units not listed.
[0082] To enable those skilled in the art to better understand the present application, the present application will be further described in detail below with reference to the accompanying drawings and embodiments.
[0083] Next, a data access method provided by an embodiment of this application will be described in detail. Figure 1 is a flowchart of a data access method provided by an embodiment of this application. This data access method applied to the access initiator includes the following steps:
[0084] S10: The virtual serial port device created by the login access responder on the local operating system; the virtual serial port device is a device created by the access responder through the local virtual serial port driver, which is created based on the number of target access channels in the data buffer of the preset programmable logic device.
[0085] S11: Initiate an access request to the local operating system of the access responder so that the access responder can obtain the target response data corresponding to the access request from the local machine and write the target response data into the data cache through the target access channel.
[0086] S12: Obtain the target response data from the data buffer through the target access channel to complete the corresponding data access operation.
[0087] In some embodiments, the architecture diagrams of conventional heterogeneous systems are shown in Figures 2 and 3. In these two conventional heterogeneous system forms, there is no direct data path between the host and the system on chip (SOC). If the host wants to access the operating system on the SOC, it needs to access the gigabit port via the network or use a general serial bus to serial port conversion method, which increases the hardware cost of the heterogeneous system. Furthermore, since there is no direct data path between the host and the SOC in these two heterogeneous system forms, the host mainly connects to the SOC through the network inside the field-programmable gate array (FPGA), which consumes a lot of resources inside the FPGA. However, the host's access to the SOC is often only for algorithm upgrades, firmware upgrades, and command execution, so high-bandwidth networks are not required. Moreover, the number of serial ports in the current SOC is limited, which cannot achieve the purpose of multi-user access, thus limiting the application of the current heterogeneous system in some multi-user data acceleration scenarios. Therefore, this application provides a data access method that allows a host to directly access a system-on-a-chip (SoC) via a direct connection channel. In this method, because a direct connection channel is constructed, the host can directly access the SoC, and similarly, the SoC can access the host via the direct connection channel. Therefore, this application categorizes the host and SoC as the access initiator or response party, and the field-programmable gate array (FPGA) as a preset programmable logic device. The steps of the data access method provided are as follows: the response party creates a corresponding virtual serial port based on the number of channels of the target access channel determined by the existing data buffer in the preset programmable logic device. Based on the virtual serial port driver, a virtual serial port device corresponding to the virtual serial port driver is created using a hardware and software combination. Here, the virtual serial port device can be simply understood as a platform. Then, the initiator logs into the virtual serial port device created by the responder, which means logging into the responder's platform. Since the initiator needs to access the responder, it needs to send an access request (which can be understood as a data access request) to the responder's local operating system. When the responder receives the access request, it analyzes the data that needs to be accessed, that is, it determines the target response data corresponding to the access request, and then writes the target response data into the data buffer in the preset programmable logic device. After the data buffer in the preset programmable logic device stores the target response data, the initiator reads the target response data from the data buffer, thereby achieving the initiator's data access purpose from the responder.
[0088] It should be noted that the number of channels determined by the data buffer in the preset programmable logic device is based on the user's requirements, but the sum of the widths of the corresponding channel signals for the number of channels required must be less than the signal width corresponding to the data buffer.
[0089] It should also be noted that the target access channel mentioned in this application is constructed based on the data buffer in the preset programmable logic device and is used to connect the access initiator and the access responder. It is a virtual channel and not a channel constructed based on specific physical connection lines.
[0090] This application does not limit the specific hardware selection of the access initiator, access responder, and preset programmable logic device. In some embodiments, the access initiator is a host, the access responder is a system-on-a-chip, the preset programmable logic device is a field-programmable gate array (FPGA), and the data buffer is a data buffer with a first-in-first-out (FIFO) read / write strategy. In other embodiments, the access initiator is a system-on-a-chip (SoC), the access responder is a host, the preset programmable logic device is an FPGA, and the data buffer is a FIFO. It should be noted that the embodiments provided in this application are only one possible implementation method, but are not limited to this one implementation method. Users can configure them according to their needs.
[0091] For example, when the access initiator is HOST, the access responder is SOC, the preset programmable logic device is FPGA, and the data buffer is FIFO, when implementing specific data access, HOST first logs into the virtual serial port device created by SOC, and then sends an access request corresponding to the data that needs to be accessed to SOC. At this time, SOC determines the data that HOST needs to access (target response data) based on the currently received access request, and writes the target response data into FIFO. Then HOST reads the target response data written into FIFO, and at this time, the data access of HOST to SOC is completed.
[0092] For example, when the initiator of the access is a SOC, the responder is a HOST, the preset programmable logic device is an FPGA, and the data buffer is a FIFO, when implementing a specific system upgrade access, the SOC logs into the virtual serial port device created by the HOST, and then sends the access request corresponding to the system upgrade that needs to be performed to the HOST. At this time, the HOST determines the corresponding upgrade code or data (target response data) based on the access request, and writes the target response data into the FIFO. Then, the SOC reads the target response data written in the FIFO and performs system upgrades based on the read data, thus completing the SOC's system upgrade access to the HOST.
[0093] As can be seen from the above technical solution, this application provides a data access method applied to the access initiator, including: logging into a virtual serial port device created by the access responder on its local operating system; the virtual serial port device is a device created by the access responder through a local virtual serial port driver, the virtual serial port driver being created based on the number of target access channels in the data buffer of a preset programmable logic device; initiating an access request to the access responder's local operating system so that the access responder can obtain the target response data corresponding to the access request from the local system, and write the target response data into the data buffer through the target access channel; and obtaining the target response data from the data buffer through the target access channel to complete the corresponding data access operation. Therefore, logging into the virtual serial port device created by the access responder on its local operating system in this application is equivalent to building a direct connection between the access initiator and the access responder, which can meet the access initiator's need to directly access the access responder through an internal channel, and under this access method, realize the access initiator's needs for common firmware updates, algorithm upgrades, and status monitoring of the access responder. Furthermore, the virtual serial port driver in this application is created based on the number of channels. Therefore, this application can achieve the purpose of multi-user access without increasing resources, further expanding the application scenarios of the data access method provided in this application.
[0094] In some embodiments, since the specific number of virtual serial port devices is related to the number of channels, before creating virtual serial port devices, it is necessary to determine the number of target access channels from the data buffer based on user requirements. These target access channels are the channels used by the initiator to access the responder. Then, after the initiator determines the number of channels, it configures the number of channels to the responder through the dual-access random access memory in the programmable logic device to ensure that the responder's number of channels is the same as the initiator's and that they correspond one-to-one. Once the responder determines the current number of channels, it creates a virtual serial port driver based on its own embedded driver architecture and through software implementation.
[0095] The framework for creating the virtual serial port driver is shown in Figure 4. Internally, it mainly includes a serial port driver and an embedded driver framework. In the serial port driver, the serial port startup function and the preset programmable logic device have signal processing for receiving interrupt signals. Furthermore, the serial port startup function is mutually configured with the startup functions in the embedded driver framework and the user space, primarily implementing a translation of interrupt signals. The serial port driver's receive processing function is mutually configured with the read function in the embedded driver framework and the user space startup function, primarily implementing data reading. The serial port driver's data sending function is mutually configured with the write function in the embedded driver framework and the user space startup function, primarily implementing data writing.
[0096] Its embedded driver architecture can be the tty architecture of a Linux embedded system. This tty architecture includes a tty kernel and line rules, and is implemented by the kernel. When the embedded driver architecture is the tty architecture of a Linux embedded system, the serial port startup function is `startup`; the receive processing function is `vtty_uart_handle_rx`; the data sending function is `start_tx`; the startup function in the embedded driver framework is `N_tty_open`; the read function is `N_tty_read`; the write function is `N_tty_write`; and the startup function in user space is `tty_open`.
[0097] This application mainly defines and implements structures such as uart_driver, uart_ops, and uart_port, and initializes them according to the hardware and driver requirements. The `uart_driver` structure includes information such as the virtual serial port device name, virtual serial port driver name, major and minor device numbers, and serial port console. Its driver registers the `uart_driver` with the system via `uart_register_driver`. The `uart_port` structure describes the I / O port or I / O memory address, data buffer size, and port type of a Universal Asynchronous Receiver / Transmitter (UART) port. Its driver adds ports using the `uart_add_one_port` function. The `uart_ops` structure is related to the underlying hardware and serves as the interface for hardware-software collaboration in this application (e.g., PCIE interface). It includes startup-serial port settings, port startup, data buffer initialization, and setting the data buffer receive interrupt handling function. Within these structures, when the driver receives an interrupt, it calls the `vtty_uart_handle_rx` function to receive the target response data and then transmits the received data to the application layer of the initiating party via the `tty_fl ip_buffer_push` function.
[0098] After creating the virtual serial port driver, the responding party needs to create a virtual serial port device based on the locally created virtual serial port driver to ensure that the initiating party can log in. The process of the responding party creating the virtual serial port device is as follows: First, enable the local serial port receive interrupt and configure the local serial port receive processing function (first initialization operation) to ensure that the current serial port receive processing function and receive interrupt meet the requirements of the current use case; then, register the corresponding operating system console and configure the corresponding console environment; after registering the corresponding operating system console, load the virtual serial port driver locally according to the number of channels configured by the initiating party, specifying the current number of channels, and then use the locally loaded virtual serial port driver to create the corresponding virtual serial port device on the local operating system. The number of virtual serial port devices can be one or more; after creating the virtual serial port device, it needs to be added to the operating system console to make it a unified whole.
[0099] In the process of creating a virtual serial port device on the local operating system using a locally loaded virtual serial port driver, there is a hardware mounting behavior. Therefore, in order to ensure the normal construction and use of the system, it is also necessary to configure the hardware serial port address information between the virtual serial port driver and the preset programmable logic device after loading the virtual serial port driver locally and before adding the virtual serial port device to the operating system console. This is the hardware initialization behavior (second initialization operation).
[0100] It's important to note that during the process of loading the virtual serial port driver to the local machine based on the number of channels configured by the initiator, it's necessary to determine if the number of channels configured by the initiator is non-zero. The virtual serial port driver can only be loaded locally if the number of channels configured by the initiator is non-zero; otherwise, loading the virtual serial port driver is prohibited. This is because when the number of channels is zero, it indicates that there is no channel between the initiator and the responder, thus making it impossible to construct the corresponding virtual serial port and virtual serial port device based on the channels. The number of channels is determined based on the responder's runtime script.
[0101] The configuration of the corresponding console environment includes:
[0102] 1. Modify the file / etc / default / grub to add the virtual serial port device to the console: console=vtty-x,1500000n81;
[0103] 2. Regenerate the Linux bootloader. The command varies depending on the operating system. For example, for Fedora, the command is: grub2-mkconfig-o / boot / efi / EFI / fedora / grub.cfg;
[0104] 3. Manually load the virtual serial port driver on the access responder. For example, create 6 serial port devices: insmod vtty.ko6, and check the virtual serial port devices: ls / dev / vtty*. Also, verify on the access responder whether the operating system console contains the virtual serial port devices: cat / sys / devices / virtual / tty / console / active.
[0105] In summary, the process of creating a virtual serial port device is shown in Figure 5, and it includes the following steps:
[0106] S20: Virtual serial port driver.
[0107] S21: Perform the first initialization operation (vyyt_init).
[0108] S22: Register the operating system console (register_console).
[0109] S23: Register the driver (platform_driver_register).
[0110] S24: Implement hardware mounting (vtty_probe).
[0111] S25: Perform the second initialization operation (vtty_dev_init).
[0112] S26: Add a virtual serial port device (uart_add_one_port).
[0113] S27: Completed.
[0114] Since steps S20-S27 correspond to those in the above embodiments, they will not be described in detail here.
[0115] This application provides a complete process for building virtual serial port drivers and creating virtual serial port devices. Under this process, a complete access channel is built for the access initiator and the access responder. Under this channel, the access initiator can directly access the access responder through the internal channel. Under this access method, the access initiator can realize the access responder's common needs for firmware updates, algorithm upgrades, and status monitoring, further expanding the application scenarios.
[0116] In some embodiments, since there may be at least two data buffers in the preset programmable logic device, and when there are at least two data buffers, their read and write clocks may be inconsistent, thereby increasing the metastability of the overall system. Therefore, when it is determined that the read and write clocks of the data buffers are inconsistent, a preset synchronization method is used to adjust the read and write clocks of the data buffers to be consistent, thereby reducing the metastability of the system. Typically, clock cycle delay (i.e., X-stepping) or Gray code conversion can be used to achieve read and write clock consistency among the data buffers.
[0117] It should be noted that since the function of the data buffer is to write and read data, its first-in-first-out (FIFO) data read / write strategy is in line with the current data transmission requirements. Therefore, the data buffer can be selected as a data buffer with a FIFO read / write strategy.
[0118] This application provides a method for selecting a data buffer, and when there are multiple data buffers, a synchronization method is required to ensure that reading and writing between multiple data buffers are always consistent, thereby improving the internal stability of the programmable logic device and ensuring the stability of writing and reading data in the data buffer.
[0119] In some embodiments, as shown in Figure 6, the step of writing target response data to the data buffer through the target access channel is as follows: monitoring whether a write-full signal is received from the data buffer; if no write-full signal is detected, the target response data is written to the data buffer through the target access channel; otherwise, writing the target response data to the data buffer is prohibited. That is, before the responding party writes the target response data to the data buffer through the target access channel, it needs to ensure that there is space available for writing data within the current data buffer, i.e., the current data buffer is not full. Therefore, when a write-full signal is detected from the data buffer, it indicates that the current data buffer is full, and data cannot be written; when no write-full signal is detected, it indicates that the current data buffer is not full, and the target response data can be written to the data buffer through the target access channel. In addition, during the target response data writing process, a dual-access random access memory is required to reset the data buffer.
[0120] It is important to clarify that the target response data currently written is composed of the identifier corresponding to the current target access channel and the data to be transmitted for the current target access channel. In other words, since this application provides a multi-channel access method, each channel can perform access operations, but when two channels are accessed simultaneously, the initiating party cannot determine which channel is making which access request. Therefore, when the responding party writes data into the data buffer, the written data includes the identifier corresponding to the target access channel currently being transmitted.
[0121] The steps are as follows: obtain the channel number corresponding to the target access channel; obtain the data to be transmitted corresponding to the target access channel; combine the data to be transmitted with the corresponding channel number to obtain the target response data corresponding to the target access channel. The combination method is as follows: obtain the target data byte corresponding to the current data transmission; obtain the data byte to be transmitted corresponding to the data to be transmitted; if the data byte to be transmitted is smaller than the target data byte, fill the data to be transmitted into consecutive empty bytes in the target data byte; fill the channel number corresponding to the current data to be transmitted into the remaining empty bytes in the current target data byte to obtain the target response data corresponding to the target access channel.
[0122] In addition, since the process of creating virtual serial port devices by the responding party also includes configuring corresponding device indexes for each created virtual serial port device and establishing a correspondence between different virtual serial port devices and different target access channels, the step of writing the target response data to the data buffer through the target access channel also includes: determining the target device index corresponding to the virtual serial port device logged in by the current initiator; and using the target access channel corresponding to the target device index in each target access channel to write the target response data to the data buffer. The main purpose of this current step is to establish a one-to-one correspondence between the target access channel, the virtual serial port, and the virtual serial port device, and to use the target access channel corresponding to the virtual serial port device logged in by the current initiator as the write channel to write its target response data into the data buffer.
[0123] Based on this, as shown in Figure 6, the target response data is retrieved from the data buffer through the target access channel. This includes: monitoring whether a non-empty interrupt signal sent by the data buffer is received; if a non-empty interrupt signal is detected, the target response data in the data buffer is read through the target access channel; otherwise, reading data from the data buffer is prohibited. The reason is that the access initiator can only retrieve the target response data from the data buffer through the target access channel when the data buffer contains the target response data. When the data buffer no longer stores the target response data, the access initiator cannot read it. Therefore, only when a non-empty interrupt signal is detected from the data buffer does it indicate that the data buffer still stores the target response data, and in this case, the target response data in the data buffer can be read through the target access channel; if no non-empty interrupt signal is detected, it indicates that the data buffer no longer contains the target response data, and reading data from the data buffer is prohibited.
[0124] Because of the existence of a device index, the steps for obtaining the target response data from the data buffer through the target access channel are as follows: The target response data is read from the data buffer using a preset data receiving tool via the target access channel, and then forwarded to the target virtual serial port device. The target virtual serial port device is the virtual serial port device determined from among the various virtual serial port devices that corresponds to the target access channel transmitting the target response data. The preset data receiving tool can specifically determine the target access channel and virtual serial port device corresponding to the current target response data. Therefore, using the preset data receiving tool, the virtual serial port device corresponding to the current target response data can be used as the target virtual serial port device, and the target response data can be sent to the corresponding target virtual serial port through the corresponding target access channel, achieving a one-to-one correspondence between the target response data, the target access channel, and the virtual serial port device.
[0125] In summary, as shown in Figure 7, the multi-channel process of writing target response data into the data buffer includes the following steps:
[0126] S30: Multi-channel write (send) data.
[0127] S31: Query the virtual serial port device index.
[0128] S32: Adjust and determine the target response data.
[0129] S33: Write the recombined target response data to the data buffer.
[0130] S34: Completed.
[0131] As shown in Figure 8, the process of acquiring target response data in the multi-channel data buffer includes the following steps:
[0132] S40: Multi-channel read (receive) data.
[0133] S41: Determine the target access channel based on the target response data.
[0134] S42: Determine the target virtual serial port device based on the preset data receiving tool.
[0135] S43: Send the target response data to the target virtual serial port device through the target access channel.
[0136] S44: Done.
[0137] Since the embodiments of steps in Figures 7 and 8 are the same as those described above, they will not be repeated here.
[0138] In the above embodiments, the host acts as the access initiator, the on-chip system as the access responder, and the field-programmable gate array (FPGA) as the preset programmable logic device. The data buffer is configured with a 16-bit width (bits 0-7 are data, bits 8-10 are channel numbers, and bits 11-15 are reserved), supporting a maximum of 8 user channels. When the internal serial port is configured using the n81 protocol, its typical transmission bits are: 1 start bit, 8 data bits, and 1 stop bit. With a baud rate of 1500000bps, the bandwidth is approximately 1500000 / 10 / 1024 / 1024MB / s ≈ 1.43MB / s. Since this application supports a maximum of 8 channels, with 16-bit transmission, the total bandwidth is approximately 1.43 × 8 × 2 = 22.8MB / s. The system framework of this application under the current configuration is shown in Figure 9. It can be seen from this that, in implementing the creation of the channel between the host and the system-on-chip, this application simultaneously reuses the high-speed serial bus (interface) (e.g., PCIE / axi / Avalon) between the host / system-on-chip and the field-programmable gate array.
[0139] Based on the above embodiments and the system framework shown in Figure 9, the flow of the data access method provided in this application is shown in Figure 10, including the following steps:
[0140] S50: Heterogeneous system powered on.
[0141] S51: The host is powered on.
[0142] S52: Field Programmable Gate Array (FPGA) program automatically loads.
[0143] S53: Determine if the data buffer has been initialized.
[0144] S54: If the data buffer has been initialized, perform data writing or reading operations; if the data buffer has not been initialized, return to step S53.
[0145] S55: Determine whether the number of channels obtained by the on-chip system running the script is non-zero.
[0146] S56: If the number of channels obtained by the on-chip system running the script is non-zero, the on-chip system loads the virtual serial port driver according to the number of channels; if the number of channels obtained by the on-chip system running the script is not non-zero, return to step S55.
[0147] S57: Create a virtual serial port device.
[0148] S58: Handles operations related to host login.
[0149] S59: Host initializes the data cache.
[0150] S60: The host loads the virtual serial port driver.
[0151] S61: The host configures the number of channels to the system-on-chip according to user needs.
[0152] S62: Open the serial port tool, log in to the virtual serial port device, and access the on-chip system operating system.
[0153] It should be noted that the embodiments corresponding to S50-S62 are all the same as the embodiments described above, so they will not be described again here.
[0154] It should be noted that the embodiments provided in this application are only one possible implementation method, but are not limited to this only implementation method. Users can set their own implementation methods according to their needs.
[0155] It should be noted that the dashed lines in the attached diagram are configuration lines.
[0156] As can be seen from the above technical solutions, this application does not require a large amount of pre-programmable device resources. Data transmission can be efficiently completed through a data buffer and multiplexing of a high-speed bus interface, with a maximum communication rate of 1MB / s+. This meets the needs of low-speed communication without increasing costs and reducing resource consumption. Furthermore, this application, through the collaborative cooperation of a virtual serial port driver and pre-programmable devices, enables the initiating party to perform terminal login, algorithm upgrade, firmware upgrade, and command execution on the responding party. Additionally, this application achieves multi-terminal serial port login by including channel numbers in the data, solving the problem of single-port login in existing serial port solutions without increasing resources.
[0157] On the other hand, this application also provides a data access method, applied to an access responder, including:
[0158] The system retrieves the access request initiated by the access initiator to the local operating system after logging into the virtual serial port device. The virtual serial port device is a device pre-created on the local operating system by the access responder through the local virtual serial port driver. The virtual serial port driver is created based on the number of target access channels in the data buffer of the preset programmable logic device.
[0159] The system retrieves the target response data corresponding to the access request from the local machine and writes the target response data to the data cache through the target access channel, so that the access initiator can retrieve the target response data from the data cache through the target access channel.
[0160] It should be noted that since the embodiments of this application are the same as those described above, they will not be repeated here.
[0161] In addition, this application also provides a heterogeneous system, including: an access initiator, an access responder, and a preset programmable logic device; wherein,
[0162] The pre-programmable logic device is used to construct the target access channel between the access initiator and the access responder through its own data buffer;
[0163] The initiator logs into the virtual serial port device created by the responder on the local operating system, initiates an access request to the responder's local operating system, and retrieves the target response data corresponding to the access request from the data buffer through the target access channel; the virtual serial port device is a device created by the responder through the local virtual serial port driver, which is created based on the number of channels of the target access channel.
[0164] The access responder is configured to retrieve the target response data corresponding to the access request from the local machine and write the target response data to the data cache through the target access channel;
[0165] In this case, the initiator of the access is the host and the responder is the on-chip system; or, the initiator of the access is the on-chip system and the responder is the host.
[0166] It should also be noted that since the embodiments of this application are the same as those described above, they will not be repeated here.
[0167] Figure 11 is a structural diagram of an electronic device provided in an embodiment of this application. As shown in Figure 11, the electronic device includes: a memory 60, configured to store computer programs.
[0168] The processor 61 is configured to implement the steps of the data access method as described in the above embodiments when executing a computer program.
[0169] The electronic devices provided in this embodiment may include, but are not limited to, smartphones, tablets, laptops, or desktop computers.
[0170] The processor 61 may include one or more processing cores, such as a quad-core processor or an octa-core processor. The processor 61 may be implemented using at least one hardware form selected from Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 61 may also include a main processor and a coprocessor. The main processor, also known as a central processing unit (CPU), is configured to process data in the wake-up state; the coprocessor is configured to be a low-power processor to process data in the standby state. In some embodiments, the processor 61 may integrate a Graphics Processing Unit (GPU), which is configured to render and draw the content required to be displayed on the screen. In some embodiments, the processor 61 may also include an Artificial Intelligence (AI) processor configured to handle computational operations related to machine learning.
[0171] The memory 60 may include one or more computer-readable storage media, which may be non-transitory. The memory 60 may also include high-speed random access memory and non-volatile memory, such as one or more disk storage devices or flash memory devices. In this embodiment, the memory 60 is configured to store at least the following computer program 601, which, after being loaded and executed by the processor 61, is capable of implementing the relevant steps of the data access method disclosed in any of the foregoing embodiments. In addition, the resources stored in the memory 60 may also include an operating system 602 and data 603, and the storage method may be temporary or permanent storage. The operating system 602 may include Windows, Unix, Linux, etc.
[0172] In some embodiments, the electronic device may further include a display screen 62, an input / output interface 63, a communication interface 64, a power supply 65, and a communication bus 66.
[0173] Those skilled in the art will understand that the structure shown in FIG11 does not constitute a limitation on the electronic device and may include more or fewer components than shown.
[0174] It is understood that if the data access methods in the above embodiments are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the current technology, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and executes all or part of the steps of the methods in the various embodiments of this application. The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs, magnetic disks, or optical disks, and other media capable of storing program code.
[0175] Based on this, embodiments of this application also provide a non-volatile storage medium on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the data access method described above.
[0176] In addition, this application also provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the data access method described above.
[0177] The above provides a detailed description of an electronic device provided by the embodiments of this application. The various embodiments are described in a progressive manner, with each embodiment focusing on its differences from other embodiments. Similar or identical parts between embodiments can be referred to interchangeably. For the apparatus disclosed in the embodiments, since it corresponds to the method disclosed in the embodiments, the description is relatively simple; relevant parts can be referred to in the method section.
[0178] Those skilled in the art will further recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, computer software, or a combination of both. To clearly illustrate the interchangeability of hardware and software, the components and steps of the various examples have been generally described in terms of functionality in the foregoing description. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0179] The foregoing has provided a detailed description of a data access method, heterogeneous system, electronic device, medium, and program product provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the embodiments above are merely for the purpose of helping to understand the method and core ideas of this application. It should be noted that those skilled in the art can make various improvements and modifications to this application without departing from its principles, and these improvements and modifications also fall within the protection scope of the claims of this application.
Claims
1. A data access method, characterized in that, Applied to the initiator of the access, including: The login access responder creates a virtual serial port device on the local operating system; the virtual serial port device is a device created by the access responder through a local virtual serial port driver, and the virtual serial port driver is created based on the number of target access channels in the data buffer of a preset programmable logic device; An access request is initiated to the local operating system of the access responder, so that the access responder can obtain the target response data corresponding to the access request from the local system and write the target response data into the data cache through the target access channel; The target response data is obtained from the data cache through the target access channel to complete the corresponding data access operation.
2. The data access method according to claim 1, characterized in that, Before the virtual serial port device created on the local operating system by the login access responder, it also includes: The number of target access channels is determined from the data cache based on user needs; the target access channel is the channel used by the access initiator to access the access responder. The number of channels is configured to the access responder so that the access responder can create the virtual serial port driver based on the number of channels.
3. The data access method according to claim 2, characterized in that, The step of configuring the number of channels to the access responder, so that the access responder creates the virtual serial port driver based on the number of channels, includes: The number of channels is configured to the access responder through the dual-access random access memory in the programmable logic device, so that the access responder can create the virtual serial port driver based on the number of channels.
4. The data access method according to claim 2, characterized in that, The access responder creates the virtual serial port driver based on the number of channels, including: Based on the embedded driver architecture and the number of channels of the target access channel, the virtual serial port driver is created through software implementation.
5. The data access method according to claim 2, characterized in that, The process by which the access responder creates the virtual serial port device includes: The virtual serial port driver is loaded locally according to the number of channels configured by the access initiator; The virtual serial port device is created on the local operating system using the locally loaded virtual serial port driver; The number of virtual serial port devices is one or more.
6. The data access method according to claim 5, characterized in that, Before the access responder loads the virtual serial port driver locally, the process also includes: Perform the first local initialization operation, and after the first initialization operation is completed, register the corresponding operating system console and configure the corresponding console environment; Accordingly, after creating the virtual serial port device on the local operating system using the locally loaded virtual serial port driver, the process further includes: Add the virtual serial port device to the operating system console.
7. The data access method according to claim 6, characterized in that, The first initialization operation includes enabling the local serial port receive interrupt and configuring the local serial port receive processing function.
8. The data access method according to claim 6, characterized in that, Also includes: After loading the virtual serial port driver locally and before adding the virtual serial port device to the operating system console, a second initialization operation is performed; The second initialization operation involves configuring the hardware serial port address information between the device and the preset programmable logic device.
9. The data access method according to claim 5, characterized in that, The step of loading the virtual serial port driver to the local machine according to the number of channels configured by the access initiator includes: Determine whether the number of channels configured by the access initiator is a non-zero value; If the number of channels configured by the access initiator is non-zero, the virtual serial port driver will be loaded locally; otherwise, loading the virtual serial port driver locally will be prohibited.
10. The data access method according to claim 1, characterized in that, If the preset programmable logic device includes at least two of the data buffers, the method further includes: Determine whether the read / write clocks of each of the data buffers are consistent; If the read / write clocks of the data buffers are inconsistent, the read / write clocks of the data buffers will be adjusted to be consistent through a preset synchronization method.
11. The data access method according to claim 10, characterized in that, The preset synchronization methods include delaying the clock cycle or converting Gray code.
12. The data access method according to claim 1, characterized in that, The data buffer is a buffer implemented based on the internal registers of the preset programmable logic device, and the data buffer adopts a first-in-first-out data read / write strategy.
13. The data access method according to claim 1, characterized in that, The step of writing the target response data into the data buffer through the target access channel includes: Monitor whether a full signal is received from the data buffer; If no write-full signal is detected from the data buffer, the target response data is written to the data buffer through the target access channel; otherwise, writing the target response data to the data buffer is prohibited.
14. The data access method according to claim 1, characterized in that, The process of the access responder creating a virtual serial port device also includes: Configure a corresponding device index for each of the created virtual serial port devices, and establish a correspondence between different virtual serial port devices and different target access channels; Accordingly, writing the target response data into the data buffer through the target access channel includes: Determine the target device index corresponding to the virtual serial port device logged in by the current access initiator; The target response data is written to the data buffer using the target access channel corresponding to the target device index in each of the target access channels.
15. The data access method according to claim 14, characterized in that, Also includes: The target response data is read from the data buffer using the target access channel by a preset data receiving tool, and the read target response data is forwarded to the target virtual serial port device. The target virtual serial port device is the virtual serial port device determined from among the virtual serial port devices that corresponds to the target access channel that transmits the target response data; Accordingly, obtaining the target response data from the data cache through the target access channel includes: The target response data is obtained from the target virtual serial port device by the preset data receiving tool through the corresponding target access channel.
16. The data access method according to claim 15, characterized in that, The step of reading the target response data from the data buffer using the target access channel via a preset data receiving tool includes: Monitor whether a non-empty interrupt signal is received from the data buffer; If a non-empty interrupt signal is detected from the data buffer, the target response data in the data buffer is read using the target access channel through a preset data receiving tool; otherwise, reading data from the data buffer is prohibited.
17. The data access method according to any one of claims 1 to 16, characterized in that, The access initiator is a host, and the access responder is a system-on-a-chip; or, the access initiator is a system-on-a-chip, and the access responder is a host.
18. A data access method, characterized in that, Applied to the access responder, including: The system obtains the access request initiated by the access initiator to the local operating system after logging into the virtual serial port device; the virtual serial port device is a device pre-created on the local operating system by the access responder through the local virtual serial port driver, and the virtual serial port driver is created based on the number of target access channels in the data buffer of the preset programmable logic device. The system retrieves the target response data corresponding to the access request from the local machine and writes the target response data into the data cache through the target access channel, so that the access initiator can retrieve the target response data from the data cache through the target access channel.
19. A heterogeneous system, characterized in that, include: The access initiator, the access responder, and the preset programmable logic device; among them, The preset programmable logic device is configured to construct a target access channel between the access initiator and the access responder through its own data buffer. The initiator of the access is configured to log in to the virtual serial port device created by the responder on the local operating system, and initiate an access request to the responder's local operating system, and obtain the target response data corresponding to the access request from the data buffer through the target access channel; the virtual serial port device is a device created by the responder through a local virtual serial port driver, and the virtual serial port driver is created based on the number of channels of the target access channel; The access responder is configured to obtain the target response data corresponding to the access request from the local machine, and write the target response data into the data cache through the target access channel; Wherein, the access initiator is a host and the access responder is a system-on-a-chip; or, the access initiator is a system-on-a-chip and the access responder is a host.
20. An electronic device, characterized in that, include: Memory, configured to store computer programs; A processor is configured to execute the computer program to implement the steps of the data access method as described in any one of claims 1 to 18.
21. A non-volatile storage medium, characterized in that, The non-volatile storage medium stores a computer program, which, when executed by a processor, implements the steps of the data access method as described in any one of claims 1 to 18.
22. A computer program product, comprising a computer program / instructions, characterized in that, When the computer program / instruction is executed by the processor, it implements the steps of the data access method according to any one of claims 1 to 18.