Communication method and apparatus

Abstract

A communication method and apparatus, relating to the technical field of communications, and capable of reducing the computational complexity of distribution matching and improving distribution matching efficiency. The method comprises: a terminal device acquiring a first bit sequence; and performing distribution matching on the first bit sequence on the basis of a first correspondence to obtain a target symbol sequence. The row serial number of a first element in the first correspondence comprising E rows and N columns of elements is e, and the column serial number is n. If e is greater than or equal to all values in a first set, the value of the first element does not exceed the sum of the values of a second element and a third element in the (n+1)-th column of elements in the first correspondence; if e is greater than or equal to a first value and e is less than a second value, the value of the first element does not exceed the value of the second element, wherein the first value is less than the second value; and if e is less than the first value, the value of the first element is 0, wherein e=0, 1,…, or E-1, n=0, 2…, or N-2, and E and N are positive integers.

Description

Communication methods and devices

[0001] This application claims priority to Chinese Patent Application No. 202411626812.7, filed on November 13, 2024, entitled "Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to the field of communication technology, and in particular to communication methods and apparatus. Background Technology

[0003] In communication systems, higher-order modulation refers to mapping a binary bit sequence to a modulation symbol sequence to improve spectral efficiency. Specifically, the transmitting device can cascade a pre-encoder (also called a distribution matcher) before encoding. The pre-encoder performs distribution matching on a portion of the information bit sequence (mapping the bit sequence to a sequence that follows a specific distribution) to obtain an output sequence. This output sequence ensures that the frequencies of each symbol follow or closely approximate a preset specific distribution, thereby saving transmission power.

[0004] However, in the current distribution matching process, the value of each symbol in the output sequence needs to be determined through multiple judgments (e.g., less than or equal to 3 judgments), resulting in high computational complexity. Therefore, how to reduce the computational complexity of distribution matching is an urgent problem to be solved. Summary of the Invention

[0005] This application provides a communication method and apparatus that can reduce the computational complexity of distributed matching.

[0006] Firstly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the transmitting device's functions. The method includes: acquiring a first bit sequence; and performing distribution matching on the first bit sequence according to a first correspondence to obtain a target symbol sequence. The first correspondence includes elements in rows E and columns N, where the row number of the first element in the E rows and N columns is e, and the column number is n; all values ​​in the first set corresponding to e being greater than or equal to any value in the first set; the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence; the first set is the set corresponding to the column number n of the first element in P sets; the first set includes a first value and a second value, where the first value is the difference between the row numbers of the first and second elements, the second value is the difference between the row numbers of the first and third elements, the first value is less than the second value, and P is 2. mm is a positive integer; corresponding to e being greater than or equal to the first value and e being less than the second value, the value of the first element does not exceed the value of the second element; corresponding to e being less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0007] Based on the first aspect, the transmitting device can perform distribution matching on a portion of the information bit sequence (i.e., the first bit sequence) based on the first correspondence to obtain the target symbol sequence. The first correspondence includes elements in E rows and N columns, and any element in the first correspondence is determined by the sum of at most two elements in the next column. For example, taking the first element with row number e and column number n in the E rows and N columns as an example, when e is greater than or equal to all values ​​in the first set, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence; wherein the first set is the set corresponding to the column number n of the first element in P sets, and the first set includes a first value and a second value. The first value is the difference between the row numbers of the first and second elements, and the second value is the difference between the row numbers of the first and third elements. The first value is less than the second value, and P is 2. m m is a positive integer. When e is greater than or equal to the first value and e is less than the second value, the value of the first element does not exceed the value of the second element. When e is less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0008] Understandably, in a fence graph used for distributed matching, if any element in the nth column equals the sum of the M elements in the (n+1)th column, then determining the value of any bit in the distributed matching output sequence requires at most M-1 judgments. In this scheme, the first element is determined based on the sum of at most two elements in the next column. That is, during distributed matching, at most one judgment is needed to determine the value of a bit in the target symbol sequence, reducing computational complexity and improving distributed matching efficiency.

[0009] In one possible design, the first bit sequence is distributed and matched according to the first correspondence to obtain the target symbol sequence, including: determining the target symbol sequence based on the size relationship between the lexicographical index of the first bit sequence and the value of the element in the first correspondence, wherein the value of the symbol in the target symbol sequence is 0 or 1.

[0010] Based on this possible design, the symbols in the target symbol sequence of the distributed matching output can take the value of 0 or 1. That is, each symbol in the target output sequence can be represented by 1 bit. Compared with the scheme where the symbol value in the distributed matching output result is greater than 1, it can reduce the resources occupied by the distributed matching result.

[0011] In one possible design, the target symbol sequence is determined based on the relationship between the lexicographical index of the first bit sequence and the value of the element in the first correspondence, including: determining the intermediate symbol sequence based on the relationship between the lexicographical index of the first bit sequence and the value of the element in the first correspondence; and interleaving the intermediate symbol sequence to obtain the target symbol sequence.

[0012] Based on the two possible designs mentioned above, during the distribution matching process, the intermediate symbol sequence determined according to the first correspondence can also be interleaved, so that symbols with the same remainder modulo P in the target symbol sequence output after interleaving can be placed consecutively; thereby improving computational efficiency in subsequent operations based on the target symbol sequence.

[0013] In one possible design, the method further includes: interleaving the target symbol sequence according to the second bit sequence to obtain an interleaved sequence; encoding, interleaving, and modulating the interleaved sequence, the second bit sequence, and the third bit sequence to obtain transmission information, wherein the second bit sequence and the third bit sequence are both partial sequences of the payload bit sequence; and transmitting the transmission information.

[0014] Based on this possible design, after determining the target symbol sequence, the terminal device can also obtain an interleaved sequence based on a portion of the payload bit sequence (such as the second bit sequence). Then, by combining the interleaved sequence and the remaining sequences in the payload bit sequence other than the first bit sequence (i.e., the second bit sequence and the third bit sequence), the encoding process can be continued to obtain the transmission information, which can then be sent to the receiving device.

[0015] Secondly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: receiving information to be decoded, the information to be decoded including a target symbol sequence; and performing a distribution-matching inverse transform on the target symbol sequence according to a first correspondence to obtain a first bit sequence. The first correspondence includes elements in rows E and columns N. The row number of the first element in the E rows and N columns is e, and the column number is n. All values ​​in the first set corresponding to e being greater than or equal to e are included. The value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence. The first set is the set corresponding to the column number n of the first element in P sets. The first set includes a first value and a second value. The first value is the difference between the row numbers of the first and second elements, and the second value is the difference between the row numbers of the first and third elements. The first value is less than the second value, and P is 2. m m is a positive integer; corresponding to e being greater than or equal to the first value and e being less than the second value, the value of the first element does not exceed the value of the second element; corresponding to e being less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0016] Based on the second aspect, the receiving device receives the target symbol sequence (i.e., the information to be decoded, which includes the target symbol sequence) obtained from the sending device after performing distribution matching on the information bit sequence (i.e., the first bit sequence) based on the first correspondence relationship. The first correspondence relationship includes elements in E rows and N columns, and any element in the first correspondence relationship is determined based on the sum of at most two elements in the next column. For example, taking the first element with row number e and column number n in the E rows and N columns as an example, when e is greater than or equal to all values ​​in the first set, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence relationship; wherein the first set is the set corresponding to the column number n of the first element in P sets, the first set includes a first value and a second value, the first value is the difference between the row numbers of the first and second elements, the second value is the difference between the row numbers of the first and third elements, the first value is less than the second value, and P is 2. m m is a positive integer. When e is greater than or equal to the first value and e is less than the second value, the value of the first element does not exceed the value of the second element. When e is less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0017] Understandably, in a fence graph used for distributed matching, if any element in the nth column equals the sum of the M elements in the (n+1)th column, then determining the value of any bit in the distributed matching output sequence requires at most M-1 judgments. In this scheme, the first element is determined based on the sum of at most two elements in the next column. That is, during distributed matching, at most one judgment is needed to determine the value of a bit in the target symbol sequence, reducing computational complexity and improving distributed matching efficiency.

[0018] In one possible design, the lexicographical index of the first bit sequence and the value of the element in the first correspondence are related to the value of the symbol in the target symbol sequence, where the value of the symbol in the target symbol sequence is 0 or 1.

[0019] In one possible design, the method also includes:

[0020] The information to be decoded is demodulated, de-interleaved, and decoded to obtain an interleaved sequence; the interleaved sequence is de-interleaved based on the second bit sequence to obtain the target symbol sequence, where the second bit sequence is a portion of the payload bit sequence.

[0021] The technical effects of any design in the second aspect can be referenced from the technical effects of the corresponding design in the first aspect, and will not be elaborated here.

[0022] Combining the first and second aspects, in one possible design, when P is 2, the P sets include two sets, which include the set corresponding to odd-numbered columns and the set corresponding to even-numbered columns; the first set is the set corresponding to the column index n of the first element in the P sets, including: when the column index n of the first element is odd, the first set is the set corresponding to the odd-numbered columns in the two sets; when the column index n of the first element is even, the first set is the set corresponding to the even-numbered columns in the two sets.

[0023] Based on this possible design, in the first correspondence, the odd-numbered columns and the even-numbered columns can correspond to different sets respectively. Thus, the elements of the odd-numbered columns and the elements of the even-numbered columns can determine at most two related elements (such as the second element and the third element) in the next column based on different sets, providing a possible implementation method for the first correspondence.

[0024] Combining the first and second aspects, in one possible design, the values ​​of the elements in the (N-1)th column of the first correspondence are all constants.

[0025] Based on this possible design, in the first correspondence, since the first element is determined based on the values ​​of at most two elements in the next column, the other column elements in the first correspondence can only be determined when the value of the last column (i.e., the element in the N-1th column) is a constant. Specifically, the constant can be any value, such as 0 or 1, so that the first correspondence can have different implementations.

[0026] Combining the first and second aspects, in one possible design, the value of the first element does not exceed the sum of the values ​​of the second and third elements, including: the value of the first element is equal to the value corresponding to the first binary sequence, the first binary sequence is the value of the first W bits of the binary sequence corresponding to the sum of the second and third elements under the length of the first binary sequence, where W is a positive integer.

[0027] Combining the first and second aspects, in one possible design, the value of the first element does not exceed the value of the second element, including: the value of the first element is equal to the value corresponding to the second binary sequence, and the second binary sequence is the value of the first W bits of the binary sequence corresponding to the value of the second element under the length of the second binary sequence.

[0028] Combining the two possible designs above, when determining the value of the first element, only a portion of the valid digits of the sum of its related elements in the next column are retained, so that the value of the first element is less than the sum of its related elements in the next column, thereby reducing the storage overhead of the first correspondence.

[0029] In one possible design, the row number of the second element = e - the first value; the row number of the third element = e - the second value.

[0030] Combining the first and second aspects, in one possible design, the first correspondence is based on some or all of the elements in the second correspondence consisting of E′ rows and N′ columns, where E′≥E, N′≥N.

[0031] Combining the first and second aspects, in one possible design, when the first correspondence is composed of some elements in the second correspondence, the some elements include the elements in row 0 to row E-1 and the elements in column N′-N-1 to column N′-1 in the second correspondence.

[0032] Combining the two possible designs mentioned above, the first correspondence can be composed of some elements from the pre-made second correspondence; for example, the terminal device can select the corresponding elements from the second correspondence to form the first correspondence according to its needs, and then perform distribution matching based on the first correspondence, thereby improving the flexibility of distribution matching.

[0033] Combining the first and second aspects, in one possible design, the value of E is related to the length K of the first bit sequence, where K is a positive integer.

[0034] Based on this possible design, since the value of E is related to the length K of the first bit sequence, the terminal device can select the corresponding elements in the second correspondence to form the first correspondence based on the length K of the first bit sequence, so that the distributed matcher can execute based on the first correspondence.

[0035] Combining the first and second aspects, in one possible design, both the first and second values ​​are related to P and n.

[0036] Combining the first and second aspects, in one possible design, the first and second values ​​satisfy the following relationships:

[0037] Where, a = 2*(P-mod(n,P))-1; or, N-1 is an integer multiple of P.

[0038] Based on this possible design, the first and second values ​​in the set used to determine the first element (i.e., the first set) are both the true energy values ​​corresponding to the amplitude bit values ​​(such as any value among 0, 1, 3, and 6). The energy of the target symbol sequence that can be determined based on this set is low, and the probability shaping effect achieved based on distribution matching is better.

[0039] Combining the first and second aspects, in one possible design, the first and second values ​​satisfy the following relationships:

[0040] First value = a, second value = 2*P-1-a;

[0041] Where, a = P⁻¹ - mod(n, P); or, N-1 is an integer multiple of P.

[0042] Based on this possible design, compared to the actual energy values ​​corresponding to the amplitude bit values ​​(such as 0, 1, 3, 6), the values ​​of the first and second values ​​in the set used to determine the first element (i.e., the first set) are smaller, so the number of rows of the first correspondence determined based on the first element is smaller, and thus only less resources are needed to store the first correspondence.

[0043] Combining the first and second aspects, in one possible design, the value of the first element is associated with the values ​​of at most two elements in the (n+1)th column.

[0044] Based on this possible design, it can be understood that in the fence graph used to implement distributed matching, if any element in the nth column is equal to the sum of the M elements in the (n+1)th column, then determining the value of any bit in the distributed matching output sequence requires at most M-1 judgments. The value of the first element is related to the values ​​of at most two elements in the (n+1)th column; that is, the first element is determined based on the sum of at most two elements in the next column. In other words, during distributed matching, at most one judgment is needed to determine the value of a bit in the target symbol sequence, reducing computational complexity and improving the efficiency of distributed matching.

[0045] Thirdly, embodiments of this application provide a communication device that can be applied to the transmitting end device described in the first aspect to realize the functions performed by the transmitting end device. The communication device can be the transmitting end device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting end device, etc. The communication device can execute the functions performed by the transmitting end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0046] For example, the processing module is used to obtain a first bit sequence; and perform distribution matching on the first bit sequence according to a first correspondence to obtain a target symbol sequence. The first correspondence includes elements in rows E and columns N, where the row number of the first element in the E rows and N columns is e, and the column number is n; corresponding to all values ​​in the first set where e is greater than or equal to any value in the first set, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence. The first set is the set corresponding to the column number n of the first element in P sets, and includes a first value and a second value. The first value is the difference between the row numbers of the first and second elements, and the second value is the difference between the row numbers of the first and third elements. The first value is less than the second value, and P is 2. m m is a positive integer; corresponding to e being greater than or equal to the first value and e being less than the second value, the value of the first element does not exceed the value of the second element; corresponding to e being less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0047] Optionally, the transceiver module and processing module of the communication device in the third aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0048] Fourthly, embodiments of this application provide a communication device that can be applied to the receiving device described in the second aspect to realize the functions performed by the receiving device. The communication device can be the receiving device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving device. The communication device can execute the functions performed by the receiving device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0049] For example, the transceiver module is used to receive information to be decoded, which includes a target symbol sequence; the processing module is used to perform a distribution matching inverse transform on the target symbol sequence according to a first correspondence to obtain a first bit sequence. The first correspondence includes E rows and N columns of elements, where the row number of the first element in the E rows and N columns is e, and the column number is n; all values ​​in the first set corresponding to e being greater than or equal to e are included. The value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence. The first set is the set corresponding to the column number n of the first element in P sets. The first set includes a first value and a second value, where the first value is the difference between the row numbers of the first and second elements, and the second value is the difference between the row numbers of the first and third elements. The first value is less than the second value, and P is 2^n. m m is a positive integer; corresponding to e being greater than or equal to the first value and e being less than the second value, the value of the first element does not exceed the value of the second element; corresponding to e being less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0050] Optionally, the transceiver module and processing module of the communication device in the fourth aspect may also perform the corresponding functions in the second aspect or any possible design of the second aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0051] Fifthly, embodiments of this application provide a communication device, which includes one or more processors; the one or more processors are configured to run computer programs or instructions, such that when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to second aspects is performed.

[0052] In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and / or transmitting information.

[0053] In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

[0054] In a sixth aspect, embodiments of this application provide a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used for inputting and / or outputting information; the logic circuit is used for executing the communication method as described in either the first or second aspect, processing and / or generating information based on the information.

[0055] In a seventh aspect, embodiments of this application provide a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in either the first or second aspect to be performed.

[0056] Eighthly, embodiments of this application provide a computer program product containing computer instructions that, when run on a computer, causes the communication method described in either the first or second aspect to be executed.

[0057] Ninthly, embodiments of this application provide a computer program that, when run on a computer, causes the communication method described in either the first or second aspect to be executed.

[0058] In a tenth aspect, embodiments of this application provide a chip, including: a processor coupled to a memory, the memory being used to store programs or instructions, wherein when the program or instructions are executed by the processor, a communication method as described in either the first or second aspect is executed.

[0059] The technical effects of any of the design methods in aspects three through ten are similar to those in aspects one and two above, and will not be elaborated upon further.

[0060] Eleventhly, embodiments of this application provide a communication system that may include communication means for performing the communication as described in the first aspect or any possible design of the first aspect, and communication means for performing the communication as described in the second aspect or any possible design of the second aspect. Attached Figure Description

[0061] Figure 1 is a schematic diagram of a modulation and shaping process provided in an embodiment of this application;

[0062] Figure 2 is a schematic diagram of a shaped constellation distribution provided in an embodiment of this application;

[0063] Figure 3 is a schematic diagram of a communication system provided in an embodiment of this application;

[0064] Figure 4 is a schematic diagram of encoding and decoding performed by a transmitting end device and a receiving end device according to an embodiment of this application;

[0065] Figure 5 is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0066] Figure 6 is a flowchart illustrating a communication method provided in an embodiment of this application;

[0067] Figure 7 is a schematic diagram of a first correspondence relationship provided in an embodiment of this application;

[0068] Figure 8 is a schematic diagram of another first correspondence provided in an embodiment of this application;

[0069] Figure 9 is a schematic diagram of yet another first correspondence relationship provided in an embodiment of this application;

[0070] Figure 10 is a schematic diagram of row and column interleaving provided in an embodiment of this application;

[0071] Figure 11 is a flowchart illustrating another communication method provided in an embodiment of this application;

[0072] Figure 12 is a schematic diagram of another reshaped constellation distribution provided in an embodiment of this application;

[0073] Figure 13 is a flowchart illustrating another communication method provided in an embodiment of this application;

[0074] Figure 14 is a schematic diagram of the structure of a transmitting device provided in an embodiment of this application;

[0075] Figure 15 is a schematic diagram of the structure of a receiving device provided in an embodiment of this application;

[0076] Figure 16 is a schematic diagram of another communication device provided in an embodiment of this application;

[0077] Figure 17 is a schematic diagram of another communication device provided in an embodiment of this application. Detailed Implementation

[0078] Before describing the embodiments of this application, the technical terms involved in the embodiments of this application will be described.

[0079] Higher-order modulation: Higher-order modulation refers to mapping multiple binary bits to a single modulation symbol to improve spectral efficiency. For example, common higher-order modulation schemes include quadrature amplitude modulation (QAM), 64QAM, or 256QAM.

[0080] For example, taking amplitude keying (ASK) as the modulation scheme, the mapping relationship between binary bits and modulation symbols can be shown in Table 1 below. b0, b1, and b2 represent two different bit energy levels, and x represents the modulation symbol. Different bit values ​​of b0, b1, and b2 can correspond to different modulation symbols.

[0081] Table 1

[0082] Based on Table 1, taking b0 as 1 and b1 and b2 as 0 as an example, x can be -3; or, taking b0 and b2 as 1 and b1 as 0 as an example, x can be -1.

[0083] In higher-order modulation, different modulation symbols may have different energies. The average energy can be reduced by sending more low-energy modulation symbols and fewer high-energy modulation symbols, thereby saving transmission power.

[0084] It is understandable that for a Gaussian white noise channel, the energy saved is greatest when the distribution of modulation symbols in the first sequence follows a Gaussian distribution, which can save up to 1.53 dB of transmission power compared to an average distribution.

[0085] Probabilistic shaping: Probabilistic shaping is a common "shaping" technique that can shape bit sequence #1 to obtain bit sequence #2, so that the frequency of each information bit in bit sequence #2 follows or is close to a preset specific distribution, thereby saving transmission power.

[0086] The flowchart of probability shaping can be shown in Figure 1. A precoder can be cascaded before encoding to map a portion of the bit sequence in the payload bit sequence (referred to as bit sequence #1) to a sequence that follows a specific distribution (such as bit sequence #2). Systematic coding can be used during the encoding process so that bit sequence #2 ultimately appears directly in the encoded sequence, thereby shaping the final modulation symbol. The precoder can also be called a distribution matcher or some kind of transform.

[0087] Specifically, as shown in Figure 1, the payload bit sequence can be divided into three groups: the first bit sequence, the second bit sequence without precoding, and the third bit sequence. The first bit sequence can be precoded to obtain the target symbol sequence. Furthermore, the target symbol sequence is interleaved based on the second bit sequence to obtain the interleaved sequence. The interleaved sequence, the second bit sequence, and the third bit sequence are encoded to obtain the encoded bit sequence. Then, the encoded bit sequence is interleaved and modulated to obtain the modulated symbol, and the modulated symbol is output.

[0088] For example, the constellation distribution after "shaping" can be shown in Figure 2, where the horizontal axis represents the symbol, the vertical axis represents the probability, and the square of the symbol represents the energy level. The smaller the square of the symbol, the lower the energy, and the larger the square of the symbol, the higher the energy. As can be seen from Figure 2, the probability of low-energy symbols appearing is higher than that of high-energy symbols.

[0089] A distribution matcher based on enumerative sphere shaping (ESS): The precoding result of a distribution matcher based on ESS is n max Long amplitude sequences. An ESS-based distribution matcher can be used for K-length bit sequences. Precoding is performed, and the output precoded result is n. max Long amplitude sequence in,

[0090] The (n-1)th information bit c n-1 The values ​​of belong to a preset amplitude table, which can be represented by A, where n = 1, 2, ..., n max Taking 8ASK as an example, A = {1, 3, 5, 7}. Where c n-1 The value of and its normalized energy satisfy the following relationship (1):

[0091] Where a is c n-1The value of E(a) is the normalized energy corresponding to a. Specifically, when a = 1, the corresponding normalized energy is 0; when a = 3, the corresponding normalized energy is 1; when a = 5, the corresponding normalized energy is 3; and when a = 7, the corresponding normalized energy is 6.

[0092] also, lexicographical sequence number The following relationship (2) must be satisfied:

[0093] Among them, u i for The i-th bit in the middle.

[0094] In a distributed matcher, it can be based on E max +1 row, n max A trellis graph, consisting of elements in column +1, is used for distribution matching. The sequences in the trellis graph are arranged lexicographically; during encoding, input and output sequences with the same index correspond to each other. and They correspond to each other.

[0095] Specifically, the last column of the fence diagram has a value of 1; any element in the (n+1)th column is equal to the sum of the M elements in the nth column. M is less than or equal to the number of amplitude values ​​in the preset amplitude table. For example, if the preset amplitude table has 4 amplitude values, any element in the nth column is equal to the sum of at most 4 elements in the (n+1)th column.

[0096] Specifically, the elements in the (n+1)th column and the elements in the nth column satisfy the following relationship (3):

[0097] Where T(E,n) represents the value of the element in the E-th row and n-th column of the fence diagram, and T(EE(a),n+1) represents the value of the element in the EE(a)-th row and n+1-th column of the fence diagram. Therefore, c n-1 The value of can be determined based on the following process:

[0098] Based on the above process, it can be seen that when determining c n-1 During the process of determining the value, a judgment needs to be made (i.e., a comparison between I and T(EE(a),n)). Furthermore, the number of judgments is related to the value of the amplitude bit in the preset amplitude table, |A|. That is, a maximum of |A|-1 judgments are required to determine c. n-1 The maximum value of M is 4, taking |A| = 4 as an example. That is, in c... n-1If, during the process of determining the value of c, each judgment result is I≥T(EE(a),n), then three judgments are required to determine c. n-1 The computational complexity of selecting the appropriate value for is relatively high. Therefore, reducing the computational complexity of distribution matching is an urgent problem to be solved.

[0099] In view of this, embodiments of this application provide a communication method and apparatus. The transmitting device can perform distribution matching on a first bit sequence based on a first correspondence to obtain a target symbol sequence. The first correspondence includes elements in rows E and columns N, and any element in the first correspondence is determined based on the sum of at most two elements in the next column. For example, taking the first element with row number e and column number n in the E rows and N columns as an example, when e is greater than or equal to all values ​​in the first set, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence; wherein the first set is the set corresponding to the column number n of the first element in P sets, and the first set includes a first value and a second value. The first value is the difference between the row numbers of the first and second elements, and the second value is the difference between the row numbers of the first and third elements. The first value is less than the second value, and P is 2. m m is a positive integer. When e is greater than or equal to the first value and e is less than the second value, the value of the first element does not exceed the value of the second element. When e is less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0100] Understandably, in a fence graph used for distributed matching, if any element in the nth column equals the sum of the M elements in the (n+1)th column, then determining the value of any bit in the distributed matching output sequence requires at most M-1 judgments. In this scheme, the first element is determined based on the sum of at most two elements in the next column. That is, during distributed matching, at most one judgment is needed to determine the value of a bit in the target symbol sequence, reducing computational complexity and improving distributed matching efficiency.

[0101] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0102] The communication method provided in this application embodiment can be used in any communication system, such as a third-generation partnership project (3GPP) communication system, for example, a long-term evolution (LTE) system; or a fifth-generation (5G) mobile communication system, a hybrid LTE and 5G network system, a new radio (NR) system, an NR vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an internet of things (IoT) system, a narrowband internet of things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, and a code division multiple access 2000 system. Access, CDMA2000, Time Division-Synchronization Code Division Multiple Access (TD-SCDMA), Enhanced Mobile Broadband (eMBB), Ultra-Reliable and Low-Latency Communication (URLLC), Enhanced Machine-Type Communication (eMTC), and various types of future communication systems are also included. Non-terrestrial network (NTN) systems (such as satellite communication systems) and non-3GPP communication systems are also included without restriction.

[0103] The communication method provided in this application can be applied to various communication scenarios. For example, it can be applied to one or more of the following communication scenarios: coding of control channels, coding of data channels, etc., without limitation.

[0104] The communication system provided in the embodiments of this application will be described below with reference to Figure 3.

[0105] Figure 3 is a schematic diagram of a communication system provided in an embodiment of this application. As shown in Figure 3, the communication system may include at least one terminal device and at least one network device.

[0106] In Figure 3, the terminal device can be located within the beam / cell coverage area of ​​the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device, and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device, and the network device is the receiving device).

[0107] It is understandable that when network devices communicate with each other, or when terminal devices communicate with each other, they can also communicate based on channel coding. That is, the sending end device and the receiving end device can both be network devices or both be terminal devices, without restriction.

[0108] The terminal device in Figure 3 can be a device with wireless transceiver capabilities or a chip or chip system that can be configured on the device. It allows users to access the network and is used to provide voice and / or data connectivity to users. The terminal device can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

[0109] For example, the terminal device in Figure 3 can be a mobile phone, a tablet computer, or a computer with wireless transceiver capabilities. Terminal equipment can also be user stations, mobile stations, remote stations, remote terminal equipment, mobile terminal equipment, user terminal equipment, wireless communication equipment, user agents, user devices, cellular phones, cordless phones, session initiation protocol (SIP) phones, wireless local loop (WLL) stations, personal digital assistants (PDAs), handheld devices with wireless communication capabilities, computing devices, processing devices connected to wireless modems, in-vehicle equipment, wearable devices, terminal equipment in the Internet of Things (IoT), home appliances, virtual reality (VR) terminals, augmented reality (AR) terminals, wireless terminals in industrial control, wireless terminals in autonomous driving, wireless terminals in telemedicine, wireless terminals in smart grids, wireless terminals in smart cities, wireless terminals in smart homes, vehicles with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicles, and UAV-to-UAV communication. Unmanned aerial vehicles (UAVs) with U2U communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs) are not subject to restrictions.

[0110] In Figure 3, the network device can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system that can be configured within such a device, a logical node or module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network device can be either a wired access device or a wireless access device.

[0111] For example, a network device can consist of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, drone stations, wireless backhaul nodes, base band units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network devices can be terrestrial devices or non-terrestrial devices (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, in communication systems employing different wireless access technologies, the names of network devices with base station functions may differ, and this application does not impose any restrictions on this.

[0112] In another example, the network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in the central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

[0113] In another example, the network device can be a device that includes centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

[0114] In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, a DU, and a RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

[0115] It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radio access network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through software modules, hardware modules, or a combination of software modules and hardware modules.

[0116] Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

[0117] Optionally, in this embodiment of the application, the transmitting device (or source) and the receiving device (or sink) can use the process shown in Figure 4 below for encoding and decoding. The transmitting device can be any terminal device or network device in the communication system shown in Figure 3, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 3.

[0118] In this process, the transmitting device performs source coding on its generated bits to obtain a source bit stream. Then, it performs channel coding on the source bit stream, modulates it, and transmits the modulated symbols to the receiving device through a noisy channel. When the receiving device receives the modulated symbols through the noisy channel, it demodulates them, performs channel decoding to recover the source bit stream, and then performs source decoding to obtain the decoded result.

[0119] In specific implementation, as shown in Figure 3, each terminal device and network device can adopt the composition structure shown in Figure 5, or include the components shown in Figure 5. Figure 5 is a schematic diagram of the composition of a communication device 500 provided in an embodiment of this application. The communication device 500 can be a terminal device or a chip or system-on-a-chip in a terminal device; it can also be a network device or a chip or system-on-a-chip in a network device. As shown in Figure 5, the communication device 500 includes a processor 501, a transceiver 502, and a communication line 503.

[0120] Furthermore, the communication device 500 may also include a memory 504. The processor 501, memory 504, and transceiver 502 can be connected via a communication line 503.

[0121] The processor 501 can be a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 501 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

[0122] Transceiver 502 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area network (WLAN), etc. Transceiver 502 can be a module, circuit, transceiver, or any device capable of enabling communication.

[0123] Communication line 503 is used to transmit information between the components included in communication device 500.

[0124] Memory 504 is used to store instructions. These instructions can be computer programs.

[0125] The memory 504 can be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions; it can also be a random access memory (RAM) or other type of dynamic storage device that can store information and / or instructions; it can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0126] It is understood that the memory 504 can exist independently of the processor 501, or it can be integrated with the processor 501. The memory 504 can be used to store instructions, program code, or some data, etc. The memory 504 can be located inside or outside the communication device 500, without limitation. The processor 501 is used to execute the instructions stored in the memory 504 to implement the communication method provided in the following embodiments of this application.

[0127] In one example, processor 501 may include one or more CPUs, such as CPU0 and CPU1 in Figure 5.

[0128] As an optional implementation, the communication device 500 may include multiple processors, for example, in addition to the processor 501 in FIG. 5, it may also include a processor 507.

[0129] As an optional implementation, the communication device 500 also includes an output device 505 and an input device 506. For example, the input device 506 is a device such as a keyboard, mouse, microphone, or joystick, and the output device 505 is a device such as a display screen or speaker.

[0130] It is understood that the communication device 500 can be a desktop computer, a laptop computer, a web server, a mobile phone, a tablet computer, a wireless terminal, an embedded device, a chip system, or a device with a similar structure to that shown in Figure 5. Furthermore, the composition shown in Figure 5 does not constitute a limitation on the communication device; in addition to the components shown in Figure 5, the communication device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0131] In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

[0132] Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

[0133] The communication method provided in the embodiments of this application will be described below with reference to the communication system shown in Figure 3 and Figure 6. The transmitting device can be any terminal device or network device in the communication system shown in Figure 3, and the receiving device can also be any terminal device or network device in the communication system shown in Figure 3. The transmitting or receiving device described in the following embodiments may include the components shown in Figure 5.

[0134] Figure 6 is a flowchart of a communication method provided in an embodiment of this application. As shown in Figure 6, the method may include the following steps:

[0135] S601, The transmitting device obtains the first bit sequence.

[0136] For example, the first bit sequence is a portion of the payload bit sequence. Specifically, the payload bit sequence can be divided into three parts: the first bit sequence, the second bit sequence, and the third bit sequence. There is no overlap between the first bit sequence, the second bit sequence, and the third bit sequence.

[0137] The first bit sequence includes information bits that are distributed and matched (or shaped) in the information bit sequence. The bit sequence obtained by shaping is used as amplitude bits during modulation and passes through the precoding module shown in Figure 1 during the encoding process.

[0138] The second bit sequence includes information bits that assist the transformation of the first bit sequence. These bits are used as amplitude bits during modulation and pass through the interleaving module shown in Figure 1 during the encoding process.

[0139] The third bit sequence includes all information bits from the information bit sequence except for the first and second bit sequences. During encoding, it bypasses the precoding and interleaving modules shown in Figure 1 and is directly encoded. During modulation, some information bits in the third bit sequence are used to determine the quadrant of the modulation symbol (i.e., symbol bits); some information bits are used as information bits corresponding to large column weights, which are punctured during rate matching (this set may be empty); the remaining information bits are used as amplitude bits (this set may also be empty).

[0140] S602. The transmitting device performs distribution matching on the first bit sequence according to the first correspondence relationship to obtain the target symbol sequence.

[0141] The first correspondence includes elements in rows E and columns N. The row number of the first element in the E rows and N columns is e, and the column number is n. The value of the first element is related to at most two elements in the (n+1)th column of the first correspondence. For example, the value of the first element does not exceed the sum of the values ​​of at most two elements in the (n+1)th column.

[0142] For example, the value of the first element is related to at most two elements in the (n+1)th column of the first correspondence, including: corresponding to all values ​​in the first set where e is greater than or equal to all values ​​in the first set, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence; corresponding to e being greater than or equal to the first value and e being less than the second value, the value of the first element does not exceed the value of the second element; corresponding to e being less than the first value, the value of the first element is 0.

[0143] Here, the first set is the set corresponding to the column index n of the first element in the P sets. The first set includes the first value and the second value, and the first value is less than the second value. The first value is the difference between the row indices of the first and second elements, and the second value is the difference between the row indices of the first and third elements. P is 2. m m is a positive integer, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0144] In other words, when e is greater than or equal to any value in the first set, the value of the first element is related to two elements in the (n+1)th column (i.e., the second and third elements) (i.e., the value of the first element does not exceed the sum of the second and third elements); when e is greater than or equal to the first value and less than the second value, the value of the first element is related to one element in the (n+1)th column (i.e., the second element) (i.e., the value of the first element does not exceed the value of the second element); when e is less than the first value, the value of the first element is related to 0 elements in the (n+1)th column. In this case, the value of the first element can be a pre-set value, such as 0.

[0145] For example, the first value is the difference between the row numbers of the first and second elements. This can also be understood as: the row number of the second element is the difference between e and the first value (i.e., the row number of the second element is the difference between the row number e of the first element and the first value). In other words, the row number of the second element = e - the first value. Similarly, the second value is the difference between the row numbers of the first and third elements (i.e., the row number of the third element is the difference between the row number e of the first element and the second value). In other words, the row number of the third element = e - the second value.

[0146] Taking a first value of 1 as 1 and a second value of 3 as an example, if e = 5, then the row number of the second element is 4 and the row number of the third element is 2; that is, in the first correspondence, the value of the first element located in the 5th row and nth column does not exceed the sum of the value of the second element located in the 4th row and n+1th column and the value of the third element located in the 2nd row and n+1th column. If e = 2, then the row number of the second element is 1; that is, in the first correspondence, the value of the first element located in the 2nd row and nth column does not exceed the value of the second element located in the 1st row and n+1th column. If e = 0, then in the first correspondence, the value of the first element located in the 0th row and nth column is 0.

[0147] Optionally, the values ​​of the elements in the (N-1)th column of the first correspondence are all constants. That is, when the first element is not an element in the (N-1)th column, the value of the first element is related to at most two elements in the (n+1)th column; when the first element is an element in the (N-1)th column, the value of the first element is a constant.

[0148] For example, the values ​​of the elements in the (N-1)th column can be 0 and / or 1. For instance, the values ​​of all elements in the (N-1)th column can be 1, or some elements in the (N-1)th column can be 0 and others can be 1.

[0149] This application provides a communication method in which a transmitting device can perform distribution matching on a first bit sequence based on a first correspondence to obtain a target symbol sequence. The first correspondence includes elements in E rows and N columns, and each element in the first correspondence is determined based on the sum of at most two elements in the next column. For example, taking the first element with row number e and column number n in the E rows and N columns as an example, when e is greater than or equal to all values ​​in the first set, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence. The first set is the set corresponding to the column number n of the first element in P sets. The first set includes a first value and a second value. The first value is the difference between the row numbers of the first and second elements, and the second value is the difference between the row numbers of the first and third elements. The first value is less than the second value, and P is 2. m m is a positive integer. When e is greater than or equal to the first value and e is less than the second value, the value of the first element does not exceed the value of the second element. When e is less than the first value, the value of the first element is 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

[0150] Understandably, in a fence graph used for distributed matching, if any element in the nth column equals the sum of the M elements in the (n+1)th column, then determining the value of any bit in the distributed matching output sequence requires at most M-1 judgments. In this scheme, the first element is determined based on the sum of at most two elements in the next column. That is, during distributed matching, at most one judgment is needed to determine the value of a bit in the target symbol sequence, reducing computational complexity and improving distributed matching efficiency.

[0151] The above is a general description of the embodiments of this application. The "P sets" described in the above embodiments will be described in detail below.

[0152] Optionally, each of the P sets includes two values; thus, when the sending device determines the first set from the P sets based on the column number n of the first element, it can then determine the first value and the second value, that is, the smaller value in the first set is the first value, and the larger value is the second value.

[0153] Optional, since P is 2 m That is, P = 2, 4, 8, 16, ...; therefore, based on different implementations of P, the correspondence between the P sets and the column index n is determined based on the following two cases:

[0154] Case 1: Multiple non-consecutive column indices in the first correspondence correspond to the same set in P sets; that is, adjacent column indices in the first correspondence correspond to different sets.

[0155] As an example, when P takes the value of 2, the P sets include two sets (i.e., set #1 and set #2); among the two sets included in the P sets, the column index n corresponding to set #1 is odd and the column index n corresponding to set #2 is even.

[0156] In other words, the first set is the set corresponding to the column index n of the first element in the P sets, including: when the column index n of the first element is odd, the first set is the set corresponding to the odd columns in the two sets; when the column index n of the first element is even, the first set is the set corresponding to the even columns in the two sets.

[0157] For example, taking the first correspondence relationship as having 5 columns of elements, when the column number n of the first element is 1 or 3, set #1 can be determined as the first set; correspondingly, when the column number n of the first element is 0 or 2, set #2 can be determined as the first set.

[0158] As another example, when P is 4, the P sets include four sets (i.e., set #1 to set #4); among the four sets included in the P sets, the n value corresponding to set #1 is 0, 4, 8, ..., the n value corresponding to set #2 is 1, 5, 9, ..., the n value corresponding to set #3 is 2, 6, 10, ..., and the n value corresponding to set #4 is 3, 7, 11, ...

[0159] For example, taking a first correspondence that includes 5 columns of elements as an example, when the column number n of the first element is 0, set #1 can be determined as the first set; when the column number n of the first element is 1, set #2 can be determined as the first set; when the column number n of the first element is 2, set #3 can be determined as the first set; and when the column number n of the first element is 3, set #4 can be determined as the first set.

[0160] As another example, when P = 8, the P sets include eight sets (i.e., sets #1 to #8); among the eight sets (i.e., sets #1 to #8) included in the P sets, the column index n corresponding to set #1 takes the values ​​0, 8, 16, ..., the column index n corresponding to set #2 takes the values ​​1, 9, 17, ..., the column index n corresponding to set #3 takes the values ​​2, 10, 18, ..., the column index n corresponding to set #4 takes the values ​​3, 11, 19, ..., the column index n corresponding to set #5 takes the values ​​4, 12, 20, ..., the column index n corresponding to set #6 takes the values ​​5, 13, 21, ..., the column index n corresponding to set #7 takes the values ​​6, 14, 22, ..., and the column index n corresponding to set #8 takes the values ​​7, 15, 23, ...

[0161] For example, taking a first correspondence consisting of 9 columns of elements as an example, when the column number n of the first element is 0, set #1 can be determined as the first set; when the column number n of the first element is 1, set #2 can be determined as the first set; when the column number n of the first element is 2, set #3 can be determined as the first set; when the column number n of the first element is 3, set #4 can be determined as the first set; when the column number n of the first element is 4, set #5 can be determined as the first set; when the column number n of the first element is 5, set #6 can be determined as the first set; when the column number n of the first element is 6, set #7 can be determined as the first set; and when the column number n of the first element is 7, set #8 can be determined as the first set.

[0162] Case 2: Multiple consecutive column numbers in the first correspondence correspond to the same set in P sets; that is, there is at least one adjacent column number in the first correspondence that corresponds to the same set.

[0163] For example, when P = 2, the P sets include two sets (i.e., set #1 and set #2); where, among the two sets included in the P sets, the column index n corresponding to set #1 is... (or For any value in ), the column index n corresponding to set #2 is (or Any value in ).

[0164] In other words, the first set is the set corresponding to the column index n of the first element among P sets, including: when the column index n of the first element is... (or When any value in ) is present, the first set is set #1; when the column index n of the first element is (or When any value in ) is used, the first set is set #2.

[0165] For example, taking the first correspondence relationship as having 5 columns of elements, when the column number n of the first element is 0 or 1, set #1 can be determined as the first set; correspondingly, when the column number n of the first element is 2 or 3, set #2 can be determined as the first set.

[0166] It is understandable that the above examples, using P = 2, 4, and 8, illustrate the correspondence between P sets and column numbers n; m > 3 (i.e., P = 2). m When P is greater than 8), the implementation of the correspondence between P sets and column number n is similar to the implementation of P being 2, 4, and 8 above. For details, please refer to the relevant descriptions in the above embodiments, which will not be repeated here.

[0167] Combining the two scenarios above, optionally, all values ​​in any of the P sets are related to P and n. The following detailed explanation uses all values ​​in the first set (i.e., the first and second values) as an example. In other words, optionally, both the first and second values ​​in the first set are related to P and n.

[0168] In one possible implementation, the first value and the second value satisfy the following relationship (4):

[0169] Where, a = 2*(P-mod(n,P))-1; or, N-1 is an integer multiple of P.

[0170] Optionally, in case one above (i.e., multiple non-contiguous column indices of the first correspondence correspond to the same set in P sets), a and P satisfy a = 2*(P-mod(n,P))-1.

[0171] For example, when P=2, a=2*(2-mod(n,2))-1; if the column number n is odd (i.e. the first element is in an odd column), then a=1, and the first value is 0 and the second value is 6, that is, the first set includes {0,6}; if the column number n is even (i.e. the first element is in an even column), then a=3, and the first value is 1 and the second value is 3, that is, the first set includes {1,3}.

[0172] When P = 4, a = 2*(4-mod(n,4))-1; at this time, if the column number n is any value of 0, 4, 8, ..., a = 7, and further, the first value is 6 and the second value is 10, that is, the first set includes {6,10}; if the column number n is any value of 1, 5, 9, ..., a = 5, and further, the first value is 3 and the second value is 15, that is, the first set includes {3,15}; if the column number n is any value of 2, 6, 10, ..., a = 3, and further, the first value is 1 and the second value is 21, that is, the first set includes {1,21}; if the column number n is any value of 3, 7, 11, ..., a = 1, and further, the first value is 0 and the second value is 28, that is, the first set includes {0,28}.

[0173] When P = 8, a = 2*(8 - mod(n, 8)) - 1; at this time, if the column index n is any value of 8, 16, 24, ..., a = 15, and further, the first value is 28 and the second value is 36, that is, the first set includes {28, 36}; if the column index n is any value of 1, 9, 17, ..., a = 13, and further, the first value is 21 and the second value is 45, that is, the first set includes {21, 45}; if the column index n is any value of 2, 10, 18, ..., a = 11, and further, the first value is 15 and the second value is 55, that is, the first set includes {15, 55}; if the column index n is any value of 3, 11, 19, ..., a = 9, and further, the first value is 10 and the second value is 6 6, meaning the first set includes {10, 66}; if the column number n takes any value from 4, 12, 20, ..., a = 7, and further, the first value is 6 and the second value is 78, meaning the first set includes {6, 78}; if the column number n takes any value from 5, 13, 21, ..., a = 5, and further, the first value is 3 and the second value is 91, meaning the first set includes {3, 91}; if the column number n takes any value from 6, 14, 22, ..., a = 3, and further, the first value is 1 and the second value is 105, meaning the first set includes {1, 105}; if the column number n takes any value from 7, 15, 23, ..., a = 1, and further, the first value is 0 and the second value is 120, meaning the first set includes {0, 120}.

[0174] Optionally, in case two above (i.e., multiple consecutive column indices of the first correspondence correspond to the same set in P sets), a and P satisfy the following:

[0175] For example, taking N as 5 and 0 < n ≤ 4, when P = 2, If the column number n is 0 or 1, then a = 3, and the first value is 1 and the second value is 3, meaning the first set includes {1, 3}; if the column number n is 2 or 3, then a = 1, and the first value is 0 and the second value is 6, meaning the first set includes {0, 6}.

[0176] In another possible implementation, the first and second values ​​satisfy the following relationship (5):

[0177] First value = a, second value = 2*P-1-a; Relationship (5)

[0178] Where, a = P⁻¹ - mod(n, P); or, N-1 is an integer multiple of P.

[0179] Optionally, in case one above (i.e., multiple non-contiguous column indices of the first correspondence correspond to the same set in P sets), a and P satisfy = P-1-mod(n,P).

[0180] For example, when P=2, a=2-1-mod(n,2); if the column number n is odd (i.e. the first element is in an odd column), a=0, and the first value is 0 and the second value is 3, that is, the first set includes {0,3}; if the column number n is even (i.e. the first element is in an even column), a=1, and the first value is 1 and the second value is 2, that is, the first set includes {1,2}.

[0181] When P = 4, a = 4 - 1 - mod(n, 4); at this time, if the column index n is any value of 0, 4, 8, ..., a = 3, and further, the first value is 3 and the second value is 4, that is, the first set includes {3, 4}; if the column index n is any value of 1, 5, 9, ..., a = 2, and further, the first value is 2 and the second value is 5, that is, the first set includes {2, 5}; if the column index n is any value of 2, 6, 10, ..., a = 1, and further, the first value is 1 and the second value is 6, that is, the first set includes {1, 6}; if the column index n is any value of 3, 7, 11, ..., a = 0, and further, the first value is 0 and the second value is 7, that is, the first set includes {0, 7}.

[0182] When P = 8, a = 8 - 1 - mod(n, 8); at this time, if the column index n is any value of 0, 8, 16, ..., a = 7, and further, the first value is 7 and the second value is 8, that is, the first set includes {7, 8}; the P sets and the column index n satisfy the above correspondence #5. If the column index n is any value of 1, 9, 17, ..., a = 6, and further, the first value is 6 and the second value is 9, that is, the first set includes {6, 9}; if the column index n is any value of 2, 10, 18, ..., a = 5, and further, the first value is 5 and the second value is 10, that is, the first set includes {5, 10}; if the column index n is any value of 3, 11, 19, ..., a = 4, and further, the first value is 4 and the second value is 8, that is, the first set includes {7, 8}. If the value of n is 11, then the first set includes {4, 11}; if the column number n is any value of 4, 12, 20, ..., and a = 3, then the first value is 3 and the second value is 12, meaning the first set includes {3, 12}; if the column number n is any value of 5, 13, 21, ..., and a = 2, then the first value is 2 and the second value is 13, meaning the first set includes {2, 13}; if the column number n is any value of 6, 14, 22, ..., and a = 1, then the first value is 1 and the second value is 14, meaning the first set includes {1, 14}; if the column number n is any value of 7, 15, 23, ..., and a = 0, then the first value is 0 and the second value is 15, meaning the first set includes {0, 15}.

[0183] Optionally, in case two above (i.e., multiple consecutive column indices of the first correspondence correspond to the same set in P sets), a and P satisfy the following:

[0184] For example, taking N as 5 and 0 < n ≤ 4, when P = 2, If the P sets and column numbers n satisfy the above correspondence #2, then when the column number n is 0 or 1, a = 1, and the first value is 1 and the second value is 2, that is, the first set includes {1,2}; when the column number n is 2 or 3, a = 0, and the first value is 0 and the second value is 3, that is, the first set includes {0,3}.

[0185] It is understandable that the two possible implementations described above exemplify a partial implementation of the first set (or a partial implementation of the first and second values). In fact, when there are other implementations of the P sets besides the examples above, there are also other implementations of the first set. The specific implementations are similar to the implementation of the first set described in the above embodiments. Please refer to the relevant descriptions in the examples above, which will not be repeated here.

[0186] Based on the above set of P and the implementation of the first set (such as the first value and the second value), the "first correspondence" described in the above embodiments will be described in detail; for ease of description, the implementation of the first correspondence will be introduced below using P=2 as an example.

[0187] For example, the "first correspondence" described in this application may also be called a first grid diagram, a first fence diagram, a first raster diagram, a first matrix, a first element table, etc., or, in addition to the above examples, there may be other names for the first correspondence, which are not limited in this application.

[0188] First, for the case where e is greater than or equal to all values ​​in the first set:

[0189] In one possible implementation, the value of the first element does not exceed the sum of the values ​​of the second and third elements, including: the value of the first element is equal to the value corresponding to the first binary sequence, where the first binary sequence is the value of the first W bits of the binary sequence corresponding to the sum of the second and third elements under the length of the first binary sequence, and W is a positive integer.

[0190] For example, the first binary sequence is the value of the first W bits of the binary sequence corresponding to the sum of the second and third elements, within the length of the first binary sequence. This can be understood as follows: the second element and the sum of the second and third elements are converted into a binary sequence, the first W bits of this binary sequence are retained, and the remaining bits are set to 0 or a preset value. This set binary sequence is then determined as the first binary sequence, and the value of the first element is the decimal value corresponding to the first binary sequence. Wherein, the preset value is ≤ 2. Z Z = length of the first binary sequence - W.

[0191] Specifically, taking the binary sequence corresponding to the sum of the second and third elements as 1100101, and the value of W as 4, we retain the first 4 bits "1100" of this binary sequence; the remaining 3 bits (i.e., "101") can all be set to 0, at which point the first binary sequence is 1100000, and the value of the first element is 96. Alternatively, the remaining 3 bits (i.e., "101") can be set to a preset value, such as 1, at which point the first binary sequence is 1100001, and the value of the first element is 97.

[0192] In another possible implementation, the value of the first element does not exceed the sum of the values ​​of the second and third elements, including: the value of the first element is equal to the sum of the values ​​of the second and third elements. That is, when e is greater than or equal to all values ​​in the first set, the value of the first element is equal to the sum of the second and third elements in the (n+1)th column.

[0193] For example, if the first set when n is odd includes {0, 6}, and the first set when n is even includes {1, 3}, when the first element is in an odd-numbered column (n is odd), if e ≥ 6, then the row number of the second element is e, and the row number of the third element is e-6. Correspondingly, when the first element is in an even-numbered column (n is even), if e ≥ 3, then the row number of the second element is e-1, and the row number of the third element is e-3.

[0194] Alternatively, if the first set when n is odd includes {0, 3}, and the first set when n is even includes {1, 2}, then when the first element is in an odd-numbered column (n is odd), if e ≥ 3, the row number of the second element is e, and the row number of the third element is e-3. Correspondingly, when the first element is in an even-numbered column (n is even), if e ≥ 2, the row number of the second element is e-1, and the row number of the third element is e-2.

[0195] Secondly, for the case where e is greater than or equal to the first value and e is less than the second value:

[0196] In one possible implementation, the value of the first element does not exceed the value of the second element, including: the value of the first element is equal to the value of the second element. That is, when e is greater than or equal to the first value and e is less than the second value, the value of the first element is equal to the value of the second element in the (n+1)th column.

[0197] For example, if the first set when n is odd includes {0, 6}, and the first set when n is even includes {1, 3}, when the first element is in an odd-numbered column (n is odd), if 0 ≤ e < 6, then there is no third element, and the row number of the second element is e. Correspondingly, when the first element is in an even-numbered column (n is even), if 1 ≤ e < 3, then there is no third element, and the row number of the second element is e-1.

[0198] If the first set when n is odd includes {0, 3}, and the first set when n is even includes {1, 2}, then when the first element is in an odd-numbered column (n is odd), if 0 ≤ e < 3, then there is no third element, and the row number of the second element is e. Correspondingly, when the first element is in an even-numbered column (n is even), if 1 ≤ e < 2, then there is no third element, and the row number of the second element is e-1.

[0199] In another possible implementation, the value of the first element does not exceed the value of the second element, including: the value of the first element is equal to the value corresponding to the second binary sequence, where the second binary sequence is the value of the first W bits of the binary sequence corresponding to the value of the second element within the length of the second binary sequence. That is, when e is greater than or equal to the first value and e is less than the second value, the value of the first element is equal to the value corresponding to the second binary sequence in the (n+1)th column.

[0200] For example, the second binary sequence is the value of the first W bits of the binary sequence corresponding to the value of the second element, within the length of the second binary sequence. This can be understood as follows: the value of the second element is converted into a binary sequence, the first W bits of this binary sequence are retained, and the remaining bits are set to 0 or a preset value. This set binary sequence is then determined as the second binary sequence, and the value of the first element is the decimal value corresponding to the second binary sequence. In this case, the preset value is ≤ 2. Y Y = length of the second binary sequence - W.

[0201] Specifically, taking the binary sequence corresponding to the second element as 11 and the value of W as 1 as an example, the first bit "1" of the binary sequence is retained; the remaining bit (i.e., "1") can all be set to 0, at which point the second binary sequence is 10, and the value of the first element is 2. Alternatively, the remaining bit (i.e., "1") can be set to a preset value, such as 1, at which point the second binary sequence is 11, and the value of the first element is 3.

[0202] Furthermore, for the case where e is less than the first value:

[0203] For example, when e is less than the first value, the first element takes the value of 0. Specifically, if the first set when n is odd includes {0, 6}, and the first set when n is even includes {1, 3}, when the first element is in an even column, that is, when e equals 0, the first element in the e-th row and n-th column takes the value of 0.

[0204] Alternatively, if the first set when n is odd includes {0, 3} and the first set when n is even includes {1, 2}, then when the first element is in an odd column, and when the first element is in an even column (i.e., e equals 0), the first element in the e-th row and n-th column has a value of 0.

[0205] Based on the different implementations of the first element mentioned above, the first correspondence can include the following possible implementations:

[0206] Implementation Method 1: For e greater than or equal to all values ​​in the first set, the value of the first element is equal to the sum of the second and third elements; for e greater than or equal to the first value and e less than the second value, the value of the first element is equal to the value of the second element; for e less than the first value, the value of the first element is 0.

[0207] For example, if the value of the N-1th column element in the first correspondence is 1, and the value of E is 8, the value of N is 5, and multiple non-contiguous column numbers in the first correspondence correspond to the same set in P sets, then the first correspondence includes 8 rows and 5 columns of elements, that is, the first correspondence includes the content shown in Figure 7(a).

[0208] Specifically, when n is odd, the first set includes {0, 6}, and when n is even, the first set includes {1, 3}. The first correspondence includes the content shown in Figure 7(a). That is, when the first element is in an odd column, if it is ≥6, then the value of the first element in row e, column n is equal to the sum of the values ​​of the second element in row e, column n+1 and the third element in row e-6, column n+1; if 0≤e<6, then the value of the first element in row e, column n is equal to the value of the second element in row e, column n+1. Similarly, when the first element is in an even-numbered column, if e ≥ 3, then the value of the first element in row e, column n is equal to the sum of the values ​​of the second element in row e-1, column n+1 and the third element in row e-3, column n+1; if 1 ≤ e < 3, then the value of the first element in row e, column n is equal to the value of the second element in row e, column n+1. If e equals 0, then the value of the first element in row e, column n is 0.

[0209] Taking the example of multiple consecutive column indices of the first correspondence corresponding to the same set in P sets, when n is 0 or 1, the first set includes {0, 6}; when n is 2 or 3, the first set includes {1, 3}; and when E is 4 and N is 5, the first correspondence includes the content shown in Figure 7(b). That is, when the first element is located in column 0 or column 1, if e ≥ 3, then the value of the first element located in row e and column n is equal to the sum of the values ​​of the second element located in row e and column n+1 and the third element located in row e-3 and column n+1; if 0 ≤ e < 3, then the value of the first element located in row e and column n is equal to the value of the second element located in row e and column n+1. Similarly, when the first element is in the 2nd or 3rd column, if e ≥ 2, then the value of the first element in the e-th row and n-th column is equal to the sum of the values ​​of the second element in the (e-1)-th row and n+1-th column and the third element in the (e-2)-th row and n+1-th column; if 1 ≤ e < 2, then the value of the first element in the e-th row and n-th column is equal to the value of the second element in the (e-1)-th row and n+1-th column. If e equals 0, then the value of the first element in the e-th row and n-th column is 0.

[0210] For example, if the last column of the first correspondence has a value of 1, and E has a value of 4, N has a value of 5, and multiple non-contiguous column numbers of the first correspondence correspond to the same set in P sets, then the first correspondence includes 4 rows and 5 columns of elements, that is, the first correspondence includes the content shown in Figure 8(a).

[0211] Specifically, when n is odd, the first set includes {0, 3}, and when n is even, the first set includes {1, 2}. The first correspondence includes the content shown in Figure 8(a). That is, when the first element is in an odd column, if e ≥ 3, then the value of the first element in row e, column n is equal to the sum of the values ​​of the second element in row e, column n+1 and the third element in row e-3, column n+1; if 0 ≤ e < 3, then the value of the first element in row e, column n is equal to the value of the second element in row e, column n+1. Similarly, when the first element is in an even-numbered column, if e ≥ 2, then the value of the first element in row e, column n is equal to the sum of the values ​​of the second element in row e-1, column n+1 and the third element in row e-2, column n+1; if 1 ≤ e < 2, then the value of the first element in row e, column n is equal to the value of the second element in row e-1, column n+1. If e equals 0, then the value of the first element in row e, column n is 0.

[0212] Taking the first set containing {0, 3} when n is 0 or 1, and the first set containing {1, 2} when n is 2 or 3 as examples, the first correspondence includes the content shown in Figure 8(b). That is, when the first element is located in column 0 or column 1, if e ≥ 3, then the value of the first element located in row e, column n is equal to the sum of the values ​​of the second element located in row e, column n+1 and the third element located in row e-3, column n+1; if 0 ≤ e < 3, then the value of the first element located in row e, column n is equal to the value of the second element located in row e, column n+1. If e = 0, then the value of the first element located in row e, column n is 0. Similarly, when the first element is in the 2nd or 3rd column, if e ≥ 2, then the value of the first element in the e-th row and n-th column is equal to the sum of the values ​​of the second element in the (e-1)-th row and n+1-th column and the third element in the (e-2)-th row and n+1-th column; if 1 ≤ e < 2, then the value of the first element in the e-th row and n-th column is equal to the value of the second element in the e-th row and n+1-th column. If e equals 0, then the value of the first element in the (e-1)-th row and n-th column is 0.

[0213] Implementation Method 2: For e greater than or equal to all values ​​in the first set, the value of the first element is equal to the value corresponding to the first binary sequence; for e greater than or equal to the first value and e less than the second value, the value of the first element is equal to the value corresponding to the second binary sequence; for e less than the first value, the value of the first element is 0.

[0214] For example, if the last column element in the first correspondence is 1, W is 1, the remaining bits are all 0, and multiple non-contiguous column numbers in the first correspondence correspond to the same set in P sets, then the first correspondence includes the content shown in Figure 9(a) or Figure 9(b).

[0215] Specifically, when E is 8, N is 5, and n is odd, the first set includes {0, 6}; when n is even, the first set includes {1, 3}. In this case, the first correspondence includes 8 rows and 5 columns of elements, as shown in Figure 9(a). That is, when e is greater than or equal to all values ​​in the first set, the value of the first element in the e-th row and n-th column is equal to the value corresponding to the first binary sequence. In this case, the first binary sequence is the binary sequence obtained by retaining the first bit of the binary sequence corresponding to the sum of the second and third elements, and setting the remaining bits to 0. The value of the first element is the decimal value obtained by converting this binary sequence. For example, when the first element is located in the 5th row and 0th column of the first correspondence, the first set is {1, 3}. Then the second element is located in the 4th row and 1st column of the first correspondence, and its value is 2. The third element is located in the 1st row and 1st column of the first correspondence, and its value is 1. Therefore, the binary sequence corresponding to the sum of the second and third elements is 11, and the first binary sequence is 10. That is to say, the value of the first element located in the 5th row and 0th column is 2.

[0216] Specifically, when E is 4, N is 5, and n is odd, the first set includes {0, 3}; when n is even, the first set includes {1, 2}. In this case, the first correspondence includes 4 rows and 5 columns of elements, as shown in Figure 9(b). That is, when e is greater than or equal to all values ​​in the first set, the value of the first element in the e-th row and n-th column is equal to the value corresponding to the first binary sequence. In this case, the first binary sequence is the binary sequence obtained by retaining the first bit of the binary sequence corresponding to the sum of the second and third elements, and setting the remaining bits to 0. The value of the first element is the decimal value obtained by converting this binary sequence. For example, when the first element is located in the 3rd row and 0th column of the first correspondence, the first set is {1, 2}. Then the second element is located in the 2nd row and 1st column of the first correspondence, and its value is 2. The third element is located in the 1st row and 1st column of the first correspondence, and its value is 1. Therefore, the binary sequence corresponding to the sum of the second and third elements is 11, and the first binary sequence is 10. That is to say, the value of the first element located in the 3rd row and 0th column is 2.

[0217] Furthermore, in the first correspondence shown in Figure 9(a) or Figure 9(b), when e is greater than or equal to the first value and e is less than the second value, the value of the first element in the e-th row and n-th column is equal to the value corresponding to the second binary sequence. In this case, the second binary sequence is the binary sequence corresponding to the second element, with the first bit retained and the remaining bits set to 0. The value of the first element is the decimal value obtained by converting this binary sequence. When e is less than the first value, if the first element is located in an even-numbered column (i.e., e equals 0), then the value of the first element in the e-th row and n-th column is 0.

[0218] Implementation method 3: For e greater than or equal to all values ​​in the first set, the value of the first element is the value corresponding to the first binary sequence; for e greater than or equal to the first value and e less than the second value, the value of the first element is equal to the value of the second element.

[0219] Specifically, in this implementation, for e greater than or equal to all values ​​in the first set, the implementation of the first element is the same as that in the second implementation above, and you can refer to the relevant description in the second implementation above for details; for e greater than or equal to the first value and e less than the second value, the implementation of the first element is the same as that in the first implementation above, and you can refer to the relevant description in the first implementation above for details; it will not be repeated here.

[0220] Implementation Method 4: For e greater than or equal to all values ​​in the first set, the value of the first element is the sum of the second and third elements; for e greater than or equal to the first value and e less than the second value, the value of the first element is equal to the value corresponding to the second binary sequence.

[0221] Specifically, in this implementation, for e greater than or equal to all values ​​in the first set, the implementation of the first element is the same as that in the first implementation method described above. For details, please refer to the relevant description in the first implementation method described above. For e greater than or equal to the first value and e less than the second value, the implementation of the first element is the same as that in the second implementation method described above. For details, please refer to the relevant description in the second implementation method described above. Further details will not be repeated here.

[0222] It is understandable that the above four implementation methods illustrate some implementation methods of the first correspondence relationship; in fact, there are other implementation methods of the first correspondence relationship besides the above four implementation methods, such as when the value of P is 4 or 8, and / or when the first set includes other implementation methods of the first correspondence relationship besides the above examples. Its implementation is similar to the four implementation methods of the first correspondence relationship described in the above embodiments. For details, please refer to the relevant descriptions in the above four implementation methods, which will not be repeated here.

[0223] Combining the four implementation methods mentioned above, optionally, the values ​​of E and N can be preset. For example, the values ​​of E and N can be configured or indicated by the network device.

[0224] As an example, the value of E can be the maximum energy of the symbols in the output sequence supported by the distribution matching + 1 (i.e., E = E). max +1), the value of N can be the maximum code length supported by the distribution matching output +1 (i.e., N = n max +1).

[0225] In other words, the sending device obtains E max n max Then, the first correspondence can be determined based on the relevant concepts of the implementation of the first correspondence mentioned above; specifically, the implementation of the first correspondence can be referred to the relevant description in the above embodiments, which will not be repeated here.

[0226] As another example, the first correspondence is based on some or all of the elements in the second correspondence consisting of E′ rows and N′ columns, where E′≥E, N′≥N.

[0227] For example, in this example, since the first correspondence is constructed based on some or all of the elements in the second correspondence, it is necessary to first determine the second correspondence, and then determine the first correspondence based on the second correspondence. Specifically, the implementation of the second correspondence is similar to the implementation of the first correspondence described above, and can be found in the relevant description of the first correspondence described above, which will not be repeated here.

[0228] Optionally, in this example, the value of E′ can be the maximum energy of the symbols in the output sequence supported by the distribution matching + 1 (i.e., E′ = E...). max +1), the value of N′ can be the maximum code length supported by the distribution matching output +1 (i.e., N′=n max +1).

[0229] Optionally, the value of E is related to the length K of the first bit sequence, where K is a positive integer. For example, the value of E can be determined based on the following two cases:

[0230] Case 1: Multiple non-consecutive column indices in the first correspondence correspond to the same set in P sets.

[0231] For example, in this case, E can be satisfied The smallest E.

[0232] Optionally, in this case, when the first correspondence is composed of some elements from the second correspondence, these elements include the elements from row 0 to row E-1 and the elements from column N′-N to column N′-1 in the second correspondence. That is, after determining the second correspondence, the elements from row 0 to row E-1 and the elements from column N′-N to column N′-1 in the second correspondence can be used as elements in the first correspondence; or, the first correspondence can be constructed using the elements from row 0 to row E-1 and the elements from column N′-N to column N′-1 in the second correspondence.

[0233] For example, taking the second correspondence as shown in Figure 7(a) or Figure 9(a) above, where E′ is 8 and N′ is 5; if N is 4 and K is 1, then E is 4, thus the elements in rows 0 to 3 and columns 1 to 4 of the second correspondence can form the first correspondence. Specifically, the first correspondence includes the elements within the dashed boxes shown in Figure 7(a) or Figure 9(a).

[0234] Alternatively, taking the second correspondence as shown in Figure 8(a) or Figure 9(b) above, where E′ is 4 and N′ is 5; in this case, if N is 4 and K is 1, then E is 2, thus the elements in rows 0 to 2 and columns 1 to 4 of the second correspondence can form the first correspondence. Specifically, the first correspondence includes the elements within the dashed boxes shown in Figure 8(a) or Figure 9(b).

[0235] Case 2: Multiple consecutive column indices of the first correspondence correspond to the same set in P sets.

[0236] For example, in this second case, E can be satisfied The smallest E.

[0237] Optionally, in this second scenario, when the first correspondence is composed of some elements from the second correspondence, these elements include the elements from row 0 to row E-1 and the elements from column 0 to column N′-1 in the second correspondence. That is, after determining the second correspondence, the elements from row 0 to row E-1 and the elements from column 0 to column N′-1 in the second correspondence can be used as elements in the first correspondence; or, the first correspondence can be constructed using the elements from row 0 to row E-1 and the elements from column 0 to column N′-1 in the second correspondence.

[0238] For example, taking the second correspondence as shown in Figure 7(b) above, where E′ is 8 and N′ is 5; if N is 5 and K is 1, then E is 4, thus the elements in rows 0 to 4 and columns 0 to 4 of the second correspondence can form the first correspondence. Specifically, the first correspondence includes the elements in the dashed box shown in Figure 7(b).

[0239] It is understood that Figures 7 to 9 above exemplarily illustrate a partial implementation of the first correspondence relationship. In reality, the first correspondence relationship can also include other implementations besides those shown in Figures 7 to 9 above, and this application does not impose any limitations. Furthermore, the first correspondence relationship described in the above embodiments can be flipped horizontally or vertically to obtain an equivalent correspondence relationship. For example, when the first correspondence relationship can be flipped horizontally, the element in the nth column of the first correspondence relationship is determined based on at most two elements in the (n-1)th column. The specific implementation is similar to the above implementation of "determining the first element based on at most two elements in the (n+1)th column", which can be referred to in the relevant description above and will not be repeated here.

[0240] The following section describes in detail the implementation of step S602 in the above embodiment, namely, "the transmitting device performs distribution matching on the first bit sequence according to the first correspondence to obtain the target symbol sequence".

[0241] Optionally, the transmitting device performs distribution matching on the first bit sequence according to the first correspondence to obtain the target symbol sequence, including: the transmitting device determines the target symbol sequence based on the size relationship between the lexicographical index of the first bit sequence and the value of the element in the first correspondence, wherein the value of the symbol in the target symbol sequence is 0 or 1.

[0242] For example, the target symbol sequence can be implemented based on the following two cases:

[0243] Case 1: Multiple non-consecutive column indices in the first correspondence correspond to the same set in P sets.

[0244] Optionally, the transmitting device determines the target symbol sequence based on the size relationship between the lexicographical index of the first bit sequence and the value of the element in the first correspondence, including: the transmitting device determines the intermediate symbol sequence based on the size relationship between the lexicographical index of the first bit sequence and the value of the element in the first correspondence, and then interleaves the intermediate symbol sequence to obtain the target symbol sequence.

[0245] For example, with E≤E max +1、 The first bit sequence is The lexicographical index of the first bit sequence is The intermediate symbol sequence is The target symbol sequence is

[0246] During the encoding process, The nth position The value of can be determined based on the following process:

[0247] Optionally, in one case, the modulo-P remainders of two adjacent information bits in the intermediate bit sequence output by the distributed matcher are different. Therefore, after the transmitting end determines the intermediate bit sequence, it can be interleaved so that information bits with the same modulo-P remainder can be placed consecutively, thereby obtaining the target symbol sequence. That is, the transmitting device determines the target symbol sequence based on the relationship between the lexicographical index of the first bit sequence and the values ​​of the elements in the first correspondence, including: the transmitting device determining the intermediate symbol sequence based on the relationship between the lexicographical index of the first bit sequence and the values ​​of the elements in the first correspondence; and interleaving the intermediate symbol sequence to obtain the target symbol sequence.

[0248] For example, the transmitting device can perform row-column interleaving of the bits in the intermediate bit sequence. Specifically, the k-th bit c of the target symbol sequence... k The value of can be determined based on the following process:

[0249] For example, in the middle bit sequence As shown in Figure 10, the information bits in the intermediate bit sequence are input into a 2*2 row-column interleaving matrix to obtain the target symbol sequence. It is 100.

[0250] Case 2: In the first correspondence, multiple consecutive column indices correspond to the same set in P sets.

[0251] For example, with E≤E max +1, N≤n max +1, the first bit sequence is The lexicographical index of the first bit sequence is The target symbol sequence is

[0252] During the encoding process, The nth information bit c n The value of can be determined based on the following process:

[0253] For example, in case two, information bits with the same modulo P remainder in the bit sequence output by the distributed matcher are placed consecutively. Therefore, after the distributed matcher outputs, there is no need to perform an interleaving operation to place the information bits with the same modulo P remainder consecutively, reducing computational complexity. For example, taking K = 1 and u0 = 1 as an example, the target symbol sequence is... It is 0100.

[0254] Combining the two scenarios above, after determining the target symbol sequence (i.e., step S602), as shown in Figure 11, the communication method further includes steps S603 to S605:

[0255] S603. The transmitting device interleaves the target symbol sequence according to the second bit sequence to obtain the interleaved sequence.

[0256] Optionally, the transmitting device can use log(P) second bit sequences of length N-1 to interleave the target symbol sequence to obtain an interleaved sequence. Specifically, the log(P) second bit sequences are a 0,0 ,…a 0,N-2 ,...alog(P)-1,0,...alog(P)-1,N-2.

[0257] (I) For the case where P = 2:

[0258] For example, when P=2, the transmitting device can use a second bit sequence of length N-1 to interleave the target symbol sequence; that is, based on a 0,i The target symbol sequence is interleaved.

[0259] Specifically, It is divided into two parts, namely, the first part consists of the positions from 0 to num-1, written as The second part is composed of the num to N-2th elements, written as At this time, you can Interweave sequentially to a 0,i At the position of 0; The num-th position in Interweave sequentially to a 0,i At positions where the value is 1, the interleaved sequence is obtained. Here, num represents the second bit sequence a. 0,i The number of bits that take a value of 0.

[0260] (II) For the case where P = 4:

[0261] For example, when P=4, the transmitting device can interleave the target symbol sequence using two N-1 length second bit sequences; that is, based on a 0,i ,a 1,i Interleave the target symbol sequence. Where a 0,i ,a 1,i The values ​​are (01), (00), (10), and (11).

[0262] Specifically, let num0, num1, ..., num3 represent the number of positions with values ​​(01), (00), (10), and (11). N P =N-1, N0=0, p=0,…3. The interleaving sequence is obtained by sequentially interleaving the positions corresponding to (01), (00), (10), and (11). Specifically, It is divided into four parts, with the first part consisting of positions 0 to num0-1, written as The second part is composed of the num0 to num1-1 positions, written as The num1 to num2-1 digits form the third part, written as... The third part is composed of the num2 to num3-1 digits, written as in, Interweave sequentially to the num0 positions corresponding to (01), Interweave sequentially to the num2 positions corresponding to (00), Interweave sequentially to the corresponding num2 positions of (10), Interweave sequentially to the num3 positions corresponding to (11) to obtain the interleaved sequence.

[0263] (III) For the case where P = 8:

[0264] For example, when P=8, the transmitting device can interleave the target symbol sequence using three N-1 length second bit sequences; that is, based on a 0,i ,a 1,i ,a 2,i Interleave the target symbol sequence. Where a 0,i ,a 1,i ,a 2,i The values ​​are (011), (010), (000), (001), (101), (100), (110), (111).

[0265] Specifically, the number of positions corresponding to the values ​​(011), (010), (000), (001), (101), (100), (110), and (111) are denoted as num0, num1, ..., num7, respectively. Additionally... N P =N-1,N0=0,p=0,...7. Interweave sequentially to the num0, num1, ... num7 positions corresponding to (011), (010), (000), (001), (101), (100), (110), (111) to obtain the interleaved sequence.

[0266] S604. The transmitting device encodes, interleaves, and modulates the interleaved sequence, the second bit sequence, and the third bit sequence to obtain the transmitted information.

[0267] Optionally, step S604 can also be replaced by: the transmitting device encoding, interleaving, and modulating the interleaved sequence, the second bit sequence, the third bit sequence, and the remaining amplitude bit sequences to obtain the transmitted information. The remaining amplitude bit sequences can be a portion of the payload bit sequence; that is, the payload bit sequence can also include the remaining amplitude bit sequences. Alternatively, the remaining amplitude bit sequences may be empty; in this case, the payload bit sequence can be considered to include only the first bit sequence, the second bit sequence, and the third bit sequence.

[0268] For example, using Gray mapping modulation to 2 mTaking the -ASK symbol, m greater than or equal to log(P)+2 as an example, the third bit sequence corresponds to bit b0 in the Gray map, the interleaved sequence corresponds to bit b1 in the Gray map, the second bit sequence corresponds to bit b2,...,b in the Gray map. log(P)+1 The remaining amplitude bits correspond to the remaining bits b in the Gray map. log(P)+2 ,…,b m-1 .

[0269] Specifically, when P = 2, m = 3, E⁻¹ = 1338, N⁻¹ = 1528, and K = 803, the average symbol probability obtained by 8-ASK modulation is shown in Figure 12(a), and the average symbol probability obtained by 16-ASK modulation is shown in Figure 12(b). When P = 4, m = 4, E⁻¹ = 5852, N⁻¹ = 1024, and K = 797, the average symbol probability obtained by 16-ASK modulation is shown in Figure 12(c), and the average symbol probability obtained by 32-ASK modulation is shown in Figure 12(d). When P = 8, m = 5, E⁻¹ = 23720, N⁻¹ = 1024, and K = 795, the average symbol probability obtained by 32-ASK modulation is shown in Figure 12(e).

[0270] It is understood that Figure 12 above is only an illustrative example of Gray mapping modulation. In fact, this application can also use other mapping methods besides Gray mapping modulation to perform modulation. This application is not limited. In addition, the implementation of step S604 can be found in the relevant description of the encoding, interleaving, and modulation process in Figure 1 above, and will not be repeated here.

[0271] S605. The transmitting device sends the transmission information to the receiving device; correspondingly, the receiving device receives the decoding information from the transmitting device. The decoding information corresponds to the transmission information and includes a target symbol sequence. That is, after the transmission information is output from the transmitting device, it is transmitted through the channel and transformed into decoding information, which is then received by the receiving device.

[0272] Furthermore, after receiving the information to be decoded, the receiving device can also execute step S606 as shown in Figure 11:

[0273] S606. The receiving device performs a distribution matching inverse transform on the target symbol sequence according to the first correspondence relationship to obtain the first bit sequence.

[0274] For example, step S606 is the reverse process of step S602. Therefore, the receiving device performs the corresponding reverse operation based on the operation performed by the sending device in step S602 above, and can obtain the first bit sequence.

[0275] Optionally, prior to step S606, as shown in Figure 13, the communication method may further include steps S607 to S608:

[0276] S607. The receiving device performs a distribution matching inverse transform on the target symbol sequence according to the first correspondence relationship to obtain the first bit sequence. Then, it demodulates, deinterleaves, and decodes the information to be decoded to obtain the interleaved sequence.

[0277] For example, step S607 is the reverse process of step S604. Therefore, the receiving device performs the corresponding reverse operation based on the operation performed by the transmitting device in step S604 above, and thus obtains the interleaved sequence.

[0278] S608. The receiving device performs deinterleaving on the interleaved sequence based on the second bit sequence to obtain the target symbol sequence.

[0279] For example, step S608 is the reverse process of step S603. Therefore, the receiving device performs the corresponding reverse operation based on the operation performed by the sending device in step S603 above, and thus obtains the target symbol sequence.

[0280] The various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict of logic, the terminology and / or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0281] It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

[0282] The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art will readily recognize that, in conjunction with the algorithm steps of the examples described in the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0283] This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. The module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0284] With each function divided into a functional module, Figure 14 shows a transmitting device 140. The transmitting device 140 can perform the actions performed by the transmitting device in the method shown in Figure 6. All relevant content of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiment, and will not be repeated here.

[0285] The transmitting device 140 may include a transceiver module 1401 and a processing module 1402. Exemplarily, the transmitting device 140 may be a communication device, or a chip or other combination device or component having the aforementioned transmitting device functions applied in a communication device. When the transmitting device 140 is a communication device, the transceiver module 1401 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1402 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 140 is a component having the aforementioned transmitting device functions, the transceiver module 1401 may be a radio frequency unit; the processing module 1402 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 140 is a chip system, the transceiver module 1401 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1402 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1401 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1402 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0286] For example, the transceiver module 1401 can be used to perform all the transceiver operations performed by the transmitting device in the embodiments shown in Figures 6 to 13, and / or to support other processes of the technology described herein; the processing module 1402 can be used to perform all operations other than the transceiver operations performed by the transmitting device in the embodiments shown in Figures 6 to 13, and / or to support other processes of the technology described herein.

[0287] Figure 15 shows a receiving device 150, which can perform the actions performed by the receiving device in the method shown in Figure 6 above. All relevant content of each step involved in the above method embodiment can be referred to the functional description of the corresponding functional module, and the technical effects that can be obtained can be referred to the above method embodiment, which will not be repeated here.

[0288] The receiving device 150 may include a transceiver module 1501 and a processing module 1502. For example, the receiving device 150 may be a communication device, or a chip or other combination device or component having the aforementioned receiving device functions. When the receiving device 150 is a communication device, the transceiver module 1501 may be a transceiver, which may include an antenna and radio frequency circuitry; the processing module 1502 may be a processor (or processing circuitry), such as a baseband processor, which may include one or more CPUs. When the receiving device 150 is a component having the aforementioned receiving device functions, the transceiver module 1501 may be a radio frequency unit; the processing module 1502 may be a processor (or processing circuitry), such as a baseband processor. When the receiving device 150 is a chip system, the transceiver module 1501 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1502 may be a processor (or processing circuitry) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1501 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1502 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0289] For example, the transceiver module 1501 can be used to perform all the transceiver operations performed by the receiving device in the embodiments shown in FIG11 or FIG13, and / or to support other processes of the technology described herein; the processing module 1502 can be used to perform all operations other than the transceiver operations performed by the receiving device in the embodiments shown in FIG11 or FIG13, and / or to support other processes of the technology described herein.

[0290] As another possible implementation, the transceiver module 1401 in Figure 14 can be replaced by a transceiver that integrates the functions of the transceiver module 1401; the processing module 1402 can be replaced by a processor that integrates the functions of the processing module 1402. Furthermore, the transmitting end device 140 shown in Figure 14 may also include a memory. Alternatively, the transceiver module 1501 in Figure 15 can be replaced by a transceiver that integrates the functions of the transceiver module 1501; the processing module 1502 can be replaced by a processor that integrates the functions of the processing module 1502. Furthermore, the receiving end device 150 shown in Figure 15 may also include a memory.

[0291] Alternatively, when the processing module 1402 is replaced by a processor and the transceiver module 1401 is replaced by a transceiver, the transmitting end device 140 involved in the embodiments of this application can also be the communication device 160 shown in FIG. 16. Or, when the processing module 1502 is replaced by a processor and the transceiver module 1501 is replaced by a transceiver, the receiving end device 150 involved in the embodiments of this application can also be the communication device 160 shown in FIG. 16.

[0292] The processor can be logic circuit 1601, and the transceiver can be interface circuit 1602. Furthermore, the communication device 160 shown in FIG16 may also include a memory 1603.

[0293] This application also provides a communication device, as shown in FIG17. This communication device can be applied to the methods shown in any of the embodiments of FIG6 to FIG13. As shown in FIG17, the communication device includes a processing module and a transceiver module. The processing module may be one or more processors, and the transceiver module may be a transceiver or a communication interface. This communication device can be used to implement the sending or receiving device involved in any of the above method embodiments, or to implement the functions of the device involved in any of the above method embodiments. The device or device function may be a network component in a hardware device, a software function running on dedicated hardware, or a virtualization function instantiated on a platform (e.g., a cloud platform). Optionally, the communication device may further include a storage module for storing the program code and data of the communication device.

[0294] In one example, the communication device functions as a transmitting device or is a chip applied within a transmitting device, and executes the steps performed by the transmitting device in the above method embodiments. The transceiver module is used to specifically execute the transmitting and / or receiving actions performed by the transmitting device in any of the embodiments of Figures 6 to 13, for example, supporting the transmitting device in performing other processes of the technology described herein. The processing module can be used to support the communication device in performing the processing actions in the above method embodiments, for example, supporting the transmitting device in performing other processes of the technology described herein.

[0295] To achieve the above functions, the chip of this application may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art will readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0296] In one possible implementation, when the transmitting or receiving device is a chip, the transceiver module can be a communication interface, pins, or circuits. The communication interface can be used to input data to be processed to the processor and can output the processor's processing results. Specifically, the communication interface can be a general purpose input / output (GPIO) interface, which can connect to multiple peripheral devices (such as LCD displays, cameras, radio frequency (RF) modules, antennas, etc.). The communication interface is connected to the processor via a bus.

[0297] The processing module can be a processor, which can execute computer execution instructions stored in the storage module to cause the chip to execute the methods involved in any of the embodiments shown in Figures 6 to 13. Further, the processor may include a controller, an arithmetic logic unit (ALU), and registers. For example, the controller is mainly responsible for instruction decoding and issuing control signals for the operations corresponding to the instructions. The ALU is mainly responsible for performing fixed-point or floating-point arithmetic operations, shift operations, and logical operations, and can also perform address operations and conversions. The registers are mainly responsible for storing register operands and intermediate operation results temporarily stored during instruction execution. In specific implementations, the processor's hardware architecture can be an ASIC architecture, a microprocessor without interlocked piped stages architecture (MIPS), an advanced reduced instruction set machine (RISC) machine (ARM) architecture, or a network processor (NP) architecture, etc. The processor can be single-core or multi-core. The storage module can be an in-chip storage module, such as a register or cache. Storage modules can also be external to the chip, such as ROM or other types of static storage devices that can store static information and instructions, RAM, etc.

[0298] It should be noted that the functions of the processor and interface can be implemented through hardware design, software design, or a combination of both; no restrictions are imposed here.

[0299] This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0300] This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0301] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending end and / or a data receiving end) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0302] It should be noted that the terms "first" and "second," etc., in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0303] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0304] It should be understood that in this application, "at least one (item)" means one or more. "More than one" means two or more. "At least two (items)" means two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. Both "...when" and "if" indicate that a corresponding action will be taken under certain objective circumstances. They are not time limits, nor do they require a judgment action to be taken when the action is taken, nor do they imply any other limitations.

[0305] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0306] In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

[0307] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0308] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the mutual coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0309] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0310] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0311] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A communication method characterized by comprising: The method includes: Obtain the first bit sequence; The first bit sequence is distributed and matched according to the first correspondence to obtain the target symbol sequence; Wherein, the first correspondence includes elements in rows E and columns N, and the first element in the rows E and columns N has a row number of e and a column number of n; For all values ​​in the first set that are greater than or equal to e, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence. The first set is the set corresponding to the column number n of the first element in P sets. The first set includes a first value and a second value. The first value is the difference between the row number of the first element and the second element, and the second value is the difference between the row number of the first element and the third element. The first value is less than the second value, and P is 2^m, where m is a positive integer. For any condition where e is greater than or equal to the first value and e is less than the second value, the value of the first element does not exceed the value of the second element. When e is less than the first value, the first element takes the value 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

2. The method of claim 1, wherein, The step of performing distribution matching on the first bit sequence according to the first correspondence to obtain the target symbol sequence includes: Based on the lexicographical order of the first bit sequence and the value of the element in the first correspondence, the target symbol sequence is determined, wherein the value of the symbol in the target symbol sequence is 0 or 1.

3. The method of claim 2, wherein, Determining the target symbol sequence based on the lexicographical order of the first bit sequence and the values ​​of elements in the first correspondence includes: The intermediate symbol sequence is determined based on the lexicographical order of the first bit sequence and the value of the element in the first correspondence. The intermediate symbol sequence is interleaved to obtain the target symbol sequence.

4. The method according to any one of claims 1 to 3, characterized in that, The method further includes: The target symbol sequence is interleaved according to the second bit sequence to obtain the interleaved sequence; The interleaved sequence, the second bit sequence, and the third bit sequence are all encoded, interleaved, and modulated to obtain the transmitted information. The second bit sequence and the third bit sequence are both partial sequences of the payload bit sequence. Send the aforementioned message.

5. A communication method characterized by comprising: The method includes: Receive information to be decoded, the information to be decoded including a target symbol sequence; The target symbol sequence is subjected to a distribution matching inverse transform based on the first correspondence to obtain the first bit sequence; Wherein, the first correspondence includes elements in rows E and columns N, and the first element in the rows E and columns N has a row number of e and a column number of n; For all values ​​in the first set that are greater than or equal to e, the value of the first element does not exceed the sum of the values ​​of the second and third elements in the (n+1)th column of the first correspondence. The first set is the set corresponding to the column number n of the first element in P sets. The first set includes a first value and a second value. The first value is the difference between the row number of the first element and the second element, and the second value is the difference between the row number of the first element and the third element. The first value is less than the second value, and P is 2^m, where m is a positive integer. For any condition where e is greater than or equal to the first value and e is less than the second value, the value of the first element does not exceed the value of the second element. When e is less than the first value, the first element takes the value 0, e = 0, 1, ..., E-1, n = 0, 2, ..., N-2, where E and N are both positive integers.

6. The method of claim 5, wherein, The lexicographical index of the first bit sequence and the value of the element in the first correspondence are related to the value of the symbol in the target symbol sequence, where the value of the symbol in the target symbol sequence is 0 or 1.

7. The method according to claim 5 or 6, characterized in that, The method further includes: The information to be decoded is demodulated, de-interleaved, and decoded to obtain an interleaved sequence; The interleaved sequence is deinterleaved based on the second bit sequence to obtain the target symbol sequence, wherein the second bit sequence is a portion of the payload bit sequence.

8. The method according to any one of claims 1 to 7, characterized in that, When P is 2, the P sets include two sets, which include the set corresponding to the odd-numbered columns and the set corresponding to the even-numbered columns; The first set is the set corresponding to the column index n of the first element among P sets, including: When the column index n of the first element is odd, the first set is the set corresponding to the odd-numbered columns in the two sets; When the column index n of the first element is even, the first set is the set corresponding to the even-numbered columns of the two sets.

9. The method according to any one of claims 1 to 8, characterized in that, The values ​​of the elements in the (N-1)th column of the first correspondence are all constants.

10. The method according to any one of claims 1-9, characterized in that, The value of the first element does not exceed the sum of the values ​​of the second and third elements, including: The value of the first element is equal to the value corresponding to the first binary sequence. The first binary sequence is the value of the first W bits of the binary sequence corresponding to the sum of the second element and the third element, within the length of the first binary sequence, where W is a positive integer.

11. The method according to any one of claims 1 to 10, characterized in that, The value of the first element does not exceed the value of the second element, including: The value of the first element is equal to the value corresponding to the second binary sequence, where the second binary sequence is the value of the first W bits of the binary sequence corresponding to the value of the second element within the length of the second binary sequence.

12. The method according to any one of claims 1-11, characterized in that, The row number of the second element = e - the first value; The row number of the third element is e - the second value.

13. The method according to any one of claims 1 to 12, characterized in that, The first correspondence is based on some or all of the elements in the second correspondence consisting of E′ rows and N′ columns, where E′≥E and N′≥N.

14. The method of claim 13, wherein, When the first correspondence is composed of some elements from the second correspondence, the some elements include the elements in row 0 to row E-1 and the elements in column N′-N-1 to column N′-1 of the second correspondence.

15. The method of claim 14, wherein, The value of E is related to the length K of the first bit sequence, where K is a positive integer.

16. The method according to any one of claims 1 to 15, characterized in that, Both the first value and the second value are related to P and n.

17. The method of claim 16, wherein, The first value and the second value satisfy the following relationships, respectively: where a = 2*(P-mod(n, P))-l; or N-1 is an integer multiple of P.

18. The method of claim 16, wherein, The first value and the second value satisfy the following relationships: First value = a, second value = 2*P-1-a; where a = P - 1 - mod(n, P); or N-1 is an integer multiple of P.

19. The method according to any one of claims 1 to 18, characterized in that, The value of the first element is associated with the values ​​of at most two elements in the (n+1)th column.

20. A communications device, characterized by The communication device includes a processor; the processor is configured to run a computer program or instructions that cause the communication method as described in any one of claims 1-4, 8-19 to be executed, or cause the communication method as described in any one of claims 5-19 to be executed.

21. A communications device, characterized by The communication device includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method as described in any one of claims 1-4, 8-19, or to execute the communication method as described in any one of claims 5-19, and to process and / or generate the information based on the information.

22. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions or programs that, when executed on a computer, cause the communication method as described in any one of claims 1-4, 8-19 to be executed, or cause the communication method as described in any one of claims 5-19 to be executed.

23. A computer program product, characterised in that, The computer program product includes computer instructions; when some or all of the computer instructions are executed on a computer, they cause the communication method as described in any one of claims 1-4, 8-19 to be executed, or cause the communication method as described in any one of claims 5-19 to be executed.

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