Display device

The display device addresses light leakage and reflection issues by using a conductive light-absorbing layer outside the lens edges to absorb unwanted reflections, enhancing brightness and reliability.

WO2026140480A1PCT designated stage Publication Date: 2026-07-02JAPAN DISPLAY INC

Patent Information

Authority / Receiving Office
WO · WO
Patent Type
Applications
Current Assignee / Owner
JAPAN DISPLAY INC
Filing Date
2025-10-28
Publication Date
2026-07-02

AI Technical Summary

Technical Problem

In display devices using organic electroluminescence elements, undesired reflected light can contribute to issues such as light leakage and malfunctions due to the reflection of light by lenses, which affects the display's performance and reliability.

Method used

The display device incorporates a conductive light-absorbing layer positioned outside the lens edges, with a convex surface, to absorb unwanted reflected light and minimize light leakage, while maintaining light transmission and improving brightness.

Benefits of technology

The solution effectively suppresses light leakage and enhances the display's brightness and reliability by absorbing reflected light, thereby improving the display's overall performance and reducing malfunctions.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure JP2025037756_02072026_PF_FP_ABST
    Figure JP2025037756_02072026_PF_FP_ABST
Patent Text Reader

Abstract

The purpose of an embodiment of the present invention is to suppress light leakage. According to one embodiment, a display device comprises: a substrate; a display element disposed above the substrate; an anode disposed between the substrate and the display element and electrically connected to the display element; a partition wall surrounding the display element; a transparent electrode disposed on the partition wall and the display element and electrically connected to the display element; and a lens disposed on the transparent electrode, overlapping the display element, and having a convex surface. The anode includes a light absorption layer having conductivity, and the outer edge of the light absorption layer is located outward of the outer edge of the lens.
Need to check novelty before this filing date? Find Prior Art

Description

Display device

[0001] An embodiment of the present invention relates to a display device.

[0002] In recent years, in a display device using an organic electroluminescence (EL) element as a display element, a technique of combining a lens array has been proposed. The lens has a function of refracting light emitted from the light-emitting layer of the display element at various angles toward the front of the display device. In such a display device, part of the light emitted from the display element may be reflected by the lens and propagate in the direction opposite to the emission direction. Such undesired reflected light can contribute to various problems.

[0003] Japanese Patent Application Laid-Open No. 2012-38631

[0004] One of the purposes of the embodiment is to provide a display device capable of suppressing light leakage.

[0005] Generally, according to one embodiment, the display device includes a substrate, a display element disposed above the substrate, an anode disposed between the substrate and the display element and electrically connected to the display element, a partition wall surrounding the display element, a transparent electrode disposed on the partition wall and the display element and electrically connected to the display element, and a lens disposed on the transparent electrode, overlapping the display element, and having a convex surface. The anode includes a light-absorbing layer having conductivity, and an outer edge of the light-absorbing layer is located outside an outer edge of the lens.

[0006] In another embodiment, the display device comprises a substrate, a first display element and a second display element disposed above the substrate, a first anode disposed between the substrate and the first display element and electrically connected to the first display element, a second anode disposed between the substrate and the second display element and electrically connected to the second display element, a first lens overlapping the first display element, and a second lens overlapping the second display element, wherein the first anode includes a conductive first light-absorbing layer, the second anode includes a conductive second light-absorbing layer, the outer edge of the first light-absorbing layer is located outside the outer edge of the first lens in a plan view, the outer edge of the second light-absorbing layer is located outside the outer edge of the second lens in a plan view, and a light-transmitting region is formed between the first light-absorbing layer and the second light-absorbing layer.

[0007] Figure 1 is a diagram showing an example of a display device DSP. Figure 2 is a diagram showing an example configuration of a pixel circuit 4 for driving a display element LE. Figure 3 is a cross-sectional view showing an example configuration of a display device DSP including one of the display elements LE. Figure 4 is a diagram illustrating the relationship between the thickness T23B of the second layer 23B and the spectral transmittance. Figure 5 is an enlarged plan view of a single pixel PX. Figure 6 is another enlarged plan view of a single pixel PX. Figure 7 is a diagram illustrating some effects of the embodiment. Figure 8 is a diagram illustrating an example of using the display device DSP.

[0008] Embodiments will be described with reference to the drawings. The disclosure is merely an example, and modifications that can be easily conceived by those skilled in the art while maintaining the spirit of the invention are naturally included within the scope of the present invention. Furthermore, in order to clarify the explanation, the drawings may schematically represent the width, thickness, shape, etc. of each part compared to the actual embodiment, but these are merely examples and do not limit the interpretation of the present invention. In addition, in this specification and each drawing, components that perform the same or similar functions as those described above with respect to previously shown drawings are denoted by the same reference numerals, and redundant detailed explanations may be omitted as appropriate.

[0009] Furthermore, the drawings will include mutually orthogonal X, Y, and Z axes as needed to facilitate understanding. The direction along the X-axis will be referred to as the first direction X, the direction along the Y-axis as the second direction Y, and the direction along the Z-axis as the third direction Z. Viewing various elements parallel to the third direction Z is called a plan view. In addition, terms such as "up," "above," "between," and "opposite" refer to the positional relationship between two or more constituent elements, and include not only cases where the two or more constituent elements of an object are in direct contact, but also cases where they are separated from each other by gaps or other constituent elements. The positive direction of the Z-axis will be referred to as "up" or "above."

[0010] Figure 1 shows an example of a display device (DSP).

[0011] The display device DSP according to this embodiment includes an inorganic light-emitting diode as a display element LE and can be mounted in various electronic devices such as televisions, personal computers, in-vehicle equipment, tablet terminals, smartphones, mobile phone terminals, and wearable terminals. In particular, in this embodiment, a micro light-emitting diode (hereinafter sometimes referred to as a micro LED (Light Emitting Diode)) is used as the display element LE. A micro LED is, for example, a light-emitting element having a minute size with a side length of 100 μm or less. Alternatively, a mini LED having a side length of 100 μm to 300 μm may be used as the display element LE.

[0012] The display device DSP comprises a display panel PNL, a drive IC (Integrated Circuit) 1, a drive circuit 2, and a cathode wiring 3.

[0013] The display panel PNL has a display area DA for displaying an image and a peripheral area SA surrounding the display area DA, on an insulating substrate 10. The substrate 10 may be a glass substrate or a flexible resin substrate. In the illustrated example, the shape of the display area DA in plan view is a rectangle. However, the shape of the display area DA in plan view is not limited to the illustrated example and may be a polygon other than a rectangle, a circle, an ellipse, etc.

[0014] The display area DA comprises a plurality of pixels PX arranged in a matrix in a first direction X and a second direction Y. The first direction X and the second direction Y are parallel to the main surface of the substrate 10. As described above, the first direction X and the second direction Y are orthogonal to each other, but they may intersect at angles other than 90°. The third direction Z corresponds to the normal direction of the substrate 10 or the thickness direction of the display device DSP.

[0015] Each of the multiple pixels PX includes multiple display elements LE that emit light in different colors. Each of the multiple display elements LE is controlled by a pixel circuit, which will be described later. In one example, the pixel PX includes a display element LE1 configured to emit light in a first color, a display element LE2 configured to emit light in a second color, and a display element LE3 configured to emit light in a third color. The first, second, and third colors are all different colors. For example, the first color is blue, the second color is green, and the third color is red, but each of the first, second, and third colors may be other colors. The pixel PX may also include display elements LE of other colors together with, or in place of, any one of the display elements LE1, LE2, and LE3.

[0016] In the illustrated example, in pixel PX, display elements LE1 and LE2 are aligned in the second direction Y, and display elements LE2 and LE3 are aligned in the first direction X. Note that the layout of display elements LE1, LE2, and LE3 is not limited to the illustrated example.

[0017] The driver IC 1 includes a circuit configured to control the display device DSP. The driver IC 1 is mounted, for example, in the peripheral region SA of the substrate 10. Alternatively, the driver IC 1 may be mounted on a wiring board connected to the substrate 10.

[0018] The drive circuit 2 is located in the peripheral region SA of the substrate 10. The drive circuit 2 is configured to drive multiple gate lines (for example, the light emission control scan line BG, reset control scan line RG, initialization control scan line IG, and write control scan line SG, which will be described later) based on various control signals from the drive IC 1. The drive circuit 2 is configured to sequentially or simultaneously select multiple gate lines and supply gate drive signals to the selected gate lines.

[0019] The cathode wiring 3 is provided in the peripheral region SA of the substrate 10. In the illustrated example, the cathode wiring 3 is connected to the drive IC 1 and is provided so as to surround the display region DA and the drive circuit 2. The cathode wiring 3 is electrically connected to the cathodes of multiple display elements LE and is set to a fixed potential (for example, ground potential).

[0020] Figure 2 shows an example configuration of a pixel circuit 4 for driving the display element LE.

[0021] Each of the display elements LE1, LE2, and LE3 shown in Figure 1 is driven by, for example, the pixel circuit 4 shown in Figure 2.

[0022] In the illustrated example, the pixel circuit 4 comprises five transistors and two capacitors. Specifically, the pixel circuit 4 includes, as transistors, a light emission control transistor BCT, an initialization transistor IST, a write transistor SST, a reset transistor RST, and a drive transistor DRT. Each of these transistors is, for example, an n-type TFT (Thin Film Transistor). At least one of the five transistors shown may be a p-type TFT.

[0023] The light emission control scan line BG is connected to the gate of the light emission control transistor BCT. The initialization control scan line IG is connected to the gate of the initialization transistor IST. The write control scan line SG is connected to the gate of the write transistor SST. The reset control scan line RG is connected to the gate of the reset transistor RST.

[0024] Each of the light emission control scan line BG, initialization control scan line IG, write control scan line SG, and reset control scan line RG is connected to the drive circuit 2 shown in Figure 1. The drive circuit 2 supplies the light emission control signal Vbg, initialization control signal Vig, write control signal Vsg, and reset control signal Vrg to the light emission control scan line BG, initialization control scan line IG, write control scan line SG, and reset control scan line RG, respectively.

[0025] The driver IC 1 shown in Figure 1 supplies the video signal Vsig to the pixel circuit 4. The video signal Vsig is supplied to the writing transistor SST via the video signal line L2. The driver IC 1 also supplies the reset power supply potential Vrst to the reset transistor RST via the reset signal line L3. Furthermore, the driver IC 1 supplies the initialization potential Vini to the initialization transistor IST via the initialization signal line L4.

[0026] The light emission control transistor BCT, initialization transistor IST, writing transistor SST, and reset transistor RST function as switching elements that select conduction and non-conductivity between two nodes. The drive transistor DRT functions as a current control element that controls the current flowing through the display element LE according to the voltage between its gate and drain.

[0027] The cathode of the display element LE is connected to the cathode power supply line L10, which includes the cathode wiring 3 shown in Figure 1. The cathode power supply potential PVSS is supplied to the cathode power supply line L10.

[0028] Furthermore, the anode of the display element LE is connected to the anode power supply line L1 via the drive transistor DRT and the light emission control transistor BCT. The anode power supply potential PVDD is supplied to the anode power supply line L1. The anode power supply potential PVDD is higher than the cathode power supply potential PVSS.

[0029] Furthermore, the pixel circuit 4 includes capacitances Cs1 and Cs2. Capacitor Cs1 is a retaining capacitance formed between the gate and source of the drive transistor DRT. Capacitor Cs2 is an additional capacitance formed between the source of the drive transistor DRT, the anode of the display element LE, and the cathode power supply line L10.

[0030] Here, we will explain an example of controlling the display element LE using the pixel circuit 4 shown in the diagram.

[0031] During the reset period of one frame in which an image is displayed in the display area DA, the light emission control transistor BCT turns off (non-conductive) and the reset transistor RST turns on (conductive) depending on the potentials of the light emission control scan line BG and the reset control scan line RG, respectively. As a result, the source of the drive transistor DRT is fixed to the reset power supply potential Vrst.

[0032] Subsequently, the initialization transistor IST is turned on in accordance with the potential of the initialization control scan line IG. The gate of the drive transistor DRT is fixed to the initialization potential Vini via the initialization transistor IST. Also, the emission control transistor BCT is turned on and the reset transistor RST is turned off in accordance with the potentials of the emission control scan line BG and the reset control scan line RG, respectively. The drive transistor DRT is turned off when the source potential becomes (Vini - Vth), and the variation in the threshold voltage Vth of the drive transistor DRT is offset.

[0033] Subsequently, during the video signal writing operation period, the light emission control transistor BCT is turned off, the initialization transistor IST is turned off, and the write transistor SST is turned on, depending on the potentials of the light emission control scan line BG, the initialization control scan line IG, and the write control scan line SG, respectively. The video signal Vsig is input to the gate of the drive transistor DRT via the write transistor SST.

[0034] Subsequently, during the light emission operation period, the light emission control transistor BCT is turned on and the write transistor SST is turned off according to the potentials of the light emission control scan line BG and the write control scan line SG, respectively. The anode power supply potential PVDD is supplied from the anode power supply line L1 to the drive transistor DRT via the light emission control transistor BCT. The drive transistor DRT supplies a current to the display element LE according to the gate-source voltage. The display element LE emits light with a brightness corresponding to the supplied current.

[0035] Note that the configuration of the pixel circuit 4 shown in the diagram is merely an example and can be modified as appropriate.

[0036] Figure 3 is a cross-sectional view showing an example configuration of a display device DSP including one of the display elements LE.

[0037] The substrate 10 is a transparent insulating substrate, such as a glass substrate, a quartz substrate, or a flexible substrate made of resin.

[0038] The circuit layer 11 is located on the main surface 10A of the substrate 10. The circuit layer 11 includes various circuits such as the pixel circuit 4 shown in Figure 2, various wirings such as gate lines, and various insulating layers. The insulating layer 12 is located on top of the circuit layer 11. The insulating layer 12 is, for example, an organic insulating layer formed to flatten the irregularities caused by the circuit layer 11.

[0039] The anode 20 is placed on the insulating layer 12 and is electrically connected to the drive transistor DRT shown in Figure 2. In the illustrated example, the anode 20 is formed as a laminate in which a plurality of conductive layers are stacked. That is, the anode 20 comprises a first conductive layer 21, a second conductive layer 22, a third conductive layer 23, and a fourth conductive layer 24.

[0040] The first conductive layer 21 is placed on top of the insulating layer 12 and is made of a titanium-based material such as titanium or a titanium compound. The second conductive layer 22 is placed on top of the first conductive layer 21 and is made of an aluminum-based material such as aluminum or an aluminum compound.

[0041] The insulating layer 13 is disposed on the insulating layer 12 and covers the peripheral portion of the laminate of the first conductive layer 21 and the second conductive layer 22. The insulating layer 13 is an inorganic insulating layer formed of, for example, silicon nitride or the like.

[0042] The third conductive layer 23 is disposed on the second conductive layer 22 at the opening 13A of the insulating layer 13. The peripheral portion of the third conductive layer 23 is disposed on the insulating layer 13. The third conductive layer 23 includes a light-absorbing layer having conductivity.

[0043] In one example, the third conductive layer 23 is configured as a laminate of a first layer 23A and a second layer 23B. The first layer 23A is located at the opening 13A and is disposed on the second conductive layer 22. The second layer 23B is disposed on the first layer 23A at the opening 13A and extends over the insulating layer 13. In the third conductive layer 23, the second layer 23B mainly functions as a light-absorbing layer. The first layer 23A and the second layer 23B are formed of the same material, and are formed of, for example, a titanium-based material such as titanium or a titanium compound.

[0044] The fourth conductive layer 24 is disposed on the third conductive layer 23. The fourth conductive layer 24 is a transparent conductive layer formed of an oxide conductive material such as indium tin oxide (ITO).

[0045] Note that the materials for forming the respective conductive layers of the anode 20 are not limited to the above examples.

[0046] The display element LE is disposed above the substrate 10. The illustrated display element LE can correspond to any of the display elements LE1, LE2, and LE3 shown in FIG. 1. The anode 20 is located between the substrate 10 and the display element LE in the third direction Z.

[0047] The display element LE includes an anode layer AD, a cathode layer CD, and a semiconductor layer SL. The cathode layer CD faces the anode layer AD in the third direction Z. The semiconductor layer SL is located between the anode layer AD and the cathode layer CD.

[0048] In one example, the semiconductor layer SL is a laminate in which a p-type clad layer PL, a light-emitting layer EL, and an n-type clad layer NL are laminated in this order along the third direction Z. The p-type clad layer PL is in contact with the anode layer AD. The n-type clad layer NL is in contact with the cathode layer CD. The p-type clad layer PL and the n-type clad layer NL are formed of, for example, gallium nitride (GaN). The light-emitting layer EL is formed of, for example, indium gallium nitride (InGaN). Note that the materials for forming the respective layers of the semiconductor layer SL are not limited to the above examples.

[0049] The anode layer AD faces the anode 20 in the third direction Z and is electrically connected to the anode 20 via the connection member CN. The connection member CN is interposed between the fourth conductive layer 24 and the anode layer AD. The connection member CN is formed of, for example, a black photosensitive conductive material.

[0050] The partition wall 14 is disposed on the insulating layer 13 and surrounds the display element LE. The partition wall 14 also covers a portion of the second layer 23B that extends outside the fourth conductive layer 24. The cathode layer CD of the display element LE is exposed at the opening 14A of the partition wall 14. The partition wall 14 is a transparent organic insulating layer.

[0051] The transparent electrode 30 is disposed on the partition wall 14 and also on the display element LE at the opening 14A. The transparent electrode 30 is in contact with the cathode layer CD and is electrically connected to the display element LE. The transparent electrode 30 is also electrically connected to the cathode wiring 3 shown in FIG. 1. The transparent electrode 30 functions as a cathode and is formed of, for example, an oxide conductive material such as ITO.

[0052] The lens LS is a so-called microlens and has an extremely small size. The lens LS is disposed on the transparent electrode 30 and overlaps the display element LE in the third direction Z. The lens LS also has a convex surface protruding from the transparent electrode 30. Such a lens LS is formed of, for example, a transparent photosensitive resin material such as an epoxy resin, an acrylic resin, a fluororesin, or a silicone resin.

[0053] As will be described later, the lens LS is formed in a circular shape when viewed from above. The diameter D of the lens LS is, for example, 20 μm or less.

[0054] In such a display device DSP, the outer edge 23E of the second layer 23B, which functions as a light-absorbing layer, is located outside the outer edge LSE of the lens LS. In other words, the second layer 23B is located directly beneath the lens LS and extends over a larger area than the lens LS.

[0055] As described above, in the third conductive layer 23, the first layer 23A is positioned in the opening 13A, and the second layer 23B is positioned in the opening 13A and extends between the insulating layer 13 and the partition wall 14. Therefore, the thickness T23B of the third conductive layer 23 located between the insulating layer 13 and the partition wall 14 corresponds to the thickness of the second layer 23B, which functions as a light-absorbing layer. Also, the thickness T23 of the third conductive layer 23 located between the second conductive layer 22 and the fourth conductive layer 24 in the opening 13A corresponds to the total thickness of the first layer 23A and the second layer 23B. Thickness T23B is smaller than thickness T23 (T23B < T23).

[0056] In one example, the thickness T23B is between 5 μm and 15 μm. The thickness T23 is approximately 150 nm. The first conductive layer 21 has a thickness smaller than T23, for example, approximately 50 nm. The second conductive layer 22 has a thickness larger than T23, for example, approximately 500 nm.

[0057] In order to suppress defects such as fracture of the third conductive layer 23 at the step formed in the opening 13A of the insulating layer 13, or to protect the aluminum second conductive layer 22, it is desirable that the thickness T23 of the third conductive layer 23 be 100 nm or more. On the other hand, the third conductive layer 23 extending between the insulating layer 13 and the partition wall 14 is required to function as a light-absorbing layer, while also having light transmittance as described later. For this reason, it is desirable that the thickness T23B be less than 100 nm, and preferably between 5 μm and 15 μm.

[0058] Figure 4 is a diagram illustrating the relationship between the thickness T23B of the second layer 23B and the spectral transmittance.

[0059] The horizontal axis of the figure represents wavelength (nm), and the vertical axis represents transmittance. The sample is assumed to consist of an insulating layer 12, an insulating layer 13, and a second layer 23B stacked in order on a transparent substrate. The insulating layer 12 is a transparent organic insulating layer, and the insulating layer 13 is made of silicon nitride and has a thickness of 600 nm. The second layer 23B is a titanium layer. In the figure, A is a sample with a second layer 23B thickness of 10 nm, B is a sample with a second layer 23B thickness of 20 nm, C is a sample with a second layer 23B thickness of 30 nm, D is a sample with a second layer 23B thickness of 40 nm, and E is a sample with a second layer 23B thickness of 50 nm.

[0060] When the spectral transmittance of each of these samples was calculated by simulation, the results shown in Figure 4 were obtained.

[0061] For sample A, a transmittance of approximately 40% or more was obtained in the visible light range (e.g., wavelength range of 400 nm to 800 nm). On the other hand, referring to the results for samples B, C, D, and E, a tendency for transmittance to decrease as the thickness T23B of the second layer 23B increased was observed. Furthermore, it was confirmed that when the thickness T23B was 20 nm or more, the transmittance in the visible light range was 20% or less. Based on these results, from the viewpoint of ensuring transmittance, it is desirable that the thickness T23B of the second layer 23B be less than 20 nm, and more preferably 15 μm or less.

[0062] Furthermore, the inventors conducted simulations to confirm the effect of the presence or absence of the second layer 23B on reflectivity. Spectral reflectivity was calculated by simulation for both a sample with a second layer 23B having a thickness of 10 nm placed on the reflective electrode and a sample without the second layer 23B on the reflective electrode. It was confirmed that the reflectivity of the sample with the second layer 23B was reduced by about 30% compared to the reflectivity of the sample without the second layer 23B. In other words, it was confirmed that the 10 nm thick second layer 23B absorbs about 30% of the incident light.

[0063] As described above, it was confirmed that the relatively thin second layer 23B functions as a light-absorbing layer and also has light-transmitting properties.

[0064] Figure 5 is a magnified plan view of a single pixel PX. In Figure 5, the display elements LE1, LE2, LE3, partition wall 14, and lens LS are shown, while other elements are omitted from the illustration.

[0065] Each of the display elements LE1, LE2, and LE3 overlaps the opening 14A of the partition wall 14. The opening 14A is formed in a circular shape. In a plan view, the opening 14A and the lens LS are formed, for example, in a concentric manner. The diameter D of the lens LS is greater than the diameter 14D of the opening 14A (D > 14D). The lens LS aligned in the first direction X are spaced apart from each other, and the lens LS aligned in the second direction Y are also spaced apart from each other.

[0066] Figure 6 is another plan view, enlarged, of a single pixel PX. In Figure 6, the display elements LE1, LE2, LE3, anode 20, connecting member CN, insulating layer 13, and lens LS are shown, while other elements are omitted from the illustration.

[0067] Each of the display elements LE1, LE2, and LE3 overlaps the anode 20. At the anode 20, the outer edge 23E of the second layer 23B is located at the outermost periphery. That is, the outer edge 23E is located outside the outer edges of the first conductive layer 21, the second conductive layer 22, and the fourth conductive layer 24. Furthermore, the outer edge 23E is located outside the outer edges of the connecting member CN and the opening 13A.

[0068] The outer edge LSE of the lens LS is located outside the outer edges of the connecting member CN, the opening 13A, and the fourth conductive layer 24.

[0069] In the illustrated example, the opening 13A, the first conductive layer 21, the second conductive layer 22, the second layer 23B, the fourth conductive layer 24, and the connecting member CN are each formed in a rectangular shape in plan view, but they may also be other shapes such as polygons, circles, or ellipses.

[0070] For example, in the second direction Y where display elements LE1 and LE2 are aligned, the distance DY1 from the outer edge LSE to the outer edge 23E is smaller than the diameter D of the lens LS. Also, in the second direction Y, the distance DY2 from the second layer 23B overlapping display element LE1 to the second layer 23B overlapping display element LE2 is greater than the distance DY1.

[0071] Furthermore, in the first direction X where display elements LE2 and LE3 are aligned, the distance DX1 from the outer edge LSE to the outer edge 23E is equal to the distance DY1. Also, in the first direction X, the distance DX2 from the second layer 23B overlapping display element LE2 to the second layer 23B overlapping display element LE3 is greater than the distance DX1. Distances DX1 and DY1 are, for example, 5 μm or more and 10 μm or less.

[0072] Each of the regions TA between the second layers 23B aligned in the first direction X, and the regions TA between the second layers 23B aligned in the second direction Y, are light-transmitting regions, except for the regions where opaque wiring and opaque electrodes are placed. Furthermore, the portion of the second layer 23B that is outside the first conductive layer 21 and the second conductive layer 22 is a light-transmitting region.

[0073] In the configuration example shown in Figure 6, display element LE1 corresponds to the first display element, display element LE2 corresponds to the second display element, and display element LE3 corresponds to the third display element. Furthermore, the anode 20 electrically connected to display element LE1 corresponds to the first anode, the second layer 23B of the first anode corresponds to the first light absorption layer, and the lens LS overlapping display element LE1 corresponds to the first lens. Furthermore, the anode 20 electrically connected to display element LE2 corresponds to the second anode, the second layer 23B of the second anode corresponds to the second light absorption layer, and the lens LS overlapping display element LE2 corresponds to the second lens. Furthermore, the anode 20 electrically connected to display element LE3 corresponds to the third anode, the second layer 23B of the third anode corresponds to the third light absorption layer, and the lens LS overlapping display element LE3 corresponds to the third lens.

[0074] Figure 7 is a diagram illustrating some of the effects of the embodiment.

[0075] The light LT emitted from the display element LE is divergent. By positioning the lens LS directly above the display element LE, the amount of light LT trapped inside is reduced, improving the light extraction efficiency.

[0076] Furthermore, of the light LT emitted from the display element LE, the light LT emitted at a large angle with respect to the normal N of the display element LE is refracted by the lens LS and contributes to the display. Therefore, the brightness of the image displayed in the display area DA can be improved at the observation position in front of the display device DSP.

[0077] Furthermore, of the optical light LT, the reflected light Lr that is reflected by the lens LS and returns to the substrate 10 is absorbed by the second layer 23B, which functions as an optical absorption layer. This suppresses the phenomenon of unwanted reflected light Lr passing through the substrate 10 (light leakage). In addition, the propagation of unwanted reflected light Lr to the circuit layer 11 is suppressed, and malfunctions such as current leakage in the TFT caused by stray light are suppressed. Therefore, a decrease in reliability can be suppressed.

[0078] Figure 8 is a diagram illustrating an example of the use of a display device DSP.

[0079] In the illustrated example, users U1 and U2 face each other, and the display device DSP is positioned between them. When the display element LE emits display light DL toward user U1, user U1 can observe the image displayed on the display device DSP and also observe user U2 in the region TA between the second layer 23B. In addition, because the second layer 23B is light-transmitting, user U1 can observe user U2 through the second layer 23B.

[0080] If a portion of the display light DL is reflected by the lens LS, the reflected light Lr is absorbed by the second layer 23B. Therefore, the reflected light Lr is not observed by the user U2. Also, the image displayed on the display device DSP is not observed by the user U2. On the other hand, user U2 can observe user U1 in the region TA between the second layer 23B. In addition, because the second layer 23B is light-transmitting, user U2 can observe user U1 through the second layer 23B.

[0081] Thus, the display device DSP can be configured as a transparent display that displays an image in the display area DA and allows observation of the background of the display device DSP. Furthermore, light can be transmitted not only in the region between the second layer 23B which functions as a light-absorbing layer, but also in the second layer 23B, thereby improving the transmittance of the display device DSP.

[0082] In the above embodiment, the case in which an inorganic light-emitting diode is used as the display element LE was described, but it is not limited to this. For example, other display elements such as organic light-emitting diodes, or even display elements combining quantum dots, may be used as the display element LE.

[0083] As described above, according to this embodiment, it is possible to provide a display device that can suppress light leakage.

[0084] All display devices that a person skilled in the art can implement by appropriately modifying the design based on the display devices disclosed in the above embodiments also fall within the scope of the present invention insofar as they encompass the gist of the present invention.

[0085] Within the scope of the spirit of the present invention, a person skilled in the art can conceive of various modifications, and such modifications are also understood to fall within the scope of the present invention. For example, modifications made by a person skilled in the art to the above-described embodiments, such as adding, deleting, or changing the design of components, or adding, omitting, or changing the conditions of processes, are also included within the scope of the present invention, as long as they retain the gist of the present invention.

[0086] Furthermore, any other effects and benefits brought about by the embodiments described above that are obvious from the description herein or that can be appropriately conceived by those skilled in the art are naturally considered to be brought about by the present invention.

[0087] DSP...Display device DA...Display area LE1, LE2, LE3...Display elements 10...Substrate 14...Partition 20...Anode 23...Third conductive layer 23A...First layer 23B...Second layer (light absorption layer) 30...Transparent electrode (cathode) LS...Lens

Claims

1. A display device comprising: a substrate; a display element disposed above the substrate; an anode disposed between the substrate and the display element and electrically connected to the display element; a partition wall surrounding the display element; a transparent electrode disposed on the partition wall and the display element and electrically connected to the display element; and a lens disposed on the transparent electrode, overlapping the display element and having a convex surface, wherein the anode includes a conductive light-absorbing layer, and the outer edge of the light-absorbing layer is located outside the outer edge of the lens.

2. The display device according to claim 1, wherein the light-absorbing layer is made of a titanium-based material.

3. The display device according to claim 1, wherein the display element comprises an anode layer, a cathode layer facing the anode layer, and a semiconductor layer located between the anode layer and the cathode layer and including a light-emitting layer, the anode layer is electrically connected to the anode via a connecting member, and the cathode layer is in contact with the transparent electrode.

4. The display device according to claim 3, wherein the anode comprises a first conductive layer made of a titanium-based material, a second conductive layer made of an aluminum-based material disposed on the first conductive layer, a third conductive layer made of a titanium-based material disposed on the second conductive layer and including the light-absorbing layer, and a fourth conductive layer made of an oxide conductive material disposed on the third conductive layer, and the connecting member is interposed between the anode layer and the fourth conductive layer.

5. The display device according to claim 4, further comprising an inorganic insulating layer covering the peripheral edge of the laminate of the first conductive layer and the second conductive layer, wherein the peripheral edge of the third conductive layer is located on the inorganic insulating layer, and the thickness of the third conductive layer located between the inorganic insulating layer and the partition wall is smaller than the thickness of the third conductive layer located between the second conductive layer and the fourth conductive layer at the opening of the inorganic insulating layer.

6. The display device according to claim 5, wherein the third conductive layer comprises: a first layer located at the opening of the inorganic insulating layer and disposed on the second conductive layer; and a second layer disposed on the first layer and extending between the inorganic insulating layer and the partition wall, functioning as the light absorbing layer.

7. The display device according to claim 6, wherein the thickness of the second layer is 5 μm or more and 15 μm or less.

8. In a plan view, the outer edge of the second layer is located outside the outer edges of the first conductive layer, the second conductive layer, the fourth conductive layer, and the connecting member, as described in claim 6.

9. The display device according to claim 1, wherein the aperture and lens overlapping the display element in the partition wall are circular in plan view, and the diameter of the lens is greater than the diameter of the aperture.

10. A display device comprising: a substrate; a first display element and a second display element disposed above the substrate; a first anode disposed between the substrate and the first display element and electrically connected to the first display element; a second anode disposed between the substrate and the second display element and electrically connected to the second display element; a first lens overlapping the first display element; and a second lens overlapping the second display element, wherein the first anode includes a conductive first light-absorbing layer; the second anode includes a conductive second light-absorbing layer; the outer edge of the first light-absorbing layer is located outside the outer edge of the first lens in a plan view; the outer edge of the second light-absorbing layer is located outside the outer edge of the second lens in a plan view; and a light-transmitting region is formed between the first light-absorbing layer and the second light-absorbing layer.

11. The display device according to claim 10, wherein, in the direction in which the first display element and the second display element are aligned, the distance from the first light-absorbing layer to the second light-absorbing layer is greater than the distance from the outer edge of the first lens to the outer edge of the first light-absorbing layer.

12. The display device according to claim 11, wherein the distance from the outer edge of the first lens to the outer edge of the first light-absorbing layer is 5 μm or more and 10 μm or less.