Space-time compact distillation of magic states using transversal logic gates

Abstract

Methods, systems, and apparatus for predicting errors that occurred during an implementation of an error-corrected transversal CNOT gate between a first logical qubit and a second logical qubit. In one aspect, a method includes decoding first measurement data obtained from measure qubits included in the first logical qubit to detect occurrences of a first error type in the first logical qubit; decoding second measurement data from measure qubits included in the second logical qubit to detect occurrences of a second error type in the second logical qubit; copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data, comprising removing detection events in the first measurement data that correspond to the detected occurrences of the second error type; and decoding the updated first measurement data to detect occurrences of the second error type in the first logical qubit.

Description

[0001] SPACE-TIME COMPACT DISTILLATION OF MAGIC STATES USING TRANSVERSAL LOGIC GATES

[0002] BACKGROUND

[0003] This specification relates to quantum computing.

[0004] Quantum computing provides a means to solve certain problems that cannot be solved in a reasonable period of time using conventional classical computers. These problems include factoring very large numbers into their primes and searching large, unstructured data sets. A number of physical systems are being explored for their use in quantum computing, including ions, spins in semiconductors, and superconducting circuits. However, these systems do not perform sufficiently well to serve directly as computational qubits. For example, single two-state physical systems, which can be used as physical qubits, cannot reliably encode and retain information for long enough to be useful, e.g., due to noise.

[0005] Quantum error correction is a technology' that can enable a quantum computer to reliably execute a quantum algorithm despite noise afflicting its qubits. A decoder is a key component of quantum error correction schemes whose role is to identify errors faster than they accumulate in the quantum computer. The decoder takes as an input a syndrome, which is measurement data extracted from quantum parity check measurements, and returns as output an estimation of error. Given this estimation, the effect of the error can be reversed. Decoders should be implemented with minimum hardware resources in order to scale to the regime of practical applications of quantum computing.

[0006] SUMMARY

[0007] This specification describes methods, systems and apparatus for space-time compact distillation of magic states using transversal logic gates.

[0008] One innovative aspect of the subject matter described in this specification can be implemented in a method that includes predicting errors that occurred during an implementation of an error-corrected transversal CNOT gate between a first logical qubit and a second logical qubit, comprising: decoding first measurement data obtained from measure qubits included in the first logical qubit to detect occurrences of a first error type in the first logical qubit; decoding second measurement data from measure qubits included in the second logical qubit to detect occurrences of a second error type in the second logical qubit; copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data, comprising removing detection events in the firstmeasurement data that correspond to the detected occurrences of the second error type; and decoding the updated first measurement data to detect occurrences of the second error type in the first logical qubit.

[0009] Other implementations of these aspects includes corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the methods. A system of one or more classical computers can be configured to perform particular operations or actions by virtue of having software, firmware, hardware, or a combination thereof installed on the system that in operation causes or cause the system to perform the actions. One or more computer programs can be configured to perform particular operations or actions by virtue of including instructions that, when executed by data processing apparatus, cause the apparatus to perform the actions.

[0010] The foregoing and other implementations can each optionally include one or more of the following features, alone or in combination. In some implementations the first error type comprises bit flip errors.

[0011] In some implementations the second error type comprises phase flip errors.

[0012] In some implementations the first logical qubit acts as a control for the transversal CNOT gate.

[0013] In some implementations copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data comprises, for each detected occurrence of an error of the second error type: selecting, in a quantum circuit that implements the error-corrected transversal CNOT gate, a location of a correction operation for the error; identifying measurement operations that occur in the quantum circuit after the selected location and are dependent on the correction operation; and adjusting measurement results in the first measurement data that correspond to the identified measurement operations.

[0014] In some implementations selecting a location of the correction operation for the error comprises selecting a location in the quantum circuit such that application of the correction operation at the location corrects one or more operations in the quantum circuit that are subsequent to a location of the error.

[0015] In some implementations the first error type comprises bit flip errors and adjusting the measurement results in the first measurement data that correspond to the identified measurement operations comprises flipping the measurement results.

[0016] In some implementations the first error type comprises phase flip errors and adjusting the measurement results in the first measurement data that correspond to the identifiedmeasurement operations comprises changing signs of measurement results that correspond to a one-state.

[0017] In some implementations the identified measurement operations comprise measurement operations performed on measure qubits included in the first logical qubit, measurement operations performed on measure qubits included in the second logical qubit, or measurement operations performed on measure qubits included in both the first logical qubit and the second logical qubit.

[0018] In some implementations the method further includes copying detected occurrences of the first error type to the second measurement data to generate updated second measurement data, comprising removing detection events in the second measurement data that correspond to the detected occurrences of the first error type; and decoding the updated second measurement data to detect occurrences of the first error type in the second logical qubit.

[0019] In some implementations copying detected occurrences of the first error type to the second measurement data to generate updated second measurement data comprises, for each detected occurrence of an error of the first error type: selecting, in a quantum circuit that implements the error-corrected transversal CNOT gate, a location of a correction operation for the error; identifying measurement operations that occur in the quantum circuit after the selected location and are dependent on the correction operation; and adjusting measurement results in the second measurement data that correspond to the identified measurement operations.

[0020] In some implementations selecting a location of the correction operation for the error comprises selecting a location in the quantum circuit such that application of the correction operation at the location corrects one or more operations in the quantum circuit that are subsequent to a location of the error.

[0021] In some implementations the first error type comprises bit flip errors and adjusting the measurement results in the second measurement data that correspond to the identified measurement operations comprises flipping the measurement results.

[0022] In some implementations the first error type comprises phase flip errors and adj usting the measurement results in the second measurement data that correspond to the identified measurement operations comprises changing signs of measurement results that correspond to a one-state.

[0023] In some implementations the identified measurement operations comprise measurement operations performed on measure qubits included in the first logical qubit, measurement operations performed on measure qubits included in the second logical qubit, ormeasurement operations performed on measure qubits included in both the first logical qubit and the second logical qubit.

[0024] In some implementations the method further comprises correcting the errors that occurred during the implementation of the transversal CNOT gate.

[0025] Another innovative aspect of the subject matter described in this specification can be implemented in a method that includes obtaining measurement data from a quantum computer that performs a transversal CNOT gate on a first logical qubit and a second logical qubit; executing a decoding process on a detector graph using the measurement data to predict occurrences of either bit flip or phase flip errors, wherein transversal the detector graph comprises a plane between one or more edges that represents the transversal CNOT gate; during the decoding process, monitoring the detector graph to determine whether a first seed on a first side of the plane and a second seed on the other side of the plane become connected by an edge; and in response to determining that two seeds on either side of the plane become connected by an edge, removing copy errors from the measurement data.

[0026] Other implementations of these aspects includes corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the methods. A system of one or more classical computers can be configured to perform particular operations or actions by virtue of having software, firmware, hardware, or a combination thereof installed on the system that in operation causes or cause the system to perform the actions. One or more computer programs can be configured to perform particular operations or actions by virtue of including instructions that, when executed by data processing apparatus, cause the apparatus to perform the actions.

[0027] The foregoing and other implementations can each optionally include one or more of the following features, alone or in combination. The decoding process can include a MWPM decoding process. Removing the copy errors from the measurement data can generate updated measurement data, and the method can include correcting errors that occurred during the implementation of the transversal CNOT gate using the updated measurement data. Removing the copy errors from the measurement data can include adding or removing a new seed from the detector graph.

[0028] The subject matter described in this specification can be implemented in particular ways so as to realize one or more of the following advantages.

[0029] Examples of the presently described techniques remove spurious detection events in measurement data generated by a quantum computing device, which can improve theaccuracy of error detection and correction. This, in turn, can improve the accuracy of quantum computations performed by the quantum computing device.

[0030] Further, examples of the presently described techniques can be integrated into a practical application - fault tolerant quantum computing devices. The Clifford gate set {CNOT, H, S} and the non-Clifford T gate is sufficient for universal quantum computation. However, it is challenging to directly implement T gates on logical qubits. In a fault tolerant quantum computer, low error rate T states are produced using a T state distillation factory (referred to herein as a T factory). Producing a T state using a T factory typically involves a sequence of rounds of state distillation, where each round takes as input multiple noisy T states encoded in a small distance code, processes the noisy T states through application of an appropriate T factory circuit, and outputs fewer, less noisy T states encoded in a larger distance code.

[0031] T factory circuits are typically structured such that one type of qubit is consistently used as a target qubit in a two qubit gate, e.g., a CNOT gate, and another type of qubit is consistently used as a control. Therefore, examples of the presently described techniques can be particularly beneficial in such applications since it is possible to identify a clear dependency chain of merged / copied errors.

[0032] The details of one or more implementations of the subject matter of this specification are set forth in the accompanying drawings and the description below. Other features, aspects, and advantages of the subject matter will become apparent from the description, the drawings, and the claims.

[0033] BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of an example computing system.

[0034] FIG. 2 is a flowchart of an example process for detecting errors that occur in one or more logical qubits.

[0035] FIGS. 3A-E are circuit diagrams that show example operations for detecting errors that occur in a first logical qubit and second logical qubit.

[0036] FIG. 4 is a flowchart of another example process for detecting errors that occur in one or more logical qubits.

[0037] FIG. 5 depicts an example classical / quantum computer.

[0038] Like reference numbers and designations in the various drawings indicate like elements.DETAILED DESCRIPTION

[0039] In quantum error correction, a decoder processes measurement data received from a quantum computing device to decode the measurement data, i.e., predict which errors may have occurred during a quantum computation performed by the quantum computing device. To process the measurement data, the decoder can execute a decoding algorithm that maps the decoding problem onto a graph problem using a graph-like error model for the quantum error correcting code. A graph-like error model is an independent error model, i.e., a set of multiple independent error mechanisms, where each error mechanism occurs with a respective probability and flips a set of detectors and observables. For example, when the quantum error correction code is a surface code, a graph-like error model can be used to approximate X-type (bit flip) and Z-type (phase flip) Pauli errors.

[0040] In the absence of transversal logical gates, X-type and Z-type errors that occur in a logical qubit are generally well-represented by respective detection events in the measurement data obtained from the logical qubit. However, in the presence of transversal logical gates. X-type and Z-type errors can get copied from one logical qubit to another, which causes spurious detection events in the measurement data.

[0041] For example, the transversal logical gates of the surface code include transversal CNOT gates. A transversal CNOT gate is a logical gate that is applied between two logical qubits and corresponds to multiple CNOT gates that are applied between respective pairs of qubits from each logical qubit. Errors can propagate through CNOT gates as follows: an X-type error on the control qubit can propagate to the target qubit and a Z-type error on a target qubit can propagate to the control qubit. Therefore, when a transversal CNOT gate is performed between two logical qubits (say, a left logical qubit and a right logical qubit where the left logical qubit is the control qubit and the right logical qubit is the target qubit), X-type errors can propagate (get copied) from left to right and Z-type errors can propagate from right to left.

[0042] This propagation of errors creates spurious detection events in the measurement data, suggesting that a large number of errors occurred in each logical qubit. In some cases a chain of errors could form on one of the logical qubits, causing a logical error. However, since many of the errors are copies and not real errors, an error correction operation resulting from processing the measurement data could be inaccurate.

[0043] This specification describes methods and systems for tracking errors in a surface code such that spurious detection events that were created by copying errors can be removed,enabling dense transversal logical CNOT circuits to be implemented without extensive interspersed error correction. The methods are implemented by the classical decoding software. In some implementations, X and Z type errors are detected consecutively after application of a transversal CNOT gate, where a second error type is detected after first error ty pes are detected, and copy errors have been identified and removed from the detection events. In other implementations, X and Z t pe errors are detected at the same time, and iteratively eliminates copy errors as time progresses.

[0044] FIG. 1 is a block diagram of an example computing system 100. The example computing system 100 is an example of a system implemented as classical and quantum computer programs on one or more classical computers and quantum computing devices in one or more locations, in which the systems, components, and techniques described herein can be implemented.

[0045] The example computing system 100 includes a quantum computing device 102 and a classical processor 104. For illustrative purposes, the quantum computing device 102 and classical processor 104 shown in FIG. 1 are illustrated as separate entities, however in some implementations the classical processor 104 may be included in the quantum computing device 102. For example, in some implementations the quantum computing device 102 can be directly connected to the classical processor 104. In other implementations, the quantum computing system 102 can be connected to the classical processor 104 through a network, e.g., a local area network (LAN), wide area network (WAN), the Internet, or a combination thereof.

[0046] The quantum computing device 102 includes components for performing quantum computation. For example, the quantum computing device 102 can include a quantum data plane that, in turn, includes multiple physical qubits, a control and measurement plane that is configure to perform operations and measurements on the physical qubits, a control processor plane that is configured to determine sequences of operations and measurements that a quantum algorithm being performed by the quantum computing system requires, and a classical computer that is in data communication with the control processor and facilitates user interactions and access to networks or storage. The particular type of the quantum computing device 102 can depend on the type of qubit used. In some implementations the qubits can be superconducting qubits, semiconducting qubits, photonic qubits, or atom-based qubits. For example, the qubits can include Xmon qubits, flux qubits, phase qubits. CAT qubits, or qubits with frequency interactions.Typically, quantum computations performed by the quantum computing device 102 will be noisy due to the unavoidable presence of errors caused by, e.g., unwanted interactions between qubits, unwanted interactions with the environment (causing decoherence), faulty quantum gates or operations, or errors in the state preparation or measurement process.

[0047] Example types of errors include coherent errors that act on single qubits, e.g., Pauli X-type errors called bit-flip errors that map the qubit basis states X|0) = | 1) and | 1) = |0) and Pauli-Z errors called phase-flip errors that map the qubit basis states Z 10) = |0) and Z\ 1) = — 11). Noise in a quantum computing device can be represented by an error model, e.g., independent error models as described in more detail below. If left unchecked, errors can destroy quantum information and render quantum computations performed by the quantum computing device 102 useless.

[0048] Therefore, the quantum computing device 102 can be configured to execute a quantum error correcting code 106 when performing quantum computations. Quantum error correcting codes encode a first number k of qubits (a Hilbert space of dimension 2k ) into a second number n of qubits (a Hilbert space of dimension 2n ), where the second number is larger than the first number, i.e., n > k. The k qubits are data qubits that store logical information and are to be protected from error. The additional n — k qubits are ancilla qubits that are used to detect errors. Example quantum error correcting codes include Stabilizer codes, e.g.. the surface code 108.

[0049] The surface code 108 encodes a logical qubit into a patch of multiple physical qubits on a lattice, e.g., a square or hex grid. The lattice includes alternating data qubits and ancilla qubits, where a qubit is placed on each edge of the lattice. The code is defined to be the ground space of the Hamiltonian H = — Xvev v ~Z ' feF Zf where V represents vertices of the lattice, F represents faces defined by edges connecting vertices of the lattice, the operator Xvis associated with vertex v and is a product of Pauli-X matrices acting on edges incident to v, and the operator Zf is associated with face f and is a product of Pauli-Z matrices acting on all edges of f. The code space is defined as the simultaneous “+1” eigenstate of the operators Xvand Z . These operators (or products of these operators) are called the stabilizers of the code.

[0050] During execution of the quantum error correcting code 106, the quantum computing device 102 is configured to provide measurement data 110 to the classical processor 104. The measurement data 110 can be received as a batch or stream of data. The measurement data 110 includes classical measurement outcome bits, e.g., corresponding to stabilizermeasurements. In the present disclosure, a detector is a set of measurement outcome bits with deterministic parity in the absence of errors. Detection events are detectors with unexpected parity (where the parity that is unexpected can be even (0) or odd (1)). The outcome of a detector measurement is unexpected if the observed parity differs from the expected parity for a noiseless computation. A set of detection events is a syndrome cr, which can be used to determine a correction operator that, when applied to the code, corrects the error up to a stabilizer. A logical observable is a linear combination of measurement bits, whose outcome corresponds to the measurement of a logical Pauli operator.

[0051] The classical processor 104 includes components for performing classical computations. For example, the classical processor 104 can be implemented as one or more computer programs, i.e., one or more modules of computer program instructions encoded on a tangible non-transitory storage medium for execution by, or to control the operation of, a data processing apparatus. The computer storage medium can be a machine-readable storage device, a machine-readable storage substrate, a random or serial access memory' device, or a combination of one or more of them.

[0052] The classical processor 104 includes a decoder 112 that is configured to process measurement data 110 received from the quantum computing device 102 to decode the measurement data, i.e., predict which errors may have occurred during the quantum computation performed by the quantum computing device 102. To process the measurement data 110. the decoder 104 is configured to execute a decoding algorithm 114 (also referred to herein as a decoding process) that maps the decoding problem onto a graph problem using a graph-like error model for the quantum error correcting code 106.

[0053] A graph-like error model is an independent error model, i.e., a set of m independent error mechanisms, where error mechanism i occurs with probability p[t] (where p E Ukmis a vector of priors), and flips a set of detectors and observables. In a graph-like error model, each error mechanism flips at most two detectors. Graph-like error models can be used to approximate common noise models for many important classes of quantum error correction codes including surface codes, for which X-type and Z-type Pauli errors are both graph-like.

[0054] A graph-like error model is represented by a detector graph of nodes and edges G = (V, E), e.g., detector graph 116. Each node v E V in the detector graph corresponds to a detector. Each edge e E E is a set of detector nodes of cardinality one or two representing an error mechanism that flips this set of detectors. The set of edges E can be decomposed as E = U E2where for each edge e in E . |e| = 1 and for each edge e in E2, |e| = 2. A regularedge e — (u, v) E E2flips a pair of detectors u, v E V, whereas a half-edge (u, ) E E1flips a single detector u E V. A half-edge can be connected to a boundary of the detector graph , in which case the edge can be defined as (u, vbwhere vbis a virtual boundary node (which does not correspond to any detector). In some implementations, e.g., when the graph problem is solved using minimum weight perfect matching, each edge can be assigned a weight, e.g., w(e = log(l — p[i]) / p[i]. Each edge can also be labelled with a set of logical observables that are flipped (also referred to herein as “crossed”, since when an edge is crossed and therefore included in matching, its annotated observable is flipped which inverts the corresponding prediction) by the error mechanism, which is denoted either by / (e or l(u, v) for e,- = (u,, v) E E. The distance D(u, v) between two nodes u and v in the detector graph is equal to the length of the shortest path between them.

[0055] One example decoding algorithms includes minimum weight perfect matching (MWPM). MWPM decoding processes determine a most probable physical error consistent with syndromes in the measurement data. Detection events in measurement data are identified and labelled in the detector graph. A minimum weight embedded matching of the detection events in the detector graph is then determined, w here an embedded matching of a set of detection events is a set of edges in the detector graph w here each node corresponding to a detection event in the set of detection events is incident to an odd number of edges in the set of edges and each node that does not correspond to a detection event in the set of detection events is incident to an even number of edges in the set of edges. In conventional implementations of MWPM decoding processes, Edmond’s blossom algorithm is used to determine the embedded matching, e.g., by seeding clusters of nodes in the detector graph using the detection events and growing, shrinking, or freezing the clusters until the minimum weight embedded matching is obtained. The embedded matching is used to determine a prediction of which logical observable measurements were flipped, which can in turn be used to determine a correction operator that, when applied to the quantum error correcting code 106, corrects the errors.

[0056] Example operations performed by the decoder 112 are described in more detail below with reference to FIGS. 2-4.

[0057] After the decoder 112 has completed the decoding process 114, the classical processor 104 is configured to output a correction operator 118. The correction operator 118 can be applied to the quantum error correcting code 106 to correct the errors identified by the decoder 112.FIG. 2 is a flowchart of an example process 200 for detecting errors that occur in one or more logical qubits. For convenience, the process 200 will be described as being performed by components of a classical computing system. For example, a classical decoder, e.g., decoder 112 of FIG. 1, appropriately programmed, can perform example process 200.

[0058] The system predicts errors that occurred during an error corrected implementation of a transversal CNOT gate between a first logical qubit and a second logical qubit (step 202). The system decodes first measurement data obtained from measure qubits included in the first logical qubit to detect occurrences of a first error type in the first logical qubit (step 202a). In some implementations the first error type can be bit flip errors. The system then decodes second measurement data from measure qubits included in the second logical qubit to detect occurrences of a second error type in the second logical qubit (step 202b). In some implementations the second error type can be phase flip errors.

[0059] The system copies detected occurrences of the second error type to the first measurement data to generate updated first measurement data (step 202c). To copy detected occurrences of the second error type to the first measurement data to generate updated first measurement data, the system performs the following steps for each detected occurrence of an error of the second error type. The system selects a location (in a quantum circuit that implements the error-corrected transversal CNOT gate) of a correction operation for the error. The location is selected such that application of the correction operation at the location corrects one or more operations in the quantum circuit that are subsequent to a location of the error.

[0060] The system then identifies measurement operations that occur in the quantum circuit after the selected location and are dependent on the correction operation. The identified measurement operations can include measurement operations performed on measure qubits included in the first logical qubit, measurement operations performed on measure qubits included in the second logical qubit, or measurement operations performed on measure qubits included in both the first logical qubit and the second logical qubit.

[0061] The system then adjusts measurement results in the first measurement data that correspond to the identified measurement operations. For example, in cases where the first error type is bit flip errors, the system flips the measurement results. In cases where the first error type is phase flip errors, the system changes the signs of measurement results that correspond to a one-state.The system copies detected occurrences of the first error type to the second measurement data to generate updated second measurement data (step 202d). Step 202d is similar to step 202c described above, and details are not repeated.

[0062] After steps 202c and 202d have been completed, detection events in the first measurement data that correspond to the detected occurrences of the second error ty pe in the second logical qubit and detection events in the second measurement data that correspond to the detected occurrences of the first error type in the first logical qubit will have been removed.

[0063] The system decodes the updated first measurement data to detect occurrences of the second error type in the first logical qubit (step 202e). In addition, the system decodes the updated second measurement data to detect occurrences of the first error type in the second logical qubit (step 2021).

[0064] The system corrects the predicted errors that occurred during the implementation of the transversal CNOT gate (step 204).

[0065] Example process 200 can be applied to logical qubits of varying size. Different decoding algorithms can be used at steps 202a and 202b. Example process 200 is low in computational complexity and cost, and is particularly beneficial for quantum circuits where every' logical qubit has at least one ty pe of error that can be decoded with a predetermined target confidence (i.e., when the structure of the quantum circuit does not wait on information from the decoder to shape it).

[0066] FIGS. 3A-E are circuit diagrams that show example operations for detecting errors that occur in a first logical qubit and second logical qubit. In each of FIGS. 3A-E, the upper horizontal lines represent qubits in a first logical qubit 300. The qubits include data qubits, e.g., qubits 300a-c, and measure qubits, e.g., 300d-e. Similarly, the lower horizontal lines represent qubits in a second logical qubit 302. The qubits include data qubits, e.g., qubits 302a-c, and measure qubits, e.g., 302d-e. For convenience, both the first logical qubit 300 and the second logical qubit 302 are shown as each including three data qubits and two measure qubits. However, this is for illustrative purposes only and the number of data qubits and measure qubits included in the first logical qubit and the second logical qubit can vary.

[0067] The quantum circuit shown in each of FIGS. 3A-E implements an error corrected transversal CNOT gate 304, where the first logical qubit acts as a control for the transversal CNOT gate. The transversal CNOT gate 304 includes a CNOT gate between respective pairs of data qubits, where each pair includes a qubit from the first logical qubit and a qubit fromthe second logical qubit. Error detection (which enables subsequent error correction) is performed through multiple error correcting code cycles, e.g.. surface code cycles. Each cycle includes a sequence of operations that are performed on a respective measure qubit and data qubits to which the measure qubit is coupled to. For example, as shown in FIG. 3A, the sequence of operations 306 correspond to a surface code cycle for measure qubit 302e. The sequence of operations 306 includes a reset operation that is applied to put the measure qubit in the zero state, entangling operations (CNOT gates) that are applied to the measure qubit 302e and data qubits 302b and 302c, and a measurement operation that produces a respective measurement result. As shown, the error correcting code cycles are performed at regular intervals before and after the transversal CNOT operation 304.

[0068] As described above with reference to FIG. 1, the operations performed by the quantum circuit shown in each of FIGS. 3A-E will be noisy due to the unavoidable presence of errors. As a non-limiting example, FIG. 3 A shows that four errors 308a-d could occur at various locations in the quantum circuit. In this example it is assumed that the errors are X-type errors.

[0069] After a decoding process is applied to measurement results obtained from the first logical qubit 300, a classical decoder can determine / predict areas of the quantum circuit at which an error could have occurred. For example, referring to FIG. 3B, the decoder could determine that error 308a occurred somewhere along line 310a. Similarly, the decoder could determine that error 308b occurred somewhere along line 310b. Generally, the determination / predictions made by the decoder will depend on the decoding process it implements and can vary.

[0070] Then, referring to FIG. 3C. the decoder can select appropriate locations for correction operations. For example, the decoder can determine that location 312a is a suitable location for a correction operation to correct detected error 308a. Similarly, the decoder can determine that location 312b is a suitable location for a correction operation to correct detected error 308b. Again, generally, different locations for correction operations can be selected based on the decoding process implemented by the decoder.

[0071] The decoder can then model the propagation of the correction operations at the selected locations, to determine which measurement operations could be affected by the correction operations. For example, implementing correction operation 312a would affect measurement operations 314a, 314b, 314c, 314d, 314e, 314f, 314g, 314h, 314i, 314j. 314k, and 3141. Implementing correction operation 312b would affect measurement operations 314g and 314h. The decoder then adjusts measurement results produced by the affectedmeasurement operations based on the model of the propagation of the correction operations at the selected locations. In the example shown in FIGS. 3A-E, this includes flipping measurement results. In FIG. 3C, flipped measurement results correspond to the highlighted measurement operations. It is noted that, since measurement operations 314g and 314h would be affected by both of the correction operations 312a and 312b, the measurement results of these operations are not highlighted, since they have been flipped twice.

[0072] In FIG. 3D. the decoder repeats the above described process on the second logical qubit 302. After a decoding process is applied to measurement results obtained from the second logical qubit 302, the decoder determines that location 316a is a suitable location for a correction operation to correct detected error 308c. Similarly, the decoder can determine that location 316b is a suitable location for a correction operation to correct detected error 308d. Again, generally, different locations for correction operations can be selected based on the decoding process implemented by the decoder.

[0073] In FIG. 3E, the decoder models the propagation of the correction operations at the selected locations, to determine which measurement operations could be affected by the correction operations. For example, implementing correction operation 316a would affect measurement operations 320a, 320b, 314i, 314k, 314j, and 3141. Implementing correction operation 316b would affect measurement operations 314k and 3141. The decoder then adjusts measurement results produced by the affected measurement operations based on the model of the propagation of the correction operations at the selected locations. Again, in the example shown in FIGS. 3A-E, this includes flipping measurement results. In FIG. 3E, flipped measurement results correspond to the highlighted measurement operations. It is noted that, since measurement operations 314i and 314j would be affected by both of the correction operations 312a and 316a, the measurement results of these operations are not highlighted, since they have been flipped twice. Further, since measurement operations 314k and 3141 would be affected by correction operations 312a, 316a, and 316b, the measurement results of these operations are highlighted, since they have been flipped three times.

[0074] FIG. 4 is a flowchart of another example process 400 for detecting errors that occur in one or more logical qubits. For convenience, the process 400 will be described as being performed by components of a classical computing system. For example, a classical decoder, e.g., decoder 112 of FIG. 1, appropriately programmed, can perform example process 400.

[0075] The system obtains measurement data from a quantum computer that performs a transversal CNOT gate on a first logical qubit and a second logical qubit (step 402). Thesystem executes a decoding process, e.g., MWPM, on a detector graph using the measurement data to predict occurrences of either bit flip or phase flip errors, where the detector graph includes a plane between one or more edges that represents the transversal CNOT gate (step 404). During the decoding process, the system monitors the detector graph to determine whether a first seed on a first side of the plane and a second seed on the other side of the plane become connected by an edge (step 406). In response to determining that two seeds on either side of the plane become connected by an edge, the system removes copy errors from the measurement data (step 408).

[0076] Examples of example process 400 detects bit flip or phase flip errors at the same time, and iteratively eliminates copy errors as time progresses. In a first iteration (or a predetermined number of first iterations) the system estimates or models where errors could have copied or merged during implementation of the transversal CNOT gate, accepting that the estimation may not be accurate (as in example process 200, where multiple rounds of error detection are performed around the transversal CNOT gate and error correction is completed past the transversal CNOT gate so that it can be determined which bit flips or phase flips have occurred). However, the estimate or model is iteratively updated and corrected as more information (measurement data) from the logical qubits is obtained.

[0077] Unlike example process 200, this method can be implemented directed in a decoder, e.g., a minimum-weight perfect matching (MWPM) decoder such as a so-called blossom or sparse blossom decoder. In a MWPM decoder a current best guess of error propagation at any given time during the computation is described by paths of matched edges in the underling detector graph. Each detection event in the measurement data plants a seed in the graph, and regions of the detector graph pair with other regions causing some regions to grow. This information - where and how the seeds are planted and pair up - can be used to estimate / model copy errors.

[0078] In particular, a seed on one side of a CNOT gate that pairs up with a seed on the other side of the CNOT gate, could trigger a copy error alert since a path in the graph that travels through the plane that represents the CNOT gate represents a copied error. In response to the trigger, anew seed could be added or removed from the graph (and the detector regions updated accordingly.)

[0079] As described above, example process 200 and 400 can be applied to T factories. Consider a short distillation circuit with all qubits needing a T gate at the end and this in turn requiring classical processing to determine if an S gate is required before measurement sincethe T gates are probabilistic even in the absence of errors. Classical processing would need to be completed before the final measurement.

[0080] As discussed above, examples of example process 200 waits until complete knowledge of certain types of errors in certain parts of the circuits is obtained - those types that can be decoded with (near) certainty first. These errors are then propagated and a final, second pass of decoding is performed. This process is potentially high latency as by waiting for the complete knowledge may be a backlog of processing to perform. In example process 400, the complete knowledge is not obtained, since the circuit cannot be completed without decoding partially in providing feedback to shape the final structure of the circuit, so example process 200 may not be applicable.

[0081] Using example process 400 would therefore be possible. Here, available data is decoded before and after the transversal circuit. Initially, everything after the transversal gates could be more or less random, but the decoding before the transversal gates will be high quality. The Pauli frame expected to be present just before the transversal gates can be propagated through to eliminate detection events after these transversal gates. The process then can be iterated potentially many times until no new detection events are eliminated. The data needed to determine whether S gates are needed or not is then obtained and the implementation of the circuit can proceed. In this case, example process 400 can be favorable, and for architectures where the surface code cycle time is larger, the classical processing should be possible to complete with negligible delay of the quantum hardware.

[0082] FIG. 5 depicts an example classical / quantum computer 500 for performing some or all of the classical and quantum operations described in this specification. The example classical / quantum computer 500 includes an example quantum computing device 502. The quantum computing device 502 is intended to represent various forms of quantum computing devices. The components shown here, their connections and relationships, and their functions, are exemplary only, and do not limit implementations of the inventions described and / or claimed in this document.

[0083] The example quantum computing device 502 includes a qubit assembly 552 and a control and measurement system 504. The qubit assembly includes multiple qubits, e.g., qubit 506, that are used to perform algorithmic operations or quantum computations. While the qubits shown in FIG. 5 are arranged in a rectangular array, this is a schematic depiction and is not intended to be limiting. The qubits can also be arrange in other forms, e.g., in a line. The qubit assembly 552 also includes adjustable coupling elements, e.g., coupler 508, that allowfor interactions between coupled qubits. In the schematic depiction of FIG. 5, each qubit is adjustably coupled to each of its four adjacent qubits by means of respective coupling elements. However, this is an example arrangement of qubits and couplers and other arrangements are possible, including arrangements that are non-rectangular, arrangements that allow for coupling between non-adjacent qubits, and arrangements that include adjustable coupling between more than two qubits.

[0084] Each qubit can be a physical two-level quantum system or device having levels representing logical values of 0 and 1. The specific physical realization of the multiple qubits and how they interact with one another is dependent on a variety of factors including the type of the quantum computing device 502 included in the example computer 500 or the type of quantum computations that the quantum computing device is performing. For example, in an atomic quantum computer the qubits may be realized via atomic, molecular or solid-state quantum systems, e.g., hyperfine atomic states. As another example, in a superconducting quantum computer the qubits may be realized via superconducting qubits or semi-conducting qubits, e.g., superconducting transmon states. As another example, in aNMR quantum computer the qubits may be realized via nuclear spin states.

[0085] In some implementations a quantum computation can proceed by loading qubits, e.g., from a quantum memory', and applying a sequence of unitary' operators to the qubits.

[0086] Applying a unitary operator to the qubits can include applying a corresponding sequence of quantum logic gates to the qubits, e.g., to implement a quantum algorithm such as a quantum principle component algorithm. Example quantum logic gates include single-qubit gates, e.g., Pauli-X, Pauli-Y, Pauli-Z (also referred to as X, Y, Z), Hadamard gates, S gates, rotations, two-qubit gates, e.g., controlled-X, controlled-Y, controlled-Z (also referred to as CX, CY, CZ), controlled NOT gates (also referred to as CNOT) controlled swap gates (also referred to as CSWAP), and gates involving three or more qubits, e.g., Toffoli gates. The quantum logic gates can be implemented by applying control signals 510 generated by the control and measurement system 504 to the qubits and to the couplers.

[0087] For example, in some implementations the qubits in the qubit assembly 552 can be frequency tunable. In these examples, each qubit can have associated operating frequencies that can be adjusted through application of voltage pulses via one or more drive-lines coupled to the qubit. Example operating frequencies include qubit idling frequencies, qubit interaction frequencies, and qubit readout frequencies. Different frequencies correspond to different operations that the qubit can perform. For example, setting the operating frequency to a corresponding idling frequency may put the qubit into a state where it does not stronglyinteract with other qubits, and where it may be used to perform single-qubit gates. As another example, in cases where qubits interact via couplers with fixed coupling, qubits can be configured to interact with one another by setting their respective operating frequencies at some gate-dependent frequency detuning from their common interaction frequency. In other cases, e.g., when the qubits interact via tunable couplers, qubits can be configured to interact with one another by setting the parameters of their respective couplers to enable interactions between the qubits and then by setting the qubit’ s respective operating frequencies at some gate-dependent frequency detuning from their common interaction frequency. Such interactions may be performed in order to perform multi-qubit gates.

[0088] The type of control signals 510 used depends on the physical realizations of the qubits. For example, the control signals may include RF or microwave pulses in an NMR or superconducting quantum computer system, or optical pulses in an atomic quantum computer system.

[0089] A quantum computation can be completed by measuring the states of the qubits, e.g., using a quantum observable such as X or Z, using respective control signals 510. The measurements cause readout signals 512 representing measurement results to be communicated back to the measurement and control system 504. The readout signals 512 may include RF, microwave, or optical signals depending on the physical scheme for the quantum computing device and / or the qubits. For convenience, the control signals 510 and readout signals 512 shown in FIG. 5 are depicted as addressing only selected elements of the qubit assembly (i.e. the top and bottom rows), but during operation the control signals 510 and readout signals 512 can address each element in the qubit assembly 552.

[0090] The control and measurement system 504 is an example of a classical computer system that can be used to perform various operations on the qubit assembly 552, as described above, as well as other classical subroutines or computations. The control and measurement system 504 includes one or more classical processors, e.g., classical processor 514, one or more memories, e.g., memory 516, and one or more I / O units, e.g., I / O unit 518, connected by one or more data buses. The control and measurement system 504 can be programmed to send sequences of control signals 510 to the qubit assembly, e.g. to carry out a selected series of quantum gate operations, and to receive sequences of readout signals 512 from the qubit assembly, e.g. as part of performing measurement operations.

[0091] The processor 514 is configured to process instructions for execution within the control and measurement system 504. In some implementations, the processor 514 is asingle-threaded processor. In other implementations, the processor 514 is a multi-threaded processor. The processor 514 is capable of processing instructions stored in the memory 516.

[0092] The memory 516 stores information within the control and measurement system 504. In some implementations, the memory 516 includes a computer-readable medium, a volatile memory unit, and / or a non-volatile memory unit. In some cases, the memory 516 can include storage devices capable of providing mass storage for the system 504, e.g. a hard disk device, an optical disk device, a storage device that is shared over a network by multiple computing devices (e g., a cloud storage device), and / or some other large capacity storage device.

[0093] The input / output device 518 provides input / output operations for the control and measurement system 504. The input / output device 518 can include D / A converters, A / D converters, and RF / microwave / optical signal generators, transmitters, and receivers, whereby to send control signals 510 to and receive readout signals 512 from the qubit assembly, as appropriate for the physical scheme for the quantum computer. In some implementations, the input / output device 518 can also include one or more network interface devices, e.g., an Ethernet card, a serial communication device, e.g., an RS-232 port, and / or a wireless interface device, e.g., an 802.11 card. In some implementations, the input / output device 518 can include driver devices configured to receive input data and send output data to other external devices, e.g., keyboard, printer and display devices.

[0094] Although an example control and measurement system 504 has been depicted in FIG.

[0095] 5, implementations of the subject matter and the functional operations described in this specification can be implemented in other ty pes of digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them.

[0096] Embodiments and all of the functional operations described in this specification may be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Embodiments may be implemented as one or more computer program products, i. e.. one or more modules of computer program instructions encoded on a computer readable medium for execution by. or to control the operation of, data processing apparatus. The computer readable medium may7be a machine-readable storage device, a machine-readable storage substrate, a memory7device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term "data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmableprocessor, a computer, or multiple processors or computers. The apparatus may include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal that is generated to encode information for transmission to suitable receiver apparatus.

[0097] A computer program (also known as a program, softw are, software application, script, or code) may be w ritten in any form of programming language, including compiled or interpreted languages, and it may be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program may be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program may be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication netw ork.

[0098] The processes and logic flows described in this specification may be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows may also be performed by, and apparatus may also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

[0099] Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory’ or both.

[0100] The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g.. magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Moreover, a computer may be embedded in another device, e.g. , a tablet computer, a mobile telephone, a personal digitalassistant (PDA), a mobile audio player, a Global Positioning System (GPS) receiver, to name just a few. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and CD ROM and DVD-ROM disks. The processor and the memory may be supplemented by. or incorporated in, special purpose logic circuitry.

[0101] To provide for interaction with a user, embodiments may be implemented on a computer having a display device, e.g., a CRT (cathode ray tube) or LCD (liquid cry stal display) monitor, for displaying information to the user and a keyboard and a pointing device, e.g., a mouse or a trackball, by which the user may provide input to the computer. Other kinds of devices may be used to provide for interaction with a user as well; for example, feedback provided to the user may be any form of sensory' feedback, e.g., visual feedback, auditory7feedback, or tactile feedback; and input from the user may be received in any form, including acoustic, speech, or tactile input.

[0102] Embodiments may be implemented in a computing system that includes a back end component, e.g, as a data server, or that includes a middleware component, e.g., an application server, or that includes a front end component, e.g., a client computer having a graphical user interface or a Web browser through which a user may interact with an implementation, or any’ combination of one or more such back end. middleware, or front end components. The components of the system may be interconnected by any form or medium of digital data communication, e.g., a communication network. Examples of communication networks include a local area network ("LAN") and a wide area network ("WAN"), e.g. , the Internet.

[0103] The computing system may include clients and servers. A client and server are generally7remote from each other and typically interact through a communication network. The relationship of client and server arises by virtue of computer programs running on the respective computers and having a client-server relationship to each other.

[0104] While this specification contains many specifics, these should not be construed as limitations on the scope of the disclosure or of what may be claimed, but rather as descriptions of features specific to particular embodiments. Certain features that are described in this specification in the context of separate embodiments may also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment may also be implemented in multiple embodimentsseparately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination may in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.

[0105] Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. In certain circumstances, multitasking and parallel processing may be advantageous. Moreover, the separation of various system components in the embodiments described above should not be understood as requiring such separation in all embodiments, and it should be understood that the described program components and systems may generally be integrated together in a single software product or packaged into multiple software products.

[0106] In each instance where an HTML file is mentioned, other file types or formats may be substituted. For instance, an HTML file may be replaced by an XML, JSON. plain text, or other types of files. Moreover, where a table or hash table is mentioned, other data structures (such as spreadsheets, relational databases, or structured files) may be used.

[0107] Thus, particular embodiments have been described. Other embodiments are within the scope of the following claims. For example, the actions recited in the claims may be performed in a different order and still achieve desirable results.

[0108] What is claimed is:

Claims

CLAIMS1. A computer implemented method comprising:predicting errors that occurred during an implementation of an error-corrected transversal CNOT gate between a first logical qubit and a second logical qubit, comprising:decoding first measurement data obtained from measure qubits included in the first logical qubit to detect occurrences of a first error type in the first logical qubit;decoding second measurement data from measure qubits included in the second logical qubit to detect occurrences of a second error type in the second logical qubit, wherein the second error t pe is different from the first error type;copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data, comprising removing detection events in the first measurement data that correspond to the detected occurrences of the second error type; anddecoding the updated first measurement data to detect occurrences of the second error type in the first logical qubit.

2. The method of claim 1 , wherein the first error type comprises bit flip errors.

3. The method of claim 1 or claim 2, wherein the second error type comprises phase flip errors.

4. The method of any preceding claim, wherein the first logical qubit acts as a control for the transversal CNOT gate.

5. The method of any preceding claim, wherein copying detected occurrences of the second error type to the first measurement data to generate updated first measurement data comprises, for each detected occurrence of an error of the second error type:selecting, in a quantum circuit that implements the error-corrected transversal CNOT gate, a location of a correction operation for the error;identi ing measurement operations that occur in the quantum circuit after the selected location and are dependent on the correction operation; andadjusting measurement results in the first measurement data that correspond to the identified measurement operations.

6. The method of claim 5, wherein selecting a location of the correction operation for the error comprises selecting a location in the quantum circuit such that application of the correction operation at the location corrects one or more operations in the quantum circuit that are subsequent to a location of the error.

7. The method of claim 5 or claim 6, wherein the first error type comprises bit flip errors and adjusting the measurement results in the first measurement data that correspond to the identified measurement operations comprises flipping the measurement results.

8. The method of any of claims 5 to 7, wherein the first error type comprises phase flip errors and adjusting the measurement results in the first measurement data that correspond to the identified measurement operations comprises changing signs of measurement results that correspond to a one-state.

9. The method of any of claims 5 to 8, wherein the identified measurement operations comprise measurement operations performed on measure qubits included in the first logical qubit, measurement operations performed on measure qubits included in the second logical qubit, or measurement operations performed on measure qubits included in both the first logical qubit and the second logical qubit.

10. The method of any preceding claim, further comprising:copying detected occurrences of the first error type to the second measurement data to generate updated second measurement data, comprising removing detection events in the second measurement data that correspond to the detected occurrences of the first error type; anddecoding the updated second measurement data to detect occurrences of the first error type in the second logical qubit.

11. The method of claim 10, wherein copying detected occurrences of the first error ty pe to the second measurement data to generate updated second measurement data comprises, for each detected occurrence of an error of the first error type:selecting, in a quantum circuit that implements the error-corrected transversal CNOT gate, a location of a correction operation for the error;identifying measurement operations that occur in the quantum circuit after the selected location and are dependent on the correction operation; andadjusting measurement results in the second measurement data that correspond to the identified measurement operations.

12. The method of claim 11, wherein selecting a location of the correction operation for the error comprises selecting a location in the quantum circuit such that application of the correction operation at the location corrects one or more operations in the quantum circuit that are subsequent to a location of the error.

13. The method of claim 11 or claim 12. wherein the first error type comprises bit flip errors and adjusting the measurement results in the second measurement data that correspond to the identified measurement operations comprises flipping the measurement results.

14. The method of any of claims 10 to 13, wherein the first error type comprises phase flip errors and adjusting the measurement results in the second measurement data that correspond to the identified measurement operations comprises changing signs of measurement results that correspond to a one-state.

15. The method of any of claims 11 to 13, wherein the identified measurement operations comprise measurement operations performed on measure qubits included in the first logical qubit, measurement operations performed on measure qubits included in the second logical qubit, or measurement operations performed on measure qubits included in both the first logical qubit and the second logical qubit.

16. The method of any preceding claim, further comprising correcting the errors that occurred during the implementation of the transversal CNOT gate.

17. A classical computer system configured to implement a decoding process on measurement data received from a quantum computing system to determine errors in a quantum computation implemented by the quantum computing system, the classical computer system comprising:one or more data processing apparatuses; andnon-transitory computer readable storage media in data communication with the one or more data processing apparatuses and storing instructions that, when executed by the dataprocessing apparatuses, cause the one or more data processing apparatuses to perform operations according to the method of any one of claims 1 to 16.

18. A computer-readable storage medium comprising instructions stored thereon that are executable by a processing device and upon such execution cause the processing device to perform operations for decoding measurement data received from a quantum computer that performs a quantum computation, the operations comprising the method of any one of claims 1 to 16.

19. A computer implemented method comprising:obtaining measurement data from a quantum computer that performs a transversal CNOT gate on a first logical qubit and a second logical qubit;executing a decoding process on a detector graph using the measurement data to predict occurrences of either bit flip or phase flip errors, wherein transversal the detector graph comprises a plane between one or more edges that represents the transversal CNOT gate;during the decoding process, monitoring the detector graph to determine whether a first seed on a first side of the plane and a second seed on the other side of the plane become connected by an edge; andin response to determining that two seeds on either side of the plane become connected by an edge, removing copy errors from the measurement data.

20. The method of claim 19, wherein the decoding process comprises a MWPM decoding process.

21. The method of claim 19 or claim 20, wherein removing the copy errors from the measurement data generates updated measurement data, and wherein the method further comprises correcting errors that occurred during the implementation of the transversal CNOT gate using the updated measurement data.

22. The method of any of claims 19 to 21, wherein removing the copy errors from the measurement data comprises adding or removing a new seed from the detector graph.

23. A classical computer system configured to implement a decoding process on measurement data received from a quantum computing system to determine errors in a quantum computation implemented by the quantum computing system, the classical computer system comprising:one or more data processing apparatuses; andnon-transitory computer readable storage media in data communication with the one or more data processing apparatuses and storing instructions that, when executed by the data processing apparatuses, cause the one or more data processing apparatuses to perform operations according to the method of any one of claims 19 to 22.

24. A computer-readable storage medium comprising instructions stored thereon that are executable by a processing device and upon such execution cause the processing device to perform operations for decoding measurement data received from a quantum computer that performs a quantum computation, the operations comprising the method of any one of claims 19 to 22.

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