Communication method and apparatus

Abstract

Provided in the embodiments of the present application are a communication method and apparatus, which are used for improving the LDPC encoding and decoding performance. The method comprises: on the basis of a first check matrix, encoding information to be sent, and interleaving an encoded codeword (i.e., a first codeword), wherein the first check matrix is determined on the basis of a first base matrix; on the basis of a first code rate, determining a first sending start point, wherein a second codeword comprises the first sending start point; and on the basis of the first sending start point, sending a third codeword, wherein the second codeword comprises the third codeword.

Description

A communication method and apparatus

[0001] Cross-reference to related applications

[0002] This application claims priority to Chinese Patent Application No. 202510195647.2, filed on February 21, 2025, entitled "A Communication Method and Apparatus", the entire contents of which are incorporated herein by reference. Technical Field

[0003] This application relates to the field of communication technology, and in particular to a communication method and apparatus. Background Technology

[0004] Low-density parity-check (LDPC) codes are a channel coding scheme very close to the Shannon limit, characterized by good performance and low complexity. They have been selected by the 3rd Generation Partnership Project (3GPP) as the coding and decoding scheme for data channels in 5G communication. Mainstream LDPC codes have a quasi-cyclic (QC) structure, which avoids bad structures such as short cycles and improves code distance by setting the shift amount of each block.

[0005] LDPC codes can be represented using a basis matrix. In practical LDPC encoding or decoding, a complete parity-check matrix can be obtained from the basis matrix, and encoding or decoding can then be performed based on this matrix. Currently, improving the performance of LDPC encoding and decoding is a pressing technical problem that needs to be solved. Summary of the Invention

[0006] This application provides a communication method and apparatus for improving LDPC encoding and decoding performance.

[0007] In a first aspect, embodiments of this application provide a communication method, which can be executed by a first communication device or a first equipment, or in other words, the method can be applied to a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to the first equipment itself, a component within the first equipment, or a logic module or software capable of implementing all or part of the first equipment. The first equipment can be a transmitting device and / or an encoding device. Specifically, the first equipment can be a terminal or a network device such as a base station. The components in this application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, a transceiver unit, or other functional modules. Taking the first equipment as the executing entity as an example, the method includes: encoding the information to be transmitted according to a first parity check matrix, and interleaving the encoded codewords (i.e., the first codeword), wherein the first parity check matrix is ​​determined based on a first base matrix; determining a first transmission start point according to a first code rate, wherein a second codeword includes the first transmission start point; and transmitting a third codeword according to the first transmission start point, wherein the second codeword includes the third codeword.

[0008] This application reduces the impact of sudden interference on information transmission by using interleaving, and by using the starting point at different bit rates, it ensures good encoding performance at different bit rates with a low number of iterations, which can bring significant gains to encoding and decoding performance.

[0009] In one possible design, determining the first transmission start point based on the first code rate includes: determining the first transmission start point based on the code rate range corresponding to the first code rate, wherein the second codeword corresponds to multiple transmission start points, each of the multiple transmission start points corresponds to a code rate range, the multiple transmission start points include the first transmission start point, and the code rate range corresponding to the first transmission start point includes the first code rate.

[0010] In one possible design, determining the first transmission start point based on the first code rate includes: determining the first transmission start point based on the value of the first code rate, wherein the second codeword corresponds to multiple transmission start points, each of the multiple transmission start points corresponds to a code rate, the multiple transmission start points include the first transmission start point, and the code rate corresponding to the first transmission start point is the first code rate.

[0011] Both of the above designs can ensure good encoding performance at different bit rates with low iteration rounds by using different starting points at different bit rates, which can bring significant gains to encoding and decoding performance.

[0012] In one possible design, the first codeword is interleaved, including: interleaving the first codeword according to a first interleaving method, wherein the first interleaving method is used to interleave at least one parity bit before the punctured bit. This design helps to reduce the impact of sudden interference on information transmission.

[0013] In one possible design, the first codeword is interleaved according to a first interleaving method, including: interleaving the first codeword according to a first subsequence and a second subsequence; wherein the first subsequence indicates bits in the first codeword that have not been interleaved, and the second subsequence indicates bits in the first codeword that have been interleaved, wherein the bits indicated by the second subsequence are located before the punctured bits after interleaving.

[0014] In one possible design, the index h of the second subsequence indicates that the bit satisfies one or more of the following conditions: h > (k + u)Z, where k is the number of information columns, u is a constant, and Z is the lifting value of the first base matrix; the number of 1s corresponding to the row of the bit with index h in the first parity check matrix is ​​1 in the first column set, and the first column set includes the column corresponding to the punched bit in the first parity check matrix.

[0015] In one possible design, the first interleaving method involves interleaving on a column-by-column basis of the first base matrix. This method ensures that the relative order of the Z bits corresponding to any column of the first base matrix remains unchanged during the interleaving process.

[0016] In one possible design, the first interleaving method satisfies: the submatrix of the second parity check matrix corresponding to the second codeword. The difference in column overlap between any two columns is within a preset range; where P is the index before the punctured bit interleaving. The index before the parity bits are interleaved is given, k is the number of information columns, and Z is the lifting value of the first base matrix. This method can reduce the impact of punctured bits on the validity of the parity bits.

[0017] In one possible design, the first transmission start point is located before the punctured bit.

[0018] In one possible design, the length of the third codeword is kZ / R bits, where k is the number of information columns, Z is the boost value of the first base matrix, and R is the first code rate.

[0019] Secondly, embodiments of this application provide a communication method, which can be executed by a second communication device or a second equipment, or in other words, the method can be applied to a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to the second equipment itself, a component within the second equipment, or a logic module or software capable of implementing all or part of the second equipment. The second equipment can be a receiving device and / or a decoding device. Specifically, the second equipment can be a terminal or a network device such as a base station. The components in this application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, a transceiver unit, or other functional modules. Taking the second communication device as the executing entity as an example, the method includes: acquiring first information; determining a first position (the second information includes the first position) according to a first code rate, and acquiring second information according to the first position and the first information; deinterleaving the second information; and decoding the deinterleaved information (i.e., the third information) according to a first parity check matrix, wherein the first parity check matrix is ​​determined based on a first base matrix.

[0020] This application reduces the impact of sudden interference on information transmission by using interleaving, and by using the starting point at different bit rates, it ensures good encoding performance at different bit rates with a low number of iterations, which can bring significant gains to encoding and decoding performance.

[0021] In one possible design, determining the first position of the second information in the third information based on the first bit rate includes: determining the first position based on the bit rate range corresponding to the first bit rate, wherein the second information corresponds to multiple positions, each of the multiple positions corresponds to a bit rate range, the multiple positions include the first position, and the bit rate range corresponding to the first position includes the first bit rate.

[0022] In one possible design, the first position is determined based on the value of the first bit rate, wherein the second information corresponds to multiple positions, each of the multiple positions corresponds to a bit rate, the multiple positions include the first position, and the bit rate corresponding to the first position is the first bit rate.

[0023] Both of the above designs can ensure good encoding performance at different bit rates with low iteration rounds by using different starting points at different bit rates, which can bring significant gains to encoding and decoding performance.

[0024] In one possible design, deinterleaving the second information includes: deinterleaving the second information according to a first interleaving method, wherein the first interleaving method is used to interleave at least one parity bit before the punctured bit. This design helps reduce the impact of sudden interference on information transmission.

[0025] In one possible design, deinterleaving the second information according to a first interleaving method includes: deinterleaving the second information according to a first subsequence and a second subsequence; wherein the first subsequence indicates bits in the third information that have not been interleaved, the second subsequence indicates bits in the third information that have been interleaved, and the bits indicated by the second subsequence are located before the punctured bits after interleaving.

[0026] In one possible design, the a-th bit indicated by the second sub-sequence satisfies one or more of the following conditions: the column index of the a-th bit in the corresponding column of the first parity check matrix is ​​greater than (k+u)Z, where k is the number of information columns, u is a constant, and Z is the lifting value of the first base matrix; the number of 1s corresponding to the row of the a-th bit in the first parity check matrix in the first column set is 1, and the first column set includes the column corresponding to the punched bit in the first parity check matrix.

[0027] In one possible design, the first interleaving method involves interleaving on a column-by-column basis of the first base matrix. This method ensures that the relative order of the Z bits corresponding to any column of the first base matrix remains unchanged during the interleaving process.

[0028] In one possible design, the first interleaving method satisfies: the submatrix of the second parity check matrix corresponding to the second information. The difference in column overlap between any two columns is within a preset range; where P is the index of the punctured bit before interleaving. The index of the check bit before interleaving is given, k is the number of information columns, and Z is the lifting value of the first base matrix.

[0029] In one possible design, the first position is located before the punch bit.

[0030] In one possible design, the length of the first information is kZ / R bits, where k is the number of information columns, Z is the boost value of the first basis matrix, and R is the first code rate.

[0031] Thirdly, embodiments of this application provide a communication method, which can be executed by a first communication device or a first equipment, or in other words, the method can be applied to a first communication device. Unless otherwise specified, the "first communication device" in this application can refer to the first equipment itself, a component within the first equipment, or a logic module or software capable of implementing all or part of the first equipment. The first equipment can be a transmitting device and / or an encoding device. Specifically, the first equipment can be a terminal or a network device such as a base station. The components in this application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, a transceiver unit, or other functional modules. Taking the first device as the execution subject as an example, the method includes: encoding the information to be transmitted according to the first parity check matrix, wherein the first parity check matrix is ​​determined according to the first base matrix; and interleaving the encoded codeword (i.e., the first codeword) according to the first interleaving method, wherein the first interleaving method is used to interleave at least one first parity bit and at least one second parity bit, wherein the number of 1s corresponding to the row of the first parity check matrix is ​​1, the number of 1s corresponding to the row of the second parity check matrix is ​​greater than 1, and the first column set is the column corresponding to the punctured bit in the first parity check matrix; and transmitting the third codeword, wherein the interleaved codeword (i.e., the second codeword) includes the third codeword.

[0032] This application reduces the impact of sudden interference on information transmission through interleaving. Furthermore, the interleaving method provided by this application ensures good encoding performance at different code rates even with a low number of iterations, resulting in significant performance gains for encoding and decoding. In addition, compared to the first embodiment described above, Embodiment 2 of this application uses the same transmission starting point (i.e., the first bit) for different code rates, leading to lower implementation complexity.

[0033] In one possible design, at least one first parity bit and at least one second parity bit are bits corresponding to the extended parity column in the first parity check matrix.

[0034] In one possible design, the first base matrix is ​​BG1 of 5G, and the column indices corresponding to at least one first parity bit and at least one second parity bit in the first parity matrix are both greater than or equal to 27.

[0035] In one possible design, the position of the first parity bit after interleaving is before its position before interleaving.

[0036] In one possible design, the position of the first parity bit after interleaving is the bit position corresponding to the first column in the extended parity column; or, the position of the first parity bit after interleaving is the bit position corresponding to the previous parity column in the extended parity column.

[0037] In one possible design, at least one second parity bit is in the same relative position after interleaving as it was before interleaving.

[0038] In one possible design, the first base matrix is ​​5G BG1, at least one first parity bit includes the bits corresponding to columns 29 and 33 in the first parity matrix, and at least one second parity bit includes the bits corresponding to columns 27, 28, 30, 31, and 32 in the first parity matrix. Before interleaving, the order of the column indices of the extended parity columns corresponding to at least one first parity bit and at least one second parity bit is: 27, 28, 29, 30, 31, 32, 33. After interleaving, the order of the column indices of the extended parity columns corresponding to at least one first parity bit and at least one second parity bit is: 29, 27, 28, 33, 30, 31, 32.

[0039] In one possible design, the first interlacing method includes one or more of the following:

[0040] T(kZ+uZ+t)=ε(t); t∈[1,2,…,Z], where Z is the lifting value of the first basis matrix, ε() includes at least one column index, where the row corresponding to ε() has 1 1 in the first column set; T(t)=tZ,t∈[kZ+uZ+Z+1,…,ε(Z)];

[0041] T(ε(iZ)+t)=ε(iZ+t), i={1,2,…,M-1},t∈[1,2,…,Z], where M is the row number of the first basis matrix; T(t)=tZ,t∈[ε((i-1)Z)+Z+1,ε(iZ)];

[0042] T(t) = t, where t belongs to the first range of values, and the first range of values ​​is the complement of [1,2,…,Z]∪[kZ+uZ+Z+1,…,ε(Z)]∪[ε((i-1)Z)+Z+1,ε(iZ)] in {1,2,3,……,MZ}.

[0043] In one possible design, the row index corresponding to any column index r in ε() is r-kZ.

[0044] In one possible design, the first interleaving method includes interleaving on a column-by-column basis of the first base matrix.

[0045] In one possible design, the length of the third codeword is kZ / R bits, where k is the number of information bits, Z is the boost value of the first base matrix, and R is the first code rate.

[0046] Fourthly, embodiments of this application provide a communication method, which can be executed by a second communication device or a second equipment, or in other words, the method can be applied to a second communication device. Unless otherwise specified, the "second communication device" in this application can refer to the second equipment itself, a component within the second equipment, or a logic module or software capable of implementing all or part of the second equipment. The second equipment can be a receiving device and / or a decoding device. Specifically, the second equipment can be a terminal or a network device such as a base station. The components in this application may include, for example, at least one of a chip, a chip system, a processor, a transceiver, a processing unit, a transceiver unit, or other functional modules. Taking the second communication device as the executing entity as an example, the method includes: acquiring first information; acquiring second information based on the first information; deinterleaving the second information according to a first interleaving method; and decoding the deinterleaved information (i.e., the third information) according to a first parity check matrix. The first interleaving method is used to interleave the first parity bit and the second parity bit. The first parity bit has 1 corresponding to the row in the first parity check matrix and 1 corresponding to the first column set. The second parity bit has more than 1 corresponding to the row in the first parity check matrix and 1 corresponding to the first column set. The first parity check matrix is ​​determined based on the first base matrix. The first column set is the column corresponding to the punched bit in the first parity check matrix.

[0047] This application reduces the impact of sudden interference on information transmission through interleaving. Furthermore, the interleaving method provided by this application ensures good encoding performance at different code rates even with a low number of iterations, resulting in significant performance gains for encoding and decoding. In addition, compared to the first embodiment described above, Embodiment 2 of this application uses the same transmission starting point (i.e., the first bit) for different code rates, leading to lower implementation complexity.

[0048] In one possible design, at least one first parity bit and at least one second parity bit are bits corresponding to the extended parity column in the first parity check matrix.

[0049] In one possible design, the first base matrix is ​​BG1 of 5G, and the column indices corresponding to at least one first parity bit and at least one second parity bit in the first parity matrix are both greater than or equal to 27.

[0050] In one possible design, the position of the first parity bit after interleaving is before its position before interleaving.

[0051] In one possible design, the position of the first parity bit after interleaving is the bit position corresponding to the first column in the extended parity column; or, the position of the first parity bit after interleaving is the bit position corresponding to the previous parity column in the extended parity column.

[0052] In one possible design, at least one second parity bit is in the same relative position after interleaving as it was before interleaving.

[0053] In one possible design, the first base matrix is ​​5G BG1, at least one first parity bit includes the bits corresponding to columns 29 and 33 in the first parity matrix, and at least one second parity bit includes the bits corresponding to columns 27, 28, 30, 31, and 32 in the first parity matrix; before interleaving, the column indices of the extended parity columns corresponding to at least one first parity bit and at least one second parity bit are, in order: 27, 28, 29, 30, 31, 32, 33; after interleaving, the column indices of the extended parity columns corresponding to at least one first parity bit and at least one second parity bit are, in order: 29, 27, 28, 33, 30, 31, 32.

[0054] In one possible design, the first interlacing method includes one or more of the following:

[0055] T(kZ+uZ+t)=ε(t); t∈[1,2,…,Z], where Z is the lifting value of the first basis matrix, ε() includes at least one column index, where the row corresponding to ε() has 1 1 in the first column set; T(t)=tZ,t∈[kZ+uZ+Z+1,…,ε(Z)];

[0056] T(ε(iZ)+t)=ε(iZ+t), i={1,2,…,M-1},t∈[1,2,…,Z], where M is the row number of the first basis matrix; T(t)=tZ,t∈[ε((i-1)Z)+Z+1,ε(iZ)];

[0057] T(t) = t, where t belongs to the first range of values, and the first range of values ​​is the complement of t∈[1,2,…,Z]∪t∈[kZ+uZ+Z+1,…,ε(Z)]∪t∈[ε((i-1)Z)+Z+1,ε(iZ)] in {1,2,3,……,MZ}.

[0058] In one possible design, the row index corresponding to any column index r in ε() is r-kZ.

[0059] In one possible design, the first interleaving method includes interleaving on a column-by-column basis of the first base matrix.

[0060] In one possible design, the length of the first information is kZ / R bits, where k is the number of information bits, Z is the boost value of the first basis matrix, and R is the first code rate.

[0061] Fifthly, a communication device is provided. The device can implement the method described in any possible implementation of any of the first to fourth aspects. The device possesses the functions of the first or second communication device described above. The device is, for example, a terminal device, a functional module within a terminal device, a network device, or a functional module within a network device, etc.

[0062] In one optional implementation, the device may include modules corresponding one-to-one with the methods / operations / steps / actions performed in any possible implementation of any of the first to fourth aspects. These modules may be hardware circuits, software, or a combination of hardware circuits and software. In another optional implementation, the device includes a processing unit (sometimes also called a processing module) and a communication unit (sometimes also called a transceiver module or communication module, etc.). The transceiver unit is capable of both sending and receiving functions. When the transceiver unit performs the sending function, it may be called a sending unit (sometimes also called a sending module); when the transceiver unit performs the receiving function, it may be called a receiving unit (sometimes also called a receiving module). The sending unit and the receiving unit may be the same functional module, referred to as the transceiver unit, which performs both sending and receiving functions; or, the sending unit and the receiving unit may be different functional modules, with the transceiver unit being a collective term for these functional modules.

[0063] For example, when the apparatus is used to perform the method described in any one of the first to fourth aspects, the apparatus may include a communication unit and a processing unit.

[0064] In a sixth aspect, embodiments of this application also provide a communication device, including a processor for executing a computer program (or computer-executable instructions) stored in a memory, which, when executed, causes the device to perform the method as described in any possible implementation of any of the first to fourth aspects.

[0065] In one possible implementation, the processor and memory are integrated together;

[0066] In another possible implementation, the memory is located outside the communication device.

[0067] The communication device also includes a communication interface for communicating with other devices, such as sending or receiving data and / or signals. For example, the communication interface may be a transceiver, circuit, bus, module, or other type of communication interface.

[0068] A seventh aspect provides a computer-readable storage medium for storing a computer program or instructions that, when executed, enable the implementation of the method described in any possible implementation of any of the first to fourth aspects, and the method shown in any possible implementation of the method described therein.

[0069] Eighthly, a computer program product containing instructions is provided, which, when run on a computer, enables the method described in any possible implementation of any of the first to fourth aspects to be implemented.

[0070] Ninthly, embodiments of this application also provide a communication device for performing the method described in any possible implementation of any of the first to fourth aspects.

[0071] In a tenth aspect, a chip system is provided, comprising logic circuitry (or, as understood, a processor, which may include logic circuitry, etc.), and further comprising input / output interfaces. The input / output interfaces can be used to input messages or to output messages. The input / output interfaces can be the same interface, i.e., the same interface can implement both sending and receiving functions; or, the input / output interface includes an input interface and an output interface, the input interface being used to implement the receiving function, i.e., to receive messages; and the output interface being used to implement the sending function, i.e., to send messages. The logic circuitry can be used to perform operations other than the sending and receiving functions in any possible implementation of any of the first to fourth aspects described above; the logic circuitry can also be used to transmit messages to the input / output interfaces or to receive messages from other communication devices from the input / output interfaces. The chip system can be used to implement the methods described in any possible implementation of any of the first to fourth aspects described above. The chip system can be composed of chips or can include chips and other discrete devices.

[0072] Optionally, the chip system may also include a memory, which can be used to store instructions, and the logic circuits can call the instructions stored in the memory to implement the corresponding functions.

[0073] Eleventhly, a communication method is provided, which may include the method implemented by a first communication device as shown in the first aspect and any possible implementation thereof, and the method implemented by a second communication device as shown in the second aspect and any possible implementation thereof.

[0074] In a twelfth aspect, a communication method is provided, which may include the method implemented by a first communication device as shown in the third aspect and any possible implementation thereof, and the method implemented by a second communication device as shown in the fourth aspect and any possible implementation thereof.

[0075] In a thirteenth aspect, a communication system is provided, which may include a first communication device and a second communication device. The first communication device may be used to implement the method shown in the first aspect and any possible implementation thereof, and the second communication device may be used to implement the method shown in the second aspect and any possible implementation thereof.

[0076] In a fourteenth aspect, a communication system is provided, which may include a first communication device and a second communication device. The first communication device may be used to implement the method shown in the third aspect and any possible implementation thereof, and the second communication device may be used to implement the method shown in the fourth aspect and any possible implementation thereof.

[0077] The technical effects brought about by aspects five through fourteen above can be found in the descriptions of the beneficial effects of the corresponding solutions in aspects one through two above, and will not be repeated here. Attached Figure Description

[0078] Figure 1(a) is an architecture diagram of a communication system used in an embodiment of this application;

[0079] Figure 1(b) is a schematic diagram of a network device in an embodiment of this application;

[0080] Figure 2 is a schematic diagram of a 4×4 cyclic shift matrix in an embodiment of this application;

[0081] Figure 3 is an example diagram of a basis matrix in an embodiment of this application;

[0082] Figure 4 is a schematic diagram of a verification matrix in an embodiment of this application;

[0083] Figure 5 is a schematic diagram of a base matrix structure in an embodiment of this application;

[0084] Figure 6 is a schematic diagram of a matrix region corresponding to different code rates in an embodiment of this application;

[0085] Figure 7 is a schematic diagram of a perforated array in an embodiment of this application;

[0086] Figure 8 is a schematic diagram of a bit rate and system capacity in an embodiment of this application;

[0087] Figure 9 is a flowchart illustrating a communication method in an embodiment of this application;

[0088] Figure 10 is a schematic diagram of an interlacing scheme in an embodiment of this application;

[0089] Figure 11 is a flowchart illustrating a communication method according to an embodiment of this application;

[0090] Figure 12 is a schematic diagram of the structure of a communication device according to an embodiment of this application;

[0091] Figure 13 is a schematic diagram of the structure of a communication device according to an embodiment of this application. Detailed Implementation

[0092] In the embodiments of this application, words such as "exemplarily" and "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design scheme described as an "example" in this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of the term "example" is intended to present concepts in a concrete manner. In the embodiments of this application, "of," "corresponding, relevant," and "corresponding" may sometimes be used interchangeably, and it should be noted that their intended meanings are consistent unless their distinction is emphasized.

[0093] Figure 1(a) is a schematic diagram of the architecture of the communication system applied in an embodiment of this application. The communication system 1000 shown in Figure 1(a) includes a wireless access network 100 and a core network 200. Optionally, the communication system 1000 also includes an Internet 300. The wireless access network 100 may include at least one network device (110a and 110b in Figure 1(a)) and at least one terminal device (120a-120j in Figure 1(a)). The terminal device is wirelessly connected to the network device, and the network device is wirelessly or wiredly connected to the core network. The core network device and the network device may be independent physical devices, or the functions of the core network device and the logical functions of the network device may be integrated on the same physical device, or a single physical device may integrate some of the functions of the core network device and some of the functions of the network device. Terminal devices and network devices may be interconnected via wired or wireless means. Figure 1(a) is only a schematic diagram. The communication system may also include other network devices, such as wireless relay devices and wireless backhaul devices, which are not shown in Figure 1(a).

[0094] Network equipment is an access device that enables terminal devices to access a communication system via wired or wireless means. Network equipment can be a base station, an evolved NodeB (eNodeB), a transmission reception point (TRP), a next-generation NodeB (gNB) in a 5G mobile communication system, a next-generation base station in a 6G mobile communication system, a base station in a future mobile communication system, or an access node in a WiFi system; it can also be a module or unit that performs some of the functions of a base station, such as a central unit (CU), a distributed unit (DU), or a radio unit (RU). Network equipment can be a macro base station (110a in Figure 1(a)), a micro base station or an indoor station (110b in Figure 1(a)), a relay node, or a donor node, etc. The embodiments of this application do not limit the specific technology or specific equipment form used in the network equipment.

[0095] A terminal device is a device with wireless transceiver capabilities, capable of sending signals to or receiving signals from network devices. Terminal devices include, but are not limited to, terminal units, terminals, user equipment (UE), mobile stations, and mobile terminals. Terminal devices can be widely used in various scenarios, such as device-to-device (D2D), vehicle-to-everything (V2X) communication, machine-type communication (MTC), the Internet of Things (IoT), virtual reality, augmented reality, industrial control, autonomous driving, telemedicine, smart grids, smart furniture, smart offices, smart wearables, smart transportation, and smart cities. Specifically, a terminal device can be a mobile phone, tablet computer, computer with wireless transceiver capabilities, wearable device, vehicle, aircraft, ship, robot, robotic arm, smart home device, etc. The embodiments of this application do not limit the specific technologies or device forms used in the terminal devices.

[0096] Network devices and terminal devices can be fixed in location or mobile. They can be deployed on land, including indoors or outdoors, handheld or vehicle-mounted; they can also be deployed on water; and they can be deployed on aircraft, balloons, and artificial satellites. The embodiments of this application do not limit the application scenarios of the network devices and terminal devices.

[0097] The roles of network devices and terminal devices can be relative. For example, the helicopter or drone 120i in Figure 1(a) can be configured as a mobile network device. For terminal devices 120j that access the wireless access network 100 through 120i, terminal device 120i is a network device; however, for network device 110a, 120i is a terminal device. That is, 110a and 120i communicate through a wireless air interface protocol. Of course, 110a and 120i can also communicate through a network device-to-network device interface protocol. In this case, relative to 110a, 120i is also a network device. Therefore, both network devices and terminal devices can be collectively referred to as communication devices. 110a and 110b in Figure 1(a) can be called communication devices with network device functions, and 120a-120j in Figure 1(a) can be called communication devices with terminal device functions.

[0098] Communication between network devices and terminal devices, between network devices, and between terminal devices can be conducted using licensed spectrum, unlicensed spectrum, or both simultaneously. Communication can be conducted using spectrum below 6 GHz, spectrum above 6 GHz, or both simultaneously. The embodiments of this application do not limit the spectrum resources used for wireless communication.

[0099] In the embodiments of this application, the functions of the network device can be executed by modules (such as chips) within the network device, or by a control subsystem that includes network device functions. This control subsystem, including network device functions, can be a control center in the aforementioned application scenarios such as smart grids, industrial control, intelligent transportation, and smart cities. Similarly, the functions of the terminal device can be executed by modules (such as chips or modems) within the terminal device, or by a device that includes terminal device functions.

[0100] Figure 1(b) shows a schematic diagram of a network device. As shown in Figure 1(b), the network device includes at least one of the following: one or more CUs, one or more DUs, and one or more RUs. For clarity, only one CU, DU, and RU are shown in Figure 1(b). The CU is used to connect to the core network and one or more DUs. Optionally, the CU may have some of the core network's functions. The CU may include a CU-control plane (CP) and a CU-user plane (UP).

[0101] The CU and DU can be configured according to the protocol layer functions of the wireless network they implement: for example, the CU can be configured to implement the functions of the Packet Data Convergence Protocol (PDCP) layer and above (such as the Radio Resource Control (RRC) layer and / or the Service Data Adaptation Protocol (SDAP) layer); the DU can be configured to implement the functions of the protocol layers below the PDCP layer (such as the Radio Link Control (RLC) layer, the Medium Access Control (MAC) layer, and / or the Physical (PHY) layer). Alternatively, the CU can be configured to implement the functions of the protocol layers above the PDCP layer (such as the RRC and / or SDAP layers), and the DU can be configured to implement the functions of the protocol layers below the PDCP layer (such as the RLC, MAC, and / or PHY layers).

[0102] The above CU and DU configurations are merely examples; the functions of the CU and DU can be configured as needed. For instance, the CU or DU can be configured to have more protocol layer functions, or only some protocol layer processing functions. For example, some RLC layer functions and protocol layer functions above the RLC layer can be placed in the CU, while the remaining RLC layer functions and protocol layer functions below the RLC layer can be placed in the DU. Furthermore, the functions of the CU or DU can be divided according to service type or other system requirements, such as by latency. Functions that require low latency can be placed in the DU, while functions that do not require low latency can be placed in the CU.

[0103] DU and RU can cooperate to implement the functions of the PHY layer. A DU can be connected to one or more RUs. The functions of DU and RU can be configured in various ways depending on the design. For example, a DU can be configured to implement baseband functions, and an RU can be configured to implement mid-RF functions. Another example is that a DU can be configured to implement higher-level functions in the PHY layer, and an RU can be configured to implement lower-level functions in the PHY layer, or to implement both lower-level and RF functions. Higher-level functions in the physical layer can include a portion of the physical layer's functions that are closer to the MAC layer, while lower-level functions in the physical layer can include another portion of the physical layer's functions that are closer to the mid-RF side.

[0104] The CU and DU can be separate entities or included in the same network element, such as a baseband unit (BBU). The RU can be included in radio frequency equipment or radio frequency units, such as a remote radio unit (RRU), an active antenna unit (AAU), or a remote radio head (RRH). In different systems, CU, DU, or RU may have different names, but those skilled in the art will understand their meaning. For example, in an open radio access network (ORAN) system, CU can also be called O-CU (open CU), DU can be called O-DU, and RU can be called O-RU. Any of the CU (or CU-CP, CU-UP), DU, and RU units in this application can be implemented through software modules, hardware modules, or a combination of software and hardware modules.

[0105] To facilitate understanding of the content of this application, the nouns or terms involved in the embodiments of this application will be explained below.

[0106] I. Information Bit Sequence

[0107] An information bit sequence refers to a sequence of bits to be transmitted. For example, if the bits to be transmitted are 1, 0, 1, 0, 1, 1, 0, 0, 1, 0, 1, then the resulting information bit sequence is 10101100101. Information bits can refer to the payload itself, or to the payload plus cyclic redundancy check (CRC) bits.

[0108] II. Code Length

[0109] Code length refers to the length of the bit sequence to be transmitted obtained by encoding the information bit sequence. The code length is greater than or equal to the length of the information bit sequence.

[0110] III. Bitrate

[0111] The code rate is the ratio of the length of the information bit sequence to the code length. It can also be the ratio of the length of the information bit sequence to the length of the encoded bit sequence.

[0112] The length, code length, and code rate of the information bit sequence can be pre-configured by higher-layer signaling, MAC layer signaling, or downlink physical layer signals, and can also be obtained or calculated by the transmitting and receiving devices. For example, the transmitting and receiving devices can determine the code length based on the coding method, the frame structure used to transmit the information bits, the number of layers, and the modulation scheme. For example, the transmitting and receiving devices can obtain the code rate based on higher-layer signaling, MAC layer signaling, or downlink physical layer signals, or determine the code rate based on the modulation and coding scheme (MCS).

[0113] IV. LDPC Code

[0114] LDPC codes are a channel coding scheme very close to the Shannon limit, characterized by high performance and low complexity. They have been adopted by 3GPP as the coding and decoding scheme for 5G communication data channels. Mainstream LDPC codes have a quasi-cyclic (QC) structure, which avoids bad structures such as short cycles and improves code distance by setting the shift amount of each block.

[0115] LDPC codes can be represented using a basis matrix, where elements are either 0 or 1. Expanding the basis matrix by adding 1 elements results in a Zc*Zc cyclic shift matrix, and expanding by adding 0 elements results in a Zc*Zc zero matrix. This expansion yields a parity-check matrix, which can be used for encoding or decoding. Zc can be referred to as the lift factor, spread factor, spread value, spread coefficient, lifting size, etc. The basis matrix can be represented as H. BG BG is an abbreviation for base graph. A basis matrix can also be represented by a base graph, and the two have a corresponding relationship.

[0116] For example, if the element in the i-th row and j-th column of the basis matrix has a value of 1 and corresponds to a shifting value (SV), it can be represented by P. i,j This represents the shift value corresponding to the i-th row and j-th column. A single shift value can be used to calculate the corresponding number of cyclic shifts.

[0117] Taking Zc=4 as an example, the matrix obtained by cyclically shifting the 4*4 identity matrix to the right by 1, 2, 3, and 0 times respectively is shown in Figure 2. That is, the number of cyclic shifts are 1, 2, 3, and 0 respectively.

[0118] The following example illustrates this. Figure 3 shows an example of the basis matrix in an LDPC code. This basis matrix is ​​a 3x3 matrix, and we assume Zc = 4, and P 0,0 The corresponding right circular shift count is 1, P 0,1 The corresponding right circular shift count is 2, P 1,0 The corresponding number of right circular shifts is 3, P 1,2 The corresponding number of right circular shifts is 3, P 2,2 The corresponding right circular shift count is 1. After expanding the base matrix, we can obtain the parity check matrix as shown in Figure 4.

[0119] Table 1 shows the various values ​​of the lifting dimension (Zc).

[0120] Table 1

[0121] Referring to Table 1, the values ​​of the lifting dimension Zc can be... Where j represents the j-th row in Table 1, j = 0, 1, 2, 3, 4, 5, 6, 7, a0, a1, a2, a3, a 4, a 5, a6 and a7 are 2, 3, 5, 7, 9, 11, 13, and 15 respectively. k j The value of traverses from 0 to max(k) j ), where max(k0), max(k1), max(k2), max(k3), max(k4), max(k5), max(k6), and max(k7) are 7, 7, 6, 5, 5, 5, 4, and 4, respectively.

[0122] For example, if j = 0, then a0 = 2, and k0 iterates through 0 to 7, so the value of Zc can be 2*2. 0 ,2*2 1 ,2*2 2 ,2*2 3 ,2*2 4 ,2*2 5 ,2*2 6 ,2*2 7 That is, 2, 4, 8, 16, 32, 64, 128, 256. The cases where j takes values ​​from 1 to 7 are similar and will not be elaborated further.

[0123] In Table 1, each row of Zc corresponds to a set of SV. When constructing the parity check matrix, the size of Zc is first determined, then the set of SV corresponding to that Zc is determined, and then the parity check matrix is ​​constructed based on Zc and SV.

[0124] Table 2 below shows some examples of a set of SVs defined in the 3GPP 212 protocol.

[0125] Table 2

[0126] Table 2 shows the basis matrix H. BG The translation values ​​SV corresponding to the elements with a value of 1 in row 0 i,j The set index i in Table 2 LS That is, the set index i in Table 1 LS Furthermore, the basis matrix H BG The cyclic shift value corresponding to each element with a value of 1 in row 0 can be obtained by taking the modulo of Zc using the corresponding translation value.

[0127] Table 2 only shows the translation values ​​corresponding to each element in row 0. In practice, it also includes the translation values ​​corresponding to each element in other rows (such as row 1, row 2, etc.).

[0128] Referring to Table 2, when Zc takes the values ​​2, 4, 8, 16, 32, 64, 128, or 256, then i LS =0, basis matrix H BG The SV values ​​of the elements with a value of 1 in row 0 are 250, 69, 226, 159, 100, 10, 59, 229, 110, 191, 9, 195, 23, 190, 35, 239, 31, 1, 0. Assuming Zc = 4, then the basis matrix H... BG The cyclic shift counts corresponding to the elements with a value of 1 in row 0 are 250 mod 4, 69 mod 4, 226 mod 4, 159 mod 4, 100 mod 4, 10 mod 4, 59 mod 4, 229 mod 4, 110 mod 4, 191 mod 4, 9 mod 4, 195 mod 4, 23 mod 4, 190 mod 4, 35 mod 4, 239 mod 4, 31 mod 4, 1 mod 4, 0 mod 4, which are 2, 1, 2, 3, 0, 2, 3, 1, 2, 3, 1, 3, 3, 2, 3, 3, 3, 1, 0. This means that the 4x4 identity matrix is ​​cyclically shifted 2, 1, 2, 3, 0, 2, 3, 1, 2, 3, 1, 3, 3, 2, 3, 3, 3, 1, 0 times to obtain the basis matrix H. BG The elements in row 0 that have a value of 1 correspond to a 4x4 matrix. For the basis matrix H... BG The elements in the 0th row that have a value of 0 correspond to a zero matrix of size 4*4.

[0129] Similarly, for other values ​​of Zc, there are corresponding translation values ​​and cyclic shift counts, as detailed in Table 2.

[0130] Similarly, for the basis matrix H BG The rows other than row 0 are also determined using a similar method to determine the corresponding Zc*Zc matrix.

[0131] In this embodiment, the lifting and translation operations of the LDPC code are described as follows: For a given lifting size Zc, from the basis matrix H BG Upgraded to the parity check matrix H, specifically, the basis matrix H BG t in i,j (where t) i,j =1) will be replaced with a Zc×Zc matrix I(P) i,j ), where I(P i,j ) is a cyclic shift of the identity matrix I of Zc×Zc by P i,j One (either left or right circular shift is possible) or circular shift P i,j A matrix of degree mod Zc, P i,j The translation value corresponding to the i-th row and j-th column; basis matrix H BG The zeros in H will be replaced with a Zc×Zc matrix of all zeros. It can be seen that the purpose of lifting is to improve the basis matrix H. BG To transform it into a larger parity check matrix H, the translation aims to shift each H... BG The identity matrix corresponding to the non-zero elements is cyclically shifted into a predefined matrix.

[0132] V. Basis Matrix of 5G LDPC Codes

[0133] The basis matrices of the 5G LDPC code include BG1 and BG2. BG1 is a 46x68 matrix, and BG2 is a 42x52 matrix. Both BG1 and BG2 have the matrix structure shown in Figure 5. Region A corresponds to the high-rate information columns, region B corresponds to the high-rate core check matrix, region C is the zero matrix, region D is the incremental redundancy part of the basis matrix and corresponds to the low-rate matrix, and region E is the incremental redundancy region and is an identity matrix, including the extended check columns. The values ​​of the basis matrices are either 0 or 1; a value of 0 represents an empty element, and a value of 1 represents an edge in the basis graph or an association between the check and the variable.

[0134] To improve the bit rate, LDPC encoding supports puncturing. For example, referring to Figure 5, the first two columns of the matrices BG1 and BG2 are punctured columns. In terms of matrix characteristics, the column weight of the punctured column is relatively large, where column weight refers to the number of non-zero elements in a column. In terms of transmission characteristics, the bits corresponding to the punctured column are not transmitted, and the receiver does not need to pay attention to the received information of this part. Its log-likelihood ratio is set to 0, and it is recovered through decoding.

[0135] BG1 and BG2 are designed for the lowest bitrate. When different bitrates need to be supported, the upper left portion of BG1 or BG2 can be used. Figure 6 shows a schematic diagram of the matrix regions corresponding to different bitrates. This matrix can be BG1 or BG2. Rows and columns of the high bitrate region shown in the figure are selected from BG1 or BG2 to form the base matrix. The high bitrate region can also be called the region corresponding to the highest bitrate. Taking BG1 as an example, the high bitrate region of BG1 is a matrix region composed of region A and region B of BG1. Region A is a 4x22 matrix used to carry data information, and region B is a 4x4 matrix used to carry check information. When the first two columns are punched, the bitrate supported by the high bitrate region is 22 / (22+4-2)=22 / 24≈0.917, and the bitrate of other regions is lower than that of the high bitrate region.

[0136] When a high-bitrate region is selected from BG1 or BG2 as the base matrix, the base matrix will have the highest bitrate; therefore, it is also called the highest bitrate matrix. If more rows and columns than high-bitrate regions are selected from BG1 or BG2 to form the base matrix, the bitrate of the base matrix will be lower than the highest bitrate. Furthermore, as the number of rows and columns increases, the bitrate of the corresponding matrix region gradually decreases. Referring to Figure 6, the rows and columns of each dashed box region form a base matrix; as the size of the dashed box region increases, the bitrate of the corresponding base matrix gradually decreases.

[0137] Figure 7 is a schematic diagram of the high bit rate region of BG1. To further improve the bit rate, while punching columns in region A, columns in region B can also be punched.

[0138] VI. Spectral Efficiency

[0139] Spectral efficiency, also known as system capacity or bandwidth utilization, refers to the number of bits transmitted per unit time within a given bandwidth. The unit of spectral efficiency is, for example, bits per second per hertz (bit / s / Hz).

[0140] In this application, the communication parameters satisfying the first condition may further include a threshold value for spectral efficiency that is greater than or equal to the spectral efficiency. The threshold value for spectral efficiency may be a pre-configured or pre-defined value.

[0141] For example, the thresholds for spectral efficiency are 6 bit / s / Hz, 7 bit / s / Hz, 7.5 bit / s / Hz, or 8 bit / s / Hz, etc.

[0142] Currently, LDPC decoding performance is poor. For some code rates, LDPC encoding and decoding performance has a large gain space. For example, Figure 8 shows a schematic diagram of code rate and system capacity. In Figure 8, the horizontal axis is the code rate and the vertical axis is the distance from the capacity. As can be seen from Figure 8, there is a sudden change in the distance between the code rate and the capacity. That is, at this code rate, the rationality of the matrix design is low and the encoding and decoding performance is poor.

[0143] To address the aforementioned issues, this application provides corresponding solutions.

[0144] The method described in this application is performed by the first device. Unless otherwise specified, the "first device" in this application may refer to the first device itself (e.g., a terminal device or a network device), a component in the first device (e.g., a communication module, processor, circuit, chip, or chip system), or a logic module or software that can implement all or part of the functions of the first device.

[0145] In this application, the first device can be used as a transmitting device, and the second device can be used as a receiving device. For example, the first device can send information to the second device.

[0146] It should be noted that this application uses the example of sorting row index, column index, and bit index starting from 0 for illustration. In specific implementations, the row index, column index, and bit index can also be sorted starting from 1; no specific limitation is made here.

[0147] Example 1:

[0148] Figure 9 is a flowchart illustrating a communication method provided in an embodiment of this application. The method includes the following steps:

[0149] S901, the first device encodes the information to be sent according to the first check matrix to obtain the first codeword.

[0150] The first parity check matrix is ​​generated based on the first base matrix.

[0151] S902, the first device interleaves the first codeword to obtain the second codeword.

[0152] As an alternative, the first device can interleave the first codeword according to a first interleaving method, wherein the first interleaving method is used to interleave at least one parity bit in the first codeword before the punctured bit, for example, as shown in Figure 10. For example, the first interleaving method can interleave the first codeword according to an interleaving sequence, or it can be described as follows: according to the first interleaving method, the original codeword (i.e., the first codeword) and the interleaved codeword (i.e., the second codeword) satisfy an interleaving sequence.

[0153] Optionally, the first interleaving method described above may satisfy one or more of the following requirements 1 to 3:

[0154] Requirement 1: When interleaving the first codeword, interleaving can be performed column-by-column of the first base matrix. As explained in the previous terminology introduction, each element of the first base matrix is ​​replaced with a Z*Z submatrix to generate the first parity check matrix, where Z is the lift value of the first base matrix. Therefore, the above method can also be understood as interleaving the Z bits corresponding to the column with column index i in the first base matrix as a whole.

[0155] For example, if T(iZ+1) = j, then T(iZ+t) = j + t holds for any t ∈ [2, 3, ..., Z], where T() is the interleaving sequence, and T(n) = m indicates that the bit at index n of the interleaved codeword (i.e., the second codeword) is the bit prime at index m of the original codeword (i.e., the first codeword). iZ+t is a column index of the second parity-check matrix, or can be described as iZ+t being the index of a bit of the second codeword, where i is a column index of the basis matrix corresponding to the second parity-check matrix. j is a column index of the first parity-check matrix, or can be described as j being the index of a bit of the first codeword.

[0156] The above method ensures that the Z bits corresponding to any column of the first basis matrix maintain their relative order during the interleaving process.

[0157] Requirement 2: The interleaved sequence is divided into two parts, one called the first subsequence V and the other called the second subsequence U. The second subsequence precedes the first subsequence.

[0158] In this codeword, the first subsequence indicates the non-interleaved bits. The first subsequence is a subsequence of the first codeword, and the order of the bits included in the first codeword is consistent with that of the first codeword. The second subsequence indicates the interleaved bits in the first codeword. In the example above, the bits indicated by the second subsequence are located before the punctured bits after interleaving.

[0159] Requirement 3: The bits at index h indicated by the second subsequence must satisfy one or more of the following two conditions:

[0160] Condition 1: h > (k + u)Z.

[0161] Where k is the number of information columns. For example, the first base matrix is ​​BG1 of 5G, k = 22, where the first base matrix is ​​a 46*68 matrix.

[0162] u is a constant. For example, the parameter u is determined by the first basis matrix, such as BG1 of 5G, where u = 4.

[0163] Z is the lifting value of the first basis matrix.

[0164] Condition 2: The number of 1s in the row corresponding to the bit with index h in the first parity check matrix is ​​1, and the first column set includes the column corresponding to the punched bit in the first parity check matrix.

[0165] For example, the first column set mentioned above can be the columns with column indices from 0 to X-1 in the first parity check matrix. Alternatively, the first column set can be the Xth column in the first parity check matrix with the largest column weight. Or, the first column set can be the Xth column in the first parity check matrix that includes punctured bits (such as bits that participate in encoding, do not enter the circular buffer, and are not transmitted). Here, X is a positive integer greater than 0 and not greater than the total number of columns in the first parity check matrix, such as X = Z, 2Z, etc.

[0166] The above method can reduce the impact of punched bits on the validity of check bits.

[0167] In one example, when the first basis matrix is ​​5G and BG1, the interleaving sequence can be [28Z+1,…,29Z,1,…,28Z,29Z+1,…,68Z].

[0168] Optionally, the first interleaving method described above can also satisfy the following requirement 4: the interleaving sequence satisfies: making the submatrix of the second parity check matrix corresponding to the second codeword... The difference between any two columns is within a preset range; where P is the index before the punctured bits are interleaved, that is, the index of the punctured bits in the first codeword. For example, if the first base sequence is BG1 of 5G, P = {0, 1, 2, ..., 2Z-1}. This is the index before the check bits are interleaved, which is the index of the check bits in the first codeword.

[0169] For example, the preset range is v. For instance, if the first base matrix is ​​BG1 of 5G, then v is 2.

[0170] In one example, when the first basis matrix is ​​5G and the interleaving sequence is BG1, the interleaving sequence can be {35Z+1,…36Z,38Z+1,…,39Z,32Z+1,…,33Z,1,…,32Z,33Z+1,…,35Z,36Z+1,…38Z,39Z+1,…,68Z}.

[0171] S903, the first device determines the first transmission start point based on the first code rate.

[0172] The second codeword includes the first transmission start point.

[0173] In one implementation, the first device can determine a first transmission start point based on the bit rate range corresponding to the first bit rate. For example, the second codeword corresponds to multiple transmission start points, each corresponding to a bit rate range. It is understood that the multiple transmission start points include the aforementioned first transmission start point, and the bit rate range corresponding to the first transmission start point includes the first bit rate.

[0174] For example, suppose It is a bitrate sequence arranged in ascending order. It is a sequence representing the start of transmission. If the transmission rate... Then the second codeword x′ starts from index 1. The bits are sent sequentially starting from index 1, meaning the first sending point is at index 2. The bits are z, where z is an integer greater than or equal to 0.

[0175] For example, sequence and It can be determined by the aforementioned interleaving sequence and the first basis matrix. For example, when the first basis matrix is ​​5G and the interleaving sequence is [28Z+1,…,29Z,1,…,28Z,29Z+1,…,68Z], for For example, if the first basis matrix is ​​5G and the interleaving sequence is {Z+1,1}, then the interleaving sequence can be: {35Z+1,…36Z,38Z+1,…,39Z,32Z+1,…,33Z,1,…,32Z,33Z+1,…,35Z,36Z+1,…38Z,39Z+1,…,68Z}. for The expression is {3Z+1,2Z+1,Z+1,1}.

[0176] In another possible implementation, the first device determines the first transmission start point based on the value of the first code rate. For example, the second codeword corresponds to multiple transmission start points, each corresponding to a code rate. It is understood that these multiple transmission start points include the aforementioned first transmission start point, and the code rate corresponding to the first transmission start point is the first code rate.

[0177] Optionally, the first transmission start point is located before the punched bit of the second codeword.

[0178] In one exemplary description, the first bit rate can also be described as the encoded bit rate or the initial transmission bit rate.

[0179] Optionally, the first code rate can be pre-configured by higher-layer signaling, MAC layer signaling, or downlink physical layer signals, or it can be obtained or calculated by the first device and the second device. For example, the first device and the second device can obtain the first code rate based on higher-layer signaling, MAC layer signaling, or downlink physical layer signals, or determine the first code rate according to the modulation and coding scheme (MCS).

[0180] Alternatively, the first code rate can be determined based on the first code length and the length of the information bits. For example, assuming the first code length is N and the length of the information bits is K, the first code rate can be R = K / N. The length of the information bits and the first code length can be pre-configured by higher-layer signaling, MAC layer signaling, or downlink physical layer signals, or they can be obtained or calculated by the first and second devices. For example, the first and second devices can determine the first code length based on the encoding method, the frame structure used to transmit the information bits, the number of layers, and the modulation scheme.

[0181] S904, the first device sends the third codeword according to the first transmission start point. Correspondingly, the second device receives the first information.

[0182] The second codeword includes the third codeword. For example, the third codeword is a bit sequence of length kZ / R bits in the second codeword, starting with the first transmission start point. Here, k is the number of information columns, Z is the boost value of the first base matrix, and R is the first code rate.

[0183] For example, the third codeword does not include the punctured bits in the second codeword x′, i.e., x′ T(P) Do not send; skip x′ when sending the third codeword. T(P) .

[0184] The first piece of information mentioned above can be the information after the third codeword has been transmitted through the channel.

[0185] S905, the second device determines the first position based on the first code rate.

[0186] The second information includes the first location, or it can be described as the location of the first information in the second information, which is the sending starting point mentioned above.

[0187] The method by which the second information determines the first location is the same as the method by which the first device determines the first transmission start point, and will not be repeated here.

[0188] S906, the second device obtains the second information based on the first position and the first information.

[0189] For example, as described above, the third codeword is a part of the second codeword, and correspondingly, the first information is a part of the second information. The second device can determine the position of the first information in the second information based on the first position, and thus recover the second information based on the first information.

[0190] S907, the second device deinterleaves the second information to obtain the third information.

[0191] It is understandable that the deinterleaving process of the second device is the reverse process of the interleaving process of the first device, which will not be explained further here.

[0192] S908, the second device decodes the third information based on the first check matrix.

[0193] This application reduces the impact of sudden interference on information transmission by using interleaving, and by using the starting point at different bit rates, it ensures good encoding performance at different bit rates with a low number of iterations, which can bring significant gains to encoding and decoding performance.

[0194] Example 2:

[0195] Figure 11 is a flowchart illustrating a communication method provided in an embodiment of this application. The method includes the following steps:

[0196] S1101, the first device encodes the information to be sent according to the first check matrix to obtain the first codeword.

[0197] The first parity check matrix is ​​generated based on the first base matrix.

[0198] S1102, the first device interleaves the first codeword according to the first interleaving method to obtain the second codeword.

[0199] The first interleaving method is used to interleave at least one first parity bit and at least one second parity bit. The number of 1s in the first column set corresponding to the row of the first parity bit in the first parity matrix is ​​1. The number of 1s in the first column set corresponding to the row of the second parity bit in the first parity matrix is ​​greater than 1. The first column set is the column corresponding to the punched bit in the first parity matrix.

[0200] For example, at least one first parity bit and at least one second parity bit are bits corresponding to extended parity columns in the first parity check matrix. For instance, if the first base matrix is ​​BG1 of 5G, the column indices corresponding to the at least one first parity bit and the at least one second parity bit in the first parity check matrix are both greater than or equal to 27.

[0201] In one possible implementation, the position of the first parity bit after interleaving is located before its position before interleaving. For example, the position of the first parity bit after interleaving is the bit position corresponding to the first column in the extended parity column; or, the position of the first parity bit after interleaving is the bit position corresponding to the previous parity column in the extended parity column.

[0202] For example, for the first parity bit, its position after interleaving is the bit position corresponding to the first column of the extended parity column. For the second parity bit, its position after interleaving is the bit position corresponding to the first parity bit in the extended parity column before interleaving. For the third parity bit, its position after interleaving is the bit position corresponding to the second parity bit in the extended parity column before interleaving. And so on.

[0203] The relative position of at least one of the second parity bits after interleaving can be the same as the relative position before interleaving.

[0204] For example, if the first base matrix is ​​BG1 of 5G, and the column indices of the extended parity columns in the first parity check matrix are 27, 28, 29, 30, 31, 32, and 33, then at least one first parity bit includes the bits corresponding to columns 29 and 33 in the first parity check matrix, and at least one second parity bit includes the bits corresponding to columns 27, 28, 30, 31, and 32 in the first parity check matrix.

[0205] Before interleaving, the order of the at least one first parity bit and the at least one second parity bit is as follows: parity bit corresponding to column index 27, parity bit corresponding to column index 28, parity bit corresponding to column index 29, parity bit corresponding to column index 30, parity bit corresponding to column index 31, parity bit corresponding to column index 32, and parity bit corresponding to column index 33.

[0206] The order of the at least one first check bit and the at least one second check bit is as follows: check bit corresponding to column index 29, check bit corresponding to column index 27, check bit corresponding to column index 28, check bit corresponding to column index 33, check bit corresponding to column index 30, check bit corresponding to column index 31, and check bit corresponding to column index 32.

[0207] As an alternative, the first interleaving method can interleave the first codeword according to the interleaving sequence, or it can be described as the original codeword (i.e., the first codeword) and the interleaved codeword (i.e., the second codeword) satisfying the interleaving sequence according to the first interleaving method.

[0208] In one implementation, the first interleaving method described above can satisfy one or more of the following requirements 1 to 4:

[0209] Requirement 1: When interleaving the first codeword, interleaving can be performed column-by-column of the first base matrix. As explained in the previous terminology introduction, each element of the first base matrix is ​​replaced with a Z*Z submatrix to generate the first parity check matrix, where Z is the lift value of the first base matrix. Therefore, the above method can also be understood as interleaving the Z bits corresponding to the column with column index i in the first base matrix as a whole.

[0210] For example, if T(iZ+1) = j, then T(iZ+t) = j + t holds for any t ∈ [2, 3, ..., Z], where T() is the interleaving sequence, and T(n) = m indicates that the bit at index n of the interleaved codeword (i.e., the second codeword) is the bit prime at index m of the original codeword (i.e., the first codeword). iZ+t is a column index of the second parity-check matrix, or can be described as iZ+t being the index of a bit of the second codeword, where i is a column index of the basis matrix corresponding to the second parity-check matrix. j is a column index of the first parity-check matrix, or can be described as j being the index of a bit of the first codeword.

[0211] The above method ensures that the Z bits corresponding to any column of the first basis matrix maintain their relative order during the interleaving process.

[0212] Requirement 2: The order of bits in the second codeword is punched bit, information bit, and parity bit. The parity bit includes the first and second parity bits mentioned above.

[0213] Requirement 3: The interleaved sequence is divided into two parts: a first subsequence V and a second subsequence U. The first subsequence indicates the non-interleaved bits in the first codeword. The first subsequence is a subsequence of the first codeword, and the order of the bits it includes is consistent with that of the first codeword. The bits indicated by the first subsequence are not necessarily adjacent in the interleaved sequence. The second subsequence indicates the interleaved bits in the first codeword, and includes the aforementioned first parity bit and second parity bit.

[0214] Requirement 4: The bit at index h indicated by the second subsequence satisfies one or more of the following two conditions:

[0215] Condition 1: h > (k + u)Z.

[0216] Where k is the number of information bits. For example, the first basis matrix is ​​BG1 of 5G, k = 22Z, where the first basis matrix is ​​a 46*68 matrix.

[0217] u is a constant. For example, the parameter u is determined by the first basis matrix, such as BG1 of 5G, where u = 4.

[0218] Z is the lifting value of the first basis matrix.

[0219] Condition 2: The number of 1s in the row corresponding to the bit with index h in the first parity check matrix is ​​1, and the first column set includes the column corresponding to the punched bit in the first parity check matrix.

[0220] For example, the first column set mentioned above can be the columns with column indices from 0 to X-1 in the first parity check matrix. Alternatively, the first column set can be the X column with the largest column weight in the first parity check matrix. Or, the first column set can be the X columns in the first parity check matrix that include punctured bits (such as bits that participate in encoding, do not enter the circular buffer, and are not transmitted). Here, X is a positive integer greater than 0 and not greater than the total number of columns in the first parity check matrix, such as X = Z, 2Z, etc.

[0221] In one example, the interleaving sequence can be determined by the first basis matrix. For example, for BG1 with a first basis matrix of 5G, the interleaving sequence can be {1,…26Z,32Z+1,…33Z,26Z+1,…29Z,38Z+1,…39Z,29Z+1,…,32Z,35Z+1,…,36Z,33Z+1,…35Z,36Z+1,…,38Z,39Z+1,…,68Z}, where V={1,…,32Z,33Z+1,…,35Z,36Z+1,…38Z,39Z+1,…,68Z} and U={32Z+1,…,33Z,38Z+1,…,39Z,35Z+1,…36Z}.

[0222] In another implementation, the first interleaving method described above can satisfy one or more of the above requirements 1, 2, and requirement 5 below.

[0223] Requirement 5: The interleaved sequence includes one or more of the following: T(kZ+uZ+t)=ε(t); t∈[1,2,…,Z]; T(t)=tZ,t∈[kZ+uZ+Z+1,…,ε(Z)]; T(ε(iZ)+t)=ε(iZ+t), i={1,2,…,M-1},t∈[1,2,…,Z]; T(t)=tZ,t∈[ε((i-1)Z)+Z+1,ε(iZ)];

[0224] T(t) = t, where t belongs to the first range of values, and the first range of values ​​is the complement of [1,2,…,Z]∪[kZ+uZ+Z+1,…,ε(Z)]∪[ε((i-1)Z)+Z+1,ε(iZ)] in {1,2,3,……,MZ}.

[0225] Where Z is the lifting value of the first base matrix. ε() includes at least one column index, and the row corresponding to ε() has 1s in the first column set. For example, the index of the row corresponding to any column index r in ε() is r-kZ. M is the number of rows in the first base matrix.

[0226] In one example, the interleaving sequence can be determined by the first basis matrix. For example, for BG1 with a first basis matrix of 5G, the interleaving sequence can be {1,…,26Z,28Z+1,…29Z,26Z+1,…,28Z,32Z+1,…,33Z,29Z+1,…,32Z,35Z+1,…,36Z,33Z+1,…,35Z,36Z+1,…,68Z}.

[0227] S1103, the first device sends the third codeword. Correspondingly, the second device receives the first information.

[0228] The second codeword includes the third codeword. For example, the third codeword is a bit sequence of length kZ / R bits in the second codeword, starting with the first bit (i.e., the bit with index 0). Here, k is the number of information columns, Z is the boost value of the first base matrix, and R is the first code rate.

[0229] For example, the third codeword does not include the punched bit in the second codeword, i.e., x′ T(P) Do not send; skip x′ when sending the third codeword. T(P) Where P is the index before the punctured bits are interleaved, that is, the index of the punctured bits in the first codeword. For example, if the first base sequence is BG1 of 5G, P = {0, 1, 2, ..., 2Z-1}.

[0230] The first piece of information mentioned above can be the information after the third codeword has been transmitted through the channel.

[0231] S1104, the second device obtains the second information based on the first information.

[0232] For example, as described above, the third codeword is a part of the second codeword, and correspondingly, the first information is a part of the second information. The second device can recover the second information based on the position of the first information in the second information (i.e., the first information is a bit sequence of length kZ / R bits in the second information, starting with the first bit (i.e., the bit with index 0).

[0233] S1105, the second device deinterleaves the second information to obtain the third information.

[0234] It is understandable that the deinterleaving process of the second device is the reverse process of the interleaving process of the first device, which will not be explained further here.

[0235] S1106, the second device decodes the third information according to the first check matrix.

[0236] This application reduces the impact of sudden interference on information transmission through interleaving. Furthermore, the interleaving method provided by this application ensures good encoding performance at different code rates even with a low number of iterations, resulting in significant performance gains for encoding and decoding. In addition, compared to the first embodiment described above, Embodiment 2 of this application uses the same transmission starting point (i.e., the first bit) for different code rates, leading to lower implementation complexity.

[0237] It is understood that, in order to achieve the functions in the above embodiments, the device includes hardware structures and / or software modules corresponding to each function. Those skilled in the art should readily recognize that, based on the units and method steps described in conjunction with the embodiments disclosed in this application, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed by hardware or by computer software driving hardware depends on the specific application scenario and design constraints of the technical solution.

[0238] Figures 12 and 13 are schematic diagrams of possible communication devices provided in embodiments of this application. These communication devices can be used to implement the functions of the first device and / or the second device in the above method embodiments, and thus can also achieve the beneficial effects of the above method embodiments. The first device and / or the second device can be referred to the description in the above method embodiments, and will not be repeated here. For example, the device can be used to implement the function of the first device in the process shown in Figure 9 or Figure 11, or to implement the function of the second device in the process shown in Figure 9 or Figure 11.

[0239] The communication device 1600 shown in Figure 12 includes a processing unit 1610 and a transceiver unit (or communication unit) 1620. The communication device 1600 is used to implement the functions of the first device and / or the second device in the above method embodiments. The transceiver unit may include a sending unit and a receiving unit, used for sending and receiving, respectively.

[0240] Taking the process shown in Figure 9 as an example, the communication device 1600 can be used to implement the function of the first device in the method embodiment shown in Figure 9. Specifically, the processing unit 1610 can be used to encode the information to be sent according to the first parity check matrix, interleave the first codeword, and determine the first transmission start point according to the first code rate. For details, please refer to the corresponding description of the process in Figure 9. The transceiver unit 1620 can be used to send the third codeword according to the first transmission start point.

[0241] In one possible implementation, when the processing unit 1610 determines the first transmission start based on the first code rate, it can specifically determine the first transmission start based on the code rate range corresponding to the first code rate, wherein the second codeword corresponds to multiple transmission start points, each of the multiple transmission start points corresponds to a code rate range, the multiple transmission start points include the first transmission start point, and the code rate range corresponding to the first transmission start point includes the first code rate; or, the first transmission start point is determined based on the value of the first code rate, wherein the second codeword corresponds to multiple transmission start points, each of the multiple transmission start points corresponds to a code rate, the multiple transmission start points include the first transmission start point, and the code rate corresponding to the first transmission start point is the first code rate.

[0242] In one possible implementation, when processing unit 1610 interleaves the first codeword, it may specifically interleave the first codeword according to a first interleaving method, wherein the first interleaving method is used to interleave at least one parity bit before the punctured bit.

[0243] In one possible implementation, when the processing unit 1610 interleaves the first codeword according to the first interleaving method, it can specifically interleave the first codeword according to a first sub-sequence and a second sub-sequence; wherein, the first sub-sequence indicates the bits in the first codeword that have not been interleaved, and the second sub-sequence indicates the bits in the first codeword that have been interleaved, wherein the bits indicated by the second sub-sequence are located before the punctured bits after interleaving.

[0244] The communication device 1600 can also be used to implement the functions of the second device in the method embodiment shown in FIG9. Specifically, the communication unit 1620 can be used to receive the first information. The processing unit 1610 can be used to determine the first position according to the first code rate, obtain the second information according to the first position and the first information, deinterleave the second information, and decode the third information according to the first parity check matrix. For details, please refer to the corresponding description of the flowchart in FIG9.

[0245] Taking the process shown in Figure 11 as an example, the communication device 1600 can be used to implement the function of the first device in the method embodiment shown in Figure 11. Specifically, the processing unit 1610 can be used to encode the information to be sent according to the first parity check matrix to obtain the first codeword, wherein the first parity check matrix is ​​determined according to the first base matrix; and to interleave the first codeword according to the first interleaving method, as detailed in the corresponding description of the process in Figure 11. The communication unit 1620 can be used to send the third codeword, as detailed in the corresponding description of the process in Figure 11.

[0246] The communication device 1600 can also be used to implement the functions of the second device in the method embodiment shown in FIG11. Specifically, the communication unit 1620 can be used to acquire first information. The processing unit 1610 can be used to acquire second information based on the first information, deinterleave the second information according to the first interleaving method, and decode the third information according to the first parity check matrix. For details, please refer to the corresponding description of the flowchart in FIG11.

[0247] For a more detailed description of the processing unit 1610 and the transceiver unit 1620, please refer directly to the description of the process steps and their related features in the above method embodiments, which will not be repeated here.

[0248] The communication device 1700 shown in Figure 12 includes a processor 1710 and an interface circuit 1720. The processor 1710 and the interface circuit 1720 are coupled to each other. It is understood that the interface circuit 1720 can be a transceiver or an input / output interface. Optionally, the communication device 1700 may also include a memory 1730 for storing instructions executed by the processor 1710, or storing input data required by the processor 1710 to execute instructions, or storing data generated after the processor 1710 executes instructions.

[0249] When the communication device 1700 is used to implement the above method embodiment, the processor 1710 is used to implement the function of the processing unit 1610, and the interface circuit 1720 is used to implement the function of the transceiver unit 1620.

[0250] It is understood that the processor in the embodiments of this application can be a central processing unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), microprocessors without interlocked piped stages architecture (MIPS), advanced instruction set computers (RISC) machines (ARM), network processors (NPs), field-programmable gate arrays (FPGAs), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. A general-purpose processor can be a microprocessor or any conventional processor.

[0251] The method steps in the embodiments of this application can be implemented in hardware or by a processor executing software instructions. The software instructions can consist of corresponding software modules, which can be stored in random access memory, flash memory, read-only memory, programmable read-only memory, erasable programmable read-only memory, electrically erasable programmable read-only memory, registers, hard disk, portable hard disk, compact disc read-only memory (CD-ROM), or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor, enabling the processor to read information from and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and storage medium can reside in an ASIC. Furthermore, the ASIC can reside in a first communication device (or first device) or a second communication device (or second device). Alternatively, the processor and storage medium can exist as discrete components in the first communication device (or first device) or the second communication device (or second device).

[0252] In the above embodiments, implementation can be achieved entirely or partially through software, hardware, firmware, or any combination thereof. When implemented using software, it can be implemented entirely or partially in the form of a computer program product. The computer program product includes one or more computer programs or instructions. A computer program is a set of instructions that directs each step of an action of an electronic computer or other device having a first communication device and / or a second communication device. It is typically written in a programming language and runs on a target architecture. When the computer program or instructions are loaded and executed on a computer, the processes or functions described in the embodiments of this application are performed, in whole or in part. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer program or instructions can be stored in a computer-readable storage medium or transferred from one computer-readable storage medium to another. For example, the computer program or instructions can be transferred from one website, computer, server, or data center to another website, computer, server, or data center via wired or wireless means. The computer-readable storage medium can be any available medium accessible to a computer or a data storage device such as a server or data center integrating one or more available media. The available medium may be a magnetic medium, such as a floppy disk, hard disk, or magnetic tape; or an optical medium, such as a digital video optical disc; or a semiconductor medium, such as a solid-state drive. The computer-readable storage medium may be volatile or non-volatile, or may include both types.

[0253] Based on the same technical concept, embodiments of this application also provide a computer-readable storage medium, including a program or instructions, which, when run on a computer, cause the methods in the above method embodiments to be executed.

[0254] Based on the same technical concept, embodiments of this application also provide a computer program product, including instructions that, when run on a computer, cause the methods in the above method embodiments to be executed.

[0255] Based on the same technical concept, embodiments of this application also provide a communication system, including a first device and a second device. Taking a system including a first device and a second device as an example, the first device can implement the method shown in FIG9, and the second device can implement the method shown in FIG9.

[0256] Based on the same technical concept, embodiments of this application also provide a communication system, including a first device and a second device. Taking the system including a first device and a second device as an example, the first device can implement the method shown in FIG11, and the second device can implement the method shown in FIG11.

[0257] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product implemented on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, or optical storage) containing computer-usable program code.

[0258] In the various embodiments of this application, unless otherwise specified or in case of logical conflict, the terminology and / or descriptions of different embodiments are consistent and can be referenced by each other. The technical features of different embodiments can be combined to form new embodiments according to their inherent logical relationship.

[0259] It is understood that the various numerical designations used in the embodiments of this application are merely for descriptive convenience and are not intended to limit the scope of the embodiments of this application. The order of the process numbers described above does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

Claims

1. A communication method, characterized in that, include: The information to be sent is encoded according to the first parity check matrix to obtain the first codeword, wherein the first parity check matrix is ​​determined according to the first base matrix; Interleave the first codeword to obtain the second codeword; A first transmission start point is determined based on a first code rate, and the second codeword includes the first transmission start point; The third codeword is sent according to the first transmission starting point, and the second codeword includes the third codeword.

2. The method as described in claim 1, characterized in that, Determining the first transmission start point based on the first code rate includes: The first transmission start point is determined based on the bit rate range corresponding to the first bit rate, wherein the second codeword corresponds to multiple transmission start points, each of the multiple transmission start points corresponds to a bit rate range, the multiple transmission start points include the first transmission start point, and the bit rate range corresponding to the first transmission start point includes the first bit rate; Alternatively, the first transmission start point can be determined based on the value of the first code rate, wherein the second codeword corresponds to multiple transmission start points, each of the multiple transmission start points corresponds to a code rate, the multiple transmission start points include the first transmission start point, and the code rate corresponding to the first transmission start point is the first code rate.

3. The method as described in claim 1 or 2, characterized in that, The interleaving of the first codeword includes: The first codeword is interleaved according to a first interleaving method, wherein the first interleaving method is used to interleave at least one parity bit before the punctured bit.

4. The method as described in claim 3, characterized in that, The step of interleaving the first codeword according to the first interleaving method includes: The first codeword is interleaved according to the first subsequence and the second subsequence; Wherein, the first subsequence indicates the bits in the first codeword that have not been interleaved, and the second subsequence indicates the bits in the first codeword that have been interleaved, wherein the bits indicated by the second subsequence are located before the punctured bits after interleaving.

5. The method as described in claim 4, characterized in that, The index h bits indicated by the second subsequence satisfy one or more of the following conditions: h>(k+u)Z, where k is the number of information columns, u is a constant, and Z is the lifting value of the first base matrix; The number of 1s in the row corresponding to the bit with index h in the first check matrix is ​​1, and the first column set includes the column corresponding to the punched bit in the first check matrix.

6. The method according to any one of claims 3-5, characterized in that, The first interleaving method interleaves column by column of the first base matrix.

7. The method according to any one of claims 3-6, characterized in that, The first interleaving method satisfies: The submatrix of the second parity check matrix corresponding to the second codeword The difference in column weight between any two columns is within a preset range; Wherein, P is the index before the punctured bits are interleaved, and the... The index before bit interleaving is used for verification, where k is the number of information columns and Z is the boost value of the first base matrix.

8. The method according to any one of claims 1-7, characterized in that, The first transmission start point is located before the punched bit.

9. The method according to any one of claims 1-8, characterized in that, The length of the third codeword is kZ / R bits, where k is the number of information columns, Z is the boost value of the first base matrix, and R is the first code rate.

10. A communication method, characterized in that, include: Obtain first information; The first position is determined based on the first bit rate, and the second information includes the first position; The second information is obtained based on the first location and the first information; The second information is de-interleaved to obtain the third information; The third information is decoded according to the first parity check matrix, wherein the first parity check matrix is ​​determined based on the first base matrix.

11. A communication method, characterized in that, include: The information to be sent is encoded according to the first parity check matrix to obtain the first codeword, wherein the first parity check matrix is ​​determined according to the first base matrix; The first codeword is interleaved according to the first interleaving method to obtain the second codeword. The first interleaving method is used to interleave at least one first parity bit and at least one second parity bit. The number of 1s in the first column set corresponding to the row of the first parity bit in the first parity matrix is ​​1. The number of 1s in the first column set corresponding to the row of the second parity bit in the first parity matrix is ​​greater than 1. The first column set is the column corresponding to the punched bit in the first parity matrix. Send a third codeword, wherein the second codeword includes the third codeword.

12. A communication method, characterized in that, include: Obtain first information; Obtain the second information based on the first information; The second information is de-interleaved according to the first interleaving method to obtain the third information. The first interleaving method is used to interleave the first parity bit and the second parity bit. The number of 1s in the first column set corresponding to the row of the first parity bit in the first parity matrix is ​​1. The number of 1s in the first column set corresponding to the row of the second parity bit in the first parity matrix is ​​greater than 1. The first parity matrix is ​​determined according to the first base matrix. The first column set is the column corresponding to the punched bit in the first parity matrix. The third information is decoded based on the first check matrix.

13. The method as described in claim 11 or 12, characterized in that, The at least one first check bit and the at least one second check bit are bits corresponding to the extended check column in the first check matrix.

14. The method as described in claim 13, characterized in that, The first base matrix is ​​5G BG1, and the column indices of the at least one first parity bit and the at least one second parity bit in the first parity matrix are both greater than or equal to 27.

15. The method as described in claim 13 or 14, characterized in that, The position of the first parity bit after interleaving is before the position before interleaving.

16. The method as described in claim 15, characterized in that, The position of the first parity bit after interleaving is the bit position corresponding to the first column in the extended parity column; Alternatively, the position of the first parity bit after interleaving is the bit position of the previous parity column in the extended parity column corresponding to the first parity bit.

17. The method as described in claim 15 or 16, characterized in that, The relative position of at least one second check bit after interleaving is the same as its relative position before interleaving.

18. The method as described in claim 17, characterized in that, The first base matrix is ​​5G BG1, the at least one first parity bit includes the bits corresponding to columns 29 and 33 in the first parity matrix, and the at least one second parity bit includes the bits corresponding to columns 27, 28, 30, 31, and 32 in the first parity matrix; Before interleaving, the column indices of the extended parity columns corresponding to the at least one first parity bit and the at least one second parity bit are in the following order: 27, 28, 29, 30, 31, 32, 33. After interleaving, the column indices of the extended check columns corresponding to the at least one first check bit and the at least one second check bit are in the following order: 29, 27, 28, 33, 30, 31, 32.

19. The method as described in claim 11 or 12, characterized in that, The first interleaving method includes one or more of the following: T(kZ+uZ+t)=ε(t); t∈[1,2,…,Z], where Z is the lifting value of the first base matrix, and ε() includes at least one column index, wherein the row corresponding to ε() has 1 1 in the first column set; T(t)=tZ,t∈[kZ+uZ+Z+1,…,ε(Z)]; T(ε(iZ)+t)=ε(iZ+t), i={1,2,…,M-1},t∈[1,2,…,Z], where M is the number of rows of the first basis matrix; T(t)=tZ, t∈[ε((i-1)Z)+Z+1,ε(iZ)]; T(t) = t, where t belongs to the first range of values, and the first range of values ​​is the complement of [1,2,…,Z]∪[kZ+uZ+Z+1,…,ε(Z)]∪[ε((i-1)Z)+Z+1,ε(iZ)] in {1,2,3,……,MZ}.

20. The method as described in claim 19, characterized in that, The row index corresponding to any column index r in ε() is r-kZ.

21. The method according to any one of claims 11-20, characterized in that, The first interleaving method includes: Interleaving is performed column-by-column of the first base matrix.

22. The method as described in claim 11, characterized in that, The length of the third codeword is kZ / R bits, where k is the number of information bits, Z is the boost value of the first base matrix, and R is the first code rate.

23. A communication device, characterized in that, It includes modules for performing the method as described in any one of claims 1-9, or the method as described in claim 10, or modules for performing the method as described in any one of claims 11, 13-22, or modules for performing the method as described in any one of claims 12-22.

24. A communication device, characterized in that, The communication device includes at least one processor, the at least one processor being configured such that the method of any one of claims 1-9, or the method of claim 10, or including methods for performing any one of claims 11, 13-22, or including methods for performing any one of claims 12-22, is executed by the communication device.

25. A chip or chip system, characterized in that, The chip or chip system includes: At least one processor and an interface, the at least one processor being configured to call and execute instructions from the interface, wherein when the at least one processor executes the instructions, the method of any one of claims 1-9, or the method of claim 10, or including methods for performing any one of claims 11, 13-22, or including methods for performing any one of claims 12-22, is executed.

26. A computer-readable storage medium, characterized in that, The computer-readable storage medium is used to store a computer program that, when run on a computer, causes the method of any one of claims 1-9, or the method of claim 10, or the method comprising performing any one of claims 11, 13-22, or the method comprising performing any one of claims 12-22 to be performed.

27. A computer program product, characterized in that, The computer program product includes a computer program that, when run on a computer, causes the method of any one of claims 1-9, or the method of claim 10, or the method of any one of claims 11, 13-22, or the method of any one of claims 12-22 to be performed.

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