Energy Efficient ICT TRIZ Cases
- Semiconductor Clock Control via Merged Signal Generation
A semiconductor integrated circuit device employs a merged clock control unit to synchronize signal generation across pipeline operation blocks.
- Application Layer Bandwidth Aggregation via Routing Table Updates
An application layer control module aggregates bandwidth across multiple active physical interfaces using dynamic routing table updates.
- Selective Antenna Receiver Diversity Control
Controller varies antenna gain based on channel quality indicators to minimize power consumption while maintaining reception performance.
- Bluetooth Long-Range Link Adaptation via Rate Indication Field
A rate indication field in the PHY header enables transmitting devices to adjust data rates dynamically without receiver feedback.
- PDA Phone Power Control Mode Transition
A PDA phone power control apparatus transitions operational states to sleep mode.
- Processor Power Control Unit Duty Cycle Enforcement
A processor power control unit enforces duty cycle constraints on power consumption levels.
- Clock Control Unit Gating for Multi-Threaded Processor Power Savings
A clock control unit generates a gated timing signal using a power symbol to distribute conditional clocks across processor cores.
- Memory Controller Power Scheduling via Device Feedback
A memory controller dynamically schedules commands based on real-time power characteristic information from the memory device.
- Cross-Host Memory Segment Consolidation for VM Density
A resource consolidation unit identifies identical memory segments across multiple host computers and migrates provisioned resources to optimize memory utilization.
- Power Management Unit State Machine for Low Power Modes
A self-contained power management unit uses a state machine to control voltage levels across independent domains.
- DVFS Control Unit for Dynamic Voltage Frequency Scaling
A DVFS control unit selects operating tables to adjust voltage and frequency.
- Network Interface Packet Filtering for Power Efficiency
Hardware-based packet filtering reduces processor interrupts, maintaining responsiveness while minimizing power consumption.
- Polynomial Multiplication Hardware Accelerator for Elliptic Curve Cryptography
Segmenting polynomials via iterative Karatsuba multiplication lowers chip area by 30% while maintaining cryptographic security.
- Dynamic Voltage Frequency Scaling Using Peak Workload History
A dynamic voltage and frequency scaling method calculates increased operating frequencies based on previous maximum peak workloads detected during history periods.
- Management Controller Task Execution Compliance
A management controller checks system information before forwarding tasks to managed nodes.
- Fan Speed Control Algorithm for Thermal Management
A quadratic algorithm computes fan speed from sensor data to balance heat dissipation and power consumption.
- Magnetic Disk Power Control via Variable Wait Times
A magnetic disk power control method sets variable wait times based on instruction types to reduce energy consumption.
- Virtual Machine CPU Time Management via Isolate Suspension
A virtual machine tracks per-polling period CPU usage to compute isolate rates and suspends processes exceeding quotas.
- Processor Performance State Control via Threshold Logic
A logic circuit monitors processor operating time to trigger performance state determination algorithms.