Semiconductor structure and method of fabricating the same

Abstract

The application provides a semiconductor structure and a manufacturing method thereof. The manufacturing method comprises the following steps: providing a substrate, wherein a plurality of active regions are arranged in the substrate; removing part of the substrate to form a groove in the substrate, and at least the active regions are exposed in the groove; forming a bit line contact structure on a region corresponding to the active region in the groove; forming a dielectric layer on the groove, and a gap with a top opening is formed between the dielectric layer and the sidewall of the bit line contact structure; and forming a bit line on the bit line contact structure, and the bit line seals the opening of the gap. The manufacturing method of the semiconductor structure provided by the application can reduce the parasitic capacitance between the bit line contact structure and the storage node contact structure, thereby improving the working reliability of the semiconductor structure.

Claims

1. A method for fabricating a semiconductor structure, characterized in that, include: A substrate is provided, wherein a plurality of spaced-apart active regions are disposed in the substrate; A portion of the substrate is removed to form a groove in the substrate, wherein at least the active region is exposed in the groove; A bit line contact structure is formed in the region corresponding to the active region in the groove; A dielectric layer is formed on the groove, and a gap with a top opening is formed between the dielectric layer and the sidewall of the bit line contact structure; Bit lines are formed on the bit line contact structure; The bit line blocks the opening of the gap; After forming a bit line contact structure in the region corresponding to the active region in the groove, the method further includes: A second insulating layer is formed on the formed bit line contact structure and the groove; The step of forming a dielectric layer on the groove and forming a gap with a top opening between the dielectric layer and the sidewall of the bit line contact structure includes: A dielectric layer is formed on the second insulating layer; Remove a portion of the dielectric layer so that the top of the bit line contact structure is higher than the top of the dielectric layer; Remove the second insulating layer from the sidewall of the bit line contact structure, and retain the second insulating layer at a predetermined height at the bottom of the sidewall of the bit line contact structure, so that a gap with a top opening is formed between the dielectric layer and the sidewall of each bit line contact structure.

2. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The ratio of the width of the gap to the width of the bit line contact structure is 1:2 to 1:

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3. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The step of removing a portion of the substrate to form a groove in the substrate, wherein at least the active region is exposed in the groove, includes: A first insulating layer and a first mask layer are formed on the substrate; The first mask layer is patterned, and a portion of the substrate is removed using the patterned first mask layer as a mask to form a groove in the substrate, wherein at least the active region is exposed in the groove.

4. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The step of forming a bit line contact structure on the groove includes: A bit line contact layer is formed on the groove; A second mask layer is formed on the bit line contact layer; The second mask layer is patterned, and using the patterned second mask layer as a mask, a portion of the bit line contact layer is removed, while the bit line contact layer corresponding to the active region in the groove is retained to form the bit line contact structure.

5. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The top of the bit line contact structure is higher than the top of the dielectric layer.

6. The method for fabricating a semiconductor structure according to claim 5, characterized in that, The height difference between the top of the bit line contact structure and the top of the dielectric layer is 1 / 10 to 9 / 10 of the height of the bit line contact structure.

7. The method for fabricating a semiconductor structure according to any one of claims 1 to 6, characterized in that, The width of the bit line contact structure is 1 / 2 to 1 / 3 of the width of the groove.

8. The method for fabricating a semiconductor structure according to claim 7, characterized in that, The axis of symmetry of the cross section of the bit line contact structure coincides with the axis of symmetry of the cross section of the groove.

9. The method for fabricating a semiconductor structure according to claim 1, characterized in that, The bit line has a sidewall extension formed on the sidewall of the bit line contact structure, extending into the gap, and the sidewall extension blocks the opening of the gap.

10. The method for fabricating a semiconductor structure according to claim 9, characterized in that, In the vertical direction, the extension of the sidewall into the gap extends to a depth of 1 / 2 to 1 / 3 of the depth of the gap.

11. The method for fabricating a semiconductor structure according to claim 9, characterized in that, The step of forming the bit line on the bit line contact structure includes: A first conductive layer is formed on the dielectric layer and the bit line contact structure, and a portion of the first conductive layer blocks the opening of the gap and extends into the gap, the first conductive layer extending into the gap forming the sidewall extension; A second conductive layer is formed on the first conductive layer; Remove the first conductive layer and the second conductive layer on the dielectric layer to expose the dielectric layer, retain the first conductive layer and the second conductive layer on the bit line contact structure, and retain the first conductive layer at the opening of the gap; A protective layer is formed on the dielectric layer and the second conductive layer, and the first conductive layer, the second conductive layer and the protective layer on each bit line contact structure form the bit line.

12. The method for fabricating a semiconductor structure according to claim 1, characterized in that, After forming the bit line on the bit line contact structure, the method further includes: A plurality of spaced contact plugs are formed on the substrate. The contact plugs are electrically connected to the active region and are located between two adjacent bit lines and are insulated from the bit lines. A storage node contact structure is formed on each of the contact plugs, and the storage node contact structure is electrically connected to the contact plug.

13. A semiconductor structure, formed using the method for fabricating a semiconductor structure as described in claim 1, characterized in that, include: A substrate, the substrate including a groove, wherein at least an active region is exposed in the groove; Bit line contact structure, the bit line contact structure being located on the groove; The bit line contact structure located in the groove is electrically connected to the active region in the groove; A dielectric layer is located on the groove, and a gap with a top opening is formed between the dielectric layer and the sidewall of the bit line contact structure; Bit lines are located on the bit line contact structure, and a portion of the bit lines block the opening of the gap.

14. The semiconductor structure according to claim 13, characterized in that, The height difference between the top of the bit line contact structure and the top of the dielectric layer is 1 / 10 to 9 / 10 of the height of the bit line contact structure.

15. The semiconductor structure according to claim 13, characterized in that, The width of the bit line contact structure is 1 / 2 to 1 / 3 of the width of the groove.

16. The semiconductor structure according to claim 13, characterized in that, The bit line has a sidewall extension that wraps around the sidewall of the bit line contact structure and extends into the gap, the sidewall extension blocking the opening of the gap.

17. The semiconductor structure according to claim 16, characterized in that, In the vertical direction, the extension of the sidewall into the gap extends to a depth of 1 / 2 to 1 / 3 of the depth of the gap.

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