A neural network circuit for emotional habituation with context dependence and generalization

By designing a context-dependent and generalized emotional habituation neural network circuit, the problem of failure to effectively consider the impact of situations and emotions on habituation in the existing technology is solved, and habituation adjustments under situations and emotions are achieved, which is in line with biological learning Features improve learning flexibility and adaptability.

CN114970850BActive Publication Date: 2024-12-13ZHENGZHOU UNIVERSITY OF LIGHT INDUSTRY
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Patent Information

Application Number
CN202210751280.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2022-06-28
Publication Date
2024-12-13
Estimated Expiration
2042-06-28

AI Technical Summary

Technical Problem

Existing neural networks have failed to effectively consider the generalization problems of habituation and habituation with emotional stimuli, and have failed to achieve situational dependence and emotional control.

Method used

Design an emotional habituation neural network circuit with situational dependence and generalization, and realize habituation and de-habitation under a single stimulus through the habituation module, and realize habituation under different emotional stimuli through the emotion control module, and realize habituation under different emotional stimuli through generalization The module realizes habituation similar to stimuli, and combines the situational control module to realize response adjustment under situational changes.

Benefits of technology

The two learning modes of habituation and de-habitization in biological non-associative learning are realized, and the habituation process is accelerated or slowed down under different situations and emotions, which is in line with biological characteristics and improves learning flexibility and adaptability.

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Abstract

The present invention proposes an emotion habituation neural network circuit with context dependence and generalization, wherein the stimulation signal is connected to the habituation module, the generalization module, the emotion control module, and the context control module respectively, the context control signal is connected to the context control module, the generalization module, the context control module, and the context control module are all connected to the habituation module, and the habituation module outputs a signal; the input signal end representing the emotion control signal is connected to the emotion control module. The present invention realizes the habituation and dehabituation in biological non-associative learning through the habituation module and the generalization module, and realizes that two similar stimuli can habituate the organism; the emotion control module can respectively speed up, maintain, and slow down the speed of habituation of the organism; the context control module realizes that when the context information changes, the habituated response is slightly changed, and the response will habituate again after a period of time.
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Description

Technical Field

[0001] The present invention relates to the technical field of neural network circuits, and in particular to an emotion habituation neural network circuit with context dependence and generalization. Background Art

[0002] As an emerging nanoscale electronic device, memristors have been widely used in logical operations, secure communications, biological behavior simulation, analog circuits, and other fields, and have great application prospects. The variability and non-volatility of memristor resistance are very similar to synaptic characteristics. Memristors can be used to simulate biological synapses to construct neuromorphic circuits and realize biological learning and memory functions.

[0003] Associative learning and non-associative learning are two common learning modes in organisms. Associative learning refers to the co-occurrence of two stimuli, and after a period of time, the two stimuli will become associated. Non-associative learning refers to the behavior change caused by the repeated presentation of a single stimulus. There are two main learning modes of non-associative learning, namely habituation and sensitization (dehabituation). Some scholars have proposed neural network circuits based on memristor habituation and dehabituation, but have not considered the factors that affect habituation and the generalization of habituation. The neural network circuit proposed in the present invention solves these problems. Summary of the invention

[0004] In view of the technical problem that the existing neural network does not consider the habituation with emotional stimulation and the generalization of habituation, the present invention proposes an emotional habituation neural network circuit with context dependence and generalization, which realizes habituation and dehabituation under repeated single stimulation through the habituation module, realizes habituation under different emotional stimulation through the emotion control module; realizes habituation in different contexts through the context control module; and realizes habituation of two similar stimulations through the generalization module.

[0005] In order to achieve the above-mentioned purpose, the technical scheme of the present invention is implemented as follows: an emotion habituation neural network circuit with context dependence and generalization, comprising input signal terminals N1-N5, a habituation module I, a generalization module, an emotion control module I, a context control module I, a habituation module II, an emotion control module II, a context control module II and an output signal terminal, wherein the input signal terminal N1 representing the stimulus signal is respectively connected to the habituation module I, the generalization module, the emotion control module I and the context control module I, the input signal terminal N3 representing the context control signal is connected to the context control module I, the generalization module and the context control module Ⅰ and situation control module Ⅰ are connected to the habituation module Ⅰ, and the output end of the habituation module Ⅰ is the output signal end Ⅰ; the input signal end N5 representing the emotion control signal is respectively connected to the emotion control module Ⅰ and the emotion control module Ⅱ; the input signal end N2 representing the stimulus signal is respectively connected to the habituation module Ⅱ, the generalization module, the emotion control module Ⅱ, and the situation control module Ⅱ, and the input signal end N4 representing the situation control signal is connected to the situation control module Ⅱ; the generalization module, the emotion control module Ⅱ and the situation control module Ⅱ are all connected to the habituation module Ⅱ, and the output end of the habituation module Ⅱ is the output signal end Ⅱ.

[0006] Preferably, the habituation module I and the habituation module II both include a synaptic neuron circuit I, a feedback regulation circuit, a voltage summing unit SUM1 and a voltage summing unit SUM3, the input signal terminal N1 or the input signal terminal N2 is connected to an input terminal of the voltage summing unit SUM1, the output terminal of the voltage summing unit SUM1 is connected to an input terminal of the voltage summing unit SUM3, the output terminal of the context control module I or the context control module II is connected to the other input terminal of the voltage summing unit SUM3, the output terminal of the voltage summing unit SUM3 is connected to the synaptic neuron circuit I; the output terminal of the synaptic neuron circuit I is connected to the feedback regulation circuit I; the input signal terminal N1 or the input signal terminal N2 is connected to the feedback regulation circuit, and the feedback regulation circuit is connected to the other input terminal of the voltage summing unit SUM1; the output terminal of the generalization module is connected to the feedback regulation circuit, and the output terminal of the emotion control module I or the emotion control module II is connected to the feedback regulation circuit.

[0007] Preferably, the synaptic neuron circuit I comprises a memristor M3, an operational amplifier OP7, an absolute value unit ABS1 and a voltage-controlled switch S5, the positive end of the memristor M3 is connected to the output end of the voltage summing unit SUM3, and the negative end of the memristor M3 is respectively connected to the inverting input end of the operational amplifier OP7 and the resistor R 43 The non-inverting input terminal of the operational amplifier OP7 is grounded, and the resistor R 43The output end of the operational amplifier OP7 is connected to the input end of the absolute value unit ABS1, the output end of the absolute value unit ABS1 is connected to the second contact of the voltage-controlled switch S5, and the first contact of the voltage-controlled switch S5 is respectively connected to one end of the resistor R7 and the input end of the feedback regulation circuit I; the input signal terminal N1 is connected to the positive phase input end of the voltage-controlled switch S5, and the other end of the resistor R7 and the negative phase input end of the voltage-controlled switch S5 are grounded.

[0008] Preferably, the feedback regulation circuit includes a first voltage selection unit, a memristor M5, an operational amplifier OP 19 and operational amplifier OP 17 , mathematical operation unit ABM3, a first voltage control unit, a second voltage control unit, a voltage summing unit SUM5 and a voltage summing unit SUM7, a first contact of the voltage-controlled switch S5 of the synaptic neuron circuit I is connected to the input end of the first voltage selection unit, an output end of the first voltage selection unit is connected to an input end of the voltage summing unit SUM7, an output end of the emotion control module I or the emotion control module II is connected to another input end of the voltage summing unit SUM7, an output end of the voltage summing unit SUM7 is connected to the sixth voltage control unit or the seventh voltage control unit of the generalization module, the sixth voltage control unit or the seventh voltage control unit is respectively connected to the positive end of the memristor M5 and an input end of the mathematical operation unit ABM3, and the negative end of the memristor M5 is respectively connected to the operational amplifier OP 19 The inverting input terminal and resistor R 51 Connected to the operational amplifier OP 19 The non-inverting input terminal is grounded, and the resistor R 51 With the operational amplifier OP 19 The output end of the operational amplifier OP is connected 19 The output end of the mathematical operation unit ABM3 is connected to an input end of the mathematical operation unit ABM3, and the output end of the mathematical operation unit ABM3 is connected to the operational amplifier OP 17 The inverting input terminal of the operational amplifier OP 17 The non-inverting input terminal is connected to the power supply V 21 The positive pole of the power supply V 21 The negative terminal of the operational amplifier OP 17 The output end of is connected to the first voltage control unit, the first voltage control unit is respectively connected to the emotion control module I or the emotion control module II and one input end of the voltage summing unit SUM5, the other input end of the voltage summing unit SUM5 is connected to the other output end of the emotion control module I or the emotion control module II; the output end of the voltage summing unit SUM5 is connected to the other input end of the second voltage control unit; the input signal end N1 is connected to the other input end of the second voltage control unit through the NOT gate D 23The output terminal of the second voltage control unit is connected to one input terminal of the second voltage control unit, and the output terminal of the second voltage control unit is connected to the other input terminal of the voltage summing unit SUM1.

[0009] Preferably, the first voltage selection unit of the feedback regulation circuit includes a NOT gate D5, a voltage control unit I, a voltage control unit II and a voltage control unit III, the first contact of the voltage control switch S5 of the synaptic neuron circuit I is respectively connected to the input ends of the NOT gate D5, the voltage control unit II and the voltage control unit III, the NOT gate D5 is connected to the input end of the voltage control unit I, and the output ends of the voltage control unit I and the voltage control unit II are both connected to the voltage summing unit SUM 11 Phase connection, voltage summing unit SUM 11 The output ends of the voltage control unit III are connected to the voltage summing unit SUM9; the output end of the voltage summing unit SUM9 is connected to an input end of the voltage summing unit SUM9.

[0010] Preferably, the generalization module includes an AND gate D 33 , a third voltage control unit, a fourth voltage control unit, a fifth voltage control unit, a sixth voltage control unit, a seventh voltage control unit, a voltage summing unit SUM2, a first proportional amplifier, a second proportional amplifier, a first synaptic neuron circuit and a second synaptic neuron circuit, the input signal terminal N1 is respectively connected to the input terminal of the third voltage control unit and the AND gate D 33 The input signal terminal N2 is connected to an input terminal of the fifth voltage control unit and the AND gate D 33 The other input terminal is connected to the gate D 33 The output end of the fourth voltage control unit is connected to the input end of the fourth voltage control unit, the output ends of the fourth voltage control unit and the fifth voltage control unit are respectively connected to the two input ends of the voltage summing unit SUM2, the output end of the voltage summing unit SUM2 is connected to the first proportional amplifier, and the output end of the first proportional amplifier is connected to the second proportional amplifier; the third voltage control unit is connected to the first synaptic neuron circuit, the output end of the first synaptic neuron circuit is connected to the sixth voltage control unit, the output end of the second proportional amplifier is connected to the second synaptic neuron circuit, and the output end of the second synaptic neuron circuit is connected to the seventh voltage control unit; the other input end of the sixth voltage control unit is connected to the output end of the voltage summing unit SUM7 of the feedback regulation circuit of the habituation module I, and the output end of the sixth voltage control unit is connected to the positive end of the memristor M5 of the feedback regulation circuit of the habituation module I; the other input end of the seventh voltage control unit is connected to the output end of the voltage summing unit SUM7 of the feedback regulation circuit of the habituation module II, and the output end of the seventh voltage control unit is connected to the positive end of the memristor M5 of the feedback regulation circuit of the habituation module II.

[0011] Preferably, the first synaptic neuron circuit comprises a resistor R 74 , resistor R75 , Operational Amplifier OP 23 , mathematical operation unit ABM5 and operational amplifier OP 25 The output end of the third voltage control unit is connected to the resistor R 74 Connected to an input terminal of the mathematical operation unit ABM5, the resistor R 74 Respectively with the operational amplifier OP 23 The inverting input terminal and resistor R 75 Connected to the operational amplifier OP 23 The non-inverting input terminal is grounded, and the resistor R 75 With the operational amplifier OP 23 The output of the operational amplifier OP 23 The output end of the mathematical operation unit ABM5 is connected to the other input end of the mathematical operation unit ABM5, and the output end of the mathematical operation unit ABM5 is connected to the operational amplifier OP 25 The inverting input terminal of the operational amplifier OP 25 The non-inverting input terminal is connected to the power supply V 32 The positive pole of the power supply V 32 The negative terminal of the operational amplifier OP is grounded. 25 The output end of is connected to an input end of a sixth voltage control unit;

[0012] The second synaptic neuron circuit includes a memristor M7, a resistor R 76 , Operational Amplifier OP 24 , math unit ABM6 and operational amplifier OP 26 The output end of the second proportional amplifier is connected to the positive end of the memristor M7 and an input end of the mathematical operation unit ABM6, and the negative end of the memristor M7 is connected to the operational amplifier OP 24 The inverting input terminal and resistor R 76 Connected to the operational amplifier OP 24 The non-inverting input terminal is grounded, and the resistor R 76 With the operational amplifier OP 24 The output of the operational amplifier OP 24 The output end of the mathematical operation unit ABM6 is connected to an input end of the mathematical operation unit ABM6, and the output end of the mathematical operation unit ABM6 is connected to the operational amplifier OP 26 The inverting input terminal of the operational amplifier OP 26 The non-inverting input terminal is connected to the power supply V 33 The positive pole of the power supply V 33 The negative terminal of the operational amplifier OP is grounded. 26 The output end of is connected to an input end of the seventh voltage control unit.

[0013] Preferably, the emotion control module I and the emotion control module II both include an AND gate D7, a first logic unit, a second logic unit, a third logic unit, a fourth logic unit, an eighth voltage control unit, a ninth voltage control unit, a tenth voltage control unit, an eleventh voltage control unit, a twelfth voltage control unit, a thirteenth voltage control unit, a first addition unit, a second addition unit, a third addition unit, and a fourth addition unit, the input signal terminal N5 is respectively connected to the first input terminal of the AND gate D7, the first logic unit, the second logic unit, the third logic unit, and the fourth logic unit, the input signal terminal N1 or the input signal terminal N2 is respectively connected to the second input terminal of the AND gate D7, the first logic unit, the second logic unit, and the third logic unit, the output terminal of the first voltage control unit is connected to the second input terminal of the fourth logic unit, the output terminal of the AND gate D7 is connected to the input terminal of the eighth voltage control unit, and the output terminal of the first logic unit is connected to the input terminal of the ninth voltage control unit. , the output end of the second logic unit is connected to the input end of the tenth voltage control unit, the output end of the third logic unit is connected to the input end of the eleventh voltage control unit, the output ends of the eighth voltage control unit and the ninth voltage control unit are both connected to the first adding unit, the output ends of the tenth voltage control unit and the eleventh voltage control unit are both connected to the second adding unit, the output ends of the first adding unit and the second adding unit are both connected to the input end of the third adding unit, the output end of the third adding unit is connected to the other input end of the voltage summing unit SUM7 of the feedback regulation circuit of the habituation module I or the habituation module II, the output end of the fourth logic unit is respectively connected to the twelfth voltage control unit and the thirteenth voltage control unit, the output ends of the twelfth voltage control unit and the thirteenth voltage control unit are both connected to the input end of the fourth adding unit, and the output end of the fourth adding unit is connected to an input end of the voltage summing unit SUM5 of the feedback regulation circuit.

[0014] Preferably, the context control module I and the context control module II both include a memristor M1, a resistor R1, an operational amplifier OP1, a mathematical operation unit ABM1, a first comparator, a second comparator, an AND gate D1, a fourteenth voltage control unit, a fifteenth voltage control unit and a NOT gate D3, the input signal terminal N3 or the input signal terminal N4 is respectively connected to the positive end of the memristor M1 and an input end of the mathematical operation unit ABM1, the negative end of the memristor M1 is respectively connected to the inverting input end of the operational amplifier OP1 and the resistor R1, the non-inverting input end of the operational amplifier OP1 is grounded, the resistor R1 is connected to the output end of the operational amplifier OP1, and the output end of the operational amplifier OP1 is connected to the mathematical operation unit ABM1. The other input end of BM1 is connected, the mathematical operation unit ABM1 is connected to the input ends of the first comparator and the second comparator respectively, the output ends of the first comparator and the second comparator are both connected to the AND gate D1, the output end of the AND gate D1 is connected to the input end of the fourteenth voltage control unit, the output end of the fourteenth voltage control unit is connected to the other input end of the fifteenth voltage control unit, the input signal terminal N1 or the input signal terminal N2 is connected to the input end of the NOT gate D3, the output end of the NOT gate D3 is connected to an input end of the fifteenth voltage control unit, and the output end of the fifteenth voltage control unit is connected to the other input end of the voltage summing unit SUM3 of the feedback regulation circuit of the habituation module I or the habituation module II.

[0015] Preferably, the voltage control unit I, the voltage control unit II, the voltage control unit III, the first voltage control unit, the third voltage control unit, the fourth voltage control unit, the fifth voltage control unit, the eighth voltage control unit, the ninth voltage control unit, the tenth voltage control unit, the eleventh voltage control unit, the twelfth voltage control unit, the thirteenth voltage control unit and the fourteenth voltage control unit all include a first voltage-controlled switch, the positive input end of the first voltage-controlled switch is its input end, the second contact of the first voltage-controlled switch is connected to the positive electrode of the first power supply, the first contact of the first voltage-controlled switch is its output end and the first contact of the first voltage-controlled switch is connected to the first resistor, and the inverting input end of the first voltage-controlled switch, the negative electrode of the first power supply and the first resistor are all grounded;

[0016] The second voltage-controlled unit, the sixth voltage-controlled unit, the seventh voltage-controlled unit and the fifteenth voltage-controlled unit all include a second voltage-controlled switch, the non-phase input terminal of the second voltage-controlled switch is one input terminal, the second contact of the second voltage-controlled switch is another input terminal, the first contact of the second voltage-controlled switch is an output terminal and the first contact of the second voltage-controlled switch is connected to the second resistor, and the inverting input terminal of the second voltage-controlled switch and the second resistor are both grounded;

[0017] The first proportional amplifier and the second proportional amplifier both include a first operational amplifier, the inverting input terminal of the first operational amplifier is connected to the third resistor and the fourth resistor respectively, the third resistor is its input terminal, the fourth resistor is connected to the output terminal of the first operational amplifier, the non-inverting input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier serves as its output terminal;

[0018] The first logic unit includes a NOT gate D 11 AND gate D9, NOT gate D 11 The output terminal of the AND gate D9 is connected to the second input terminal of the AND gate D9. 11 The input end of the gate D9 is used as one of its input ends and connected to the input signal end N1 or the input signal end N2, the first input end of the gate D9 is used as the other input end and connected to the input signal end N5, and the output end of the gate D9 is connected to the input end of the ninth voltage control unit;

[0019] The second logic unit includes a NOT gate D 13 AND gate D 15 , NOT gate D 13 The output terminal of the AND gate D 15 The first input terminal is connected to the NOT gate D 13 The input terminal of the gate D is connected to the input signal terminal N5. 15 The second input terminal of the gate D is used as another input terminal and connected to the input signal terminal N1 or the input signal terminal N2. 15 The output end of is connected to the input end of the tenth voltage control unit;

[0020] The third logic unit includes a NOT gate D 17 、NORMAL GATE D 21 AND gate D 19 , NOT gate D 17 AND NOT gate D 21 The output terminals of the AND gates D 19 The two input terminals of the NOT gate D are connected 17 The input terminal of is connected to the input signal terminal N5, and the NOT gate D 21 The input terminal of the gate D is connected to the input signal terminal N1 or the input signal terminal N2. 19 The output end of is connected to the input end of the eleventh voltage control unit;

[0021] The fourth logic unit includes a NOT gate D 25 、NORMAL GATE D 27 , AND gate D 29 AND gate D 31 , NOT gate D 25 The input end of the habituation module I or the habituation module II feedback regulation circuit is connected to the output end of the first voltage control unit, and the NOT gate D 25The output terminals of the AND gates D 29 AND gate D 31 The second input terminal of the gate is connected to the input signal terminal N5, and the input signal terminal N6 is connected to the non-gate D 27 The input terminal and the AND gate D 29 The first input terminal of the AND gate D 29 The output end of is connected to the input end of the twelfth voltage control unit, and the gate D 31 The output end of is connected to the input end of the thirteenth voltage control unit;

[0022] The first adding unit, the second adding unit, the third adding unit and the fourth adding unit all include a second operational amplifier, the non-inverting input terminal of the second operational amplifier is respectively connected to one end of the fifth resistor and the sixth resistor, the other ends of the fifth resistor and the sixth resistor are respectively used as input terminals of the adding unit, the inverting input terminal of the second operational amplifier is respectively connected to one end of the seventh resistor and the eighth resistor, the other end of the seventh resistor is grounded, the other end of the eighth resistor is connected to the output terminal of the second operational amplifier, and the output terminal of the second operational amplifier is used as the output terminal of the adding unit;

[0023] The first comparator includes a third operational amplifier and a second power supply, the positive electrode of the second power supply is connected to the non-inverting input terminal of the third operational amplifier, the inverting input terminal of the third operational amplifier is connected to the output terminal of the mathematical operation unit ABM1 of the context control module I or the context control module II, the output terminal of the third operational amplifier is connected to an input terminal of the AND gate D1, and the negative electrode of the second power supply is grounded;

[0024] The second comparator includes a fourth operational amplifier and a third power supply, the positive electrode of the third power supply is connected to the inverting input terminal of the fourth operational amplifier, the non-inverting input terminal of the fourth operational amplifier is connected to the output terminal of the mathematical operation unit ABM1, the output terminal of the fourth operational amplifier is connected to the other input terminal of the AND gate D1, and the negative electrode of the third power supply is grounded.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] (1) On the basis of the original behavioral habituation, the emotion control module transforms the previously applied single repetitive stimulus into an emotional stimulus, which is divided into positive emotion stimulus, neutral emotion stimulus, and negative emotion stimulus. Different emotional stimuli will affect the speed of habituation. This behavior of showing different emotional responses to repeated positive and negative stimuli is in line with biological characteristics.

[0027] (2) Considering the impact of the situation on habituation, the situational information is controlled by the situational control module. When the situational information changes, the habituation phenomenon will reappear. If the situational information remains unchanged, habituation will occur again after a period of time.

[0028] (3) The generalization phenomenon of habituation is taken into consideration. Through the generalization module, two similar stimuli can be habituated, which is in line with biological characteristics.

[0029] The present invention realizes two learning modes of habituation and dehabituation in biological non-associative learning through a habituation module and a generalization module, and on this basis realizes that two similar stimuli can habituate the organism. In addition, the present invention divides the nature of the stimulus into positive, neutral, and negative through an emotion control module, which respectively accelerates, maintains, and slows down the speed of habituation of the biological organism. The present invention realizes through a situation control module that when the situation information changes, the habituated response will be slightly changed, and the response will habituate again after a period of time. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0031] Figure 1 It is a circuit schematic diagram of the present invention.

[0032] Figure 2 for Figure 1 Circuit diagram of the habituation module shown.

[0033] Figure 3 for Figure 1 The circuit diagram of the emotion control module is shown.

[0034] Figure 4 for Figure 1 The circuit diagram of the context control module is shown.

[0035] Figure 5 for Figure 1 The circuit diagram of the generalized module is shown.

[0036] Figure 6 The simulation results of habituation and dehabituation of the present invention are shown in Figure 1, where (a) is the voltage signal of the signal input terminal N1, (b) is the voltage signal output by the feedback regulation circuit I, (c) is the resistance change of the memristor M3, and (d) is the voltage signal of the output terminal of the habituation module I.

[0037] Figure 7 It is a simulation result diagram of the habituation generalization of the present invention, wherein (a) is the voltage signal of the signal input terminal N1, (b) is the resistance change of the memristor M3, and (c) is the voltage signal of the output terminal of the habituation module I, (a) is the voltage signal of the signal input terminal N2, (b) is the resistance change of the memristor M4, and (c) is the voltage signal of the output terminal of the habituation module II.

[0038] Figure 8 Graphs showing the simulation results of habituation under different situations and emotions of the present invention, wherein (a) is the voltage signal of the signal input terminal N1, (b) is the voltage signal of the signal input terminal N5, (c) is the voltage signal of the signal input terminal N3, (d) is the resistance change of the memristor M3, and (e) is the voltage signal of the output terminal of the habituation module II.

[0039] Fig. 9 It is a complete simulation result diagram of the present invention, wherein (a) is the voltage signal of the signal input terminal N1, (b) is the voltage signal of the signal input terminal N2, (c) is the voltage signal of the signal input terminal N3, (d) is the voltage signal of the signal input terminal N4, (e) is the voltage signal of the signal input terminal N4, (f) is the output terminal voltage signal of the habituation module I, and (g) is the output terminal voltage signal of the habituation module II. DETAILED DESCRIPTION

[0040] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0041] like Figure 1As shown, an emotion habituation neural network circuit with context dependence and generalization includes input signal terminals N1-N5, a habituation module I, a generalization module, an emotion control module I, a context control module I, a habituation module II, an emotion control module II, a context control module II and an output signal terminal. The input signal terminal N1 representing the stimulus signal is connected to the habituation module I, the generalization module, the emotion control module I, and the situation control module I respectively; the input signal terminal N3 representing the situation control signal is connected to the situation control module I; the generalization module, the situation control module I, and the situation control module I are all connected to the habituation module I; the output terminal of the habituation module I is an output signal terminal; the input signal terminal N5 representing the emotion control signal is connected to the emotion control module I and the emotion control module II respectively; the input signal terminal N2 representing the stimulus signal is connected to the habituation module II, the generalization module, the emotion control module II, and the situation control module II respectively; the input signal terminal N4 representing the situation control signal is connected to the situation control module II; the generalization module, the emotion control module II, and the situation control module II are all connected to the habituation module II, and the output terminal of the habituation module II is another output signal terminal.

[0042] The habituation module is to realize the habituation and dehabituation learning modes in biological non-associative learning. The generalization module is to make two similar stimuli habituate the biological body. The emotion control module is to add emotion to the original stimulus to change the speed of habituation. The situation control module is to realize that when the situation information changes, the habituated response will change slightly. After a period of time, this weak response will habituate again. The input signal terminals N1 and N2 are input stimulus signals, N3 and N4 are situation control signals, and N5 is emotion control signal. In the specific implementation, the amplitude of the input stimulus signal is 1V, and the amplitude of the situation control signal is 0V and 2.5V. The two voltage values ​​represent different situations respectively. The amplitude of the emotion control signal is 0V, 1V, and -1V, representing neutral stimulus, positive stimulus, and negative stimulus respectively. The output signal terminal is the output terminal of the habituation module.

[0043] The input signal terminal N1 is connected to the habituation module I, and the input signal terminal N2 is connected to the habituation module II. The output of the habituation module will change according to the change of the input signal terminal N1 / N2. When the input signal terminal N1 / N2 is a single repeated weak stimulus, the amplitude of the output voltage will become smaller and smaller. When a strong stimulus is input to the input signal terminal N1 / N2, the output voltage will return to the original amplitude. The input signal terminal N1 and the input signal terminal N5 are both connected to the emotion control module I, and the input signal terminal N2 and the input signal terminal N5 are both connected to the emotion control module II. The output of the emotion control module is determined by the input signal terminal N1 / N2 and the input signal terminal N5. The input signal terminal N1 and the input signal terminal N2 are both connected to the generalization module. The generalization module ensures that when the input signal terminal N1 and the input signal terminal N2 have signals at the same time, the two will be generalized. The input signal terminal N1 and the input signal terminal N3 are both connected to the situation control module I, and the input signal terminal N2 and the input signal terminal N4 are both connected to the situation control module II. The situation control module I and the situation control module II ensure that when the situation control signal N3 / N4 changes, the habituation reaction will change. The input signal terminal N5 is respectively connected to the emotion control module I and the emotion control module II; the situation control module I is connected to the habituation module I; the emotion control module I is connected to the habituation module I; the generalization module is respectively connected to the habituation module I and the habituation module II; the situation control module II is connected to the habituation module II; the emotion control module II is connected to the habituation module II.

[0044] like Figure 2 As shown, the habituation module I includes a synaptic neuron circuit I, a feedback regulation circuit I, a voltage summing unit SUM1 and a voltage summing unit SUM3. The input signal terminal N1 is connected to an input terminal of the voltage summing unit SUM1, the output terminal of the voltage summing unit SUM1 is connected to the synaptic neuron circuit I through the voltage summing unit SUM3, and the output terminal of the synaptic neuron I is connected to the feedback regulation circuit I; the input signal terminal N1 is connected to the feedback regulation circuit I, and the feedback regulation circuit I is connected to the other input terminal of the voltage summing unit SUM1. The output terminal of the generalization module is connected to the feedback regulation circuit I, and the output terminal of the emotion control module I is connected to the feedback regulation circuit I. That is, the output signal U2 and the output signal U3 of the emotion control module I are respectively added to the voltage summing unit SUM5 and the memristor M5. Since the amplitude of the input signal terminal N1 is certain, the output of the operational amplifier OP7 is only determined by the memristor M3, so the function of the synaptic neuron circuit I is to output voltages of different amplitudes according to the different resistance values ​​of the memristor M3. The feedback regulation circuit I generates a corresponding feedback voltage according to the output amplitude of the synaptic neuron circuit I. The feedback voltage changes the resistance of the memristor M3, thereby changing the output amplitude of the synaptic neuron circuit I again.

[0045] The synaptic neuron circuit I includes a memristor M3, an operational amplifier OP7, a resistor R 43 , absolute value unit ABS1, voltage-controlled switch S5 and resistor R7, the positive end of the memristor M3 is connected to the output end of the voltage summing unit SUM3, and the negative end of the memristor M3 is connected to the inverting input end of the operational amplifier OP7 and the resistor R 43 The non-inverting input terminal of the operational amplifier OP7 is grounded, and the resistor R 43 Connected to the output of the operational amplifier OP7; the output of the operational amplifier OP7 is: V OP7 =-(R 43 / M3)*V SUM3 , when there is a signal at the input signal terminal N1, V SUM3 =V N1 , so the output amplitude is determined by the memristor M3, and the role of the memristor M3 is to act as a synapse to determine the output amplitude. The output end of the operational amplifier OP7 is connected to the input end of the absolute value unit ABS1, and the output end of the absolute value unit ABS1 is connected to the second contact of the voltage-controlled switch S5. The first contact of the voltage-controlled switch S5 is respectively connected to one end of the resistor R7 and the input end of the first voltage selection unit of the feedback regulation circuit I, the input signal terminal N1 is connected to the positive input end of the voltage-controlled switch S5, and the other end of the resistor R7 and the negative input end of the voltage-controlled switch S5 are grounded. The absolute value unit ABS1 takes the output of the operational amplifier OP7 as input and takes the absolute value before outputting it. When the value of the stimulus signal input to the input signal terminal N1 is greater than its threshold, the voltage-controlled switch S5 outputs the output of the absolute value unit ABS1 through the first contact of the voltage-controlled switch S5.

[0046] Feedback regulation circuit I includes a first voltage selection unit, a memristor M5, an operational amplifier OP 19 and operational amplifier OP 17 , resistor R 51 , mathematical operation unit ABM3, power supply V 21 , a first voltage control unit, a second voltage control unit, a voltage summing unit SUM5 and a voltage summing unit SUM7, a first contact of the voltage control switch S5 of the synaptic neuron I is connected to the input end of the first voltage selection unit, an output end of the first voltage selection unit is connected to an input end of the voltage summing unit SUM7, an input end of the emotion control module I is connected to another input end of the voltage summing unit SUM7, an output end of the voltage summing unit SUM7 is connected to the voltage control switch S 32 The second contact of the voltage-controlled switch S 32 The first contact and the resistor R 77 Phase connected, voltage controlled switch S 32 The positive input terminal of the generalization module is connected to an output terminal of the generalization module, and the voltage-controlled switch S 32The negative phase input terminal and resistor R 77 Both are grounded. Voltage controlled switch S 32 The nodes connected to the first contact of are respectively connected to the positive end of the memristor M5 and an input end of the mathematical operation unit ABM3, and the negative end of the memristor M5 is respectively connected to the operational amplifier OP 19 The inverting input terminal and resistor R 51 Connected to the operational amplifier OP 19 The non-inverting input terminal is grounded, and the resistor R 51 With the operational amplifier OP 19 The output terminal of the operational amplifier OP is connected. 19 The output end of the mathematical operation unit ABM3 is connected to an input end of the mathematical operation unit ABM3, and the output end of the mathematical operation unit ABM3 is connected to the operational amplifier OP 17 The inverting input terminal is connected to the operational amplifier OP 17 The non-inverting input terminal and the power supply V 21 The positive pole of the power supply V 21 The negative pole of the ABM3 is grounded. The output of the mathematical operation unit ABM3 is Vout=-V IN2 / V IN1 =M5 / 1000, when the voltage V SUM7 When the positive threshold voltage of the memristor M5 is reached, the resistance of the memristor M5 will decrease, so the output of the mathematical operation unit ABM3 will also decrease. When its output is less than the power supply V 21 When the voltage is 0, a feedback voltage will be generated, so the memristor M5 determines the formation of the feedback voltage. 17 The output end of is connected to the input end of the first voltage control unit, and the voltage control switch S of the first voltage control unit 27 The nodes connected to the first contact of the emotion control module I are respectively connected to the NOT gate D 25 , an input end of the voltage summing unit SUM5 is connected, and another input end of the voltage summing unit SUM5 is connected to another output end of the emotion control module I. The output end of the voltage summing unit SUM5 is connected to the voltage control switch S of the second voltage control unit. 21 the input signal terminal N1 is connected to the second voltage control unit, and the second voltage control unit is connected to another input terminal of the voltage summing unit SUM1.

[0047] The first voltage selection unit includes a NOT gate D5, a voltage-controlled switch S7, a voltage-controlled switch S9, a voltage-controlled switch S 11 , resistor R 45 , resistor R 47 , resistor R 49 , Power supply V 23 , Power supply V 25 , Power supply V 27 , voltage summing unit SUM9 and SUM11 The node connected to the first contact of the voltage-controlled switch S5 of the synaptic neuron I is used as the output terminal to be connected to the input terminal of the NAND gate D5, the positive phase input terminal of the voltage-controlled switch S9, and the voltage-controlled switch S 11 The output end of the NOT gate D5 is connected to the input end of the voltage-controlled switch S7, and the nodes connected to the first contact of the voltage-controlled switch S7 are respectively connected to the resistor R 45 One end of the voltage summing unit SUM 11 The second contact of the voltage-controlled switch S7 is connected to the power supply V 23 The positive electrode of the voltage-controlled switch S7 is connected to the inverting input terminal and the power supply V 23 The negative electrode, resistor R 45 The other end of the voltage-controlled switch S9 is grounded, and the nodes connected to the first contact of the voltage-controlled switch S9 are respectively connected to the resistor R 47 , voltage summing unit SUM 11 The second contact of the voltage-controlled switch S9 is connected to the power supply V 25 The positive pole is connected to the inverting input terminal of the voltage-controlled switch S9 and the power supply V 25 Negative electrode, resistor R 47 Ground, voltage controlled switch S 11 The nodes connected to the first contact are respectively connected to the resistor R 49 , an input terminal of the voltage summing unit SUM9 is connected, and the voltage-controlled switch S 11 The second contact is connected to the power supply V 27 The positive pole is connected, and the voltage-controlled switch S 11 The inverting input terminal, power supply V 27 Negative electrode, resistor R 49 The output end of the voltage summing unit SUM9 is connected to an input end of the voltage summing unit SUM7, and the output end of the voltage summing unit SUM7 is connected to the voltage-controlled switch S 32 The first voltage selection unit is when the voltage value output by the first contact of the voltage-controlled switch S5 is greater than the threshold value of the voltage-controlled switch S7, the first contact of the voltage-controlled switch S7 outputs the power supply V 23 Voltage value, power supply V 23 The voltage value of -0.1V is used as the customary natural recovery voltage. When the voltage value output by the first contact of the voltage-controlled switch S5 is greater than the threshold of the voltage-controlled switch S9, the first contact of the voltage-controlled switch S9 outputs the power supply V 25 Voltage value, power supply V 25 The voltage value of the voltage controlled switch S5 is 4V as the habitual voltage. When the voltage value output by the first contact of the voltage controlled switch S5 is greater than the voltage value output by the voltage controlled switch S 11 When the threshold is reached, the first contact outputs power V 27 Voltage value, power supply V 27The voltage value is -5V as the dehabituation voltage.

[0048] The first voltage-controlled unit includes a voltage-controlled switch S 27 , Power supply V 19 , resistor R 53 , voltage controlled switch S 27 The non-inverting input terminal of the operational amplifier OP 17 The output end is connected to the voltage-controlled switch S 27 The first contact is respectively connected to the resistor R 53 , NOT gate D of emotion control module Ⅰ 25 , the input end of the voltage summing unit SUM5 is connected, and the voltage-controlled switch S 27 The second contact is connected to the power supply V 19 The positive electrode is connected to the resistor R 53 , Power supply V 19 Negative pole, voltage controlled switch S 27 The inverting input terminals of the first voltage control unit are grounded. 17 The output end is greater than the voltage-controlled switch S 27 When the voltage-controlled switch S 27 The first contact will output power V 19 The second voltage control unit includes a voltage control switch S 21 , the output signal of the voltage summing unit SUM5, the resistor R 41 、NORMAL GATE D 23 , input signal N1 and NAND gate D 23 The input terminal of the NOT gate D 23 The output terminal and the voltage controlled switch S 21 The positive input terminal is connected to the voltage-controlled switch S 21 The nodes connected to the first contact are respectively connected to the other input terminal of the voltage summing unit SUM1 and the resistor R 41 One end of the voltage-controlled switch S 21 The second contact of is connected to the output end of the voltage summing unit SUM5, and the voltage-controlled switch S 21 The inverting input terminal, resistor R 41 The other end of the second voltage control unit is grounded. 23 The output of the voltage-controlled switch S 21 When the voltage-controlled switch S 21 The first contact of outputs the output voltage of the voltage summing unit SUM5.

[0049] like Figure 5 As shown, the generalized module includes an AND gate D 33, a third voltage control unit, a fourth voltage control unit, a fifth voltage control unit, a sixth voltage control unit, a seventh voltage control unit, a voltage summing unit SUM2, a first proportional amplifier, a second proportional amplifier, a first synaptic neuron circuit and a second synaptic neuron circuit, and the input signal terminal N1 is respectively connected to the third voltage control unit and the AND gate D 33 The input signal terminal N2 is connected to the fifth voltage control unit and the AND gate D 33 The other input terminal is connected to the gate D 33 The output end of is connected to the fourth voltage control unit, the fourth voltage control unit and the fifth voltage control unit are both connected to the two input ends of the voltage summing unit SUM2, the output end of the voltage summing unit SUM2 is connected to the first proportional amplifier, the output of the first proportional amplifier is connected to the second proportional amplifier, the third voltage control unit is connected to the first synaptic neuron circuit, the output end of the first synaptic neuron circuit is connected to the sixth voltage control unit, the output of the second proportional amplifier is connected to the second synaptic neuron circuit, and the output end of the second synaptic neuron circuit is connected to the seventh voltage control unit. The sixth voltage control unit is respectively connected to the memristor M5 of the feedback regulation circuit I of the habituation module I and the voltage summing unit SUM7, and the seventh voltage control unit is respectively connected to the memristor M6 of the feedback regulation circuit II of the habituation module II and the voltage summing unit SUM8.

[0050] The third voltage-controlled unit includes a voltage-controlled switch S 29 , Power supply V 29 , resistor R 67 , voltage controlled switch S 29 The nodes connected to the first contact are respectively connected to the resistor R 67 , the input end of the first synaptic neuron circuit is connected, and the voltage-controlled switch S 29 The second contact is connected to the power supply V 29 The positive pole is connected, and the voltage-controlled switch S 29 The inverting input terminal, power supply V 29 Negative electrode, resistor R 67 The third voltage control unit is when the output of the input signal N1 is greater than the voltage control switch S 29 When the threshold is reached, the first contact will output power V 29 The fourth voltage control unit includes a voltage control switch S 30 , Power supply V 30 , resistor R 68 , voltage controlled switch S 30 The nodes connected to the first contact are respectively connected to the resistor R 68 , an input terminal of the voltage summing unit SUM2 is connected, and the voltage-controlled switch S 30 The second contact is connected to the power supply V 30 The positive pole is connected, and the voltage-controlled switch S 30 The inverting input terminal, power supply V30 Negative electrode, resistor R 68 The fourth voltage control unit is when the AND gate D 29 The output of the voltage-controlled switch S 30 When the threshold is reached, the first contact will output power V 30 The fifth voltage control unit includes a voltage control switch S 31 , Power supply V 31 , resistor R 69 , voltage controlled switch S 31 The nodes connected to the first contact are respectively connected to the resistor R 69 , an input terminal of the voltage summing unit SUM2 is connected, and the voltage-controlled switch S 31 The second contact is connected to the power supply V 31 The positive pole is connected, and the voltage-controlled switch S 31 The inverting input terminal, power supply V 31 Negative electrode, resistor R 68 The fifth voltage control unit is when the output of the input signal N2 is greater than the voltage control switch S 31 When the threshold is reached, the first contact will output power V 31 The sixth voltage control unit includes a voltage control switch S 32 , voltage summing unit SUM7 output signal, resistor R 77 , voltage controlled switch S 32 The nodes connected to the first contact are respectively connected to the resistor R 77 , the positive terminal of the memristor M5 is connected, and the voltage-controlled switch S 32 The second contact of is connected to the output signal of the voltage summing unit SUM7, and the voltage-controlled switch S 33 The inverting input terminal, resistor R 77 grounded, the sixth voltage control unit is used as the operational amplifier OP 25 The output of the voltage-controlled switch S 32 When the voltage-controlled switch S 32 The first contact of the output voltage summing unit SUM7 outputs the output voltage of the voltage summing unit. The seventh voltage control unit includes a voltage control switch S 33 , voltage summing unit SUM8 output signal, resistor R 78 , voltage controlled switch S 33 The nodes connected to the first contact are respectively connected to the resistor R 78 , the positive terminal of the memristor M6 is connected, and the voltage-controlled switch S 33 The second contact of is connected to the output signal of the voltage summing unit SUM8, and the voltage-controlled switch S 33 The inverting input terminal, resistor R 78 grounded, the seventh voltage control unit is used as the operational amplifier OP 26 The output of the voltage-controlled switch S 33 When the voltage-controlled switch S32 The first contact of the output voltage summing unit SUM8 outputs the output voltage of the voltage summing unit SUM8.

[0051] The first proportional amplifier includes a resistor R 70 , resistor R 71 , Operational Amplifier OP 21 Operational amplifier OP 21 The role is to combine the resistor R 70 and resistor R 71 To perform proportional operation. Operational amplifier OP 21 The nodes connected to the inverting input terminal are respectively connected to the resistor R 70 , resistor R 71 Connected, resistor R 70 Connected to one input terminal of the voltage summing unit SUM2, resistor R 71 With the operational amplifier OP 21 The output of the operational amplifier OP 21 The non-inverting input terminal of the operational amplifier OP is grounded. 21 The output end of the first proportional amplifier is connected to the second proportional amplifier, and the first proportional amplifier performs proportional calculation, and its output voltage V O1 For -(R 71 / R 70 )*V I1 , V I1 The second proportional amplifier includes a resistor R 72 , resistor R 73 , Operational Amplifier OP 22 , Operational Amplifier OP 22 The role is to combine the resistor R 72 and resistor R 73 To perform proportional operation. Operational amplifier OP 22 The nodes connected to the inverting input terminals are respectively connected to the resistor R 72 , resistor R 73 Connected, resistor R 72 With the operational amplifier OP 21 The output terminal is connected to the resistor R 73 With the operational amplifier OP 22 The output of the operational amplifier OP 22 The non-inverting input terminal of the operational amplifier OP is grounded. 22 The output end of is connected to the second synaptic neuron circuit. The second proportional amplifier performs proportional calculation, and its output V O2 For -(R 73 / R 72 )*V I2 , V I2 is the input voltage.

[0052] The first synaptic neuron circuit includes a resistor R 74 , resistor R 75 , Operational Amplifier OP 23 , mathematical operation unit ABM5, operational amplifier OP 25 , Power supply V 32 The nodes connected to the output of the third voltage control unit are respectively connected to the resistor R 74 Connected to an input terminal of the mathematical operation unit ABM5, the resistor R 74 Respectively with the operational amplifier OP 23 The inverting input terminal and resistor R 75 Connected to the operational amplifier OP 23 The non-inverting input terminal is grounded, and the resistor R 75 With the operational amplifier OP 23 The output of the operational amplifier OP 23 The output end of the mathematical operation unit ABM5 is connected to the other input end of the mathematical operation unit ABM5, and the output end of the mathematical operation unit ABM5 is connected to the operational amplifier OP 25 The inverting input terminal of the operational amplifier OP 25 The non-inverting input terminal is connected to the power supply V 32 The positive pole of the power supply V 32 The negative terminal of the operational amplifier OP is grounded. 25 The output terminal of is connected to the sixth voltage control unit. The first synaptic neuron circuit is used to transmit the stimulus input signal of the signal input terminal N1 to the feedback regulation circuit I and control its on and off.

[0053] The second synaptic neuron circuit includes a memristor M7, a resistor R 76 , Operational Amplifier OP 24 , mathematical operation unit ABM6, operational amplifier OP 26 , Power supply V 33 The nodes connected to the second proportional amplifier are respectively connected to the positive end of the memristor M7 and an input end of the mathematical operation unit ABM6, and the negative end of the memristor M7 is respectively connected to the operational amplifier OP 24 The inverting input terminal and resistor R 76 Connected to the operational amplifier OP 24 The non-inverting input terminal is grounded, and the resistor R 76 With the operational amplifier OP 24 The output of the operational amplifier OP 24 The output end of the mathematical operation unit ABM6 is connected to an input end of the mathematical operation unit ABM6, and the output end of the mathematical operation unit ABM6 is connected to the operational amplifier OP 26 The inverting input terminal is connected to the operational amplifier OP 26 The non-inverting input terminal and the power supply V 33 The positive pole of the power supply V33 The negative terminal of the operational amplifier OP is grounded. 26 The output end of is connected to the seventh voltage control unit, and the second synaptic neuron is used to transmit the stimulation input signal of the signal input end N2 to the feedback regulation circuit II and control its on and off. The output of the mathematical operation unit ABM6 is: Vout=-V IN2 / V IN1 =M7 / 1000. When the operational amplifier OP 22 When the output amplitude reaches the positive threshold voltage of the memristor M7, its resistance will decrease. At the same time, the output of the mathematical operation unit ABM6 will also decrease. When it is less than the power supply V 33 When the amplitude is 26 Will output a high level. Therefore, the memristor M7 determines the operational amplifier OP 26 Output status.

[0054] like Figure 3 As shown, the emotion control module I includes an AND gate D7, a first logic unit, a second logic unit, a third logic unit, a fourth logic unit, an eighth voltage control unit, a ninth voltage control unit, a tenth voltage control unit, an eleventh voltage control unit, a twelfth voltage control unit, a thirteenth voltage control unit, a first adding unit, a second adding unit, a third adding unit, and a fourth adding unit, the input signal terminal N5 is respectively connected to the first input terminal of the AND gate D7, the first logic unit, the second logic unit, the third logic unit, and the fourth logic unit, the input signal terminal N1 is respectively connected to the second input terminal of the AND gate D7, the first logic unit, the second logic unit, and the third logic unit, the output of the first voltage control unit is connected to the second input terminal of the fourth logic unit, the output terminal of the AND gate D7 is connected to the eighth voltage control unit, and the output terminal of the first logic unit is connected to the The nine voltage control units are connected, the output end of the second logic unit is connected to the tenth voltage control unit, the output end of the third logic unit is connected to the eleventh voltage control unit, the output ends of the eighth voltage control unit and the ninth voltage control unit are both connected to the first adding unit, the output ends of the tenth voltage control unit and the eleventh voltage control unit are both connected to the second adding unit, the output ends of the first adding unit and the second adding unit are both connected to the third adding unit, the output of the third adding unit is connected to an input end of a voltage summing unit SUM7, the output end of the fourth logic unit is respectively connected to the twelfth voltage control unit and the thirteenth voltage control unit, the output ends of the twelfth voltage control unit and the thirteenth voltage control unit are both connected to the fourth adding unit, and the output end of the fourth adding unit is connected to an input end of a voltage summing unit SUM5.

[0055] The first logic unit includes a NOT gate D 11 AND gate D9, NOT gate D 11The output terminal of the AND gate D9 is connected to the second input terminal of the AND gate D9. 11 The input end of the AND gate D9 is used as one input end of the first logic unit, and the first input end of the AND gate D9 is used as another input end of the first logic unit. The first logic unit is to output a high level when the input stimulus signal of the input signal end N1 is low level and the emotion control signal of the input signal end N5 is high level, otherwise it is low level. The second logic unit includes a NOT gate D 13 AND gate D 15 , NOT gate D 13 The output terminal of the AND gate D 15 The first input terminal is connected to the NOT gate D 13 The input terminal of the second logic unit is used as an input terminal of the gate D 15 The second input end of the third logic unit is used as another input end of the second logic unit. The second logic unit is to output a high level when the input stimulus signal N1 is at a high level and the emotion control signal N5 is at a low level, otherwise it is at a low level. The third logic unit includes a NOT gate D 17 、NORMAL GATE D 21 AND gate D 19 , NOT gate D 17 AND NOT gate D 21 The output terminals of the AND gates D 19 The two input terminals of the NOT gate D are connected 17 AND NOT gate D 21 The inputs of the third logic unit are respectively two input terminals of the third logic unit. The third logic unit is to output a high level when the input stimulus signal N1 is at a low level and the input signal terminal N5 emotion control signal is at a low level, otherwise it is at a low level. The fourth logic unit includes a NOT gate D 25 、NORMAL GATE D 27 , AND gate D 29 AND gate D 31 , NOT gate D 25 The output terminal of the AND gate D 29 AND gate D 31 The second input terminal is connected to the NOT gate D 27 The output terminal of the AND gate D 31 The first input terminal is connected to the NOT gate D 25 The input terminal of the fourth logic unit is used as an input terminal of the NOT gate D 27 The node connected to the input end of is used as another input end of the fourth logic unit. The fourth logic unit is used to connect the gate D when the output signal of the first voltage control unit of the habituation module I is low level and the input signal end N5 emotion control signal is high level. 29 The output is high level, otherwise it is low level. When the output signal of the first voltage control unit is low level and the emotion control signal N5 is also low level, the gate D 31 The output is high if it is on, otherwise it is low.

[0056] The eighth voltage-controlled unit includes a voltage-controlled switch S 13 , power supply V7, resistor R9, voltage-controlled switch S 13 The positive input terminal of the AND gate D7 is connected to the output terminal of the voltage-controlled switch S 13 The first contact of is connected to the resistor R9 and the input of the first adding unit respectively, and the voltage-controlled switch S 13 The second contact is connected to the positive electrode of the power supply V7, the resistor R9, the negative electrode of the power supply V7, and the voltage-controlled switch S 13 The inverting input terminal is grounded. The eighth voltage control unit is used when the output of the AND gate D7 is greater than the voltage control switch S 13 When the threshold value is reached, the first contact will output the voltage of the power supply V7. The ninth voltage control unit includes a voltage control switch S 15 , power supply V9, resistor R 13 , voltage controlled switch S 15 The positive phase input terminal of the first logic unit is connected to the output terminal of the first logic unit, and the voltage-controlled switch S 15 The first contact and the resistor R 13 , the input of the first adding unit is connected, the voltage-controlled switch S 15 The second contact is connected to the positive electrode of the power supply V9, and the resistor R 13 , power supply V9 ​​negative pole, voltage controlled switch S 15 The inverting input terminal is grounded. The ninth voltage control unit is used when the output terminal of the first logic unit is greater than the voltage control switch S 15 When the threshold value is reached, the first contact will output the voltage of the power supply V9. The tenth voltage control unit includes a voltage control switch S 17 , Power supply V 11 , resistor R 17 , voltage controlled switch S 17 The positive phase input terminal of the second logic unit is connected to the output terminal of the second logic unit, and the voltage-controlled switch S 17 The first contact is respectively connected to the resistor R 17 , the input end of the second adding unit is connected, the voltage-controlled switch S 17 The second contacts are connected to the power supply V 11 The positive electrode is connected to the resistor R 17 , Power supply V 11 Negative pole, voltage controlled switch S 17 The inverting input terminal is grounded. The tenth voltage control unit is used when the output of the second logic unit is greater than the voltage control switch S 17 When the voltage-controlled switch S 17 The first contact will output power V 11 The eleventh voltage control unit includes a voltage control switch S 19 , Power supply V 13 , resistor R 21, voltage controlled switch S 19 The positive phase input terminal of the third logic unit is connected to the output terminal of the third logic unit, and the voltage-controlled switch S 19 The first contact and the resistor R 21 , the input of the second adding unit is connected, the voltage-controlled switch S 19 The second contact is connected to the power supply V 13 The positive electrode is connected to the resistor R 21 , Power supply V 13 Negative pole, voltage controlled switch S 19 The inverting input terminals are both grounded. The eleventh voltage-controlled unit is used when the output of the third logic unit is greater than the voltage-controlled switch S 19 When the voltage-controlled switch S 19 The first contact will output power V 13 The twelfth voltage-controlled unit includes a voltage-controlled switch S 23 , Power supply V 15 , resistor R 55 , voltage controlled switch S 23 The positive phase input terminal of the fourth logic unit is connected to the output terminal of the fourth logic unit, and the voltage-controlled switch S 23 The first contact and the resistor R 55 , the input of the fourth adding unit is connected, the voltage-controlled switch S 23 The second contact is connected to the power supply V 15 The positive electrode is connected to the resistor R 55 , Power supply V 15 Negative pole, voltage controlled switch S 23 The inverting input terminal is grounded. The twelfth voltage-controlled unit is used when the output of the fourth logic unit is greater than the voltage-controlled switch S 23 When the threshold is reached, the first contact will output power V 15 The thirteenth voltage control unit includes a voltage control switch S 25 , Power supply V 17 , resistor R 61 , voltage controlled switch S 25 The positive phase input terminal of the fourth logic unit is connected to the output terminal of the fourth logic unit, and the voltage-controlled switch S 25 The first contact and the resistor R 61 , the input of the fourth adding unit is connected, the voltage-controlled switch S 25 The second contact is connected to the power supply V 17 The positive electrode is connected to the resistor R 61 , Power supply V 17 Negative pole, voltage controlled switch S 25 The inverting input terminal is grounded. The thirteenth voltage control unit is used when the output of the fourth logic unit is greater than the voltage control switch S 25 When the voltage-controlled switch S 25 The first contact will output power V 17 voltage.

[0057] The first adding unit includes a resistor R 11 , resistor R 15 , resistor R 25 , resistor R 27 , operational amplifier OP9, resistor R 11 and resistor R 15 are connected to the non-inverting input terminal of the operational amplifier OP9, and the resistor R 25 and resistor R 27 are connected to the inverting input terminal of the operational amplifier OP9, and the resistor R 25 The output of the operational amplifier OP9 is connected to the ground and the resistor R 27 The first adding unit is connected to the input end of the third adding unit, and the first adding unit is used to add the output voltages of the eighth voltage control unit and the ninth voltage control unit. The second adding unit includes a resistor R 19 , resistor R 23 , resistor R 31 , resistor R 33 , Operational Amplifier OP 11 , resistor R 19 and resistor R 23 are connected to the non-inverting input terminal of the operational amplifier OP9, and the resistor R 31 and resistor R 33 Both with operational amplifier OP 11 The inverting input terminal is connected to the resistor R 31 Ground, operational amplifier OP 11 The output terminal and the resistor R 33 The second adding unit is connected to the input of the third adding unit, and the second adding unit is used to add the output voltages of the tenth voltage control unit and the eleventh voltage control unit. The third adding unit includes a resistor R 29 , resistor R 35 , resistor R 37 , resistor R 39 , Operational Amplifier OP 13 , resistor R 29 and resistor R 33 Both with operational amplifier OP 13 The non-inverting input terminal is connected to the resistor R 37 and resistor R 39 Both with operational amplifier OP 13 The inverting input terminal is connected to the resistor R 37 Ground, operational amplifier OP 13 The output terminal and the resistor R 39The third adding unit is connected to the voltage summing unit SUM7, and is used to add the output voltages of the first adding unit and the second adding unit. The fourth adding unit includes a resistor R 57 , resistor R 59 , resistor R 63 , resistor R 65 , Operational Amplifier OP 15 , resistor R 57 and resistor R 59 Both with operational amplifier OP 15 The non-inverting input terminal is connected to the resistor R 63 and resistor R 65 Both with operational amplifier OP 15 The inverting input terminal is connected to the resistor R 63 Ground, operational amplifier OP 15 The output terminal and the resistor R 63 Connected to the voltage summing unit SUM5, the fourth adding unit is used to add the output voltages of the twelfth voltage control unit and the thirteenth voltage control unit.

[0058] like Figure 4 As shown, the situation control module I includes a memristor M1, a resistor R1, an operational amplifier OP1, a mathematical operation unit ABM1, a first comparator, a second comparator, an AND gate D1, a fourteenth voltage control unit, a fifteenth voltage control unit, and a NOT gate D3; wherein the operational amplifier OP1 is used to perform a proportional operation in combination with the resistor R1 and the resistor M1, and its output is: V OP1 =-(R1 / M1)*V N3 The node connected to the input signal terminal N3 is respectively connected to the positive end of the memristor M1 and an input end of the mathematical operation unit ABM1, the negative end of the memristor M1 is respectively connected to the inverting input end of the operational amplifier OP1 and the resistor R1, the non-inverting input end of the operational amplifier OP1 is grounded, the resistor R1 is connected to the output end of the operational amplifier OP1, the output end of the operational amplifier OP1 is connected to the other input end of the mathematical operation unit ABM1, the mathematical operation unit ABM1 is respectively connected to the input ends of the first comparator and the second comparator, the output ends of the first comparator and the second comparator are both connected to the AND gate D1, the output end of the AND gate D1 is connected to the fourteenth voltage control unit, the output end of the fourteenth voltage control unit is connected to the second contact of the voltage control switch S3 of the fifteenth voltage control unit, the input signal terminal N1 is connected to the input end of the NOT gate D3, and the output end of the NOT gate D3 is connected to the fifteenth voltage control unit. The output end U1 of the fifteenth voltage control unit is connected to an input end of the voltage summing unit SUM3 of the habituation module I. The output of the mathematical operation unit ABM1 is: Vout=-V IN2 / V IN1=M1 / 1000. When the amplitude of the input signal terminal N3 reaches the positive threshold voltage of the memristor M1, its resistance will decrease, and at the same time, the output of the mathematical operation unit ABM1 will also decrease. After the output of the mathematical operation unit ABM1 is compared with the first comparator and the second comparator, a pulse voltage will be formed as the context signal. Therefore, the role of the memristor M1 is to determine the formation of the context signal.

[0059] The first comparator includes an operational amplifier OP3 and a power supply V1, the positive electrode of the power supply V1 is connected to the non-inverting input terminal of the operational amplifier OP3, the inverting input terminal of the operational amplifier OP3 is connected to the output terminal of the mathematical operation unit ABM1, the output terminal of the operational amplifier OP3 is connected to the AND gate D1, and the negative electrode of the power supply V1 is grounded. The first comparator realizes that when the output of the mathematical operation unit ABM1 is less than the voltage value of the power supply V1, it outputs a high level, otherwise it outputs a low level. The second comparator includes an operational amplifier OP5 and a power supply V3, the positive electrode of the power supply V3 is connected to the inverting input terminal of the operational amplifier OP5, the non-inverting input terminal of the operational amplifier OP5 is connected to the output terminal of the mathematical operation unit ABM1, the output terminal of the operational amplifier OP3 is connected to the AND gate D1, and the negative electrode of the power supply V3 is grounded. The second comparator realizes that when the output of the mathematical operation unit ABM1 is greater than the voltage value of the power supply V3, it outputs a high level, otherwise it outputs a low level.

[0060] The fourteenth voltage-controlled unit includes a voltage-controlled switch S1, a power supply V5, and a resistor R3. The positive phase input terminal of the voltage-controlled switch S1 is connected to the output terminal of the AND gate D1. The first contact of the voltage-controlled switch S1 is respectively connected to the resistor R3 and the second contact of the voltage-controlled switch of the fifteenth voltage-controlled unit. The second contact of the voltage-controlled switch S1 is connected to the positive electrode of the power supply V5. The resistor R3, the negative electrode of the power supply V5, and the inverting input terminal of the voltage-controlled switch S1 are all grounded. The fourteenth voltage-controlled unit is designed so that when the output of the AND gate D1 is greater than the threshold value of the voltage-controlled switch S1, the first contact will output the voltage of the power supply V5. The fifteenth voltage-controlled unit includes a voltage-controlled switch S3, an output end of a fourteenth voltage-controlled unit, and a resistor R5. The positive phase input end of the voltage-controlled switch S3 is connected to the output end of the NOT gate D3. The first contact of the voltage-controlled switch S3 is connected to the resistor R5 and an input end of a voltage summing unit SUM3. The second contact of the voltage-controlled switch S3 is connected to the output end of the fourteenth voltage-controlled unit. The resistor R5 and the inverting input end of the voltage-controlled switch S3 are grounded. The fifteenth voltage-controlled unit is designed to output the output voltage value of the fourteenth voltage-controlled unit at the first contact when the output of the NOT gate D3 is greater than the threshold value of the voltage-controlled switch S3.

[0061] The habituation module II includes a synaptic neuron circuit II, a feedback regulation circuit II, a voltage summing unit SUM2, a voltage summing unit SUM4, a voltage summing unit SUM6, and a voltage summing unit SUM8. The input signal terminal N2 is connected to an input terminal of the voltage summing unit SUM2, the output terminal of the voltage summing unit SUM2 is connected to the synaptic neuron circuit II through the voltage summing unit SUM4, the output terminal of the synaptic neuron circuit II is connected to the feedback regulation circuit II, the input signal terminal N2 is connected to the feedback regulation circuit II, the feedback regulation circuit II is connected to the other input terminal of the voltage summing unit SUM2, and the output terminal of the generalization module is connected to the feedback regulation circuit I. Operational amplifier OP of the emotion control module II 14 The output end is connected to the voltage summing unit SUM8, and the operational amplifier OP 16 The output terminal is connected to the voltage summing unit SUM6. That is, the output signal of the emotion control module II is added to the voltage summing unit SUM6 and the memristor M6 respectively. Since the amplitude of the input signal terminal N2 is certain, the output of the operational amplifier OP8 is only determined by the memristor M4. Therefore, the function of the synaptic neuron circuit II is to output voltages of different amplitudes according to the different resistance values ​​of the memristor M4. The feedback regulation circuit II generates a corresponding feedback voltage according to the output amplitude of the synaptic neuron circuit II. The generated feedback voltage will change the resistance value of the memristor M4, thereby changing the output amplitude of the synaptic neuron circuit II again.

[0062] The synaptic neuron circuit II includes a memristor M4, an operational amplifier OP8, a resistor R 44 , absolute value unit ABS2, voltage-controlled switch S6 and resistor R8. The positive end of the memristor M4 is connected to the output end of the voltage summing unit SUM4, and the negative end of the memristor M4 is connected to the inverting input end of the operational amplifier OP8 and the resistor R 44 The non-inverting input terminal of the operational amplifier OP8 is grounded, and the resistor R 44 Connected to the output of the operational amplifier OP8, the output of the operational amplifier OP8 is: V OP8 =-(R 44 / M4)*V SUM4 , when there is a signal at the input signal terminal N2, V SUM4 =V N2, so the output amplitude is determined by the memristor M4, and the role of the memristor M4 is to act as a synapse to determine the output amplitude. The output end of the operational amplifier OP8 is connected to the input end of the absolute value unit ABS2, the output end of the absolute value unit ABS2 is connected to the second contact of the voltage-controlled switch S6, the first contact of the voltage-controlled switch S6 is connected to the input end of the second voltage selection unit of the feedback regulation circuit II, the input signal end N2 is connected to the positive input end of the voltage-controlled switch S6, the resistor R8 and the negative input end of the voltage-controlled switch S6 are grounded, the absolute value unit ABS2 takes the output of the operational amplifier OP8 as input and then outputs it after taking the absolute value, and the voltage-controlled switch S6 outputs the output end of the absolute value unit ABS1 through the first contact of the voltage-controlled switch S6 when the value of the input stimulus N2 is greater than its threshold.

[0063] Feedback regulation circuit II includes a second voltage selection unit, a memristor M6, and an operational amplifier OP 20 and operational amplifier OP 18 , resistor R 52 , mathematical operation unit ABM4, power supply V 22 , a sixteenth voltage control unit, a seventeenth voltage control unit, a first contact of the voltage control switch S6 is connected to the input end of the second voltage selection unit, an output of the second voltage selection unit is connected to an input end of the voltage summing unit SUM8, an output end of the voltage summing unit SUM8 is connected to the voltage control switch S 33 The second contact is connected, the voltage-controlled switch S 33 The nodes connected to the first contact of are respectively connected to the positive end of the memristor M6 and an input end of the mathematical operation unit ABM4, and the negative end of the memristor M6 is respectively connected to the operational amplifier OP 20 The inverting input terminal and resistor R 52 Connected to the operational amplifier OP 20 The non-inverting input terminal is grounded, and the resistor R 52 With the operational amplifier OP 20 The output terminal of the operational amplifier OP is connected. 20 The output end of the mathematical operation unit ABM4 is connected to an input end of the mathematical operation unit ABM4, and the output end of the mathematical operation unit ABM4 is connected to the operational amplifier OP 18 The inverting input terminal is connected to the operational amplifier OP 18 The non-inverting input terminal and the power supply V 22 The positive pole of the power supply V 22 The negative pole of the ABM4 is grounded. The output of the mathematical operation unit ABM4 is Vout=-V IN2 / V IN1 =M6 / 1000, when V SUM8 When the positive threshold voltage of the memristor M6 is reached, the resistance of the memristor M6 will decrease, so the output of the mathematical operation unit ABM4 will also decrease. When its output is less than the power supply V22 When the voltage is 0, a feedback voltage will be generated, so the memristor M6 determines the formation of the feedback voltage. 18 The output end of is connected to the input end of the sixteenth voltage control unit, and the voltage-controlled switch S of the sixteenth voltage control unit 28 The nodes connected to the first contact are respectively connected to the NOT gate D 26 , the input end of the voltage summing unit SUM6 is connected, and the output end of the voltage summing unit SUM6 is connected to the voltage-controlled switch S of the seventeenth voltage-controlled unit. 22 The second voltage selection unit includes a NOT gate D6, a voltage-controlled switch S8, and a voltage-controlled switch S 10 , voltage controlled switch S 12 , resistor R 46 , resistor R 48 , resistor R 50 , Power supply V 24 , Power supply V 26 , Power supply V 28 , voltage summing unit SUM 10 and SUM 12 The nodes connected to the first contact of the voltage-controlled switch S6 are respectively connected to the input terminal of the NAND gate D5, the positive phase input terminal of the voltage-controlled switch S9, and the positive phase input terminal of the voltage-controlled switch S 12 The output end of the NOT gate D6 is connected to the input end of the voltage-controlled switch S8, and the nodes connected to the first contact of the voltage-controlled switch S8 are respectively connected to the resistor R 46 , voltage summing unit SUM 12 The second contact of the voltage-controlled switch S8 is connected to the power supply V 24 The positive pole is connected to the inverting input terminal of the voltage-controlled switch S8 and the power supply V 24 Negative electrode, resistor R 46 Ground, voltage controlled switch S 10 The nodes connected to the first contact are respectively connected to the resistor R 48 , voltage summing unit SUM 12 One input terminal is connected to the voltage-controlled switch S 10 The second contact is connected to the power supply V 26 The positive pole is connected, and the voltage-controlled switch S 10 The inverting input terminal, power supply V 26 Negative electrode, resistor R 48 Ground, voltage controlled switch S 12 The nodes connected to the first contact are respectively connected to the resistor R 50 , voltage summing unit SUM 10 One input terminal is connected to the voltage-controlled switch S 12 The second contact is connected to the power supply V 28 The positive pole is connected, and the voltage-controlled switch S 12The inverting input terminal, power supply V 28 Negative electrode, resistor R 50 Ground, voltage summing unit SUM 10 The output end of the voltage summing unit SUM8 is connected to an input end of the voltage summing unit SUM8, and the output end of the voltage summing unit SUM8 is connected to the voltage controlled switch S 33 The second voltage selection unit is connected to the second contact of the voltage-controlled switch S6, and when the voltage value output by the first contact of the voltage-controlled switch S6 is greater than the threshold value of the voltage-controlled switch S8, the first contact of the voltage-controlled switch S8 outputs the power supply V 24 Voltage value, power supply V 24 The voltage value of -0.1V is used as the customary natural recovery voltage. When the voltage value output by the first contact of the voltage-controlled switch S6 is greater than the voltage value output by the voltage-controlled switch S 10 When the voltage-controlled switch S 10 The first contact output power V 26 Voltage value, power supply V 26 The voltage value of the voltage controlled switch S6 is 4V as the habitual voltage. When the voltage value output by the first contact of the voltage controlled switch S6 is greater than the voltage value output by the first contact of the voltage controlled switch S 12 When the threshold is reached, the first contact outputs power V 28 Voltage value, power supply V 28 The voltage value is -5V as the dehabituation voltage.

[0064] The sixteenth voltage-controlled unit includes a voltage-controlled switch S 28 , Power supply V 20 , resistor R 54 , voltage controlled switch S 28 The non-inverting input terminal of the operational amplifier OP 18 The output end is connected to the first contact and the resistor R 54 、NORMAL GATE D 26 , the input of the voltage summing unit SUM6 is connected, and the second contact is connected to the power supply V 20 The positive electrode is connected to the resistor R 54 , Power supply V 20 Negative pole, voltage controlled switch S 28 The inverting input terminal is grounded, and the sixteenth voltage control unit is used as the operational amplifier OP 18 The output of the voltage-controlled switch S 28 When the threshold is reached, the first contact will output power V 20 The seventeenth voltage-controlled unit includes a voltage-controlled switch S 22 , the output signal of the voltage summing unit SUM6, the resistor R 42 、NORMAL GATE D 24 , input signal N2 and NAND gate D 24 The input terminal of the NOT gate D 24 The output terminal and the voltage controlled switch S 22The positive input terminal is connected to the voltage-controlled switch S 22 The nodes connected to the first contact are respectively connected to the input terminal of the voltage summing unit SUM2 and the resistor R 42 Phase connected, voltage controlled switch S 22 The second contact of is connected to the output end of the voltage summing unit SUM6, and the voltage-controlled switch S 22 The inverting input terminal, resistor R 42 Grounded, the seventeenth voltage control unit is when the NOT gate D 20 The output of the voltage-controlled switch S 22 When the threshold value is reached, the first contact will output the output voltage of the voltage summing unit SUM6.

[0065] The emotion control module II includes an AND gate D8, a fifth logic unit, a sixth logic unit, a seventh logic unit, an eighth logic unit, an eighteenth voltage control unit, a nineteenth voltage control unit, a twentieth voltage control unit, a twenty-first voltage control unit, a twenty-second voltage control unit, a twenty-third voltage control unit, a fifth adding unit, a sixth adding unit, a seventh adding unit, and an eighth adding unit. The input signal terminal N5 is respectively connected to the first input terminals of the AND gate D8, the fifth logic unit, the sixth logic unit, the seventh logic unit, and the eighth logic unit. The input signal terminal N2 is respectively connected to the second input terminals of the AND gate D8, the fifth logic unit, the sixth logic unit, and the seventh logic unit. The output of the sixteenth voltage control unit is connected to the second input terminal of the eighth logic unit. The output terminal of the AND gate D8 is connected to the eighteenth voltage control unit. The output terminal of the fifth logic unit is connected to the output terminal of the eighth logic unit. The output of the sixth logic unit is connected to the nineteenth voltage control unit, the output of the sixth logic unit is connected to the twentieth voltage control unit, the output of the seventh logic unit is connected to the twenty-first voltage control unit, the outputs of the eighteenth voltage control unit and the nineteenth voltage control unit are connected to the fifth adding unit, the outputs of the twentieth voltage control unit and the twenty-first voltage control unit are connected to the sixth adding unit, the outputs of the fifth adding unit and the sixth adding unit are connected to the seventh adding unit, the output of the seventh adding unit is connected to an input end of the voltage summing unit SUM8, the output of the sixth logic unit is respectively connected to the twenty-second voltage control unit and the twenty-third voltage control unit, the outputs of the twenty-second voltage control unit and the twenty-third voltage control unit are connected to the eighth adding unit, and the output of the eighth adding unit is connected to an input end of the voltage summing unit SUM6.

[0066] The fifth logic unit includes a NOT gate D 12 , AND gate D 10 , NOT gate D 12 The output terminal of the AND gate D 10 The second input terminal of the NOT gate D 10 The input terminal of the fifth logic unit is used as an input terminal of the gate D 10The first input terminal of the sixth logic unit is used as another input terminal of the fifth logic unit. The fifth logic unit is to output a high level when the input stimulus signal N2 is at a low level and the emotion control signal N5 is at a high level, otherwise it is at a low level. The sixth logic unit includes a NOT gate D 14 , AND gate D 16 , NOT gate D 14 The output terminal of the AND gate D 16 The first input terminal is connected to the NOT gate D 14 The input end of the gate D is used as one of the six logic units. 16 The second input end of the seventh logic unit is used as another input end of the sixth logic unit. The sixth logic unit is to output a high level when the input stimulus signal N2 is high and the emotion control signal N5 is low, otherwise it is low. The seventh logic unit includes a NOT gate D 18 、NORMAL GATE D 22 , AND gate D 20 , NOT gate D 18 AND NOT gate D 22 The output of the AND gate D 20 The two input terminals of the NOT gate D are connected 18 AND NOT gate D 22 The inputs of the eighth logic unit are respectively two input terminals of the fifth logic unit, and the seventh logic unit is to output a high level when the input stimulus signal N2 is at a low level and the emotion control signal N5 is at a low level, otherwise it is at a low level. The eighth logic unit includes a NOT gate D 26 、NORMAL GATE D 28 , AND gate D 30 , AND gate D 28 , NOT gate D 26 The output of the AND gate D 30 AND gate D 32 The second input terminal is connected to the NOT gate D 28 The output of the AND gate D 32 The first input terminal is connected to the NOT gate D 26 The input of the eighth logic unit is used as an input terminal, and the NOT gate D 28 The node connected to the input end of is used as another input end of the eighth logic unit. The eighth logic unit is used to connect the gate D when the output signal of the sixteenth voltage control unit is low level and the emotion control signal N5 is high level. 30 The output is high level, otherwise it is low level. When the output signal of the sixteenth voltage control unit is low level and the emotion control signal N5 is also low level, the gate D 32 The output is high if it is on, otherwise it is low.

[0067] The eighteenth voltage-controlled unit includes a voltage-controlled switch S 14 , power supply V8, resistor R 10 , voltage controlled switch S14 The positive input terminal of the AND gate D8 is connected to the output terminal of the voltage-controlled switch S 14 The first contact and the resistor R 10 , the input of the fifth adding unit is connected, the voltage-controlled switch S 14 The second contact is connected to the positive pole of the power supply V8, and the resistor R 10 , power supply V8 negative pole, voltage controlled switch S 14 The inverting input terminal is grounded. The eighteenth voltage-controlled unit is used when the output of the AND gate D8 is greater than the voltage-controlled switch S 14 When the voltage-controlled switch S 14 The first contact of the output voltage of the power supply V8. The nineteenth voltage control unit includes a voltage control switch S 16 , Power supply V 10 , resistor R 14 , voltage controlled switch S 16 The positive phase input terminal of the fifth logic unit is connected to the output terminal of the fifth logic unit, and the voltage-controlled switch S 16 The first contact and the resistor R 14 , the input of the fifth adding unit is connected, the resistor R 14 , Power supply V 10 Negative pole, voltage controlled switch S 16 The inverting input terminal is grounded. The nineteenth voltage-controlled unit is used when the output of the fifth logic unit is greater than the voltage-controlled switch S 16 When the voltage-controlled switch S 16 The first contact will output power V 10 The twentieth voltage-controlled unit includes a voltage-controlled switch S 18 , Power supply V 12 , resistor R 18 , voltage controlled switch S 18 The positive phase input terminal of the fourth logic unit is connected to the output terminal of the fourth logic unit, and the voltage-controlled switch S 18 The first contact and the resistor R 18 , the input of the sixth adding unit is connected, the voltage-controlled switch S 18 The second contact is connected to the power supply V 12 The positive electrode is connected to the resistor R 18 , Power supply V 12 Negative pole, voltage controlled switch S 18 The inverting input terminal is grounded. The twentieth voltage-controlled unit is used to control the voltage control switch S when the output of the sixth logic unit is greater than the voltage control switch S 18 When the voltage-controlled switch S 18 The first contact will output power V 12 The twenty-first voltage-controlled unit includes a voltage-controlled switch S 20 , Power supply V 14 , resistor R 22 , voltage controlled switch S20 The positive phase input terminal of the fifth logic unit is connected to the output terminal of the fifth logic unit, and the voltage-controlled switch S 20 The first contact and the resistor R 22 , the input of the sixth adding unit is connected, the voltage-controlled switch S 20 The second contact is connected to the power supply V 14 The positive electrode is connected to the resistor R 22 , Power supply V 14 Negative pole, voltage controlled switch S 20 The inverting input terminal is grounded. The twenty-first voltage-controlled unit is used when the output of the seventh logic unit is greater than the voltage-controlled switch S 20 When the voltage-controlled switch S 20 The first contact will output power V 14 The twenty-second voltage-controlled unit includes a voltage-controlled switch S 24 , Power supply V 16 , resistor R 56 , voltage controlled switch S 24 The positive phase input terminal of the eighth logic unit is connected to the output terminal of the eighth logic unit, and the voltage-controlled switch S 24 The first contact and the resistor R 56 , the input of the eighth adding unit is connected, the voltage-controlled switch S 24 The second contact is connected to the power supply V 16 The positive electrode is connected to the resistor R 56 , Power supply V 16 Negative pole, voltage controlled switch S 24 The inverting input terminal is grounded. The twenty-second voltage-controlled unit is used when the output of the eighth logic unit is greater than the voltage-controlled switch S 24 When the voltage-controlled switch S 24 The first contact will output power V 16 The twenty-third voltage-controlled unit includes a voltage-controlled switch S 26 , Power supply V 18 , resistor R 62 , voltage controlled switch S 26 The positive phase input terminal of the sixth logic unit is connected to the output terminal of the voltage-controlled switch S 26 The first contact and the resistor R 62 , the input of the eighth adding unit is connected, the voltage-controlled switch S 26 The second contact is connected to the power supply V 18 The positive electrode is connected to the resistor R 62 , Power supply V 18 Negative pole, voltage controlled switch S 26 The inverting input terminal is grounded. The twenty-third voltage-controlled unit is used when the output of the eighth logic unit is greater than the voltage-controlled switch S 26 When the threshold is reached, the first contact will output power V 18 voltage.

[0068] The fifth adding unit includes a resistor R 12 , resistor R 16 , resistor R 26 , resistor R 28 , Operational Amplifier OP 10 , resistor R 12 and resistor R 16 With the operational amplifier OP 10 The non-inverting input terminal is connected to the resistor R 26 and resistor R 28 With the operational amplifier OP 10 The inverting input terminal is connected to the resistor R 26 Ground, operational amplifier OP 10 The output terminal and the resistor R 28 The fifth adding unit is connected to the input of the seventh adding unit, and the fifth adding unit is used to add the output voltages of the eighteenth voltage control unit and the nineteenth voltage control unit. The sixth adding unit includes a resistor R 20 , resistor R 24 , resistor R 32 , resistor R 34 , Operational Amplifier OP 12 , resistor R 20 and resistor R 24 With the operational amplifier OP 10 The non-inverting input terminal is connected to the resistor R 32 and resistor R 34 With the operational amplifier OP 12 The inverting input terminal is connected to the resistor R 32 Ground, operational amplifier OP 12 The output terminal and the resistor R 34 The second adding unit is connected to the input of the seventh adding unit, and the second adding unit is used to add the output voltages of the twentieth voltage control unit and the twenty-first voltage control unit. The seventh adding unit includes a resistor R 30 , resistor R 36 , resistor R 38 , resistor R 40 , Operational Amplifier OP 14 , resistor R 30 and resistor R 34 With the operational amplifier OP 14 The non-inverting input terminal is connected to the resistor R 38 and resistor R 40 With the operational amplifier OP 14 The inverting input terminal is connected to the resistor R 38 Ground, operational amplifier OP 14 The output terminal and the resistor R 40The seventh adding unit is connected to the voltage summing unit SUM8, and is used to add the output voltages of the fifth adding unit and the sixth adding unit. The eighth adding unit includes a resistor R 58 , resistor R 60 , resistor R 64 , resistor R 66 , Operational Amplifier OP 16 , resistor R 58 and resistor R 60 With the operational amplifier OP 16 The non-inverting input terminal is connected to the resistor R 64 and resistor R 66 With the operational amplifier OP 16 The inverting input terminal is connected to the resistor R 64 Ground, operational amplifier OP 16 The output terminal and the resistor R 64 Connected to the voltage summing unit SUM6, the eighth adding unit is used to add the output voltages of the twenty-second voltage control unit and the twenty-third voltage control unit.

[0069] The situation control module II includes a memristor M2, a resistor R2, an operational amplifier OP2, a mathematical operation unit ABM2, a third comparator, a fourth comparator, an AND gate D2, a twenty-fourth voltage control unit, a twenty-fifth voltage control unit, and a NOT gate D4. The operational amplifier OP2 is used to perform a proportional operation in combination with the resistor R2 and the resistor M2, and its output is: V OP1 =-(R2 / M2)*V N3 The node connected to the input signal terminal N4 is respectively connected to the positive terminal of the memristor M2 and an input terminal of the mathematical operation unit ABM2, the negative terminal of the memristor M2 is respectively connected to the inverting input terminal of the operational amplifier OP2 and the resistor R2, the non-inverting input terminal of the operational amplifier OP2 is grounded, the resistor R2 is connected to the output terminal of the operational amplifier OP2, the output terminal of the operational amplifier OP2 is connected to an input terminal of the mathematical operation unit ABM2, the mathematical operation unit ABM2 is respectively connected to the input terminals of the third comparator and the fourth comparator, the output terminals of the third comparator and the fourth comparator are connected to the AND gate D2, the output of the AND gate D2 is connected to the twenty-fourth voltage-controlled unit, the output terminal of the twenty-fourth voltage-controlled unit is connected to the second contact of the voltage-controlled switch of the twenty-fifth voltage-controlled unit, the input signal terminal N2 is connected to the input terminal of the NOT gate D4, and the output terminal of the NOT gate D4 is connected to the twenty-fifth voltage-controlled unit; the output of the mathematical operation unit ABM2 is: Vout=-V IN2 / V IN1=M2 / 1000. When the amplitude of the input signal terminal N4 reaches the positive threshold voltage of the memristor M2, its resistance will decrease, and at the same time, the output of the mathematical operation unit ABM2 will also decrease. After the output of the mathematical operation unit ABM2 is compared with the third comparator and the fourth comparator, a pulse voltage will be formed as the context signal. Therefore, the role of the memristor M2 is to determine the formation of the context signal. The output of the operational amplifier OP2 is: V OP2 =-(R2 / M2)*V N4 .

[0070] The third comparator includes an operational amplifier OP4 and a power supply V2, the power supply V2 is connected to the non-inverting input terminal of the operational amplifier OP4, the negative electrode of the power supply V2 is grounded, and the third comparator realizes that when the output of the mathematical operation unit ABM2 is less than the voltage value of the power supply V2, the third comparator outputs a high level, otherwise it outputs a low level. The fourth comparator includes an operational amplifier OP6 and a power supply V4, the power supply V4 is connected to the inverting input terminal of the operational amplifier OP4, the negative electrode of the power supply V4 is grounded, and the fourth comparator realizes that when the output of the mathematical operation unit ABM2 is greater than the voltage value of the power supply V4, the third comparator outputs a high level, otherwise it outputs a low level. The twenty-fourth voltage-controlled unit includes a voltage-controlled switch S2, a power supply V6, and a resistor R4. The positive phase input terminal of the voltage-controlled switch S2 is connected to the output terminal of the AND gate D2. The first contact of the voltage-controlled switch S2 is connected to the resistor R4 and the second contact of the voltage-controlled switch of the twenty-fifth voltage-controlled unit. The second contact of the voltage-controlled switch S2 is connected to the positive electrode of the power supply V6. The resistor R4, the negative electrode of the power supply V6, and the inverting input terminal of the voltage-controlled switch S2 are grounded. The twenty-fourth voltage-controlled unit is used as the AND gate D 12 When the output of is greater than the threshold value of the voltage-controlled switch S2, the first contact of the voltage-controlled switch S2 will output the voltage of the power supply V6. The twenty-fifth voltage-controlled unit includes the voltage-controlled switch S4, the output end of the twenty-fourth voltage-controlled unit, and the resistor R6. The positive phase input end of the voltage-controlled switch S4 is connected to the output end of the NOT gate D4. The first contact of the voltage-controlled switch S4 is connected to the resistor R6 and an input end of the voltage summing unit SUM4. The second contact of the voltage-controlled switch S4 is connected to the output end of the twenty-fourth voltage-controlled unit. The resistor R6 and the inverting input end of the voltage-controlled switch S4 are grounded. The twenty-fifth voltage-controlled unit is designed to output the output voltage value of the twenty-fourth voltage-controlled unit when the output of the NOT gate D4 is greater than the threshold value of the voltage-controlled switch S4.

[0071] Figure 6 The simulation results of habituation and dehabituation are obtained by taking habituation module I as an example, where the input signal terminal N1 inputs the stimulus signal, V f1 is the feedback voltage signal, i.e., the voltage input to the port of the voltage summing unit SUM1, M3 is the resistance change of the memristor M3, and the voltage V at the output of the habituation module I is OUT1 is the output signal. Figure 6 It can be seen that 0-60s is the habituation process. In the first 16s, there is no feedback signal input to the memristor M3, and the resistance value of the memristor M3 does not change. After 16s, the feedback signal appears, and the voltage-controlled switch S 21 When there is no input signal, the feedback signal is applied to the memristor M3, so the resistance of the memristor M3 will increase, and the output signal will habituate. 60s-64s is the de-habituation process. When a strong stimulus is given to the memristor M3, its resistance will drop rapidly, resulting in de-habituation. 64s-124s is the re-habituation process. When the strong stimulus applied to the memristor M3 returns to the original weak stimulus, the habituation process will occur again.

[0072] Figure 7 is the simulation result of habituation generalization, where N1 inputs the stimulus signal, M3 is the memristor, and V OUT1 is the output signal corresponding to the input stimulus N1, N2 is another input stimulus signal, M4 is the memristor, V OUT2 is the output signal corresponding to the input stimulus N2. Figure 7 It can be seen that the first 32 seconds is the test process of N1 input stimulation signal, which is determined by V OUT1 The results show that N1 input stimulation can make the output habituated. 32s-64s is the test process of N2 input stimulation signal, which is composed of V OUT2 The results show that N2 input stimulation cannot cause the output to become habituated. 64s-68s is the dehabituation process. 68s-80s is the learning process, when N1 and N2 apply signals at the same time. When learning is completed, applying N2 stimulation signals will cause the output to become habituated.

[0073] Figure 8 The simulation results of habituation under different situations and emotions are shown in Figure 2. N1 is the input stimulus signal, and N5 is the emotion control signal. When N5 is 1V, it means that positive emotion stimulus is applied at this time. When N5 is -1V, it means that negative emotion stimulus is applied at this time. When N5 is 0V, it means that neutral stimulus is applied at this time. N3 is the situation control signal. When its amplitude changes from 1V to 2.5V, it means that the situation has changed. M3 is the memristor. V OUT1 is the output signal corresponding to the input stimulus N1. As can be seen from the figure, the first 60s is the habituation process under neutral stimulation, 60-64s is the dehabituation process, and 64s-88s is the habituation process under positive emotional stimulation. When the situational information changes at 86s, the output will change and habituation will occur again after a period of time. After 128s, it is habituation under negative emotional stimulation. As can be seen from the simulation result diagram, the speed of habituation under different emotional stimulations is different. Among them, the habituation speed under positive emotional stimulation is the fastest, followed by neutral stimulation, and the habituation speed under negative emotional stimulation is the slowest.

[0074] Fig. 9 This is a complete simulation result diagram, 0s-60s is the habituation process under positive emotional stimulation, 60s-64s is the dehabituation process, 64s-148s is the habituation process under negative emotional stimulation, 148s-152s is the dehabituation process, 152s-164s is the learning process of habituation generalization, 164s-212s is the generalization process, at 212s the situation changes, the output changes and habituates again.

[0075] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principle of the present invention should be included in the protection scope of the present invention.

Claims

1. An emotional habituation neural network circuit with context dependence and generalization, It is characterized in that Including input signal terminal N 1 -N 5 , habituation module I, generalization module, emotion control module I, situation control module I, habituation module II, emotion control module II, situation control module II and output signal terminal, representing the input signal terminal N of the stimulus signal 1 The N is connected to the habituation module I, the generalization module, the emotion control module I, and the situation control module I respectively, representing the input signal terminal N of the situation control signal 3 Connected to the situation control module I, the generalization module, situation control module I and situation control module I are all connected to the habituation module I, the output end of the habituation module I is the output signal end I; the input signal end N represents the emotion control signal 5 Connected to emotion control module I and emotion control module II respectively; represents the input signal terminal N of the stimulus signal 2 The N terminals are connected to the habituation module II, the generalization module, the emotion control module II, and the situation control module II, respectively, representing the input signal terminal N of the situation control signal. 4 connected to the situation control module II; the generalization module, the emotion control module II and the situation control module II are all connected to the habituation module II, and the output end of the habituation module II is the output signal end II; The habituation module I and the habituation module II both include a synaptic neuron circuit I, a feedback regulation circuit, a voltage summing unit SUM 1 SUM voltage summing unit 3 , the input signal terminal N 1 Or input signal terminal N 2 and the voltage summing unit SUM 1 One input terminal is connected to the voltage summing unit SUM 1 The output terminal of the voltage summing unit SUM 3 The output end of the situation control module I or the situation control module II is connected to the voltage summing unit SUM 3 The other input terminal of the voltage summing unit SUM is connected to 3 The output end of the synaptic neuron circuit I is connected to the feedback regulation circuit I; the input signal end N 1 Or input signal terminal N 2 Connected to the feedback regulation circuit, the feedback regulation circuit and the voltage summing unit SUM 1 The output end of the generalization module is connected to the feedback regulation circuit, and the output end of the emotion control module I or the emotion control module II is connected to the feedback regulation circuit; The generalization module includes an AND gate D 33 , a third voltage control unit, a fourth voltage control unit, a fifth voltage control unit, a sixth voltage control unit, a seventh voltage control unit, a voltage summing unit SUM 2 , a first proportional amplifier, a second proportional amplifier, a first synaptic neuron circuit and a second synaptic neuron circuit, the input signal terminal N 1 respectively connected to the input terminal of the third voltage control unit and the AND gate D 33 One input terminal is connected to the input signal terminal N 2 respectively connected to the input terminal of the fifth voltage control unit and the AND gate D 33 The other input terminal is connected to the gate D 33 The output end of is connected to the input end of the fourth voltage control unit, and the output ends of the fourth voltage control unit and the fifth voltage control unit are respectively connected to the voltage summing unit SUM 2 The two input terminals of the voltage summing unit SUM are connected 2 The output end of is connected to the first proportional amplifier, the output end of the first proportional amplifier is connected to the second proportional amplifier; the third voltage control unit is connected to the first synaptic neuron circuit, the output end of the first synaptic neuron circuit is connected to the sixth voltage control unit, the output end of the second proportional amplifier is connected to the second synaptic neuron circuit, the output end of the second synaptic neuron circuit is connected to the seventh voltage control unit; the other input end of the sixth voltage control unit is connected to the voltage summing unit SUM of the feedback regulation circuit of the habituation module I 7 The output end of the sixth voltage control unit is connected to the memristor M of the feedback regulation circuit of the habituation module I. 5 The other input terminal of the seventh voltage control unit is connected to the voltage summing unit SUM of the feedback regulation circuit of the habituation module II 7 The output end of the seventh voltage control unit is connected to the memristor M of the feedback regulation circuit of the habituation module II. 5 The positive end is connected; The emotion control module I and the emotion control module II both include an AND gate D 7 , a first logic unit, a second logic unit, a third logic unit, a fourth logic unit, an eighth voltage control unit, a ninth voltage control unit, a tenth voltage control unit, an eleventh voltage control unit, a twelfth voltage control unit, a thirteenth voltage control unit, a first adding unit, a second adding unit, a third adding unit, a fourth adding unit, an input signal terminal N 5 AND gate D 7 , the first input end of the first logic unit, the second logic unit, the third logic unit, and the fourth logic unit are connected, and the input signal end N 1 Or input signal terminal N 2 AND gate D 7 , the first logic unit, the second logic unit, and the second input end of the third logic unit are connected, the output end of the first voltage control unit is connected to the second input end of the fourth logic unit, and the gate D 7 The output end of the first logic unit is connected to the input end of the eighth voltage control unit, the output end of the first logic unit is connected to the input end of the ninth voltage control unit, the output end of the second logic unit is connected to the input end of the tenth voltage control unit, the output end of the third logic unit is connected to the input end of the eleventh voltage control unit, the output ends of the eighth voltage control unit and the ninth voltage control unit are both connected to the first adding unit, the output ends of the tenth voltage control unit and the eleventh voltage control unit are both connected to the second adding unit, the output ends of the first adding unit and the second adding unit are both connected to the input end of the third adding unit, and the output end of the third adding unit is connected to the voltage summing unit SUM of the feedback regulation circuit of the habituation module I or the habituation module II. 7 The output end of the fourth logic unit is connected to the twelfth voltage control unit and the thirteenth voltage control unit respectively, the output end of the twelfth voltage control unit and the thirteenth voltage control unit are both connected to the input end of the fourth adding unit, and the output end of the fourth adding unit is connected to the voltage summing unit SUM of the feedback regulating circuit. 5 is connected to one input terminal of; The situation control module I and the situation control module II both include a memristor M 1 , resistor R 1 , Operational Amplifier OP 1 , Mathematical Operation Unit ABM 1 , first comparator, second comparator, and gate D 1 , the fourteenth voltage control unit, the fifteenth voltage control unit and the NOT gate D 3 , input signal terminal N 3 Or input signal terminal N 4 Memristor M 1 The positive terminal and mathematical operation unit ABM 1 One input terminal is connected to the memristor M 1 The negative terminal of the operational amplifier OP 1 The inverting input terminal and resistor R 1 Connected to the operational amplifier OP 1 The non-inverting input terminal is grounded, and the resistor R 1 With the operational amplifier OP 1 The output of the operational amplifier OP 1 The output terminal of the mathematical operation unit ABM 1 The other input terminal of the mathematical operation unit ABM is connected to 1 The first comparator and the second comparator are connected to the input terminals of the first comparator and the second comparator respectively, and the output terminals of the first comparator and the second comparator are connected to the AND gate D 1 Connected, AND gate D 1 The output end of is connected to the input end of the fourteenth voltage control unit, the output end of the fourteenth voltage control unit is connected to another input end of the fifteenth voltage control unit, and the input signal end N 1 Or input signal terminal N 2 NAND Gate D 3 The input terminal of the NOT gate D 3 The output end of is connected to an input end of the fifteenth voltage control unit, and the output end of the fifteenth voltage control unit is connected to the voltage summing unit SUM of the feedback regulating circuit of the habituation module I or the habituation module II. 3 The other input terminal is connected.

2. The emotional habituation neural network circuit with context dependence and generalization according to claim 1, It is characterized in that The synaptic neuron circuit I includes a memristor M 3 , Operational Amplifier OP 7 , Absolute value unit ABS 1 And voltage controlled switch S 5 , memristor M 3 The positive terminal of the voltage summing unit SUM 3 The output end is connected to the memristor M 3 The negative terminal of the operational amplifier OP 7 The inverting input terminal and resistor R 43 Connected to the operational amplifier OP 7 The non-inverting input terminal is grounded, and the resistor R 43 With the operational amplifier OP 7 The output end of the operational amplifier OP is connected 7 The output terminal of the absolute value unit ABS 1 The input terminal is connected to the absolute value unit ABS 1 The output terminal and the voltage controlled switch S 5 The second contact of the voltage-controlled switch S 5 The first contact is respectively connected to the resistor R 7 One end is connected to the input end of the feedback regulation circuit Ⅰ; the input signal terminal N 1 With voltage controlled switch S 5 The non-inverting input terminal is connected to the resistor R 7 The other end and the voltage controlled switch S 5 The inverting input terminal is grounded.

3. The emotional habituation neural network circuit with context dependence and generalization according to claim 2, It is characterized in that The feedback regulation circuit includes a first voltage selection unit, a memristor M 5 , Operational Amplifier OP 19 and operational amplifier OP 17 , Mathematical Operation Unit ABM 3 , a first voltage control unit, a second voltage control unit, a voltage summing unit SUM 5 SUM voltage summing unit 7 , voltage-controlled switch S of synaptic neuron circuit I 5 The first contact of is connected to the input end of the first voltage selection unit, and the output end of the first voltage selection unit is connected to the voltage summing unit SUM 7 An input terminal of the emotion control module I or the emotion control module II is connected to a voltage summing unit SUM 7 The other input terminal of the voltage summing unit SUM is connected to 7 The output end of is connected to the sixth voltage control unit or the seventh voltage control unit of the generalization module, and the sixth voltage control unit or the seventh voltage control unit is respectively connected to the memristor M 5 The positive terminal and mathematical operation unit ABM 3 One input terminal is connected to the memristor M 5 The negative terminal of the operational amplifier OP 19 The inverting input terminal and resistor R 51 Connected to the operational amplifier OP 19 The non-inverting input terminal is grounded, and the resistor R 51 With the operational amplifier OP 19 The output end of the operational amplifier OP is connected 19 The output terminal of the mathematical operation unit ABM 3 One input terminal of the mathematical operation unit ABM is connected to 3 The output of the operational amplifier OP 17 The inverting input terminal of the operational amplifier OP 17 The non-inverting input terminal is connected to the power supply V 21 The positive pole of the power supply V 21 The negative terminal of the operational amplifier OP 17 The output end of is connected to the first voltage control unit, and the first voltage control unit is respectively connected to the emotion control module I or the emotion control module II, the voltage summing unit SUM 5 The voltage summing unit SUM is connected to one input terminal of 5 The other input end of the voltage summing unit SUM is connected to the other output end of the emotion control module I or the emotion control module II; 5 The output end of is connected to another input end of the second voltage control unit; the input signal end N 1 Through the NOT gate D 23 is connected to an input terminal of the second voltage control unit, and an output terminal of the second voltage control unit is connected to a voltage summing unit SUM 1 The other input terminal is connected.

4. The emotional habituation neural network circuit with context dependence and generalization according to claim 3, It is characterized in that The first voltage selection unit of the feedback regulation circuit includes a NOT gate D 5 , voltage control unit I, voltage control unit II and voltage control unit III, the voltage-controlled switch S of the synaptic neuron circuit I 5 The first contact of each of the two terminals is connected to the NOT gate D 5 , the input terminals of the voltage control unit II and the voltage control unit III are connected, and the NOT gate D 5 The output terminals of the voltage control unit I and the voltage control unit II are connected to the voltage summing unit SUM 11 Phase connection, voltage summing unit SUM 11 The output of the voltage control unit III is connected to the voltage summing unit SUM 9 connected; voltage summing unit SUM 9 The output terminal of the voltage summing unit SUM 9 is connected to one input terminal.

5. The emotional habituation neural network circuit with context dependence and generalization according to claim 4, It is characterized in that The first synaptic neuron circuit includes a resistor R 74 , resistor R 75 , Operational Amplifier OP 23 , Mathematical Operation Unit ABM 5 and operational amplifier OP 25 The output end of the third voltage control unit is connected to the resistor R 74 and mathematical operation unit ABM 5 One input terminal is connected to the resistor R 74 Respectively with the operational amplifier OP 23 The inverting input terminal and resistor R 75 Connected to the operational amplifier OP 23 The non-inverting input terminal is grounded, and the resistor R 75 With the operational amplifier OP 23 The output of the operational amplifier OP 23 The output terminal of the mathematical operation unit ABM 5 The other input terminal of the mathematical operation unit ABM is connected to 5 The output of the operational amplifier OP 25 The inverting input terminal of the operational amplifier OP 25 The non-inverting input terminal is connected to the power supply V 32 The positive pole of the power supply V 32 The negative terminal of the operational amplifier OP is grounded. 25 The output end of is connected to an input end of a sixth voltage control unit; The second synaptic neuron circuit includes a memristor M 7 , resistor R 76 , Operational Amplifier OP 24 , Mathematical Operation Unit ABM 6 and operational amplifier OP 26 The output of the second proportional amplifier is connected to the memristor M 7 The positive terminal and mathematical operation unit ABM 6 One input terminal is connected to the memristor M 7 The negative terminal of the operational amplifier OP 24 The inverting input terminal and resistor R 76 Connected to the operational amplifier OP 24 The non-inverting input terminal is grounded, and the resistor R 76 With the operational amplifier OP 24 The output of the operational amplifier OP 24 The output terminal of the mathematical operation unit ABM 6 One input terminal of the mathematical operation unit ABM is connected to 6 The output of the operational amplifier OP 26 The inverting input terminal of the operational amplifier OP 26 The non-inverting input terminal is connected to the power supply V 33 The positive pole of the power supply V 33 The negative terminal of the operational amplifier OP is grounded. 26 The output end of is connected to an input end of the seventh voltage control unit.

6. The emotional habituation neural network circuit with context dependence and generalization according to claim 5, It is characterized in that The voltage control unit I, the voltage control unit II, the voltage control unit III, the first voltage control unit, the third voltage control unit, the fourth voltage control unit, the fifth voltage control unit, the eighth voltage control unit, the ninth voltage control unit, the tenth voltage control unit, the eleventh voltage control unit, the twelfth voltage control unit, the thirteenth voltage control unit and the fourteenth voltage control unit all include a first voltage-controlled switch, the positive input end of the first voltage-controlled switch is its input end, the second contact of the first voltage-controlled switch is connected to the positive electrode of the first power supply, the first contact of the first voltage-controlled switch is its output end and the first contact of the first voltage-controlled switch is connected to the first resistor, and the inverting input end of the first voltage-controlled switch, the negative electrode of the first power supply and the first resistor are all grounded; The second voltage-controlled unit, the sixth voltage-controlled unit, the seventh voltage-controlled unit and the fifteenth voltage-controlled unit all include a second voltage-controlled switch, the non-phase input terminal of the second voltage-controlled switch is one input terminal, the second contact of the second voltage-controlled switch is another input terminal, the first contact of the second voltage-controlled switch is an output terminal and the first contact of the second voltage-controlled switch is connected to the second resistor, and the inverting input terminal of the second voltage-controlled switch and the second resistor are both grounded; The first proportional amplifier and the second proportional amplifier both include a first operational amplifier, the inverting input terminal of the first operational amplifier is connected to the third resistor and the fourth resistor respectively, the third resistor is its input terminal, the fourth resistor is connected to the output terminal of the first operational amplifier, the non-inverting input terminal of the first operational amplifier is grounded, and the output terminal of the first operational amplifier serves as its output terminal; The first logic unit includes a NOT gate D 11 AND gate D 9 , NOT gate D 11 The output terminal of the AND gate D 9 The second input terminal of the NOT gate D 11 The input terminal is used as one of its input terminals and connected to the input signal terminal N 1 Or input signal terminal N 2 Connected, AND gate D 9 The first input terminal of the 5 Connected, AND gate D 9 The output end of is connected to the input end of the ninth voltage control unit; The second logic unit includes a NOT gate D 13 AND gate D 15 , NOT gate D 13 The output terminal of the AND gate D 15 The first input terminal is connected to the NOT gate D 13 The input terminal is used as one of its input terminals and connected to the input signal terminal N 5 Connected, AND gate D 15 The second input terminal of the 1 Or input signal terminal N 2 Connected, AND gate D 15 The output end of is connected to the input end of the tenth voltage control unit; The third logic unit includes a NOT gate D 17 、NORMAL GATE D 21 AND gate D 19 , NOT gate D 17 AND NOT Gate D 21 The output terminals of the AND gates D 19 The two input terminals of the NOT gate D are connected 17 The input terminal and the input signal terminal N 5 Connected, NOT gate D 21 The input terminal and the input signal terminal N 1 Or input signal terminal N 2 Connected, AND gate D 19 The output end of is connected to the input end of the eleventh voltage control unit; The fourth logic unit includes a NOT gate D 25 、NORMAL GATE D 27 , AND gate D 29 AND gate D 31 , NOT gate D 25 The input end of the habituation module I or the habituation module II feedback regulation circuit is connected to the output end of the first voltage control unit, and the NOT gate D 25 The output terminals of the AND gates D 29 AND gate D 31 The second input terminal is connected to the input signal terminal N 5 NAND gate D 27 The input terminal and the AND gate D 29 The first input terminal of the AND gate D 29 The output end of is connected to the input end of the twelfth voltage control unit, and the gate D 31 The output end of is connected to the input end of the thirteenth voltage control unit; The first adding unit, the second adding unit, the third adding unit and the fourth adding unit all include a second operational amplifier, the non-inverting input terminal of the second operational amplifier is respectively connected to one end of the fifth resistor and the sixth resistor, the other ends of the fifth resistor and the sixth resistor are respectively used as input terminals of the adding unit, the inverting input terminal of the second operational amplifier is respectively connected to one end of the seventh resistor and the eighth resistor, the other end of the seventh resistor is grounded, the other end of the eighth resistor is connected to the output terminal of the second operational amplifier, and the output terminal of the second operational amplifier is used as the output terminal of the adding unit; The first comparator includes a third operational amplifier and a second power supply, the positive electrode of the second power supply is connected to the non-inverting input terminal of the third operational amplifier, and the inverting input terminal of the third operational amplifier is connected to the mathematical operation unit ABM of the context control module I or the context control module II. 1 The output end of the third operational amplifier is connected to the AND gate D 1 The negative electrode of the second power supply is connected to an input terminal of the power supply, and the negative electrode of the second power supply is grounded; The second comparator includes a fourth operational amplifier and a third power supply, the positive electrode of the third power supply is connected to the inverting input terminal of the fourth operational amplifier, and the non-inverting input terminal of the fourth operational amplifier is connected to the mathematical operation unit ABM. 1 The output end of the fourth operational amplifier is connected to the AND gate D 1 The negative pole of the third power supply is grounded.