A method for reducing noise based on a high-precision voltage source matrix of an optical chip

Abstract

This invention discloses a method for noise reduction based on a high-precision voltage source matrix using an optical chip, comprising the following steps: S1, initializing the MCP23017 and configuring chip select and address select signals; S2, sending control signals via SPI to select the DAC8568 channel; S3, the DAC8568 converting the digital signal into an analog voltage signal; S4, amplifying the analog voltage signal; S5, adding noise-reducing capacitors for high-frequency noise filtering; S6, a regulated power supply module providing a stable voltage; S7, optimizing the PCB design, layering and shielding the wiring; S8, adjusting and calibrating the voltage output in real time. This invention, through a high-precision voltage source matrix control method based on the ESP32-S3 microcontroller and the DAC8568 chip, achieves precise adjustment, noise suppression, and voltage stability optimization of multi-channel voltage output, meeting the stringent requirements of high-precision equipment for voltage sources.

Description

Technical Field

[0001] This invention relates to the field of voltage source technology, and in particular to a method for reducing noise based on a high-precision voltage source matrix using optical chips. Background Technology

[0002] In modern electronic devices, especially in high-precision applications, the stability and accuracy of the power supply are crucial to ensuring the normal operation of the system. This is particularly true in fields such as optical chips, sensors, and other precision instruments, where the requirements for voltage sources are extremely stringent. To meet these demands, many applications employ voltage source matrix technology, which can provide accurate and stable voltage output to multiple channels. However, with the increasing demand for high-precision and low-noise power supplies, existing voltage source matrices still have certain shortcomings in practical applications, particularly in areas such as multi-channel control, noise interference, and precision control.

[0003] Currently, common voltage source matrix systems generally rely on digital-to-analog converter (DAC) chips to generate voltage signals. The DAC8568 is a widely used 16-bit precision DAC chip with high-precision digital-to-analog conversion capabilities, providing the necessary voltage output for optical chips and other high-precision devices. In traditional voltage source matrices, multiple DAC chips are connected in series or parallel to meet the needs of multi-channel voltage output. However, while the DAC8568 has advantages in accuracy and conversion speed, it also faces some inherent technical limitations, particularly in noise control and multi-channel voltage regulation.

[0004] In existing technology, the DAC8568 communicates with the microcontroller via SPI (Serial Peripheral Interface) to achieve digital-to-analog conversion of voltage output. However, during high-frequency data transmission, especially in multi-channel control scenarios, the SPI signal is susceptible to external interference, affecting the accuracy and stability of the voltage output. Specifically, during high-frequency transmission, particularly in multi-channel parallel operation, electromagnetic interference and signal attenuation can cause errors in data transmission, leading to fluctuations in the voltage signal generated by the DAC chip and impacting system performance.

[0005] Besides signal transmission interference, another problem with existing voltage source matrix systems is noise interference. In traditional designs, the sources of noise interference are mostly the power supply itself and the voltage regulation circuit. Although existing technologies employ simple noise reduction methods such as filter capacitors, these methods are difficult to completely eliminate high-frequency noise in practical applications, especially in high-speed operation and complex circuit environments, where noise still seriously affects voltage stability. Due to the presence of high-frequency noise, signal quality cannot be effectively guaranteed, which can lead to measurement errors, signal distortion, and even affect the normal operation of the system, especially for devices such as optical chips that require extremely high voltage accuracy.

[0006] Furthermore, traditional voltage source matrices have shortcomings in voltage regulation and calibration. Although some systems employ software calibration methods, their effectiveness is limited due to factors such as temperature drift and power supply fluctuations in the circuit, making it impossible to adjust the voltage source matrix output in real time. Especially under conditions of significant environmental variation, the system struggles to guarantee long-term voltage signal stability. Some current voltage source matrix systems lack real-time adjustment mechanisms, leading to potential deviations in voltage output from the target value due to temperature changes or power supply interference during operation, thus impacting system performance.

[0007] Existing power supply modules also have limitations when providing power to the DAC8568 chip and other circuit modules. Many systems employ power supply designs that fail to adequately address voltage stability issues. Especially in multi-channel voltage output and high-power applications, power supply fluctuations and instability can directly impact the performance of the entire voltage source matrix. Although some systems utilize regulated power supply modules, power supply fluctuations are still unavoidable in multi-module, high-power systems. These fluctuations can cause voltage output instability, leading to system malfunctions or performance degradation.

[0008] From a system architecture perspective, traditional voltage source matrices typically achieve multi-channel voltage output by connecting multiple DAC chips in series or parallel. This design increases system complexity, especially in signal transmission and power management, and is prone to introducing unwanted noise or interference. Furthermore, existing voltage source matrices generally lack specific optimizations for multi-channel and high-precision voltage output, making it difficult to meet higher requirements for stability and accuracy in complex application environments.

[0009] Therefore, how to provide a method for reducing noise based on a high-precision voltage source matrix of optical chips is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0010] One objective of this invention is to propose a method for reducing noise in a high-precision voltage source matrix based on optical chips. This invention effectively solves the problems of noise interference, voltage fluctuation, and insufficient accuracy existing in current voltage source matrices by optimizing the SPI communication protocol, introducing dual operational amplifiers, noise reduction capacitors, and a regulated power supply module. This method ensures the stability and accuracy of the voltage output through real-time adjustment and calibration mechanisms, and improves the overall system performance through dynamic adjustment and feedback mechanisms. This invention has advantages such as high voltage control accuracy, strong system stability, strong anti-interference capability, and flexible adjustment, and can be widely used in applications requiring high-precision voltage support, such as optical chips and precision instruments.

[0011] A method for reducing noise based on a high-precision voltage source matrix of an optical chip according to an embodiment of the present invention includes the following steps:

[0012] S1. Initialize the GPIO port configuration of the MCP23017 expander through the ESP32-S3 microcontroller, and allocate the chip select signal and address select signal of the DAC8568 chip;

[0013] S2. Send digital control signals to the DAC8568 chip through the SPI communication interface of ESP32-S3, select the target channel and generate the corresponding digital voltage signal according to the configured chip select signal and address selection signal;

[0014] S3. Use the DAC8568 chip to convert the received digital voltage signal into an analog voltage signal and output the initial analog voltage signal on each channel;

[0015] S4. Input the initial analog voltage signal output by the DAC8568 chip into the dual operational amplifier to stabilize and amplify the initial analog voltage signal, improve the initial analog voltage fluctuation and enhance the signal strength.

[0016] S5. Add a noise reduction capacitor to each amplified initial analog voltage signal path to perform high-frequency noise filtering on the initial analog voltage signal and generate a filtered stable analog voltage signal.

[0017] S6. Provides a stable power supply voltage to the DAC8568 chip, dual operational amplifiers, and MCP23017 expander in the system through the voltage regulator module;

[0018] S7. Optimize the PCB design of the system, arrange the signal lines and ground lines in layers, and place shielding layers at key nodes;

[0019] S8. The output voltage of the 16×8 voltage source matrix is ​​adjusted and calibrated in real time through the control logic of the ESP32-S3 microcontroller.

[0020] Optionally, S2 specifically includes:

[0021] S21. Initialize the SPI communication interface through the ESP32-S3 microcontroller to establish communication channels with multiple DAC8568 chips;

[0022] S22. Configure the chip select signal of ESP32-S3 to activate the target DAC8568 chip for data transmission;

[0023] S23. Send an address selection signal containing the target channel address to the activated DAC8568 chip via ESP32-S3 to select the specified output channel;

[0024] S24. On the designated channel, transmit digital control signals to the target DAC8568 chip through the SPI communication interface of ESP32-S3;

[0025] The S25 and DAC8568 chips generate digital voltage signals based on the received digital control signals and by incorporating the following dynamic optimization mechanisms:

[0026]

[0027] Among them, V out For digital voltage signals, D in For the input 16-bit digital signal, V REF The reference voltage is α, the dynamic adjustment coefficient is ΔV. env The system detects power supply voltage fluctuations, γ is the comprehensive compensation factor, and K is the voltage fluctuation value. cal T represents the hardware calibration coefficient for each channel of the system. comp f is the temperature compensation parameter for the channel's operating environment. noise This represents the dominant frequency of the signal noise.

[0028] Optionally, S3 specifically includes:

[0029] S31. Through the SPI communication interface of the ESP32-S3 microcontroller, the digital control signal containing the target voltage value is transmitted to the designated input channel of the DAC8568 chip;

[0030] After receiving the digital control signal, the S32 and DAC8568 chips activate their internal digital-to-analog converters and convert the input signal into a digital signal based on the value of the input signal.

[0031] S33. Within the DAC8568's digital-to-analog converter, a digital signal is converted into a corresponding analog voltage signal using 16-bit resolution. This analog signal is proportional to the input digital signal.

[0032] The S34 and DAC8568 chips output the converted analog voltage signal to the designated channel through their output ports;

[0033] S35. On each output channel, the DAC8568 chip generates and outputs an initial analog voltage signal based on the input digital control signal.

[0034] Optionally, S4 specifically includes:

[0035] S41. Input the initial analog voltage signal output by the DAC8568 chip to the non-inverting input terminal of the dual operational amplifier;

[0036] S42. After receiving the initial analog voltage signal, the dual operational amplifier activates its amplification circuit according to the set gain parameters, preparing to amplify the signal.

[0037] S43. The internal amplification circuit of the dual operational amplifier amplifies the input signal according to the set gain coefficient, generates an enhanced analog voltage signal, and effectively stabilizes the output.

[0038] S44, the dual operational amplifier transmits the enhanced analog voltage signal to the next stage circuit through its output port;

[0039] S45. During the output process, the gain of the dual operational amplifiers is adjusted to output a stable analog voltage signal with high signal strength and low fluctuation.

[0040] Optionally, S5 specifically includes:

[0041] S51. The enhanced analog voltage signal output from the dual operational amplifier is transmitted to the input of the noise reduction capacitor as part of the signal path.

[0042] S52. According to the circuit design, connect the noise reduction capacitor to the signal path in parallel with the signal line to filter the signal for high-frequency noise.

[0043] S53. When the enhanced analog voltage signal passes through the noise reduction capacitor, the capacitor, through its specific capacitance value and filtering characteristics, reduces high-frequency noise components in the signal, especially high-frequency interference and unwanted electromagnetic waves:

[0044]

[0045] Among them, V filtered (f) represents the frequency response of the initial analog voltage signal amplified by the dual operational amplifiers, V amplified (f) represents the frequency response of the filtered analog voltage signal, R filter C is the resistance value in series with the noise reduction capacitor in the signal path. filter Here, f is the capacitance value of the noise reduction capacitor, f is the frequency of the signal, and j is the imaginary unit;

[0046] S54. Select an appropriate noise reduction capacitor value based on the target signal frequency and noise frequency;

[0047] S55. Output the signal after it has been filtered by the noise reduction capacitor to generate a stable analog voltage signal after filtering.

[0048] Optionally, S6 specifically includes:

[0049] S61. A stable DC voltage is provided through the voltage regulator module to maintain the normal operation of each component in the system and maintain the voltage stability of the entire system.

[0050] S62. Input the stable voltage from the regulated power supply module to the DAC8568 chip so that the DAC8568 obtains a stable power supply during the digital-to-analog conversion process;

[0051] S63. Input the stable voltage output from the regulated power supply module to the dual operational amplifier, so that the operational amplifier can accurately amplify the signal under a stable supply voltage;

[0052] S64. Input the stable voltage output from the regulated power supply module to the MCP23017 expander to prevent power fluctuations from affecting the stability of I2C or SPI communication.

[0053] S65. Based on the power requirements and power consumption of each module, the voltage regulator module adjusts the output voltage to adapt to the power requirements of each component:

[0054]

[0055] Among them, V out (t) represents the dynamically adjusted output voltage, V nom β is the rated voltage of the regulated power supply, β is the voltage regulation coefficient, and P(t) is the current instantaneous power consumption of the system. max Let λ be the maximum power consumption of the system, I(t) be the instantaneous current demand of the system, λ be the current regulation factor, and t be time.

[0056] Optionally, S8 specifically includes:

[0057] S81. Start the ESP32-S3 microcontroller and initialize the system's control ports, including the SPI communication interface, for data exchange with the DAC8568 chip;

[0058] The S82 and ESP32-S3 microcontrollers read the current output voltage value of each DAC8568 chip in the 16×8 voltage source matrix and calculate the target voltage value required for each channel according to the real-time requirements of the system.

[0059] S83. Based on the error between the current output voltage value and the target voltage value, the ESP32-S3 microcontroller generates an adjustment command and sends a control signal to the corresponding DAC8568 chip through the SPI communication interface to adjust the voltage output.

[0060] The S84 and ESP32-S3 microcontrollers monitor changes in the output voltage based on feedback voltage values ​​and fine-tune each channel accordingly.

[0061] V out_adjusted (t)=V out (t)+θ·(V target (t)-Vfeedback (t));

[0062] Among them, V out_adjusted (t) represents the adjusted output voltage, V out (t) represents the current output voltage, V target (t) represents the target voltage, V feedback (t) represents the feedback voltage, θ represents the fine-tuning coefficient, and t represents the time.

[0063] S85. Periodically calibrate the voltage output. The ESP32-S3 microcontroller dynamically adjusts the voltage output by acquiring temperature, time, and hardware status data to compensate for temperature drift and hardware deviation.

[0064] S86. During the adjustment and calibration process, the ESP32-S3 microcontroller continuously monitors the operating status of the voltage source matrix and adjusts the output voltage in real time.

[0065]

[0066] Among them, V stability (t) represents the stability of the output voltage, σ is the stability coefficient, and ΔV(t) is the voltage error.

[0067] The beneficial effects of this invention are:

[0068] This invention proposes a high-precision voltage source matrix control method by combining the ESP32-S3 microcontroller and the DAC8568 chip, effectively addressing a series of shortcomings in existing voltage source matrix technologies. Firstly, by optimizing the SPI communication protocol and introducing dual operational amplifiers and noise-reducing capacitors, this invention significantly improves the stability and accuracy of the voltage output. In the case of multi-channel voltage output, by reducing high-frequency noise and signal interference, the reliability and efficiency of the voltage source matrix are ensured. Furthermore, the use of a regulated power supply module to provide a stable power supply to the system fundamentally solves the impact of power fluctuations on the voltage source matrix, greatly improving system stability and avoiding equipment failures caused by voltage instability or errors.

[0069] Another important benefit is that the real-time adjustment and calibration mechanism ensures high accuracy of the voltage source matrix output voltage. Under different environmental conditions, especially temperature variations or power supply interference, the system can dynamically compensate for errors, ensuring that the voltage of each output channel remains close to the expected value. This dynamic adjustment capability improves the system's adaptability and stability, avoiding the loss of accuracy and performance degradation caused by factors such as temperature drift and power supply fluctuations in traditional voltage source matrices.

[0070] Finally, the voltage source matrix control method of this invention can be widely applied to optical chips, high-precision sensors, and other precision equipment, providing more accurate, stable, and efficient voltage support, and meeting the stringent requirements of modern high-precision equipment for voltage sources. Therefore, this invention not only has significant advantages in terms of accuracy, stability, and reliability, but also demonstrates superiority in improving system performance, reducing maintenance costs, and enhancing equipment stability. Attached Figure Description

[0071] The accompanying drawings are provided to further illustrate the invention and form part of the specification. They are used in conjunction with embodiments of the invention to explain the invention and do not constitute a limitation thereof. In the drawings:

[0072] Figure 1 This is a flowchart of a method for reducing noise based on a high-precision voltage source matrix of an optical chip proposed in this invention;

[0073] Figure 2 This is a schematic diagram of the voltage regulation and calibration process of a method for reducing noise based on a high-precision voltage source matrix of an optical chip proposed in this invention. Detailed Implementation

[0074] The present invention will now be described in further detail with reference to the accompanying drawings. These drawings are simplified schematic diagrams, illustrating only the basic structure of the invention, and therefore only show the components relevant to the invention.

[0075] refer to Figure 1-2 A method for reducing noise based on a high-precision voltage source matrix of an optical chip includes the following steps:

[0076] S1. Initialize the GPIO port configuration of the MCP23017 expander through the ESP32-S3 microcontroller, and allocate the chip select signal and address select signal of the DAC8568 chip;

[0077] S2. Send digital control signals to the DAC8568 chip through the SPI communication interface of ESP32-S3, select the target channel and generate the corresponding digital voltage signal according to the configured chip select signal and address selection signal;

[0078] S3. Use the DAC8568 chip to convert the received digital voltage signal into an analog voltage signal and output the initial analog voltage signal on each channel;

[0079] S4. Input the initial analog voltage signal output by the DAC8568 chip into the dual operational amplifier to stabilize and amplify the initial analog voltage signal, improve the initial analog voltage fluctuation and enhance the signal strength.

[0080] S5. Add a noise reduction capacitor to each amplified initial analog voltage signal path to perform high-frequency noise filtering on the initial analog voltage signal and generate a filtered stable analog voltage signal.

[0081] S6. Provides a stable power supply voltage to the DAC8568 chip, dual operational amplifiers, and MCP23017 expander in the system through the voltage regulator module;

[0082] S7. Optimize the PCB design of the system, arrange the signal lines and ground lines in layers, and place shielding layers at key nodes;

[0083] S8. The output voltage of the 16×8 voltage source matrix is ​​adjusted and calibrated in real time through the control logic of the ESP32-S3 microcontroller.

[0084] In this embodiment, S2 specifically includes:

[0085] S21. Initialize the SPI communication interface through the ESP32-S3 microcontroller to establish communication channels with multiple DAC8568 chips;

[0086] S22. Configure the chip select signal of ESP32-S3 to activate the target DAC8568 chip for data transmission;

[0087] S23. Send an address selection signal containing the target channel address to the activated DAC8568 chip via ESP32-S3 to select the specified output channel;

[0088] S24. On the designated channel, transmit digital control signals to the target DAC8568 chip through the SPI communication interface of ESP32-S3;

[0089] The S25 and DAC8568 chips generate digital voltage signals based on the received digital control signals and by incorporating the following dynamic optimization mechanisms:

[0090]

[0091] Among them, V out For digital voltage signals, D in For the input 16-bit digital signal, V REF The reference voltage is α, the dynamic adjustment coefficient is ΔV. env The system detects power supply voltage fluctuations, γ is the comprehensive compensation factor, and K is the voltage fluctuation value. cal T represents the hardware calibration coefficient for each channel of the system. comp f is the temperature compensation parameter for the channel's operating environment. noise This represents the dominant frequency of the signal noise.

[0092] In this embodiment, S3 specifically includes:

[0093] S31. Through the SPI communication interface of the ESP32-S3 microcontroller, the digital control signal containing the target voltage value is transmitted to the designated input channel of the DAC8568 chip;

[0094] After receiving the digital control signal, the S32 and DAC8568 chips activate their internal digital-to-analog converters and convert the input signal into a digital signal based on the value of the input signal.

[0095] S33. Within the DAC8568's digital-to-analog converter, a digital signal is converted into a corresponding analog voltage signal using 16-bit resolution. This analog signal is proportional to the input digital signal.

[0096] The S34 and DAC8568 chips output the converted analog voltage signal to the designated channel through their output ports;

[0097] S35. On each output channel, the DAC8568 chip generates and outputs an initial analog voltage signal based on the input digital control signal.

[0098] In this embodiment, S4 specifically includes:

[0099] S41. Input the initial analog voltage signal output by the DAC8568 chip to the non-inverting input terminal of the dual operational amplifier;

[0100] S42. After receiving the initial analog voltage signal, the dual operational amplifier activates its amplification circuit according to the set gain parameters, preparing to amplify the signal.

[0101] S43. The internal amplification circuit of the dual operational amplifier amplifies the input signal according to the set gain coefficient, generates an enhanced analog voltage signal, and effectively stabilizes the output.

[0102] S44, the dual operational amplifier transmits the enhanced analog voltage signal to the next stage circuit through its output port;

[0103] S45. During the output process, the gain of the dual operational amplifiers is adjusted to output a stable analog voltage signal with high signal strength and low fluctuation.

[0104] In this embodiment, S5 specifically includes:

[0105] S51. The enhanced analog voltage signal output from the dual operational amplifier is transmitted to the input of the noise reduction capacitor as part of the signal path.

[0106] S52. According to the circuit design, connect the noise reduction capacitor to the signal path in parallel with the signal line to filter the signal for high-frequency noise.

[0107] S53. When the enhanced analog voltage signal passes through the noise reduction capacitor, the capacitor, through its specific capacitance value and filtering characteristics, reduces high-frequency noise components in the signal, especially high-frequency interference and unwanted electromagnetic waves:

[0108]

[0109] Among them, V filtered (f) represents the frequency response of the initial analog voltage signal amplified by the dual operational amplifiers, V amplified (f) represents the frequency response of the filtered analog voltage signal, R filter C is the resistance value in series with the noise reduction capacitor in the signal path. filter Here, f is the capacitance value of the noise reduction capacitor, f is the frequency of the signal, and j is the imaginary unit;

[0110] S54. Select an appropriate noise reduction capacitor value based on the target signal frequency and noise frequency;

[0111] S55. Output the signal after it has been filtered by the noise reduction capacitor to generate a stable analog voltage signal after filtering.

[0112] In this embodiment, S6 specifically includes:

[0113] S61. A stable DC voltage is provided through the voltage regulator module to maintain the normal operation of each component in the system and maintain the voltage stability of the entire system.

[0114] S62. Input the stable voltage from the regulated power supply module to the DAC8568 chip so that the DAC8568 obtains a stable power supply during the digital-to-analog conversion process;

[0115] S63. Input the stable voltage output from the regulated power supply module to the dual operational amplifier, so that the operational amplifier can accurately amplify the signal under a stable supply voltage;

[0116] S64. Input the stable voltage output from the regulated power supply module to the MCP23017 expander to prevent power fluctuations from affecting the stability of I2C or SPI communication.

[0117] S65. Based on the power requirements and power consumption of each module, the voltage regulator module adjusts the output voltage to adapt to the power requirements of each component:

[0118]

[0119] Among them, V out (t) represents the dynamically adjusted output voltage, V nom β is the rated voltage of the regulated power supply, β is the voltage regulation coefficient, and P(t) is the current instantaneous power consumption of the system.max Let λ be the maximum power consumption of the system, I(t) be the instantaneous current demand of the system, λ be the current regulation factor, and t be time.

[0120] In this embodiment, S8 specifically includes:

[0121] S81. Start the ESP32-S3 microcontroller and initialize the system's control ports, including the SPI communication interface, for data exchange with the DAC8568 chip;

[0122] The S82 and ESP32-S3 microcontrollers read the current output voltage value of each DAC8568 chip in the 16×8 voltage source matrix and calculate the target voltage value required for each channel according to the real-time requirements of the system.

[0123] S83. Based on the error between the current output voltage value and the target voltage value, the ESP32-S3 microcontroller generates an adjustment command and sends a control signal to the corresponding DAC8568 chip through the SPI communication interface to adjust the voltage output.

[0124] The S84 and ESP32-S3 microcontrollers monitor changes in the output voltage based on feedback voltage values ​​and fine-tune each channel accordingly.

[0125] V out_adjusted (t)=V out (t)+θ·(V target (t(-V feedback (t));

[0126] Among them, V out_adjusted (t) represents the adjusted output voltage, V out (t) represents the current output voltage, V target (t) represents the target voltage, V feedback (t) represents the feedback voltage, θ represents the fine-tuning coefficient, and t represents the time.

[0127] S85. Periodically calibrate the voltage output. The ESP32-S3 microcontroller dynamically adjusts the voltage output by acquiring temperature, time, and hardware status data to compensate for temperature drift and hardware deviation.

[0128] S86. During the adjustment and calibration process, the ESP32-S3 microcontroller continuously monitors the operating status of the voltage source matrix and adjusts the output voltage in real time.

[0129]

[0130] Among them, V stability (t) represents the stability of the output voltage, σ is the stability coefficient, and ΔV(t) is the voltage error.

[0131] Example 1:

[0132] To verify the feasibility of this invention in practice, it was applied to the optoelectronic testing laboratory of a technology company. During the testing of optical chips, we used a voltage source matrix control method based on an ESP32-S3 microcontroller and a DAC8568 chip to provide 16 channels of voltage output for different test points of each optical chip. During the testing process, we required that the voltage of each test channel be stable within a specific range (e.g., ±0.1V) and maintain extremely low noise throughout the entire testing process.

[0133] Before the test begins, the ESP32-S3 microcontroller initializes the 16×8 voltage source matrix and establishes communication with each DAC8568 chip via the SPI interface. Each DAC8568 chip is configured to control a different test channel to provide the required voltage output.

[0134] During testing, the ESP32-S3 microcontroller reads the voltage output of each DAC8568 chip in real time and compares it with the target voltage value. If the output voltage differs from the target voltage (e.g., ±0.05V), the microcontroller sends an adjustment command to the DAC8568 via the SPI interface to adjust the voltage in real time and ensure it remains within the target range. To reduce voltage fluctuations and noise, noise-reducing capacitors are added to each voltage channel. These capacitors effectively filter high-frequency noise, ensuring a more stable voltage output from the voltage source matrix and preventing signal instability caused by noise interference.

[0135] The system employs a high-precision regulated power supply module to provide stable voltage to each voltage output channel, avoiding the impact of power fluctuations on the voltage source matrix. The design of the regulated power supply module ensures that the output voltage remains within a predetermined range under varying load conditions, thus providing a stable power supply environment for the DAC8568 chip and the optical chip.

[0136] The 16-channel voltage output of the voltage source matrix is ​​adjusted using an ESP32-S3 microcontroller to ensure precise control of the output voltage of each channel. At each test point (optical chip input port), the error between the actual voltage and the target voltage is monitored and recorded. Voltage fluctuations are monitored in real time using an oscilloscope, and the noise value of each channel is recorded.

[0137] Table 1 Output Error Table of Voltage Source Matrix

[0138]

[0139] As can be seen from the data in the table, the method of this invention exhibits significant advantages over traditional methods in terms of voltage accuracy and noise control. Regarding voltage accuracy, the voltage error of this invention is generally smaller. For example, in channel 1, the voltage error of this invention is only 0.002V, while the voltage error of the traditional method is 0.020V, a difference of 0.018V. This indicates that, through the control method of this invention, the voltage output can be maintained more precisely within the target value range, ensuring the stability and high accuracy of the system.

[0140] Regarding noise control, the noise amplitude of this invention is significantly lower than that of conventional methods. For example, in channel 1, the noise amplitude of this invention is only 0.02mV, while the noise amplitude of the conventional method is 0.10mV, a difference of 0.08mV. This demonstrates the advantage of this invention in reducing high-frequency noise, effectively improving the stability and quality of the voltage signal. This is crucial for applications in high-precision devices, such as optical chips and precision sensors, as excessive noise directly affects the accuracy of measurement results and the normal operation of the equipment.

[0141] In summary, this invention provides better performance in terms of voltage accuracy and noise control, ensuring the stability and reliability of the voltage source matrix in complex and high-precision applications.

[0142] The above description is only a preferred embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any equivalent substitutions or modifications made by those skilled in the art within the scope of the technology disclosed in the present invention, based on the technical solution and inventive concept of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method for reducing noise based on a high-precision voltage source matrix of an optical chip, characterized in that, Includes the following steps: S1. Initialize the GPIO port configuration of the MCP23017 expander through the ESP32-S3 microcontroller, and allocate the chip select signal and address select signal of the DAC8568 chip; S2. Send digital control signals to the DAC8568 chip through the SPI communication interface of ESP32-S3, select the target channel and generate the corresponding digital voltage signal according to the configured chip select signal and address selection signal; S3. Use the DAC8568 chip to convert the received digital voltage signal into an analog voltage signal and output the initial analog voltage signal on each channel; S4. Input the initial analog voltage signal output by the DAC8568 chip into the dual operational amplifier to stabilize and amplify the initial analog voltage signal, improve the initial analog voltage fluctuation and enhance the signal strength. S5. Add a noise reduction capacitor to each amplified initial analog voltage signal path to perform high-frequency noise filtering on the initial analog voltage signal and generate a filtered stable analog voltage signal. S6. Provides a stable power supply voltage to the DAC8568 chip, dual operational amplifiers, and MCP23017 expander in the system through the voltage regulator module; S7. Optimize the PCB design of the system, arrange the signal lines and ground lines in layers, and place shielding layers at key nodes; S8. The output voltage of the 16×8 voltage source matrix is ​​adjusted and calibrated in real time through the control logic of the ESP32-S3 microcontroller. S8 specifically includes: S81. Start the ESP32-S3 microcontroller and initialize the system's control ports, including the SPI communication interface, for data exchange with the DAC8568 chip; The S82 and ESP32-S3 microcontrollers read the current output voltage value of each DAC8568 chip in the 16×8 voltage source matrix and calculate the target voltage value required for each channel according to the real-time requirements of the system. S83. Based on the error between the current output voltage value and the target voltage value, the ESP32-S3 microcontroller generates an adjustment command and sends a control signal to the corresponding DAC8568 chip through the SPI communication interface to adjust the voltage output. The S84 and ESP32-S3 microcontrollers monitor changes in the output voltage based on feedback voltage values ​​and fine-tune each channel accordingly. ； in, The adjusted output voltage, The current output voltage, For the target voltage, For feedback voltage, For fine-tuning coefficients, For time; S85. Periodically calibrate the voltage output. The ESP32-S3 microcontroller dynamically adjusts the voltage output by acquiring temperature, time, and hardware status data to compensate for temperature drift and hardware deviation. S86. During the adjustment and calibration process, the ESP32-S3 microcontroller continuously monitors the operating status of the voltage source matrix and adjusts the output voltage in real time. ； in, For the stability of the output voltage, The stability coefficient, This is the voltage error.

2. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that, S2 specifically includes: S21. Initialize the SPI communication interface through the ESP32-S3 microcontroller to establish communication channels with multiple DAC8568 chips; S22. Configure the chip select signal of ESP32-S3 to activate the target DAC8568 chip for data transmission; S23. Send an address selection signal containing the target channel address to the activated DAC8568 chip via ESP32-S3 to select the specified output channel; S24. On the designated channel, transmit digital control signals to the target DAC8568 chip through the SPI communication interface of ESP32-S3; The S25 and DAC8568 chips generate digital voltage signals based on the received digital control signals and by incorporating the following dynamic optimization mechanisms: ; in, It is a digital voltage signal. The input is a 16-bit digital signal. For reference voltage, This is a dynamic adjustment coefficient. This refers to the power supply voltage fluctuation value detected by the system. As a comprehensive compensation factor, The system's hardware calibration coefficients for each channel. These are the temperature compensation parameters for the channel's operating environment. This represents the dominant frequency of the signal noise.

3. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that, S3 specifically includes: S31. Through the SPI communication interface of the ESP32-S3 microcontroller, the digital control signal containing the target voltage value is transmitted to the designated input channel of the DAC8568 chip; After receiving the digital control signal, the S32 and DAC8568 chips activate their internal digital-to-analog converters and convert the input signal into a digital signal based on the value of the input signal. S33. Within the DAC8568's digital-to-analog converter, a digital signal is converted into a corresponding analog voltage signal using 16-bit resolution. This analog signal is proportional to the input digital signal. The S34 and DAC8568 chips output the converted analog voltage signal to the designated channel through their output ports; S35. On each output channel, the DAC8568 chip generates and outputs an initial analog voltage signal based on the input digital control signal.

4. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that, S4 specifically includes: S41. Input the initial analog voltage signal output by the DAC8568 chip to the non-inverting input terminal of the dual operational amplifier; S42. After receiving the initial analog voltage signal, the dual operational amplifier activates its amplification circuit according to the set gain parameters, preparing to amplify the signal. S43. The internal amplification circuit of the dual operational amplifier amplifies the input signal according to the set gain coefficient, generates an enhanced analog voltage signal, and effectively stabilizes the output. S44, the dual operational amplifier transmits the enhanced analog voltage signal to the next stage circuit through its output port; S45. During the output process, the gain of the dual operational amplifiers is adjusted to output a stable analog voltage signal with high signal strength and low fluctuation.

5. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that, S5 specifically includes: S51. The enhanced analog voltage signal output from the dual operational amplifier is transmitted to the input of the noise reduction capacitor as part of the signal path. S52. According to the circuit design, connect the noise reduction capacitor to the signal path in parallel with the signal line to filter the signal for high-frequency noise. S53. When the enhanced analog voltage signal passes through the noise reduction capacitor, the capacitor reduces high-frequency noise components in the signal through its specific capacitance value and filtering characteristics: ； in, This is the frequency response of the initial analog voltage signal amplified by dual operational amplifiers. This represents the frequency response of the filtered analog voltage signal. This is the resistance value connected in series with the noise reduction capacitor in the signal path. This refers to the capacitance value of the noise reduction capacitor. For the frequency of the signal, The imaginary unit; S54. Select an appropriate noise reduction capacitor value based on the target signal frequency and noise frequency; S55. Output the signal after it has been filtered by the noise reduction capacitor to generate a stable analog voltage signal after filtering.

6. The method for reducing noise based on a high-precision voltage source matrix of an optical chip according to claim 1, characterized in that, S6 specifically includes: S61. A stable DC voltage is provided through the voltage regulator module to maintain the normal operation of each component in the system and maintain the voltage stability of the entire system. S62. Input the stable voltage from the regulated power supply module to the DAC8568 chip so that the DAC8568 obtains a stable power supply during the digital-to-analog conversion process; S63. Input the stable voltage output from the regulated power supply module to the dual operational amplifier, so that the operational amplifier can accurately amplify the signal under a stable supply voltage; S64. Input the stable voltage output from the regulated power supply module to the MCP23017 expander to prevent power fluctuations from affecting the stability of I2C or SPI communication. S65. Based on the power requirements and power consumption of each module, the voltage regulator module adjusts the output voltage to adapt to the power requirements of each component: ； in, The output voltage after dynamic adjustment. This is the rated voltage of the regulated power supply. This is the voltage regulation coefficient. This represents the system's current instantaneous power consumption. This represents the system's maximum power consumption. For the system's instantaneous current requirements, For current regulation factor, For time.

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