Circuit board micropore copper plating quality inspection method based on image recognition

Abstract

The invention relates to the technical field of image recognition, in particular to a circuit board micropore copper plating quality inspection method based on image recognition. The method comprises the following steps: setting an annular polarized light source array; performing dynamic depth-of-field fusion shooting on the circuit board micropore based on the annular polarized light source array to obtain a two-dimensional projection drawing of the circuit board micropore; performing sub-pixel edge enhancement on the circuit board micropore two-dimensional projection drawing to generate a circuit board micropore enhanced projection drawing; and segmenting the interest boundary of the circuit board micropore enhanced projection drawing to obtain the hole wall region-of-interest boundary. Advanced image recognition, deformation analysis and self-learning technologies are introduced, efficient, accurate and automatic circuit board micropore copper plating quality intelligent inspection is achieved, and the defects of a traditional method in the aspects of detection precision, efficiency and comprehensive evaluation capacity are overcome.

Description

Technical Field

[0001] The present invention relates to the technical field of image recognition, and particularly to a method for inspecting the quality of microvia copper plating on printed circuit boards based on image recognition. Background Art

[0002] Printed circuit boards are core components in electronic devices, and the microvia copper plating technology plays a crucial role in their production process. Especially in multi-layer printed circuit boards, the quality of microvia copper plating directly affects electrical performance and reliability. Traditional quality inspection methods mainly rely on manual visual inspection or physical inspection tools, which have problems such as low efficiency, large errors, and cumbersome operations. With the development of image recognition technology, automated inspection methods based on images have gradually become an effective way to solve this problem. Early image recognition technologies mainly focused on simple image processing algorithms, such as edge detection and template matching, for detecting surface defects of printed circuit boards. With the rise of deep learning and artificial intelligence technologies, image recognition methods based on convolutional neural networks (CNNs) have been gradually applied to the quality inspection of microvia copper plating. CNNs can automatically extract features in images, reduce manual intervention, and improve the detection accuracy and efficiency. However, current traditional inspection methods are difficult to discover tiny potential defects, especially the subtle differences in the microvia copper plating process, and at the same time, they cannot accurately capture the deformation and burr growth of printed circuit board microvias during the copper plating process, and cannot effectively evaluate their impact on quality, thus resulting in relatively low precision in the quality inspection of microvia copper plating on printed circuit boards. Summary of the Invention

[0003] Based on this, it is necessary to provide a method for inspecting the quality of microvia copper plating on printed circuit boards based on image recognition to solve at least one of the above technical problems.

[0004] To achieve the above object, a method for inspecting the quality of microvia copper plating on printed circuit boards based on image recognition, the method includes the following steps: Step S1: Set up an annular polarized light source array; perform dynamic depth-of-field fusion shooting on the microvias of the printed circuit board based on the annular polarized light source array to obtain a two-dimensional projection image of the microvias of the printed circuit board; perform sub-pixel edge enhancement on the two-dimensional projection image of the microvias of the printed circuit board to generate an enhanced projection image of the microvias of the printed circuit board; Step S2: Segment the region of interest boundary of the enhanced projection image of the microvias of the printed circuit board to obtain the boundary of the region of interest of the hole wall; extract the texture features and color features of the boundary of the region of interest of the hole wall and perform microscopic texture co-occurrence feature analysis on the boundary of the region of interest of the hole wall to generate a probability distribution map of potential defects of the microvias; Step S3: Quantitatively analyze the deformation field of the micro-hole enhanced projection image of the circuit board based on DIC technology to generate a deformation trend prediction curve; identify the burr growth pattern of the micro-hole enhanced projection image of the circuit board through the deformation trend prediction curve to generate a burr risk level assessment map; use the burr risk level assessment map to trace the microscopic deposition traces of the micro-holes on the circuit board to generate a copper plating deposition uniformity evaluation index; Step S4: Conduct a comprehensive copper plating quality inspection on the micro-holes of the circuit board according to the micro-hole potential defect probability distribution map and the copper plating deposition uniformity evaluation index, and construct a self-learning knowledge base based on the results of the quality inspection to perform intelligent inspection operations on the copper plating quality of the micro-holes of the circuit board.

[0005] The present invention uses an annularly polarized light source array for dynamic depth-of-field fusion shooting. Compared with traditional light sources, it can more effectively avoid light interference, ensuring that the acquired images have higher contrast and clarity. Especially when dealing with the minute details in the micro-hole area of the circuit board, it can accurately capture the morphology and surface features of the micro-holes. By performing sub-pixel edge enhancement on the two-dimensional projection map, a higher resolution can be achieved compared with traditional methods, making the boundaries of the micro-holes sharper and the details finer, which is helpful for subsequent defect detection and analysis. The microscopic texture co-occurrence feature analysis method enables the full extraction of dimensions such as the texture information and color features of the micro-holes. Especially for minute potential defects, comprehensive analysis can be carried out at the microscopic scale to generate a probability distribution map of potential micro-hole defects, which helps to identify potential quality problems of the micro-holes in advance, such as cracks and air holes. Through this multi-dimensional analysis, the comprehensiveness and meticulousness of defect detection can be improved, especially in the identification of hidden defects in the deep area of the micro-holes, reducing the probability of missed detections and false detections. Using DIC technology for deformation field quantification analysis can accurately extract deformation data from the micro-hole images. This analysis process provides an effective prediction tool for burr growth. By establishing a deformation trend prediction curve, the growth situation of burrs can be monitored in real time, generating a burr risk level assessment map, which is of great significance for high-precision circuit board processing. Based on the burr risk assessment, quality problems caused by burrs can be effectively reduced, providing a scientific basis for subsequent repair measures, thus ensuring the high-quality production of products. Adopting the microscopic deposition trace tracking method and combining the analysis results of the burr risk assessment map can deeply analyze the uniformity and stability of the copper plating layer, generating a copper plating deposition uniformity evaluation index. This index can timely feedback the non-uniformity problems in the process, such as uneven or missing copper plating layer thickness, ensuring that the copper plating layer of the product meets the design requirements. Improving the control accuracy of the copper plating process and reducing the variation in the production process ensure the consistency and stability of the product. Especially for high-density circuit boards, the copper plating uniformity is crucial for the product performance. Based on the traditional detection methods, through the construction of a self-learning knowledge base, each detection result is used as training data to input into the system, so that the system can optimize itself during continuous detections, improving the accuracy and adaptability of the detection algorithm. The system can adjust the detection standards and parameters according to the differences in different production batches, reducing human intervention and automatically adapting to the quality changes of micro-hole copper plating under different processes and production conditions. The introduction of intelligent inspection operations can greatly improve production efficiency, reduce human errors, improve quality stability, and at the same time can also timely feedback the abnormalities of the production line, discover potential problems in advance and take corresponding measures, greatly enhancing the flexibility and adaptability of the production process. This method combines multiple technologies such as optical imaging, image processing, texture analysis, deformation monitoring and intelligent learning, effectively improving the overall inspection ability of the micro-hole copper plating quality of the circuit board.Through comprehensive detection and analysis of micro-holes, not only can current quality problems be accurately identified, but also potential risks in production can be monitored in real time to ensure that each circuit board meets the standard requirements. Therefore, by introducing advanced image recognition, deformation analysis, and self-learning technologies, the present invention realizes efficient, precise, and automated intelligent inspection of the copper plating quality of circuit board micro-holes, overcoming the deficiencies of traditional methods in terms of detection accuracy, efficiency, and comprehensive evaluation ability.

[0006] Preferably, step S1 includes the following steps: Step S11: Set up an annular polarized light source array; Step S12: Take an initial light source image of the circuit board micro-holes through the annular polarized light source array to obtain an initial circuit board micro-hole light source image set; Step S13: Use the focus stacking technology to synthesize the images in the initial circuit board micro-hole light source image set to generate a two-dimensional projection map of the circuit board micro-holes; extract the depth information of the inner wall of the micro-holes from the synthesized image of the circuit board micro-holes to obtain the depth information of the inner wall of the micro-holes; Step S14: Perform edge sub-pixel positioning on the synthesized image of the circuit board micro-holes according to the depth information of the inner wall of the micro-holes, and construct a gradient change curve of the hole wall contour based on the results of the sub-pixel positioning; perform local interpolation of the contour gradient on the synthesized image of the circuit board micro-holes through the gradient change curve of the hole wall contour to generate an enhanced projection map of the circuit board micro-holes.

[0007] The present invention provides an efficient light source configuration through the annular polarized light source array, which can avoid the reflection and scattering problems brought by traditional light sources and ensure more uniform and clear images under the complex structure of micro-holes. Through the initial shooting of the circuit board micro-holes by this array, the obtained initial light source image set can capture the details of the micro-holes at different angles and depths, forming high-resolution images, providing a high-quality data basis for subsequent image processing. Using the focus stacking technology to synthesize the initial image set not only improves the depth-of-field effect of the image but also ensures that the micro-holes in the image can present clear details regardless of how they change in depth. The synthesized two-dimensional projection map presents richer spatial information and can effectively support depth analysis. The extraction of the depth information of the inner wall of the micro-holes can accurately obtain the depth characteristics of the micro-holes, providing accurate depth data for subsequent contour positioning and feature extraction, and enhancing the spatial perception ability of the micro-hole images. Through sub-pixel positioning, extremely precise positioning can be carried out at the edge of the micro-hole image, avoiding the coarseness of traditional pixel-level positioning. This level of precision provides more accurate edge information for micro-hole detection, especially in the case of small aperture diameters and complex contours. The construction of the gradient change curve of the hole wall contour can further analyze the geometric characteristics of the micro-holes and reveal the shape and defects of the hole wall. Using this curve to perform local interpolation on the image helps to enhance the detail performance of the micro-hole contour and avoid misjudgment caused by image blurring or missing.

[0008] Preferably, step S11 includes: Set the number of light sources to 16 LEDs, arranged in a ring, with a diameter of 120 mm, a wavelength of 660 nm, an incident angle of 30°, the angles of the polarizer being 0°, 45°, 90°, 135°, the angle of the analyzer being 90°, the polarization contrast ≥ 0.9, the driving method being constant current driving, the brightness adjustment being 0 - 100%, the polarization angle control method being liquid crystal polarization adjustment, synchronously triggering a TTL signal, and the trigger delay ≤ 1 ms.

[0009] In the present invention, by arranging 16 LEDs in a ring (with a diameter of 120 mm), it is possible to ensure a more uniform distribution of the light source, and the irradiation angle covers the entire micro-hole area of the circuit board, thus avoiding the problem of uneven illumination caused by traditional point light sources. The ring arrangement helps to reduce the light shadow and improve the uniformity of illumination and the image quality. This high-brightness adjustable light source (with a brightness adjustment range of 0 - 100%) can adjust the light intensity according to actual needs, adapt to different detection environments and the reflection characteristics of the workpiece surface, and ensure that the imaging quality can reach the best effect under various conditions. The application of the polarized light source (polarization contrast ≥ 0.9) can effectively reduce the optical noise caused by surface reflection, and improve the contrast and clarity of the image. The polarized light source helps to enhance the detail performance of the micro-hole surface, especially small defects (such as cracks, unevenness of the hole wall, etc.) can be presented more prominently. The liquid crystal polarization adjustment method makes the polarization angle control more flexible, can quickly adjust the polarization state of the light source, improve the polarization effect and the system response speed, and ensure that clear and accurate image data can be obtained during the fast imaging process. The incident angle is set to 30°, which helps to highlight the structural characteristics of the micro-hole surface, especially for small defects (such as micro-cracks, attachment of fine particles, etc.) can provide a better imaging effect. The selection of the incident angle has an important influence on the reflection and refraction paths of light, can effectively suppress the influence of interfering light, and improve the detection accuracy. The wavelength is set to 660 nm, this wavelength is within the visible light range, has a high penetration power, can effectively penetrate the thin layer of substances on the micro-hole surface, and ensure that the imaging details are fully displayed. The 660 nm wavelength can also avoid the excessive scattering problem caused by shorter wavelengths (such as ultraviolet light), and provide a more stable and clear image quality. The configuration of TTL signal synchronous triggering with a delay ≤ 1 ms ensures the precise synchronization between the light source and the image acquisition device, and avoids the problem of image offset or inconsistency caused by the delay. In a high-speed detection system, this precise triggering mechanism can ensure the stability and synchronization of the image, reduce image distortion, and improve the accuracy of the overall imaging system.

[0010] Preferably, step S2 includes the following steps: Step S21: Segment the interest boundary of the enhanced projection map of the micro-holes on the circuit board to obtain the boundary of the interest area of the hole wall; Step S22: Construct 3×3 to 7×7 multi-scale detection windows; and use the multi-scale detection windows to calculate the rotation-invariant uniform patterns of the boundaries of the pore wall regions of interest, and statistically analyze the texture direction distribution histograms at each scale, thereby generating a texture feature evolution trend curve; Step S23: Calculate the chromatic gradient of the boundaries of the pore wall regions of interest to generate a color atlas with direction markers; Step S24: Conduct defect feature correlation mining based on the texture feature evolution trend curve and the color atlas with direction markers to generate a potential defect probability distribution map of the micro-pores.

[0011] The present invention effectively distinguishes the key regions of the micro-pores through the segmentation of the boundaries of the pore wall regions of interest, thereby ensuring that subsequent analysis focuses only on the important pore wall regions, avoiding interference from irrelevant parts, and improving the processing efficiency and analysis accuracy. Through precise interest boundary segmentation, the edge features of the micro-pores can be better highlighted, which is helpful for subsequent defect analysis and detection. The construction of the multi-scale detection windows performs scale analysis in the window size range from 3×3 to 7×7, which can adapt to different sizes and morphologies of the micro-pores, ensuring that texture features can be accurately captured at multiple levels of spatial scales. Through this multi-scale analysis, the situation where some details or features are missed by traditional single-scale methods can be avoided, improving the comprehensiveness of texture feature extraction. The calculation of the rotation-invariant uniform patterns can ensure the robustness of texture analysis for micro-pores with different angles, avoiding texture changes caused by rotation or tilt angles, and ensuring the stability and consistency of texture recognition results. By statistically analyzing the texture direction distribution histograms at each scale, the texture change rules of the pore walls of the micro-pores can be effectively captured, and then a texture feature evolution trend curve is generated, providing an important basis for subsequent defect recognition. The chromatic gradient calculation performs precise chromatic change analysis on the pore wall regions, which can reveal subtle changes on the surface of the micro-pores, such as potential defects like material degradation, corrosion, and stains. This method not only focuses on brightness changes but also captures changes in color information, enhancing the multi-dimensionality of micro-pore defect detection. The color atlas with direction markers can better visualize the surface structure of the micro-pores, indicating the directionality of the texture, and enhancing the qualitative and quantitative analysis of micro-pore surface defects in subsequent analysis. The combination of chromaticity and direction makes the surface details of the micro-pores clearer, helping the detection system to more accurately identify potential problems. Defect feature correlation mining (Step S24) combines the texture feature evolution trend curve and the direction markers of the color atlas to conduct detailed feature correlation analysis on the pore wall regions, and can identify potential rules of different defect types. Through the joint analysis of texture changes and chromatic gradients, abnormal features in the micro-pore regions, such as surface corrosion, scratches, and micro-cracks, can be accurately identified.

[0012] Preferably, Step S24 includes the following steps: Step S241: Conduct a local texture change pattern analysis on the texture feature evolution trend curve to generate a texture trend feature matrix; Step S242: Separate the feature color channels in different directions from the color atlas with direction markers to obtain a direction feature color matrix; Step S243: Perform feature matching based on the texture trend feature matrix and the direction feature color matrix to obtain a feature correlation matrix of potential defect regions; Step S244: Detect abnormal clustering points in the feature correlation matrix of potential defect regions to generate abnormal clustering point data in the feature space; Calculate the proportion of abnormal clustering points in the feature correlation matrix of potential defect regions according to the abnormal clustering point data in the feature space to obtain a potential defect probability distribution map.

[0013] By analyzing the texture feature evolution trend curve, the present invention can reveal the microscopic details of texture changes, especially the texture fluctuations in local areas. This analysis helps to identify texture changes caused by factors such as physical stress, corrosion, and wear, and accurately capture potential defect patterns. By generating a texture trend feature matrix, a structured feature data set is provided for subsequent defect identification, enhancing the sensitivity to subtle changes. The directional feature extraction of the color atlas can separate the feature color channels in different directions and generate a direction feature color matrix. This operation ensures a multi-angle analysis of the color of the microporous surface and can effectively capture the color change patterns related to defects. Through directional analysis, color changes caused by angle changes or different lighting conditions can be avoided, improving the robustness and accuracy of defect detection. The feature matching analysis performs in-depth feature matching based on the texture trend feature matrix and the direction feature color matrix to obtain a feature correlation matrix of potential defect regions. By comprehensively considering texture changes and color changes, the comprehensive features of potential defect regions can be identified, improving the sensitivity of defect detection, especially for relatively small and difficult-to-detect defects. Through the clustering analysis of the feature correlation matrix, regions with abnormal aggregation can be identified. This clustering analysis method effectively screens out those regions with potential defect risks, avoiding the interference of false positives and false negatives and improving the accuracy of defect identification. By generating abnormal clustering point data in the feature space, the key abnormal regions of the micropores can be further located for focused inspection and repair. Through the generation of the potential defect probability distribution map, the system can accurately mark the defect risks in different regions, making the subsequent detection and repair work more efficient and targeted. This distribution map not only provides an intuitive visual aid for quality assessment but also helps engineers optimize the production process and promptly identify and solve quality problems.

[0014] Preferably, the deformation field quantization analysis of the microvia enhanced projection map of the circuit board based on the DIC technology in step S3 includes: Partition calculation is performed on the enhanced projection image of the micro-holes on the circuit board through DIC technology to obtain the displacement vector field of the hole edge; Based on the displacement vector field, a deformation field of the enhanced projection image of the micro-holes on the circuit board is constructed to obtain the deformation distribution in the local area; Detect and statistically analyze the inter-batch fluctuations in the aperture size in the enhanced projection image of the micro-holes on the circuit board to generate aperture fluctuation data; Identify the local deformation trend of the enhanced projection image of the micro-holes on the circuit board; Integrate the displacement vector field, deformation field and aperture fluctuation data to construct a deformation trend prediction model; Import the local deformation trend into the deformation trend prediction model for trend prediction to generate a deformation trend prediction curve.

[0015] In the present invention, partition calculation is performed on the enhanced projection image of the micro-holes on the circuit board through DIC technology to obtain an accurate displacement vector field of the hole edge, which can accurately capture the deformation information in the micro-hole area. Compared with traditional deformation analysis methods, DIC technology can provide higher-resolution deformation data, improving the monitoring accuracy of micro-hole deformation, and thus providing more reliable data support for subsequent quality analysis and evaluation. The deformation field constructed based on the displacement vector field provides a comprehensive analysis of micro-hole deformation. By identifying the deformation distribution in the local area, stress concentration areas or potential deformation problems can be accurately found, which helps to predict the reliability of micro-holes and assess risks. By detecting and statistically analyzing the inter-batch fluctuations in the aperture size, the changes in the micro-hole size can be identified and tracked in real time, which helps to detect and control size fluctuations in a timely manner during the production process. This quantitative monitoring makes quality control more accurate and can avoid potential problems caused by inconsistent sizes at an early stage, improving the stability and consistency of the production process. Identifying the local deformation trend of the micro-holes can timely detect early signs of deformation and provide guidance for subsequent adjustment and optimization. By identifying and analyzing these trends, the parameters in the production process can be fine-tuned to avoid excessive deformation, ensuring the stability of the quality of the micro-holes on the circuit board and the long-term reliability of the product. Integrating the displacement vector field, deformation field and aperture fluctuation data, the constructed deformation trend prediction model can comprehensively analyze multiple factors and accurately predict the future trend of micro-hole deformation. This prediction model can help engineers take measures in advance to correct the micro-holes and prevent deformation problems beyond the allowable range, effectively improving product quality and production efficiency.

[0016] Preferably, the identification of the burr growth mode for the enhanced projection image of the micro-holes on the circuit board through the deformation trend prediction curve in step S3 includes: Use the deformation trend prediction curve to determine the position of the hole edge of the enhanced projection image of the micro-holes on the circuit board; Extract the fractal dimension feature of the hole edge according to the position of the hole edge; Detect the burr asymmetric growth pattern at the orifice edge in the enhanced projection image of the circuit board micro-hole based on the fractal dimension feature, and calculate the Fourier descriptor of the burr asymmetric growth pattern; Construct a regression model between burr evolution and electroplating parameters; Integrate deformation trend prediction, fractal features, and Fourier descriptors to identify the burr growth pattern in the enhanced projection image of the circuit board micro-hole, and generate burr growth pattern recognition data; Use the regression model to evaluate the burr risk level for the burr growth pattern recognition data, and generate a burr risk level assessment map.

[0017] The present invention determines the orifice edge position through the deformation trend prediction curve, which can accurately locate the edge of the micro-hole. This accurate edge recognition provides a reliable basis for subsequent burr growth pattern detection, avoiding recognition errors caused by inaccurate edge positioning, thereby improving the accuracy of burr detection. The fractal dimension feature extracted according to the orifice edge position can deeply explore the complexity of the orifice shape. This feature not only reflects the geometric structure of the orifice but also can effectively identify the burr growth pattern. As a shape description parameter, the fractal dimension helps to reveal the asymmetry of burr growth, further improving the detection ability of micro-hole quality. By using Fourier descriptors to describe the burr asymmetric growth pattern at the orifice edge, the morphological changes of the burr can be accurately captured. Fourier descriptors transform the shape features of the burr into frequency information, which helps to more accurately analyze the growth law of the burr and provides more objective data support for judging whether the burr reaches a harmful level. Based on the regression model, the relationship between the burr growth pattern and electroplating parameters is effectively modeled. This regression model provides theoretical support for accurately evaluating the impact of the electroplating process on burr growth, helping manufacturers to adjust process parameters in real time during electroplating, optimize burr control, and reduce quality fluctuations. Combining deformation trend prediction, fractal features, and Fourier descriptors can realize the identification of the burr growth pattern in the enhanced projection image of the circuit board micro-hole. This process integrates multiple technologies and data sources, improves the recognition accuracy and robustness, and can effectively cope with complex production environments and burr growth patterns, providing comprehensive data support for quality control.

[0018] Preferably, the use of the burr risk level assessment map to trace the micro-deposition traces of the circuit board micro-holes in step S3 includes: Identify the copper layer edge area in the enhanced projection image of the circuit board micro-hole; Adopt the phase consistency edge detection technology to finely extract the copper layer edge to obtain copper layer edge data; Analyze the edge features of the copper layer edge data, and quantify the copper layer deposition direction consistency of the copper layer edge data according to the edge features to obtain deposition direction consistency quantification data; Detect abnormal dendritic crystallization patterns in the edge region of the copper layer based on edge features to obtain abnormal deposition regions; Calculate the proportion of abnormal patterns in the abnormal deposition regions to obtain abnormal pattern proportion data; Integrate the quantification data of deposition direction consistency and the abnormal pattern proportion data to obtain a copper plating deposition uniformity evaluation index.

[0019] By accurately identifying the edge region of the copper layer in the micro-hole enhanced projection image of the circuit board, the present invention can accurately locate the position of the copper layer, providing a clear reference for subsequent deposition feature analysis. The accurate identification of the copper layer is the basis for microscopic deposition trace tracking, ensuring that the data extraction and analysis in subsequent steps are more accurate and reliable. Using the phase consistency edge detection technology to finely extract the copper layer edge can eliminate noise and errors, improving the accuracy of edge extraction. This technology can enhance the edge contrast, thus extracting clearer and more accurate copper layer edge data, providing high-quality input data for deposition direction consistency analysis. By analyzing the edge features of the copper layer edge data, the deposition direction consistency of the copper layer can be quantified, and the obtained quantification data of deposition direction consistency can reflect the uniformity in the copper layer deposition process, further evaluating whether there is uneven deposition during the electroplating process, so as to provide data support for improving the electroplating process. Based on the edge features, abnormal dendritic crystallization patterns in the edge region of the copper layer can be accurately detected, indicating irregular or abnormal deposition phenomena during the deposition process. The detection of these abnormal patterns can effectively identify quality problems in the electroplating process, such as uneven electroplating, excessive or insufficient deposition, etc., providing a basis for subsequent adjustment. Calculating the proportion of abnormal patterns in the detected abnormal deposition regions can quantify the degree of abnormal deposition, helping to evaluate the stability and uniformity of the electroplating process. By calculating the proportion data, it can be clear which regions have problems, optimize the electroplating parameters and processes, and reduce defects.

[0020] Preferably, step S4 includes the following steps: Step S41: Decode the defect feature process of the circuit board micro-holes according to the micro-hole potential defect probability distribution map and the copper plating deposition uniformity evaluation index to generate circuit board micro-hole copper plating defect feature data; Step S42: Set the feature baseline for the circuit board micro-hole copper plating defect feature data based on the pre-stored historical qualified data, and perform quality inspection calculation on the circuit board micro-hole copper plating defect feature data using the feature baseline to obtain the result of the quality inspection; Step S43: Construct a self-learning knowledge base based on the result of the quality inspection to perform intelligent quality inspection operations for circuit board micro-hole copper plating.

[0021] By combining the probability distribution map of potential defects in micro-holes and the evaluation index of copper plating deposition uniformity, the present invention can accurately identify the potential defect areas of micro-holes on a circuit board. This step provides a systematic process for decoding defect characteristics, which can combine the defect information of micro-holes with the non-uniformity of copper plating deposition to ensure that potential problems can be discovered in a timely manner and avoid the occurrence of defective products. Using the defect characteristic data provides a detailed process basis for subsequent quality inspection. Associating the defect characteristics with process parameters helps to analyze the causes of defects more deeply, optimize the detection process, and improve the accuracy and efficiency of detection. By comparing with historical quality qualified data, a characteristic baseline is established, and this baseline is used to calculate the quality inspection of the defect characteristics of micro-hole copper plating. This method can accurately judge whether the circuit board meets the quality standards, automatically monitor the quality, and adjust and optimize the detection standards in real time according to historical data, improving the accuracy and operability of quality inspection. By constructing a self-learning knowledge base and performing intelligent operations based on the results of quality inspection, it means that the system can continuously absorb and process new data during the actual production process, continuously self-optimize, thereby improving the inspection accuracy and reducing human errors. The self-learning process enables the system to adjust the detection strategy according to changes in the production situation and automatically identify new defect patterns.

[0022] Preferably, step S42 includes: Setting a characteristic baseline for the defect characteristic data of micro-hole copper plating on the circuit board based on pre-stored historical quality qualified data, where the average copper plating thickness is set at 8.0 μm, with an allowable deviation of ±0.3 μm; the upper limit of the thickness fluctuation coefficient is 5%; the standard deviation of the edge profile curvature is controlled within 0.05; the threshold of the defect area ratio does not exceed 0.2%; the tolerance of the average gray level is controlled within ±10 gray levels; the contrast coefficient requirement is not less than 0.8; the texture consistency index is set at 0.95; the limit of abnormal defect points is no more than 1 per 100 micro-holes; Using the characteristic baseline to calculate the quality inspection of the defect characteristic data of micro-hole copper plating on the circuit board to obtain the result of quality inspection, where the formula for quality inspection calculation is as follows: ; In the formula, is the quality inspection result, is the defect distribution factor, is the deposition uniformity index, is the proportion of copper plating voids in the hole, is the burr risk level, is the deposition morphology deviation, is the defect distribution weight, is the deposition uniformity weight, is the weight of voids in the hole, is the burr risk weight, is the weight of the deposition morphology deviation.

[0023] Through the feature baseline setting in the present invention, this step ensures that the copper plating process of each microvia on the circuit board meets strict quality standards. These standardized parameters (such as copper plating thickness, proportion of defective area, tolerance of gray mean value, etc.) help to ensure the systematicness and consistency of detection, enabling the quality of each microvia to be evaluated under a unified standard and improving the accuracy of the inspection process. By combining multiple quality control indicators (such as defect distribution factor, deposition uniformity index, proportion of copper plating voids in the hole, etc.), a comprehensive and multi-angle quality evaluation method is provided. This multi-dimensional quality inspection helps to reveal the influence of different factors on quality, ensuring a comprehensive inspection of microvia copper plating defects from multiple aspects, thus improving the comprehensiveness and accuracy of product quality. The quality inspection calculation formula: ; provides a quantitative evaluation basis for the quality of each microvia on the circuit board. Each factor is weighted based on pre-stored historical data, and the quality inspection result calculated by the formula ( ) provides a reliable basis for subsequent production decisions, helping production personnel make more accurate and intelligent judgments. The weight settings of each quality index (such as , , etc.) can be adjusted according to actual production requirements, thus providing a customized quality control scheme. This flexibility enables this step to adapt to the quality control requirements in different production environments, providing higher adaptability and stronger operability for the enterprise. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 is a schematic diagram of the step flow of a method for inspecting the quality of copper plating on microvias of a circuit board based on image recognition; Figure 2 is Figure 1 a detailed implementation step flow schematic diagram of step S2 in Figure 3 is Figure 1 a detailed implementation step flow schematic diagram of step S4 in The realization, functional characteristics and advantages of the object of the present invention will be further described with reference to the embodiments and the accompanying drawings. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0025] The technical method of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all of them. All other embodiments obtained by those skilled in the art within the scope of the present invention without creative work based on the embodiments of the present invention belong to the scope of protection of the present invention.

[0026] In addition, the accompanying drawings are only schematic illustrations of the present invention and are not necessarily drawn to scale. The same reference numerals in the drawings denote the same or similar parts, and thus repeated descriptions thereof will be omitted. Some of the block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. The functional entities may be implemented in software form, or in one or more hardware modules or integrated circuits, or in different networks and / or processor methods and / or microcontroller methods.

[0027] It should be understood that although terms such as "first", "second", etc. may be used herein to describe various units, these units should not be limited by these terms. These terms are only used to distinguish one unit from another. For example, without departing from the scope of the exemplary embodiments, the first unit may be referred to as the second unit, and similarly the second unit may be referred to as the first unit. The term "and / or" used herein includes any and all combinations of one or more of the listed associated items.

[0028] To achieve the above object, please refer to Figures 1 to 3 , a method for inspecting the quality of micro-hole copper plating on a circuit board based on image recognition, the method comprising the following steps: Step S1: Set up an annular polarized light source array; perform dynamic depth-of-field fusion shooting on the micro-holes of the circuit board based on the annular polarized light source array to obtain a two-dimensional projection image of the micro-holes of the circuit board; perform sub-pixel edge enhancement on the two-dimensional projection image of the micro-holes of the circuit board to generate an enhanced projection image of the micro-holes of the circuit board; Step S2: Segment the region of interest boundary of the enhanced projection image of the micro-holes of the circuit board to obtain the boundary of the region of interest of the hole wall; extract the texture features and color features of the boundary of the region of interest of the hole wall to perform micro-texture co-occurrence feature analysis on the boundary of the region of interest of the hole wall, and generate a probability distribution map of potential defects of the micro-holes; Step S3: Perform deformation field quantification analysis on the enhanced projection image of the micro-holes of the circuit board based on the DIC technology to generate a deformation trend prediction curve; perform burr growth mode recognition on the enhanced projection image of the micro-holes of the circuit board through the deformation trend prediction curve to generate a burr risk level assessment map; use the burr risk level assessment map to perform micro-deposition trace tracking on the micro-holes of the circuit board to generate an evaluation index of the uniformity of copper plating deposition; Step S4: Perform comprehensive copper plating quality inspection on the micro-holes of the circuit board according to the probability distribution map of potential defects of the micro-holes and the evaluation index of the uniformity of copper plating deposition, and construct a self-learning knowledge base based on the results of the quality inspection to perform intelligent inspection operations on the quality of micro-hole copper plating on the circuit board.

[0029] The present invention performs dynamic depth-of-field fusion shooting by using an annularly polarized light source array. Compared with traditional light sources, it can more effectively avoid light interference, ensuring that the acquired images have higher contrast and clarity. Especially when dealing with the minute details in the micro-hole area of the circuit board, it can accurately capture the morphology and surface features of the micro-holes. By performing sub-pixel edge enhancement on the two-dimensional projection map, a higher resolution can be achieved compared to traditional methods, making the boundaries of the micro-holes sharper and the details finer, which is helpful for subsequent defect detection and analysis. The microscopic texture co-occurrence feature analysis method enables the full extraction of dimensions such as the texture information and color features of the micro-holes. Especially for minute potential defects, comprehensive analysis can be carried out at the microscopic scale to generate a probability distribution map of potential micro-hole defects, which is helpful for identifying potential quality problems of the micro-holes in advance, such as cracks and air holes. Through this multi-dimensional analysis, the comprehensiveness and meticulousness of defect detection can be improved, especially in the identification of hidden defects in the deep area of the micro-holes, reducing the probability of missed detection and false detection. Using DIC technology for deformation field quantification analysis can accurately extract deformation data from the micro-hole images. This analysis process provides an effective prediction tool for burr growth. By establishing a deformation trend prediction curve, the growth situation of burrs can be monitored in real time, generating a burr risk level assessment map, which is of great significance for high-precision circuit board processing. Based on the burr risk assessment, quality problems caused by burrs can be effectively reduced, providing a scientific basis for subsequent repair measures, thus ensuring the high-quality production of products. By adopting the microscopic deposition trace tracking method and combining the analysis results of the burr risk assessment map, the uniformity and stability of the copper plating layer can be deeply analyzed, generating a copper plating deposition uniformity evaluation index. This index can timely feedback the non-uniformity problems in the process, such as uneven copper plating layer thickness or missing, ensuring that the copper plating layer of the product meets the design requirements. Improving the control accuracy of the copper plating process and reducing the variation in the production process ensure the consistency and stability of the product. Especially for high-density circuit boards, the copper plating uniformity is crucial for the product performance. On the basis of traditional detection methods, by building a self-learning knowledge base and inputting each detection result as training data into the system, the system can optimize itself during continuous detection, improving the accuracy and adaptability of the detection algorithm. The system can adjust the detection standards and parameters according to the differences in different production batches, reducing human intervention and automatically adapting to the changes in the quality of micro-hole copper plating under different processes and production conditions. The introduction of intelligent inspection operations can greatly improve production efficiency, reduce human errors, improve quality stability, and at the same time can also timely feedback the abnormalities of the production line, discover potential problems in advance and take corresponding measures, greatly enhancing the flexibility and adaptability of the production process. This method combines multiple technologies such as optical imaging, image processing, texture analysis, deformation monitoring, and intelligent learning, effectively improving the overall inspection ability of the quality of micro-hole copper plating on circuit boards.Through comprehensive inspection and analysis of the micro-holes, not only can the current quality problems be accurately identified, but also the potential risks in production can be monitored in real time to ensure that each circuit board meets the standard requirements. Therefore, by introducing advanced image recognition, deformation analysis, and self-learning technologies, the present invention realizes efficient, precise, and automated intelligent inspection of the quality of copper plating in micro-holes of circuit boards, overcoming the deficiencies of traditional methods in terms of detection accuracy, efficiency, and comprehensive evaluation capabilities.

[0030] In the embodiment of the present invention, refer to Figure 1 As shown, it is a schematic diagram of the step flow of a method for inspecting the quality of copper plating in micro-holes of a circuit board based on image recognition according to the present invention. In this example, the method for inspecting the quality of copper plating in micro-holes of a circuit board based on image recognition includes the following steps: Step S1: Set up an annular polarized light source array; perform dynamic depth-of-field fusion shooting on the micro-holes of the circuit board based on the annular polarized light source array to obtain a two-dimensional projection map of the micro-holes of the circuit board; perform sub-pixel edge enhancement on the two-dimensional projection map of the micro-holes of the circuit board to generate an enhanced projection map of the micro-holes of the circuit board. In the embodiment of the present invention, by arranging an annular polarized light source array. This array should ensure that the light source can evenly irradiate the entire micro-hole area of the circuit board, and the light intensity, angle and other parameters of each light source should be accurately calculated to achieve efficient shooting and enhancement effects. This annular polarized light source array should be adjustable, capable of adjusting the polarization angle and intensity according to actual needs to adapt to the optical characteristics of different types of circuit boards. Place the circuit board in front of the light source array to ensure that the micro-hole area is within the shooting range. Use the annular polarized light source array to shoot the circuit board, and adopt dynamic depth-of-field fusion technology to shoot different-level images of the micro-holes of the circuit board at different focal lengths. By fusing these images, a two-dimensional projection map containing the depth information of the micro-holes is obtained. These images should ensure high resolution, low noise, and cover the entire structure of the micro-holes of the circuit board. Perform image processing on the obtained two-dimensional projection map, focusing on strengthening the edge part of the micro-holes. Adopting sub-pixel-level edge enhancement technology, the micro-hole contour in the image can be enhanced by precise gradient calculation or using Gaussian filtering and sharpening algorithms, making the edge clearer. Through the enhanced edge, the position, shape, and surrounding detailed structures of the micro-holes can be more accurately extracted. After sub-pixel edge enhancement, an enhanced projection map of the micro-holes of the circuit board with high contrast and clear edges is output. This map will have more detailed performance than the original two-dimensional projection map, especially in the contour and surface features of the micro-holes, which can help further analyze and process the micro-hole structure of the circuit board. This enhanced map can be used as the basic image for subsequent analysis, measurement, and defect detection.

[0031] Step S2: Divide the interest boundary of the micro-hole enhanced projection map of the circuit board to obtain the boundary of the hole wall interest area; extract the texture features and color features of the hole wall interest area boundary to conduct a microscopic texture co-occurrence feature analysis on the hole wall interest area boundary, and generate a potential defect probability distribution map of the micro-holes; In the embodiments of the present invention, by preprocessing the enhanced projection image of the micro-holes on the circuit board, such as denoising, contrast enhancement, etc., the image is ensured to be clear, facilitating subsequent edge segmentation and analysis. Edge detection algorithms (such as Canny edge detection) or threshold-based segmentation methods (such as Otsu algorithm) can be used to extract the edges of the micro-holes in the image. Based on the extracted edge image, the region of interest of the micro-holes, especially the boundary of the hole wall, is selected and calibrated. Contour extraction methods can be adopted, or closing and opening operations based on morphological operations can be used to further refine the boundary. Through this process, the boundary of the region of interest of the hole wall obtained should be accurate and complete, capable of clearly indicating the shape and position of the micro-holes. For the boundary of the region of interest of the hole wall, the gray-level co-occurrence matrix (GLCM) can be used to extract texture features. The gray-level co-occurrence matrix can describe the spatial relationship between the gray values of pixels in the image. By calculating the co-occurrence matrix in different directions and distances, features such as contrast, homogeneity, and energy of the texture are obtained. The extracted texture features can help describe information such as the surface roughness and texture pattern of the hole wall. While performing texture analysis, color features also need to be extracted. The HSV (hue, saturation, value) model can be used to extract the color features of the region of interest of the hole wall. The HSV model can better describe the perceptual attributes of colors, extract the distribution features of colors, and further analyze the color differences of the hole wall, which is also helpful for detecting micro-hole defects. Based on the previously extracted texture features, further texture co-occurrence feature analysis can be carried out to explore the spatial distribution pattern of the surface texture of the hole wall. By calculating the co-occurrence matrix of the hole wall texture and analyzing the relative position relationship between different gray levels, a texture co-occurrence feature map at the micro level is generated. These texture co-occurrence features can be used to reveal whether there are abnormal texture patterns on the hole wall, and these abnormal patterns are usually related to the existence of micro-hole defects. Combining the extracted texture co-occurrence features with color features, machine learning or statistical analysis methods (such as support vector machine SVM, random forest, etc.) are used to model the potential defects in the hole wall area. By analyzing the relationship between the features and known defect samples, a defect probability distribution map is generated. This distribution map will show the defect possibility of each area. The texture and color features of the hole wall can help identify defects such as cracks, peeling, and stains existing in the micro-holes. Based on the texture co-occurrence feature analysis, all analysis results are integrated, and a potential defect probability distribution map of the micro-holes is generated by means of image overlay. This map can show the defect probability of each micro-hole area, and the severity of the defects is shown by color coding (for example, high-probability areas are represented by red, and low-probability areas are represented by green). Through this image, the areas with potential defects can be quickly identified, providing a basis for subsequent defect repair or quality control.

[0032] Step S3: Quantitatively analyze the deformation field of the micro-hole enhanced projection image of the circuit board based on DIC technology to generate a deformation trend prediction curve; identify the burr growth pattern of the micro-hole enhanced projection image of the circuit board through the deformation trend prediction curve to generate a burr risk level assessment map; use the burr risk level assessment map to trace the microscopic deposition traces of the micro-holes on the circuit board to generate a copper plating deposition uniformity evaluation index; In the embodiments of the present invention, the enhanced projection image of the circuit board micro-holes obtained by photographing with an annularly polarized light source array is used as the input image. Ensure that the image has sufficient resolution and clarity so that the DIC technology can accurately capture the deformation of the micro-hole area. In order to apply the DIC (Digital Image Correlation) technology, a special random dot pattern needs to be coated on the surface of the micro-holes of the circuit board. These marks will serve as reference points during the deformation process, and the DIC algorithm uses the movement of these points to analyze the deformation. Process the projection image through the DIC algorithm to analyze the displacement field of the surface marks. The DIC algorithm is based on the principle of contrast matching. By comparing the image data in the undeformed state and the deformed state, the displacement value of each point is quantified. Using the displacement data, further calculate the deformation field of the micro-hole area, including strain, displacement vector field, stress, etc. These data can reveal the deformation of the micro-hole area under different loading conditions and provide a basis for the subsequent analysis of the burr growth mode. Based on the deformation field data calculated by DIC, analyze the deformation trend of the micro-holes. The trend of deformation with time or applied force can be obtained by performing time series analysis on the deformation conditions under different loading conditions. Adopt curve fitting technology to obtain the deformation trend prediction curve, which describes the deformation mode and trend of the circuit board micro-holes under the action of external forces. This curve can reflect the vulnerability and potential deformation degree of the circuit board micro-holes. Through the deformation trend prediction curve, analyze the burr growth mode that appears in the micro-hole area under the action of external forces. According to the trend and direction of the deformation, the potential areas where burrs are formed can be inferred. Combine the stress concentration area of the deformation field with the deformation curve to identify the locations where burr growth occurs. Burrs usually occur in areas with stress concentration or severe deformation. Therefore, by analyzing the deformation trend, the growth area of burrs can be accurately predicted. According to the predicted burr growth mode, mark the potential burr risk areas on the enhanced projection image of the circuit board micro-holes. Use the deformation trend prediction curve and stress concentration data to obtain the burr risk level assessment map through quantitative analysis. This map shows the burr growth risks in different areas through different colors (for example, red represents high risk and green represents low risk), providing a basis for subsequent quality control. Through the burr risk level assessment map, identify the existing burr risk areas. Due to local stress concentration in these areas, the copper plating deposition is uneven or poorly deposited. In high-risk areas, combine DIC technology and surface morphology analysis to track the deposition traces of the micro-holes. Analyze the thickness distribution and uniformity of the copper plating layer through scanning electron microscopy (SEM) or other high-resolution imaging techniques. According to the traced microscopic deposition traces and the deposition conditions in the burr risk area, use the uniformity evaluation index for evaluation. This evaluation index can be obtained by calculating parameters such as the copper plating thickness difference and texture uniformity in different areas. Generate the copper plating deposition uniformity evaluation index through the analyzed deposition uniformity data to evaluate whether the copper plating layer of the circuit board micro-holes meets the standards.

[0033] Step S4: Conduct a comprehensive copper plating quality inspection on the micro-vias of the circuit board based on the micro-via potential defect probability distribution map and the copper plating deposition uniformity evaluation index, and construct a self-learning knowledge base based on the results of the quality inspection to perform intelligent inspection operations on the copper plating quality of the micro-vias of the circuit board.

[0034] In the embodiments of the present invention, by using the micropore potential defect probability distribution map obtained from step S2 and the copper plating deposition uniformity evaluation index obtained from step S3. The micropore potential defect probability distribution map provides the probability information of the micropore defect area, while the copper plating deposition uniformity evaluation index reveals the uniformity and quality of the copper plating layer. Through data fusion technology, the two are combined to form a comprehensive evaluation result. Specifically, a comprehensive quality evaluation map can be generated by weighted summation or machine learning methods, combining the data of the two. The comprehensive map will simultaneously reflect the defect risk of the micropores and the uniformity of the copper plating quality, providing a basis for comprehensive quality inspection. A comprehensive quality scoring model is constructed to evaluate each micropore area. According to the defect probability of the micropores, the copper plating uniformity, and other relevant characteristics, a comprehensive score is generated. High-score areas represent areas with good quality, and low-score areas represent areas with potential defects or uneven copper plating quality. According to industry standards or preset quality control requirements, pass / fail criteria are defined for each micropore area. These criteria can be based on defect probability thresholds and copper plating uniformity evaluation thresholds to formulate specific inspection rules. For example, if the defect probability of a certain area is greater than a certain threshold, or the copper plating uniformity evaluation index is lower than the predetermined standard, then this area will be marked as unqualified. Using this standard to classify and inspect the micropores of the circuit board, a pass / fail area map is generated, and this data will provide a basis for subsequent intelligent inspection operations. Based on the comprehensive quality inspection results of the circuit board micropores, through historical data accumulation and quality feedback, key data during the inspection process are continuously collected, including the defect probability of the micropores, the copper plating deposition uniformity, the deformation trend, etc. The results of each inspection are recorded in the self-learning knowledge base. The knowledge base not only records the evaluation data of the micropore quality, but also should contain information such as the inspection results corresponding to each micropore, the parameters of the evaluation model, and the standardized thresholds. Through the self-learning mechanism, the content in the knowledge base is continuously optimized and updated. The feedback of each detection result will be used to adjust and improve the comprehensive quality scoring model. For example, if certain areas are repeatedly shown as unqualified areas, the system can automatically learn the characteristics of this area and adjust the scoring model to improve the accuracy of subsequent inspections. The self-learning system should use methods based on reinforcement learning or incremental learning. After each new piece of data is added, the system self-optimizes and adjusts the model according to the historical inspection results and quality feedback, thereby improving the effect and accuracy of future inspections. The content of the knowledge base can include the patterns of micropore defects (such as cracks, hole wall damage, etc.), the types of uneven copper plating deposition, the correlation between different micropore characteristics and defects, and corresponding quality improvement methods. For example, the system can learn that certain types of defects are caused by specific copper plating processes or board characteristics, and this information will be continuously stored in the knowledge base for optimization and quality control during subsequent production processes.

[0035] Preferably, step S1 includes the following steps: Step S11: Set up an annular polarized light source array; Step S12: Take an initial light source image of the micro-holes on the circuit board by using an annular polarized light source array to obtain an initial set of circuit board micro-hole light source images; Step S13: Use the focus stacking technique to synthesize the images of the initial set of circuit board micro-hole light source images to generate a two-dimensional projection map of the circuit board micro-holes; extract the depth information of the inner wall of the micro-holes from the synthesized image of the circuit board micro-holes to obtain the depth information of the inner wall of the micro-holes; Step S14: Perform edge sub-pixel positioning on the synthesized image of the circuit board micro-holes according to the depth information of the inner wall of the micro-holes, and construct a gradient change curve of the hole wall contour based on the result of the sub-pixel positioning; perform local interpolation of the contour gradient on the synthesized image of the circuit board micro-holes through the gradient change curve of the hole wall contour to generate an enhanced projection map of the circuit board micro-holes.

[0036] In the embodiments of the present invention, by selecting an annular polarized light source array and choosing appropriate wavelengths and polarization angles, it is ensured that the microporous area can be effectively irradiated. According to the size of the circuit board and the distribution of the micropores, the layout of the annular polarized light source array is designed. The number, position, and light intensity of the light source array need to be precisely calculated to ensure that the entire microporous area is evenly illuminated. The light source is installed at a suitable position to ensure that the irradiation angle and intensity on the microporous area are appropriate. The angle, brightness, and polarization direction of the light source are adjusted to ensure that the light source can provide stable and uniform illumination conditions. A high-resolution microscope or camera is installed to ensure that it can capture details at the micropore level. The camera needs to be configured with a polarization filter to cooperate with the annular polarized light source for imaging. The annular polarized light source array is used to photograph the microporous area on the circuit board. According to the number and arrangement of the micropores, appropriate shooting parameters are set to ensure that each micropore can be clearly photographed. Images are taken at multiple different angles and polarization directions to obtain an initial image set containing sufficient optical information. The data of each shooting is saved as an image file (such as TIFF format) for subsequent processing and analysis. Ensure that the image resolution is high enough and the color and contrast are moderate. Select a focus stacking algorithm suitable for micropore image processing. Common focus stacking methods include image registration and fusion algorithms for aligning images at different layers. The focus stacking technique is used to process the initial image set. Images at multiple different foci are synthesized into a high-quality two-dimensional projection map. During the synthesis process, ensure that the depth information of the inner wall of the micropore is clearly presented in the final image. After image synthesis, image denoising techniques (such as median filtering, mean filtering, etc.) are applied to reduce noise in the image, and edge enhancement processing is performed on the image to improve the visibility of the micropores. Using an edge detection algorithm (such as Canny edge detection or Sobel operator), edge extraction is performed on the synthesized two-dimensional projection map. At this time, emphasis should be placed on accurately positioning the edge of the micropore to ensure that the edge is clear and accurate. An sub-pixel level positioning algorithm (such as a sub-pixel edge positioning algorithm based on image gradient) is applied to accurately position the edge of the micropore above the pixel level, which can ensure higher accuracy of the micropore edge position. According to the positioning information of the micropore edge, a contour gradient change curve of the pore wall is constructed. By analyzing this curve, the depth change and morphology of the pore wall can be obtained. According to the gradient change curve, local interpolation processing is performed on the pore wall contour. The purpose of this step is to refine the details of the pore wall to make the contour of the pore wall smoother and more coherent. According to the locally interpolated pore wall contour, a final enhanced projection map of the circuit board micropores is generated. This image shows the clear contour of the micropores and the depth information of the inner wall, and the image details have been greatly enhanced.

[0037] Preferably, step S11 includes: Set the number of light sources to 16 LEDs, arranged in a ring, with a diameter of 120 mm, a wavelength of 660 nm, an incident angle of 30°, polarizer angles of 0°, 45°, 90°, 135°, an analyzer angle of 90°, a polarization contrast ratio ≥ 0.9, a driving method of constant current driving, brightness adjustment of 0 - 100%, a polarization angle control method of liquid crystal polarization adjustment, synchronous trigger of TTL signal, and trigger delay ≤ 1 ms.

[0038] In the embodiment of the present invention, by selecting 16 high - brightness LED light sources, it is ensured that each LED can provide sufficient light intensity to illuminate the entire micro - via area of the circuit board. The LED light sources are arranged in a ring to ensure uniform illumination of each micro - via on the circuit board. The diameter of the ring - shaped light source array is set to 120 mm, and this diameter design can ensure that the light source covers the entire micro - via area of the circuit board, avoiding light - free areas. The angle between each LED light source and its adjacent light source should be reasonably calculated according to the arrangement of the light sources and the distribution of the micro - via area to ensure uniform light irradiation. Set the wavelength of the LED light source to 660 nm, which is suitable for optical imaging of the circuit board material and can ensure a high optical contrast ratio. The incident angle of the LED light source is set to 30°, and this angle can provide a suitable irradiation effect, helping to illuminate the inner wall of the micro - via from different directions and enhancing the depth information of the image. Set the polarizer angles of the light source to 0°, 45°, 90°, 135°. By changing the angle of the polarizer, polarized light in different directions can be obtained, so as to collect optical images at different angles and extract richer micro - via information. The analyzer angle is set to 90° to ensure effective detection of the polarization direction of the circularly polarized light source and provide image data with a relatively high contrast ratio. Ensure that the polarization contrast ratio of the polarized light source is greater than or equal to 0.9. This requirement ensures that the polarization effect of the light source is strong enough, making the optical information on the inner wall of the micro - via clearly contrasted in the image and improving the image quality. The LED light source is driven by a constant - current driving method to ensure the stable brightness of each LED light source, unaffected by power fluctuations. Set the brightness adjustment range to 0 - 100%, providing a flexible brightness adjustment function, and the brightness of the light source can be adjusted according to different shooting requirements. The polarization angle control method uses a liquid crystal polarization regulator. Through the liquid crystal regulator, the change of the polarization angle can be precisely controlled to meet the polarization requirements at different shooting angles. The light source system and the camera are synchronously triggered through a TTL signal to ensure the synchronous operation of the light source and the camera during shooting. The trigger delay is set to ≤ 1 ms to ensure that the trigger delay is small enough in actual operation and does not affect the timeliness of image shooting.

[0039] As an example of the present invention, refer to Figure 2 As shown, in this example, step S2 includes: Step S21: Segment the interest boundary of the enhanced projection image of the micro - via on the circuit board to obtain the boundary of the wall - of - hole interest area; Step S22: Construct 3×3 to 7×7 multi-scale detection windows; and use the multi-scale detection windows to calculate the rotation-invariant uniform patterns of the boundaries of the hole wall regions of interest, and statistically analyze the texture direction distribution histograms at each scale, thereby generating a texture feature evolution trend curve; Step S23: Calculate the chromaticity gradient of the boundaries of the hole wall regions of interest to generate a color map with direction markers; Step S24: Perform defect feature correlation mining based on the texture feature evolution trend curve and the color map with direction markers to generate a potential defect probability distribution map for micro-holes.

[0040] In the embodiments of the present invention, the micro-hole enhanced projection map of the circuit board is preprocessed, including denoising, enhancing contrast, etc., to ensure that the edges are clearer. Edge detection algorithms (such as Canny edge detection or Sobel operator) are applied to extract the edge information in the image, especially the boundary region of the micro-holes. The threshold segmentation method or active contour model (such as the Snakes model) is used to accurately segment the interested boundary of the micro-hole region. Combining the gray-scale and texture information of the image, morphological operations (such as erosion, dilation, etc.) are used to further optimize the segmentation result. The boundary of the interested region of the hole wall, that is, the contour region of the micro-hole, is extracted to provide accurate boundary data for subsequent analysis. According to the size and shape of the micro-hole boundary, multi-scale detection windows of different sizes are constructed. The window sizes range from 3×3 to 7×7, and the window size can be adjusted to adapt to the texture information at different scales. Ensure that each window can cover the boundary of the interested region and can extract the texture features at different scales. Texture analysis is performed on the image within each detection window, and texture analysis algorithms (such as Gabor filters, local binary pattern LBP, etc.) are used to extract rotation-invariant uniform patterns. The purpose of the rotation-invariant uniform pattern is to eliminate the influence of image rotation on texture analysis, so that the texture features remain consistent regardless of the change in the direction of the micro-hole. The texture direction distribution histogram is calculated for each window. The texture direction can be calculated using methods such as gradient direction or structure tensor. According to the calculation results, the texture direction distribution histograms at different scales are generated, and these histograms reflect the change trend of the texture at different scales. The texture direction distribution histograms at different scales are integrated to draw the texture feature evolution trend curve. For the boundary of the interested region of the hole wall, its chromaticity gradient is calculated. The chromaticity gradient is an index to describe the color change of the image, and the color difference model (such as CIE 1976 Lab*) can be used to calculate the chromaticity change. The chromaticity gradient of each pixel point in the image is calculated and extracted in combination with the hole wall boundary information to generate a chromaticity gradient map. Based on the chromaticity gradient map, a direction marker is added to each pixel point according to the calculated chromaticity gradient value. This direction marker represents the direction and amplitude of the chromaticity change, and a color map with direction markers is generated. The color map can be used for further analysis of the change of color features and the possibility of defects. By comparing the texture feature evolution trend curve and the color map, combined with the existing defect feature database, defect feature correlation mining is carried out. Machine learning methods (such as support vector machine SVM, random forest or neural network) are used to classify and train the texture features and chromaticity features to find the feature patterns related to potential defects. According to the results of the correlation mining, the judgment criteria for potential defects are established. Through threshold judgment, it is determined which regions' features represent defects, such as cracks, uneven hole walls or foreign objects, etc. Using the probability values output by the classifier, a probability distribution map of potential defects is generated. This map shows the regions with defects in the micro-holes of the circuit board, and the probability values of the defects are obtained based on the combined analysis of texture and chromaticity information.Map the potential defect probability of each micropore to the original image to generate the final micropore potential defect probability distribution map.

[0041] Preferably, step S24 includes the following steps: Step S241: Perform local texture change pattern analysis on the texture feature evolution trend curve to generate a texture trend feature matrix; Step S242: Separate the feature color channels in different directions for the color atlas with direction marks to obtain a direction feature color matrix; Step S243: Perform feature matching based on the texture trend feature matrix and the direction feature color matrix to obtain a feature correlation matrix of the potential defect region; Step S244: Detect abnormal clustering points for the feature correlation matrix of the potential defect region to generate abnormal clustering point data in the feature space; calculate the proportion of abnormal clustering points for the feature correlation matrix of the potential defect region according to the abnormal clustering point data in the feature space to obtain the potential defect probability distribution map.

[0042] In the embodiments of the present invention, by based on the evolution trend curve of texture features, regions with significant texture changes are selected. These regions usually correspond to defects appearing on the microporous wall, such as cracks, spots, etc. Local autocorrelation analysis (such as GLCM: Gray-Level Co-Occurrence Matrix) is used to capture the characteristics of local texture changes. This method can extract the regular changes of texture within a local area. According to the local texture change pattern, the texture features at each scale are comprehensively analyzed. The change trend of texture features at each scale is statistically analyzed and mapped into a matrix form. The rows and columns of the matrix represent different texture scales and texture change patterns respectively. This matrix reflects the evolution law of texture features at different scales and provides the global information of texture evolution in the microporous region. Based on the color atlas with direction markers, the color change direction of each pixel is analyzed. The color change direction of each pixel can be marked using the gradient direction or the structure tensor. The color information in the color atlas is separated according to the direction features. For example, the color information can be decomposed into multiple channels (such as red, green, blue) and the direction features of color change. Each separated direction feature channel is merged into a matrix form to obtain the direction feature color matrix. Each matrix element represents the color change direction and intensity of a pixel point. This matrix reflects the directional change of color in the microporous region and is very crucial for subsequent defect detection. The texture trend feature matrix and the direction feature color matrix are paired and matched. Using similarity measurement methods (such as Euclidean distance, cosine similarity, etc.), the matching degree between each texture feature and the corresponding color direction feature is calculated. The multi-dimensional scaling method (MDS) can be used to map the texture and color features into the same feature space, so as to perform the matching more intuitively. The results of each feature match are formed into a matrix to obtain the feature correlation degree matrix. Each element in the matrix represents the correlation degree between the texture feature and the color feature. This matrix reflects the correlation degree between texture and color in the microporous region. The regions with high correlation degree correspond to potential defects. The clustering algorithm (such as K-means clustering, DBSCAN, etc.) is used to analyze the feature correlation degree matrix to detect abnormal clustering points. The abnormal clustering points represent the parts in the feature correlation degree that are different from the normal regions. These abnormal regions have defects. The clustering results can identify the outliers by calculating the density between points. The regions with lower density are usually potential defect regions. According to the clustering results, the abnormal clustering points in the feature space are extracted. These abnormal clustering points represent the positions and intensities of potential defects. Usually, further analysis and verification are required. The coordinates and feature values of these clustering points will be recorded as the feature data of the potential defect region. According to the data of abnormal clustering points in the feature space, the proportion of abnormal clustering points in the entire feature correlation degree matrix is calculated. The higher the proportion, the greater the possibility of defects. Statistical methods (such as chi-square test) can be used to test the proportion of abnormal clustering points to confirm its significance. According to the proportion of abnormal clustering points, a potential defect probability distribution map is drawn. The color or intensity of each point in the figure represents the probability of the existence of defects in this region.

[0043] Preferably, the deformation field quantization analysis of the micro-hole enhanced projection image of the circuit board based on the DIC technology in step S3 includes: Performing partition calculation on the micro-hole enhanced projection image of the circuit board through the DIC technology to obtain the displacement vector field of the hole edge; Constructing the deformation field of the micro-hole enhanced projection image of the circuit board based on the displacement vector field to obtain the local area deformation distribution; Detecting and counting the batch-to-batch fluctuations of the aperture size in the micro-hole enhanced projection image of the circuit board to generate aperture fluctuation data; Identifying the local deformation trend of the micro-hole enhanced projection image of the circuit board; Integrating the displacement vector field, the deformation field and the aperture fluctuation data to construct a deformation trend prediction model; Importing the local deformation trend into the deformation trend prediction model for trend prediction to generate a deformation trend prediction curve.

[0044] In the embodiments of the present invention, the micro-hole enhanced projection image of the circuit board is divided into several sub-regions. The size of each sub-region is determined according to the characteristic size of the micro-holes, usually ranging from 10x10 pixels to 100x100 pixels. In each partition, some feature points are selected as reference points, and these feature points will be used for tracking and calculating displacements. The DIC algorithm is used for displacement tracking. By tracking the position changes of the feature points in the front and rear images, the displacement vector (displacement magnitude and direction) of each feature point is calculated. A global optimization algorithm (such as the cross-correlation method or the least squares method) is adopted to reduce the calculation error, and the displacement vector field is output, obtaining the displacement vector field within each partition, which represents the displacement information of each point on the orifice edge during the deformation process. Using the displacement vector field, the deformation gradient (for example, the strain tensor) is used to calculate the deformation field of the local region. The deformation field can be obtained by calculating the gradient of the displacement data, which represents the variation of the deformation at different positions. According to the displacement vector field, the strain value of each region is calculated, and the deformation field of the region is presented in matrix form. The deformation field data is partitioned and displayed for analyzing the deformation distribution of each region. The deformation distribution map can clearly show which regions around the micro-holes have undergone large deformations and the direction of the deformations. A color scale map or a contour map is used to represent the deformation degree of different regions. Usually, red is used to represent larger deformations, and green is used to represent smaller deformations. The size of the micro-holes is measured. Based on an edge detection algorithm (such as the Canny edge detection), the orifice edge is automatically identified, and the aperture size data is extracted. The diameter or other geometric features of each micro-hole are obtained through image analysis. The aperture size data of different batches (such as multiple detections or different production cycles) is statistically analyzed, and the standard deviation or coefficient of variation of the aperture size of each batch is calculated to characterize the fluctuation degree of the aperture size, generating aperture fluctuation data, and recording the fluctuation degree of each batch and its change trend. Based on the deformation field data, curve fitting techniques (such as polynomial fitting or Gaussian fitting) are used to extract the trend of local deformation. The variation law of the deformation of the region around the micro-holes with time is analyzed, and obvious changes in the deformation trend are identified, especially the deformation of the orifice edge. By comparing the deformation trends at different time points or under different stress conditions, the deformation trend of the local region is identified to determine whether it will cause changes in the orifice size or the generation of defects. The displacement vector field, the deformation field, and the aperture fluctuation data are integrated to form a feature matrix containing multi-dimensional data such as displacement, strain, and aperture fluctuation. Based on machine learning or statistical regression methods (such as support vector machines, random forests, or linear regression), a deformation trend prediction model is constructed using the integrated data. The inputs of the model are the displacement vector field, the deformation field, and the aperture fluctuation data, and the output is the predicted deformation trend. The model will learn the laws in the data to predict the future deformation trend. The deformation trend data extracted from the local deformation trend analysis is used as input and imported into the deformation trend prediction model. Through the inference of the model, the deformation prediction result based on the current data and trend is obtained. Based on the output of the model, a deformation trend prediction curve is generated.This curve represents the changing trend of the deformation of the future micro-hole region, helping engineers predict whether there will be changes in the orifice size or other defects.

[0045] Preferably, the recognition of the burr growth pattern for the micro-hole enhanced projection diagram of the circuit board through the deformation trend prediction curve in step S3 includes: Using the deformation trend prediction curve to determine the orifice edge position of the micro-hole enhanced projection image of the circuit board; Extracting the fractal dimension feature of the orifice edge according to the orifice edge position; Detecting the asymmetric growth pattern of the burrs on the orifice edge in the micro-hole enhanced projection diagram of the circuit board based on the fractal dimension feature, and calculating the Fourier descriptor of the asymmetric growth pattern of the burrs; Constructing a regression model between the burr evolution and the electroplating parameters; Integrating the deformation trend prediction, the fractal feature and the Fourier descriptor to recognize the burr growth pattern for the micro-hole enhanced projection diagram of the circuit board, and generating the burr growth pattern recognition data; Using the regression model to evaluate the burr risk level for the burr growth pattern recognition data, and generating the burr risk level evaluation diagram.

[0046] In the embodiments of the present invention, based on the aforementioned deformation trend prediction model, key data in the deformation trend curve is imported into the model to predict the position of the orifice edge and its deformation trend. According to the predicted deformation data of the orifice edge, the position of the orifice in the image is determined, which is usually defined by the significant change region in the deformation field. Perform local analysis on the deformation trend prediction curve to find the deformation mutation points of the orifice edge, and these points represent the position of the orifice. Mark the position of the orifice edge on the micro-hole enhanced projection map to provide a basis for subsequent feature extraction. Use fractal analysis methods (such as box counting method, fractal dimension calculation method) to process the extracted orifice edge region and calculate the fractal dimension of this edge. Evaluate the complexity of the orifice edge through the fractal dimension. If the fractal dimension is high, it indicates that the orifice edge has a relatively complex irregular shape, indicating the presence of burrs. Process the orifice edge image to extract its fractal features. The complexity of the edge is quantified by the fractal dimension value, and a higher dimension value is usually related to the complex shape of the burrs. Save the obtained fractal dimension feature data for subsequent pattern recognition. According to the extracted fractal dimension features, identify the asymmetry of the orifice edge. The growth of burrs usually shows irregular and asymmetric edge changes. Use morphological operations (such as edge detection, region filling, etc.) to further analyze the orifice edge and detect whether there is an asymmetric growth pattern of burrs. Apply the Fourier transform to the asymmetric shape of the orifice edge and calculate the Fourier descriptor. The Fourier descriptor is a tool for frequency analysis of the image edge shape and can accurately capture the subtle changes in the growth of burrs. Through the Fourier transform, extract the frequency domain features representing the asymmetric growth pattern of burrs to form the Fourier descriptor. Apply the Fourier descriptor to the recognition of the asymmetric growth pattern of the orifice edge. By analyzing the frequency domain features, further clarify the shape and pattern of the burr growth. Collect experimental data on different electroplating parameters (such as current density, electroplating time, temperature, etc.) and burr growth. Through the aforementioned burr growth pattern recognition data, obtain burr feature data related to electroplating parameters. Use regression analysis (such as linear regression, ridge regression, or polynomial regression) to construct a mathematical model between burr evolution and electroplating parameters. Fit the relationship between electroplating parameters and burr evolution through the model to predict the changes in burr growth patterns under different electroplating parameters. Integrate the deformation trend prediction curve, fractal dimension features, and Fourier descriptors to form a dataset containing multi-dimensional features. Use machine learning algorithms (such as support vector machines, decision trees, or random forests) to train the integrated data and establish a burr growth pattern recognition model. Identify the burr growth pattern in the micro-hole enhanced projection map of the circuit board through this model and generate burr growth pattern recognition data. Use the burr growth pattern recognition data as input and perform burr risk assessment on it using the regression model. Calculate the risk level of burrs under different conditions through the model. According to the regression relationship between burr evolution and electroplating parameters, evaluate the growth trend of burrs and the resulting quality problems.According to the risk assessment results, a risk level is assigned to each micro-hole area, usually divided into low risk, medium risk, and high risk.

[0047] Preferably, the micro-deposition trace tracking of the circuit board micro-holes using the burr risk level evaluation chart in step S3 includes: Identifying the copper layer edge area of the enhanced projection image of the circuit board micro-holes; Using the phase consistency edge detection technology to finely extract the copper layer edge to obtain the copper layer edge data; Analyzing the edge features of the copper layer edge data, and quantifying the copper layer deposition direction consistency of the copper layer edge data according to the edge features to obtain the deposition direction consistency quantification data; Detecting abnormal dendritic crystal patterns in the copper layer edge area based on the edge features to obtain abnormal deposition areas; Calculating the proportion of abnormal patterns in the abnormal deposition area to obtain the abnormal pattern proportion data; Integrating the deposition direction consistency quantification data and the abnormal pattern proportion data to obtain the copper plating deposition uniformity evaluation index.

[0048] In the embodiments of the present invention, by preprocessing the enhanced projection image of the micro-holes on the circuit board, noise is removed, contrast is enhanced, and the edge detection effect is ensured to be clearer. The histogram equalization or adaptive filtering method is used to improve the clarity of the image, making the edges of the copper layer easier to identify. Using image segmentation technology, the copper layer area is identified. The threshold segmentation method or the Canny edge detection method is used to find the edges of the copper layer. Determine the positions of the copper layer edges to provide an accurate area for subsequent fine extraction. Use the phase consistency edge detection method, which can effectively extract the edges with high contrast and clear structure in the image. By applying the phase consistency detection to the copper layer area, more detailed copper layer edge data can be extracted, avoiding the edge blur problem caused by traditional edge detection techniques. Fine extraction of the copper layer edges is performed to ensure that the resolution of the edges is high enough to analyze the consistency of the deposition direction. The obtained copper layer edge data will be used as the basis for subsequent analysis. Feature extraction is performed on the copper layer edge data to extract local features of the edges, such as curvature, edge density, etc. By quantifying these features, the deposition situation of the copper layer is analyzed, especially the consistency of the deposition direction. The direction consistency analysis method, such as the gray-level co-occurrence matrix (GLCM) or the local direction statistics method, is used to calculate the consistency of the copper layer deposition direction. A deposition direction consistency quantification data is obtained through quantification, which represents the regularity and uniformity of the copper layer deposition at the micro-hole edges. Image texture analysis technology is used to detect the dendritic crystal patterns existing in the copper layer edge area. Generally, dendritic crystals are caused by uneven local deposition, indicating deposition problems or quality defects. Morphological operations such as erosion and dilation are used, combined with texture analysis algorithms (such as wavelet transform, Gabor filtering, etc.) to identify abnormal dendritic crystals in the image. Based on the detected dendritic crystal patterns, abnormal deposition areas in the copper layer edges are identified, and these areas are usually related to the burr risk and uneven deposition. The abnormal deposition areas in the image are divided into regions, and the proportion of these abnormal regions in the overall copper layer area is calculated. Using morphological analysis methods, determine the total area of the abnormal patterns and compare it with the area of the entire copper layer to calculate the proportion data of the abnormal patterns. The proportion data of the abnormal patterns is statistically analyzed, and the occurrence frequency of the abnormal deposition patterns and their distribution in the copper layer are recorded. The deposition direction consistency quantification data and the proportion data of the abnormal patterns are integrated, and the directivity and uniformity of the deposition are comprehensively considered to obtain an overall evaluation of the copper plating deposition uniformity. A weighted average or a comprehensive scoring model is used to fuse these two data to ensure that the evaluation index can reflect both the deposition direction consistency and consider the influence of abnormal patterns. According to the integrated data, a copper plating deposition uniformity evaluation index is generated, which can comprehensively reflect the uniformity of the copper layer deposition and potential deposition problems.

[0049] As an example of the present invention, refer to Figure 3 shown. In this example, step S4 includes: Step S41: Decode the defect feature process of the circuit board micro-holes according to the micro-hole potential defect probability distribution map and the copper plating deposition uniformity evaluation index, and generate the copper plating defect feature data of the circuit board micro-holes; Step S42: Set the feature baseline for the copper plating defect feature data of the circuit board micro-holes based on the pre-stored historical quality qualified data, and use the feature baseline to perform quality inspection calculations on the copper plating defect feature data of the circuit board micro-holes to obtain the results of the quality inspection; Step S43: Construct a self-learning knowledge base based on the results of the quality inspection to perform the intelligent quality inspection operation of the copper plating of the circuit board micro-holes.

[0050] In the embodiments of the present invention, by combining the micropore potential defect probability distribution map and the copper plating deposition uniformity evaluation index, the copper plating process of the circuit board micropores is deeply analyzed. These two data sources are used to analyze potential defect areas and copper plating uniformity problems, and defect characteristics related to the production process are obtained. The defect positions of each micropore are provided in the potential defect probability distribution map, while the copper plating deposition uniformity evaluation index can provide a specific evaluation of the deposition uniformity. The combination of these two data helps to clarify which micropore copper plating processes need special attention. Specific defect characteristic data are extracted using the above decoding results. These data include the type, location, degree, and process reasons of the defects. Specifically, it includes the following: Defect type: such as burrs, uneven pore walls, insufficient electroplating deposition, etc. Defect location: Based on the specific coordinates of the micropores, the specific areas of the defects are marked. Defect severity: Based on the defect characteristics, the severity of the defects is quantified, such as the deviation of the electroplating thickness. These defect characteristic data are stored in a dedicated database or data structure to provide basic data for subsequent quality inspection and intelligent learning operations. The copper plating characteristics of the circuit board micropores that are known to be qualified are extracted from historical quality qualified data to form a set of standard "quality baseline" data. These data represent the typical characteristics of qualified products under various production conditions, such as the uniformity of the copper layer and the accuracy of the micropore diameter. According to historical data, a set of characteristic baselines are established, and thresholds or ranges are set for each defect characteristic. These characteristic baselines are reference standards for quality inspection, including: Copper plating uniformity baseline: For example, the fluctuation of the copper layer thickness does not exceed a certain percentage. Defect type baseline: Whether a specific type of defect affects the functionality of the product. Defect location and severity baseline: The criteria for evaluating the impact when a specific defect occurs in a critical area. Using the set characteristic baselines, the copper plating defect characteristic data of the circuit board micropores are compared with these baseline data to perform quality inspection calculations. The inspection algorithm can be based on methods such as the standard deviation comparison method, threshold judgment method, regression analysis method, etc., to automatically detect whether the qualified standard is met. According to the inspection results, an inspection conclusion is drawn: whether it meets the quality standard, whether rework or reprocessing is required. The final quality inspection result is generated, which includes the conclusion of whether it is qualified and any suggestions for repair or reprocessing. The results of the quality inspection are used as feedback information to continuously update and optimize the self-learning knowledge base. Through machine learning algorithms, combined with historical data and newly detected defect data, the accuracy of the knowledge base is gradually improved. Algorithms such as decision trees, support vector machines (SVMs), neural networks, etc. are used to enhance the intelligent judgment ability of the knowledge base through continuous training, optimization, and update. Through intelligent learning, the knowledge base can identify the potential impact of certain specific process parameters on the quality of micropore copper plating. For example, whether the uneven deposition of the copper layer is related to current fluctuations, or whether specific temperature changes lead to specific types of defects. The self-learning system continuously absorbs new data obtained during the production process and improves the prediction ability for future production data by continuously optimizing the model.Based on the continuously improved self-learning knowledge base, the system can automatically perform quality inspection on the microvia copper plating of printed circuit boards. When newly produced printed circuit boards enter the inspection process, the system automatically uses the updated knowledge base for defect identification and quality assessment, and puts forward suggestions for production optimization.

[0051] Preferably, step S42 includes: Setting a feature baseline for the microvia copper plating defect feature data of the printed circuit board based on pre-stored historical qualified quality data, where the average copper plating thickness is set at 8.0 μm, with an allowable deviation of ±0.3 μm; the upper limit of the thickness fluctuation coefficient is 5%; the standard deviation of the edge profile curvature is controlled within 0.05; the threshold of the defect area ratio does not exceed 0.2%; the tolerance of the average gray level is controlled within ±10 gray levels; the contrast coefficient requirement is not less than 0.8; the texture consistency index is set at 0.95; the limit of abnormal defect points is no more than 1 per 100 microvias; Using the feature baseline to perform quality inspection calculations on the microvia copper plating defect feature data of the printed circuit board to obtain the results of the quality inspection. The formula for the quality inspection calculation is as follows: ; In the formula, is the quality inspection result, is the defect distribution factor, is the deposition uniformity index, is the proportion of copper plating voids in the holes, is the burr risk level, is the deposition form deviation, is the defect distribution weight, is the deposition uniformity weight, is the weight of voids in the holes, is the burr risk weight, is the deposition form deviation weight.

[0052] In the embodiments of the present invention, based on the pre-stored historical qualified quality data, it is first necessary to set the feature baseline for the microvia copper plating defect feature data of the circuit board. The feature baseline is the qualified standard of the product, and quality inspection calculations are performed based on these standards. The specific settings are as follows: The target mean of copper plating is 8.0 μm, and the allowable deviation is ±0.3 μm. That is, the copper plating thickness should be between 7.7 μm and 8.3 μm. This feature ensures that the thickness of the copper layer meets the production requirements and avoids substandard electrical performance caused by uneven or too thin / too thick copper plating. The upper limit of the allowable fluctuation coefficient is 5%. That is, the thickness fluctuation of the copper plating layer should be controlled within the specified range, and excessive fluctuation affects the reliability of the circuit board. It is necessary to control the standard deviation of the edge profile curvature within 0.05. Excessive profile curvature results in irregular shapes at the edges of the microvias, affecting product quality. For copper plating defects, the proportion of the defect area should not exceed 0.2%. A proportion greater than this indicates significant defects in the product, and rejection is required. The tolerance of the gray level mean is controlled within the range of ±10 gray levels. The gray level mean is obtained through an image processing algorithm, representing the brightness of the copper plating area and reflecting the uniformity of the copper layer. The contrast coefficient is required to be not less than 0.8 to ensure the clarity of the image and the discernibility of details. The texture consistency index is set to 0.95. High consistency indicates uniform texture distribution of the copper plating layer, which helps to evaluate the uniformity of the copper plating layer. There should not be more than 1 abnormal defect point in every 100 microvias. This index is used to monitor the defect rate in mass production and ensure the consistency and reliability of the product. According to the feature baseline data, the following formula is used to perform quality inspection calculations on the microvia copper plating defect feature data of the circuit board: ; where, is the quality inspection result, is the defect distribution factor, is the deposition uniformity index, is the proportion of copper plating voids in the holes, is the burr risk level, is the deposition form deviation, is the defect distribution weight, is the deposition uniformity weight, is the weight of voids in the holes, is the burr risk weight, is the deposition form deviation weight. The higher the

[0053] value, the better the product quality; otherwise, it is unqualified. Therefore, in any aspect, the embodiments should be regarded as exemplary and non-limiting. The scope of the present invention is defined by the appended claims rather than the above description. Therefore, all changes falling within the meaning and scope of the equivalent elements of the application documents are intended to be encompassed by the present invention.

[0054] The above are only specific embodiments of the present invention, enabling those skilled in the art to understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to these embodiments shown herein, but rather to the broadest scope consistent with the principles and novel features invented herein.

Claims

1. A circuit board micro-via copper plating quality inspection method based on image recognition, characterized in that: The following steps are involved: Step S1: Setting a circular polarized light source array; Based on the circular polarized light source array, the micro-holes on the circuit board are photographed with dynamic depth of field fusion to obtain a two-dimensional projection image of the micro-holes on the circuit board; Perform sub-pixel edge enhancement on the two-dimensional projection image of microvias on the circuit board to generate an enhanced projection image of microvias on the circuit board; Step S2: segmenting the boundary of interest of the microvia enhanced projection image of the circuit board to obtain the boundary of the hole wall region of interest; extracting the texture features and color features of the boundary of the hole wall region of interest to perform micro-texture symbiotic feature analysis on the boundary of the hole wall region of interest to generate a probability distribution map of potential defects of the microvia; Step S3: Based on the DIC technology, the deformation field of the microvia enhanced projection image of the circuit board is quantitatively analyzed to generate a deformation trend prediction curve; the burr growth pattern of the microvia enhanced projection image of the circuit board is identified through the deformation trend prediction curve to generate a burr risk level assessment map; the microscopic deposition traces of the microvias of the circuit board are tracked using the burr risk level assessment map to generate a copper plating deposition uniformity evaluation index; Step S4: Perform comprehensive copper plating quality inspection on the microvias of the circuit board according to the microvia potential defect probability distribution map and the copper plating deposition uniformity evaluation index, and build a self-learning knowledge base based on the results of the quality inspection to perform intelligent inspection operations on the copper plating quality of microvias of the circuit board.

2. The circuit board microvia copper plating quality inspection method based on image recognition according to claim 1 is characterized in that: Step S1 includes the following steps: Step S11: Setting a circular polarized light source array; Step S12: photographing the initial light source image of the micro-holes of the circuit board through a circular polarized light source array to obtain an initial circuit board micro-hole light source image set; Step S13: synthesizing the initial circuit board micro-hole light source image set using the focal stacking technique to generate a two-dimensional projection image of the circuit board micro-holes; extracting the micro-hole inner wall depth information from the circuit board micro-hole synthesized image to obtain the micro-hole inner wall depth information; Step S14: performing sub-pixel edge positioning on the composite image of the microvias of the circuit board according to the microvia inner wall depth information, and constructing a hole wall contour gradient change curve according to the result of the sub-pixel positioning; performing local contour gradient interpolation on the composite image of the microvias of the circuit board through the hole wall contour gradient change curve to generate an enhanced projection image of the microvias of the circuit board.

3. The circuit board micro-via copper plating quality inspection method based on image recognition according to claim 2 is characterized in that: Step S11 includes: Set the number of light sources to 16 LEDs, arranged in a ring, with a diameter of 120mm, a wavelength of 660nm, an incident angle of 30°, polarizer angles of 0°, 45°, 90°, and 135°, an analyzer angle of 90°, polarization contrast ≥ 0.9, drive mode to constant current drive, brightness adjustment to 0-100%, polarization angle control mode to liquid crystal polarization adjustment, synchronous triggering of TTL signal, trigger delay ≤ 1ms.

4. The circuit board microvia copper plating quality inspection method based on image recognition according to claim 1 is characterized in that: Step S2 includes the following steps: Step S21: segmenting the boundary of interest of the microvia enhanced projection image of the circuit board to obtain the boundary of the hole wall region of interest; Step S22: construct a 3×3 to 7×7 multi-scale detection window; and use the multi-scale detection window to calculate the rotation-invariant uniform pattern of the boundary of the region of interest of the hole wall, and count the texture direction distribution histogram at each scale, so as to generate a texture feature evolution trend curve; Step S23: Calculate the chromaticity gradient of the boundary of the region of interest on the hole wall and generate a color map with direction marks; Step S24: performing defect feature association mining based on the texture feature evolution trend curve and the color map with direction marks to generate a micropore potential defect probability distribution map.

5. The circuit board micro-via copper plating quality inspection method based on image recognition according to claim 4 is characterized in that: Step S24 includes the following steps: Step S241: performing local texture change pattern analysis on the texture feature evolution trend curve to generate a texture trend feature matrix; Step S242: Separating characteristic color channels of different directions from the color map with direction marks to obtain a direction characteristic color matrix; Step S243: performing feature matching based on the texture trend feature matrix and the directional feature color matrix to obtain a feature correlation matrix of the potential defect area; Step S244: perform abnormal cluster point detection on the feature correlation matrix of the potential defect area to generate feature space abnormal cluster point data; calculate the abnormal cluster point ratio of the feature correlation matrix of the potential defect area based on the feature space abnormal cluster point data to obtain a potential defect probability distribution map.

6. The circuit board micro-via copper plating quality inspection method based on image recognition according to claim 1 is characterized in that: The deformation field quantitative analysis of the micro-hole enhancement projection image of the circuit board based on the DIC technology in step S3 includes: The DIC technology is used to calculate the partition of the micro-hole enhancement projection image of the circuit board, and the displacement vector field of the hole edge is obtained; The deformation field of the micro-hole enhancement projection image of the circuit board is constructed based on the displacement vector field to obtain the deformation distribution of the local area; Detect and count the batch-to-batch fluctuations in the aperture size of the micro-aperture enhancement projection of the circuit board to generate aperture fluctuation data; Identify the local deformation trend of the microvia enhancement projection map of the circuit board; Integrate displacement vector field, deformation field and aperture fluctuation data to build a deformation trend prediction model; The local deformation trend is imported into the deformation trend prediction model for trend prediction to generate a deformation trend prediction curve.

7. The circuit board micro-via copper plating quality inspection method based on image recognition according to claim 1 is characterized in that: The step S3 of identifying the burr growth pattern of the microvia enhancement projection image of the circuit board by using the deformation trend prediction curve includes: The deformation trend prediction curve is used to determine the hole edge position of the circuit board micro-hole enhancement projection image; Extract the fractal dimension features of the orifice edge according to the orifice edge position; Based on the fractal dimension feature, the asymmetric growth pattern of the burr at the hole edge in the enhanced projection image of the micro-hole of the circuit board is detected, and the Fourier descriptor of the asymmetric growth pattern of the burr is calculated; Construct a regression model between burr evolution and electroplating parameters; Integrate deformation trend prediction, fractal features and Fourier descriptors to identify burr growth patterns in microvia enhancement projection images of circuit boards and generate burr growth pattern recognition data; The regression model is used to evaluate the burr risk level of the burr growth pattern recognition data and generate a burr risk level assessment graph.

8. The circuit board micro-via copper plating quality inspection method based on image recognition according to claim 1 is characterized in that: The step S3 of tracking microscopic deposition traces of microvias on the circuit board using the burr risk level assessment map includes: Identify the copper layer edge area of ​​the circuit board microvia enhanced projection image; Phase consistency edge detection technology is used to finely extract the edge of the copper layer to obtain the edge data of the copper layer; Analyze the edge features of the copper layer edge data, and quantify the consistency of the copper layer deposition direction of the copper layer edge data according to the edge features to obtain deposition direction consistency quantified data; Detecting abnormal dendrite patterns in the edge region of the copper layer based on edge features to obtain abnormal deposition regions; Calculate the abnormal pattern ratio in the abnormal deposition area to obtain abnormal pattern ratio data; The deposition direction consistency quantitative data and abnormal pattern ratio data are integrated to obtain the copper plating deposition uniformity evaluation index.

9. The circuit board microvia copper plating quality inspection method based on image recognition according to claim 1, characterized in that: Step S4 includes the following steps: Step S41: Decoding the defect characteristics of the microvias on the circuit board according to the microvia potential defect probability distribution map and the copper plating deposition uniformity evaluation index to generate the circuit board microvia copper plating defect characteristic data; Step S42: setting a characteristic baseline for the circuit board microvia copper plating defect characteristic data based on the pre-stored historical quality qualified data, and performing quality inspection calculation on the circuit board microvia copper plating defect characteristic data using the characteristic baseline to obtain a quality inspection result; Step S43: constructing a self-learning knowledge base based on the quality inspection results to perform intelligent inspection of the quality of microvia copper plating on the circuit board.

10. The circuit board micro-via copper plating quality inspection method based on image recognition according to claim 9, characterized in that: Step S42 includes: The characteristic baseline of the micro-hole copper plating defect characteristic data of the circuit board is set based on the pre-stored historical quality qualified data, where the average copper plating thickness is set to 8.0μm, the allowable deviation is ±0.3μm; the upper limit of the thickness fluctuation coefficient is 5%; the standard deviation of the edge profile curvature is controlled within 0.05; the threshold of the defect area ratio does not exceed 0.2%; the grayscale mean tolerance is controlled within ±10 gray levels; the contrast coefficient is required to be not less than 0.8; the texture consistency index is set to 0.95; the number of abnormal defect points is limited to no more than 1 in every 100 micro-holes; The characteristic baseline is used to perform quality inspection calculation on the characteristic data of microvia copper plating defects on the circuit board to obtain the quality inspection result. The quality inspection calculation formula is as follows: ； In the formula, For quality inspection results, is the defect distribution factor, is the deposition uniformity index, is the ratio of copper-plated voids in the hole, is the burr risk level, is the sedimentation morphology deviation, is the defect distribution weight, is the deposition uniformity weight, is the hole weight, is the burr risk weight, is the sedimentary morphology deviation weight.

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