Static graph mode graph generation system and method supporting dynamic resolution

By building and optimizing the static graph mode graph generation system, it supports dynamic resolution graph generation, solving the problems of new tensor redundancy and long compilation time in multi-resolution image and video generation, and achieving efficient resource utilization and user experience improvement.

CN120563301AActive Publication Date: 2025-08-29BEIJING SILICONFLOW TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202510726263.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-06-03
Publication Date
2025-08-29
Estimated Expiration
2045-06-03

AI Technical Summary

Technical Problem

When the existing static graph mode graph generation system processes multiple images or videos with different resolutions, there are problems such as redundancy of new tensors and excessive compilation time, resulting in wasted computing and storage resources and affecting the user experience.

Method used

The static graph mode graph generation system that supports dynamic resolution is adopted to build, optimize and insert components of nodes to generate a reusable runtime execution plan, support collaborative computing of multiple devices, and perform offline compilation and parameter adaptive conversion to eliminate new tensor redundancy.

Benefits of technology

It effectively eliminates new tensor redundancy, reduces compilation time, improves the system's operating efficiency and user experience, and supports image and video generation tasks of different resolutions.

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Abstract

The invention relates to a static graph mode graph generation system supporting dynamic resolution. The system comprises an original logic diagram construction component which is used for constructing an original logic diagram by tracking original calculation logic by executing a construction function of a diagram aiming at a first specific diagram generation task; the logic diagram optimization component is used for forming a first logic diagram according to the constructed original logic diagram; the node insertion component is used for inserting communication nodes and runtime control nodes required by distributed calculation according to the first logic diagram, and generating a first runtime logic diagram for multi-device collaboration; the operation plan generation component is used for generating a first runtime execution plan based on the data dependency relationship of the first runtime logic diagram; and the runtime initialization component is used for initializing the runtime instance of the first specific diagram according to the first runtime execution plan so as to complete dynamic allocation of computing resources and configuration of an execution environment.
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Description

Technical Field

[0001] The present disclosure relates to the field of computer information processing, and in particular to a technical solution for supporting dynamic resolution in a static image pattern generation system and method. Background Art

[0002] Diffusion models are cutting-edge generative models that enable high-quality image and video generation by gradually restoring noisy images or videos to clear content. Based on a process called inverse diffusion, this technology simulates the diffusion of noise from data and infers the original data, generating realistic visual content. Diffusion models can be used to create stylized images, synthesize highly realistic video clips, and even generate virtual environments with complex scenes and details. Diffusion models not only demonstrate great potential in artistic creation but also play an important role in medical image generation, autonomous driving simulation, augmented reality, and other fields. Their unique generation mechanism enables them to capture and reproduce fine details and complex textures, providing a powerful tool for AI-driven visual creation.

[0003] Static graph acceleration technology is a key means of improving model training and inference efficiency in deep learning. Unlike dynamic graphs, static graphs have a fixed structure at computational graph definition, enabling global optimization and acceleration during execution. Leveraging compiler technology, static graph acceleration can perform optimizations such as operation fusion, constant folding, and subgraph segmentation, reducing redundant computation and memory accesses and significantly improving execution speed. TensorFlow, PyTorch's TorchScript, and NVIDIA's TensorRT are all typical static graph acceleration tools. Static graph acceleration is particularly important in large-scale deep learning tasks, effectively shortening training time and improving inference efficiency.

[0004] When using static graph acceleration technology to accelerate diffusion models, dynamic shapes must be supported. When generating diffusion models for images and videos, the resolutions of generated content (such as images) typically vary. For example, "Vertical (9:16)" corresponds to a resolution of "768x1344," "Square (1:1)" corresponds to a resolution of "1024x1024," and "Widescreen (16:9)" corresponds to a resolution of "1365x768."

[0005] Stable diffusion is a generative AI technology based on a diffusion model that generates high-quality images, videos, or animations based on text descriptions or image prompts. Its core approach is to transform random noise into visual content tailored to user needs through a "gradual denoising" process. As an open-source model, it allows developers to freely modify, optimize, and integrate it into other applications. In actual deployment, the stable diffusion task needs to support inference on multiple shapes (resolutions). Currently, this is implemented using a graph per resolution (shape). Using multiple graphs presents two issues. First, constant folding generates new tensors that are not shared across multiple graphs, resulting in unnecessary overhead. Constant folding is performed during compilation for each graph with different inputs but otherwise identical inputs. Constant folding computes constants unrelated to the inputs at compile time, eliminating the need for computation at runtime. This repeated compilation creates new tensors. If each graph generates its own new tensors, significant computational and storage redundancy occurs across multiple graphs. Another issue was the lengthy compilation process for multiple graphs during the launch of the service. This led to customer feedback regarding slow compilation times due to the weak CPUs on online machines. Consequently, customers preferred to load and use the graphs directly online after offline compilation. Because compilation is triggered using a prediction interface, the total time required for compiling nine graphs (6.5 seconds each, for a total of 58.5 seconds) and performing inference on nine inputs in StableDiffusionU-Net was approximately 150 seconds, resulting in long wait times.

[0006] Therefore, it is expected to eliminate the redundancy of new tensors for a large number of similar graph generation processes in the existing static graph mode graph generation system and to provide an offline compilation process.

[0007] The above information disclosed in this Background section is only for enhancement of understanding of the background of the present disclosure and therefore it may contain information that does not form the prior art that is already known to a person of ordinary skill in the art. Summary of the Invention

[0008] In view of this, the present disclosure provides a static image pattern generation system supporting dynamic resolution, which can at least eliminate the redundancy of new tensors.

[0009] Other features and advantages of the present disclosure will become apparent from the following detailed description, or may be learned in part by practice of the present disclosure.

[0010] According to one aspect of the present disclosure, a static graph pattern generation system supporting dynamic resolution is proposed, including: an original logic graph construction component, which generates a task for a first specific graph including a first input resolution attribute, and traces the original computing logic to construct an original logic graph by executing the graph construction function; a logic graph optimization component, which performs at least constant folding and automatic mixed precision processing on the constructed original logic graph to form a first logic graph; a node insertion component, which inserts communication nodes and runtime control nodes required for distributed computing on the first logic graph to generate a first runtime logic graph for multi-device collaboration; an operation plan generation component, which generates a first runtime execution plan based on the data dependency of the first runtime logic graph, and the first runtime execution plan at least includes the computing resource configuration ratio and execution order of each execution body, task scheduling strategy, memory reuse strategy and pipeline parallel strategy; and a runtime initialization component, which initializes the runtime instance of the first specific graph according to the first runtime execution plan to complete the dynamic allocation of computing resources and execution environment configuration.

[0011] According to the static graph pattern generation system supporting dynamic resolution disclosed in the present invention, when a second specific graph generation task containing a second input resolution attribute is received, the operation plan generation component modifies the first runtime execution plan into a second runtime execution plan corresponding to the second specific graph generation task based on the comparison difference between the second input resolution attribute and the first input resolution attribute and based on the data dependency relationship of the first runtime logical graph; and the runtime initialization component initializes the second specific graph runtime instance according to the second runtime execution plan to complete the dynamic allocation of computing resources and the configuration of the execution environment.

[0012] According to the static graph pattern generation system supporting dynamic resolution disclosed in the present invention, the operation plan generation component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task, and the execution plan only updates the differentiated logic graph part in the first runtime logic graph by comparing the second input resolution attribute with the first input resolution attribute, and enables parameter mirroring for the second specific graph generation task of the same hardware configuration, as well as parameter adaptive conversion for heterogeneous device environments.

[0013] According to the static graph pattern generation system supporting dynamic resolution disclosed herein, the runtime initialization component modifies the first runtime execution plan into a second runtime corresponding to a second specific graph generation task, and creates a second runtime execution plan having a shared memory area with the first runtime execution plan.

[0014] According to the static image pattern generation system supporting dynamic resolution disclosed in the present invention, the runtime initialization component detects the same sub-image structural features between two or more specific images when comparing the difference between the second input resolution attribute and the first input resolution attribute, verifies the compatibility of the device environment parameters with the first specific image, and receives the parameter inheritance instruction specified by the user.

[0015] According to another aspect of the present disclosure, a method for generating a static graph pattern that supports dynamic resolution is provided, including: using an original logic graph construction component to generate a task for a first specific graph containing a first input resolution attribute, and by executing the graph construction function, tracing the original computing logic to construct the original logic graph; using a logic graph optimization component to perform at least constant folding and automatic mixed precision processing on the constructed original logic graph to form a first logic graph; using a node insertion component to insert communication nodes and runtime control nodes required for distributed computing into the first logic graph to generate a first runtime logic graph for multi-device collaboration; using an operation plan generation component to generate a first runtime execution plan based on the data dependency of the first runtime logic graph, the first runtime execution plan at least including the computing resource configuration ratio and execution order of each execution body, task scheduling strategy, memory reuse strategy and pipeline parallel strategy; and using a runtime initialization component to initialize the first specific graph runtime instance according to the first runtime execution plan to complete the dynamic allocation of computing resources and execution environment configuration.

[0016] According to the static graph pattern generation method supporting dynamic resolution disclosed in the present invention, when a second specific graph generation task containing a second input resolution attribute is received, the operation plan generation component modifies the first runtime execution plan into a second runtime execution plan corresponding to the second specific graph generation task based on the comparison difference between the second input resolution attribute and the first input resolution attribute and based on the data dependency relationship of the first runtime logical graph; and the runtime initialization component initializes the second specific graph runtime instance according to the second runtime execution plan to complete the dynamic allocation of computing resources and the configuration of the execution environment.

[0017] According to the static graph pattern generation method supporting dynamic resolution disclosed in the present invention, wherein the operation plan generation component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task, the execution plan only updates the differentiated logic graph part in the first runtime logic graph by comparing the second input resolution attribute with the first input resolution attribute, and enables parameter mirroring for the second specific graph generation task of the same hardware configuration, as well as parameter adaptive conversion for heterogeneous device environments.

[0018] According to the static graph pattern generation method supporting dynamic resolution disclosed in the present invention, the runtime initialization component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task, and creates a second runtime execution plan having a shared memory area with the first runtime execution plan.

[0019] According to the method for generating a static image pattern supporting dynamic resolution disclosed in the present invention, the runtime initialization component detects the same sub-image structural features between two or more specific images when comparing the difference between the second input resolution attribute and the first input resolution attribute, verifies the compatibility of the device environment parameters with the first specific image, and receives the parameter inheritance instruction specified by the user.

[0020] According to the static graph pattern generation system and method supporting dynamic resolution disclosed in the present invention, the entire optimized graph structure can be reused by not changing the reasoning logic based on the graph resolution (shape). Since only the changed resolution and attributes need to be adjusted, a large amount of repeated compilation time can be saved and the result of video memory reuse can be achieved. Therefore, the traditional hybrid static graph pattern generation method is split into multiple stages that can be called independently, so that the generation and processing of graphs of different resolutions can share a large amount of results of the previous stage, so that the later stage of static graph pattern generation can compile for a specific graph based on the shared previous stage, eliminating the redundancy of new tensors. More importantly, since the compilation for the first specific graph can be compiled offline, the waiting time for online compilation is eliminated, providing users with a good user experience.

[0021] It should be understood that the foregoing general description and the following detailed description are exemplary only and are not restrictive of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] The above and other objects, features and advantages of the present disclosure will become more apparent by describing in detail exemplary embodiments thereof with reference to the accompanying drawings. The drawings described below are only some embodiments of the present disclosure, and it is obvious to those skilled in the art that other drawings can be derived from these drawings without inventive effort.

[0023] Figure 1 FIG. 4 is a block diagram showing an embodiment of a static image pattern generation system supporting dynamic resolution according to the present disclosure, according to an exemplary embodiment.

[0024] Figure 2 The figure is a flowchart of a method for generating a static image pattern supporting dynamic resolution according to the present disclosure, according to an exemplary embodiment. DETAILED DESCRIPTION

[0025] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be embodied in many forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the example embodiments to those skilled in the art. Like reference numerals in the drawings represent like or similar parts, and thus repetitive description thereof will be omitted.

[0026] In addition, the described features, structures or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, many specific details are provided to provide a full understanding of the embodiments of the present disclosure. However, those skilled in the art will appreciate that the technical solutions of the present disclosure can be practiced without one or more of the specific details, or other methods, components, devices, steps, etc. can be adopted. In other cases, well-known methods, devices, implementations or operations are not shown or described in detail to avoid blurring various aspects of the present disclosure.

[0027] The block diagrams shown in the accompanying drawings are merely functional entities and do not necessarily correspond to physically separate entities. That is, these functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different networks and / or processor devices and / or microcontroller devices.

[0028] The flowcharts shown in the accompanying drawings are for illustrative purposes only and do not necessarily include all contents and operations / steps, nor must they be executed in the order described. For example, some operations / steps may be decomposed, while others may be combined or partially combined. Therefore, the actual execution order may vary depending on the actual situation.

[0029] It should be understood that although the terms first, second, third, etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one component from another. Thus, the first computing device discussed below can be referred to as the second computing device without departing from the teachings of the present disclosure. As used herein, the term "and / or" includes any one and all combinations of one or more of the associated listed items.

[0030] Those skilled in the art will understand that the drawings are merely schematic diagrams of example embodiments, and the modules or processes in the drawings are not necessarily necessary for implementing the present disclosure, and therefore cannot be used to limit the scope of protection of the present disclosure.

[0031] Figure 1 yes Figure 1 FIG. 1 is a block diagram of an embodiment of a static image pattern generation system 100 supporting dynamic resolution according to the present disclosure, according to an exemplary embodiment. Figure 1As shown, the static graph pattern generation system 100 supporting dynamic resolution includes: an original logic graph construction component 110, a logic graph optimization component 120, a node insertion component 130, an operation plan generation component 140, and a runtime initialization component 150. This is to avoid regenerating new tensors due to constant folding in the subsequent graph generation process of different resolutions. The traditional hybrid static graph pattern generation method is split into multiple stages that can be called independently, so that the generation process of graphs of different resolutions can largely share the results of the previous stages, so that the later stages of static graph pattern generation can compile for specific graphs based on the shared previous stages, eliminating the redundancy of new tensors.

[0032] Specifically, for the first first specific graph generation task, the original logic graph construction component 110, for the first specific graph generation task including the first input resolution attribute, traces the original calculation logic to construct the original logic graph by executing the graph construction function. Specifically, when the static graph pattern generation system 100 runs to the build function, the system scans the deep learning model code you wrote (such as PyTorch or TensorFlow code) line by line. At this time, the calculation is not actually performed, but the connection relationship and parameter settings of each operation step are recorded to form the original logic graph of the first specific graph generation task. This process mainly includes establishing a flowchart of the calculation steps, labeling dynamically changing parameters (such as image resolution) to facilitate subsequent processing, and locking the operation type and connection method of each step to avoid errors caused by temporary structure modifications at runtime. Tracing the original computational logic involves simulating a complete run of the computational steps. This involves determining parameter dimensions, such as whether the convolution kernel size is 3x3 or 5x5; data flow: marking the input and output ports of each computation node; and dynamic marking: adding a question mark to parameters that vary (such as image size) to indicate that they will be filled in later. (For example, if the output size of a layer changes based on the input image size, the diagram will be annotated with [?,256] (the question mark represents a dynamic dimension), providing an entry point for subsequent sharing. Therefore, the core purpose of this step is to generate a complete instructional manual for the computational steps, annotating all key information and providing entry points for modifying variable parameters. This allows for flexible adjustments later (such as switching from a 128x128 image to a 512x512 image) and helps identify structural inconsistencies in advance (such as when the output size of a layer cannot be used as the input of the next layer). For example, when deep learning model code contains the conv and relu operations, the construction function will mark these operations and record their connections. This construction process can be performed in the usual way and will not be detailed here.

[0033] Subsequently, the logic graph optimization component 120 performs at least constant folding and automatic mixed precision processing on the constructed original logic graph to form a first logic graph. Specifically, this involves rewriting and optimizing the original logic graph to generate an optimized logic graph. As previously mentioned, constant folding calculates constants unrelated to the input at compile time, eliminating the need for computation at runtime. This optimization reduces runtime overhead. Automatic mixed precision also reduces computational effort. Automatic mixed precision is a deep learning training optimization technique that intelligently mixes floating-point numbers of different precisions (such as FP16 and FP32) and automatically selects FP16 / FP32 computing mode based on hardware computing power. This improves training efficiency and reduces video memory usage while maintaining model accuracy. Using constant folding and automatic mixed precision optimization strategies, the operator topology of the original logic graph is rewritten, resulting in a 20%-40% reduction in memory usage. The optimization process can also merge convolutional layers and activation function nodes based on operator fusion rules, optimize memory access paths using tensor slicing, optimize operator fusion of static graph topology, and optimize memory access patterns based on hardware characteristics.

[0034] The node insertion component 130 inserts the communication nodes and runtime control nodes required for distributed computing into the first logic diagram to generate a first runtime logic diagram for multi-device collaboration. In layman's terms, this is to complete the optimized logic diagram and generate a runtime logic diagram. For example, it inserts special ops required for oneflow runtime execution, AllReduce nodes related to the NCCL communication protocol, and adds IO control nodes for data loading and result output, such as Tick control nodes for coordinating execution timing. This insertion process is performed based on needs. Through this process, a runnable logic diagram is formed. Completing the optimized logic diagram can also be used for NCCL communication node groups for multi-card data synchronization, Tick / Tock node pairs that control the execution timing of the computing flow, and DMA control nodes for CPU-GPU data transfer.

[0035] When receiving the second specific graph generation task containing the second input resolution attribute, the operation plan generation component 140 modifies the first runtime execution plan into a second runtime execution plan corresponding to the second specific graph generation task based on the comparison difference between the second input resolution attribute and the first input resolution attribute and based on the data dependency relationship of the first runtime logical graph; and the runtime initialization component initializes the second specific graph runtime instance according to the second runtime execution plan to complete the dynamic allocation of computing resources and execution environment configuration.

[0036] The operation plan generation component 140 modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task. The execution plan only updates the differentiated logic graph part in the first runtime logic graph by comparing the second input resolution attribute with the first input resolution attribute, and enables parameter mirroring for the second specific graph generation task with the same hardware configuration, as well as parameter adaptive conversion for heterogeneous device environments.

[0037] Subsequently, the operation plan generation component 140 generates a first runtime execution plan based on the data dependency of the first runtime logic graph. The first runtime execution plan includes at least the computing resource configuration ratio and execution order of each execution body, task scheduling strategy, memory reuse strategy and pipeline parallel strategy. For example, it can also include determining the execution priority based on DAG topological sorting, load balancing distribution according to the computing power of the device, and generating a resource allocation table including a memory reuse strategy. When generating the first runtime execution plan, it can also support a priority queue for preemptive scheduling of tasks based on a flexible memory allocation table with dynamic resolution parameters, and record a topology profile of the communication bandwidth between devices.

[0038] Finally, the runtime initialization component 150 initializes the first specific graph runtime instance according to the first runtime execution plan, completing the dynamic allocation of computing resources and configuration of the execution environment. In simple terms, this component parses the device allocation instructions in the execution plan, initializes the distributed communication group, dynamically allocates GPU memory resources according to the execution plan, establishes a cross-device communication link group, pre-allocates memory buffers and establishes pipeline execution channels, and completes the deployment of the computation graph in a heterogeneous hardware environment.

[0039] The runtime initialization component 150 modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task, and creates the second runtime execution plan having a shared memory area with the first runtime execution plan. When comparing the difference between the second input resolution attribute and the first input resolution attribute, the runtime initialization component 150 detects identical subgraph structural features between two or more specific graphs, verifies the compatibility of the device environment parameters with the first specific graph, and receives a parameter inheritance instruction specified by the user.

[0040] In summary, since the execution plan generation component 140 and the runtime initialization component 150 can directly execute graph generation based on input parameters during subsequent graph generation, the static graph generation system 100 can re-infer the blob desc based on the new input resolution (input shape). Specifically, when the input data size changes (e.g., an image changes from 256x256 to 512x512), the system automatically recalculates the memory specifications (blob descriptions) of the relevant data containers to ensure that they can accommodate the new data size. This involves constructing a dimensionally parameterized symbolic tensor representation system, establishing a dynamic shape inference rule base at compile time, and dynamically adjusting the memory allocation strategy based on the input data at runtime. In short, the system shares the constant folding parameters in the optimized logic graph of the first specific graph generation task; inherits the AMP mixed-precision configuration strategy of the first specific graph generation task; and reuses the already inserted runtime node topology. During the sharing process, only the differentiated logical graph portions are updated through version comparison; parameter mirroring is enabled for graphs with the same hardware configuration; and parameter adaptive conversion is performed for heterogeneous device environments.

[0041] Figure 2 FIG is a flow chart of a method for generating a static image pattern supporting dynamic resolution according to the present disclosure, according to an exemplary embodiment. Figure 2As shown, at step S210, the original logic graph construction component 110 is used to generate the first specific graph containing the first input resolution attribute, and by executing the graph construction function, the original calculation logic is traced to construct the original logic graph. Specifically, when the static graph pattern generation system 100 runs to the build function, the system scans the deep learning model code you wrote (such as PyTorch or TensorFlow code) line by line. At this time, the calculation is not actually performed, but the connection relationship and parameter settings of each operation step are recorded to form the original logic graph of the first specific graph generation task. This process mainly includes establishing a flowchart of the calculation steps, labeling dynamically changing parameters (such as image resolution) to facilitate subsequent processing, and locking the operation type and connection method of each step to avoid errors caused by temporary modifications to the structure at runtime. Tracing the original computational logic involves simulating a complete run of the computational steps. This involves determining parameter dimensions, such as whether the convolution kernel size is 3x3 or 5x5; data flow: marking the input and output ports of each computation node; and dynamic marking: adding a question mark to parameters that vary (such as image size) to indicate that they will be filled in later. (For example, if the output size of a layer changes based on the input image size, the diagram will be annotated with [?, 256] (? represents dynamic dimensions), providing an entry point for subsequent sharing.) Therefore, the core purpose of this step is to generate a complete instructional manual for the computational steps, annotating all key information and providing entry points for modifying variable parameters. This allows for flexible adjustments later (such as switching from a 128x128 image to a 512x512 image) and helps identify structural inconsistencies in advance (such as when the output size of a layer cannot be used as the input of the next layer). For example, when deep learning model code contains the conv and relu operations, the construction function will mark these operations and record their connections. This construction process can be performed using conventional methods and will not be detailed here.

[0042] Subsequently, at step S220, the logic graph optimization component 120 performs at least constant folding and automatic mixed precision processing on the constructed original logic graph to form a first logic graph. Specifically, the original logic graph is rewritten and optimized to generate an optimized logic graph. As previously mentioned, constant folding calculates constants unrelated to the input at compile time, eliminating the need for computation at runtime. This optimization reduces runtime overhead. Automatic mixed precision is also a means of reducing computational complexity. Automatic mixed precision is a deep learning training optimization technique that intelligently mixes floating-point numbers of different precisions (such as FP16 and FP32) and automatically selects FP16 / FP32 computing mode based on hardware computing power, improving training efficiency and reducing video memory usage while maintaining model accuracy. Using constant folding optimization and automatic mixed precision optimization strategies, the operator topology of the original logic graph is rewritten, resulting in a 20%-40% reduction in memory usage. The optimization process can also merge convolutional layers and activation function nodes based on operator fusion rules, optimize memory access paths using tensor slicing technology, perform operator fusion optimization on static graph topology structures, and optimize memory access patterns based on hardware characteristics.

[0043] Then, at step S230, the node insertion component 13030 inserts the communication nodes and runtime control nodes required for distributed computing into the first logic diagram to generate a first runtime logic diagram for multi-device collaboration. In layman's terms, it is to complete the optimization logic diagram and generate a runtime logic diagram, such as inserting special ops required for oneflow runtime execution, AllReduce nodes related to the NCCL communication protocol, adding IO control nodes for data loading and result output, etc., such as Tick control nodes for coordinating execution timing. This insertion process is carried out based on needs. Through this process, a logical diagram that can be run is formed. Completing the optimization logic diagram can also be used for NCCL communication node groups for multi-card data synchronization, Tick / Tock node pairs that control the execution timing of the calculation flow, and DMA control nodes for CPU-GPU data transfer.

[0044] Subsequently, at step S240, the operation plan generation component 140 generates a first runtime execution plan based on the data dependency of the first runtime logic graph. The first runtime execution plan includes at least the computing resource configuration ratio and execution order of each execution body, task scheduling strategy, memory reuse strategy and pipeline parallel strategy. For example, it can also include determining the execution priority based on DAG topological sorting, load balancing distribution according to the computing power of the device, and generating a resource allocation table including a memory reuse strategy. When generating the first runtime execution plan, it can also support a priority queue for preemptive scheduling of tasks based on a flexible memory allocation table with dynamic resolution parameters, and record a topology profile of the communication bandwidth between devices.

[0045] Finally, at step S250, runtime initialization component 150 initializes the first specific graph runtime instance according to the first runtime execution plan, completing the dynamic allocation of computing resources and configuration of the execution environment. In simple terms, this involves parsing the device allocation instructions in the execution plan, initializing the distributed communication group, dynamically allocating GPU memory resources according to the execution plan, establishing a cross-device communication link group, pre-allocating memory buffers and establishing pipeline execution channels, and finally deploying the computation graph in a heterogeneous hardware environment.

[0046] Finally, if there is a new graph generation task, the process returns to step S240 for execution until all graph generation tasks are completed.

[0047] In summary, according to the static graph pattern generation system and method supporting dynamic resolution disclosed in the present invention, the entire optimized graph structure can be reused by not changing the reasoning logic based on the graph resolution (shape). Since only the changed resolution and attributes need to be adjusted, a large amount of repeated compilation time can be saved and the result of video memory reuse can be achieved. Therefore, the traditional hybrid static graph pattern generation method is split into multiple stages that can be called independently, so that the generation and processing of graphs of different resolutions can share a large amount of results of the previous stage, so that the later stage of static graph pattern generation can compile for a specific graph based on the shared previous stage, eliminating the redundancy of new tensors. More importantly, since the compilation for the first specific graph can be compiled offline, the waiting time for online compilation is eliminated, providing users with a good user experience.

[0048] Those skilled in the art will appreciate that the modules described above can be distributed in the device according to the description of the embodiment, or can be modified accordingly to be used in one or more devices that are different from the embodiment. The modules of the above embodiment can be combined into one module or further divided into multiple submodules.

[0049] Through the description of the above embodiments, it will be readily understood by those skilled in the art that the example embodiments described herein can be implemented via software or via a combination of software and necessary hardware. Therefore, the technical solutions according to the embodiments of the present disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, or mobile hard drive) or on a network and includes several instructions for enabling a computing device (such as a personal computer, server, mobile terminal, or network device) to execute the methods according to the embodiments of the present disclosure.

[0050] While the exemplary embodiments of the present disclosure have been specifically illustrated and described above, it should be understood that the present disclosure is not limited to the detailed structures, configurations, or implementations described herein; rather, the present disclosure is intended to encompass various modifications and equivalent configurations within the spirit and scope of the appended claims.

Claims

1. A static image pattern generation system supporting dynamic resolution, comprising: An original logic graph construction component generates a task for a first specific graph including a first input resolution attribute, and traces the original calculation logic to construct an original logic graph by executing a graph construction function; A logic graph optimization component performs at least constant folding and automatic mixed precision processing on the constructed original logic graph to form a first logic graph; A node insertion component inserts communication nodes and runtime control nodes required for distributed computing into the first logic diagram to generate a first runtime logic diagram for multi-device collaboration; An operation plan generation component generates a first runtime execution plan based on the data dependency of the first runtime logic graph, wherein the first runtime execution plan at least includes the computing resource configuration ratio and execution order of each execution body, the task scheduling strategy, the memory reuse strategy, and the pipeline parallel strategy; as well as The runtime initialization component initializes the first specific graph runtime instance according to the first runtime execution plan, and completes the dynamic allocation of computing resources and the configuration of the execution environment.

2. The static image pattern generation system supporting dynamic resolution according to claim 1, wherein: When receiving a second specific graph generation task containing a second input resolution attribute, the operation plan generation component modifies the first runtime execution plan into a second runtime execution plan corresponding to the second specific graph generation task based on the comparison difference between the second input resolution attribute and the first input resolution attribute and based on the data dependency relationship of the first runtime logical graph; and the runtime initialization component initializes the second specific graph runtime instance according to the second runtime execution plan to complete the dynamic allocation of computing resources and execution environment configuration.

3. The static image pattern generation system supporting dynamic resolution according to claim 2, wherein: The operation plan generation component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task. The execution plan only updates the differentiated logic graph part in the first runtime logic graph by comparing the second input resolution attribute with the first input resolution attribute, and enables parameter mirroring for the second specific graph generation task with the same hardware configuration, as well as parameter adaptive conversion for heterogeneous device environments.

4. The static image pattern generation system supporting dynamic resolution according to claim 2, wherein: The runtime initialization component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task, and creates the second runtime execution plan having a shared memory area with the first runtime execution plan.

5. The static image pattern generation system supporting dynamic resolution according to claim 2, wherein: The runtime initialization component detects identical sub-graph structural features between two or more specific graphs when comparing the difference between the second input resolution attribute and the first input resolution attribute, verifies the compatibility of the device environment parameter with the first specific graph, and receives a parameter inheritance instruction specified by a user.

6. A method for generating a static image pattern supporting dynamic resolution, comprising: Generate a task for a first specific graph including a first input resolution attribute by constructing a component using an original logic graph, and trace the original calculation logic to construct an original logic graph by executing a construction function of the graph; By means of a logic graph optimization component, at least constant folding and automatic mixed precision processing are performed on the constructed original logic graph to form a first logic graph; Inserting communication nodes and runtime control nodes required for distributed computing into the first logic diagram through a node insertion component to generate a first runtime logic diagram for multi-device collaboration; Generate a first runtime execution plan based on the data dependency of the first runtime logic graph through the execution plan generation component, wherein the first runtime execution plan at least includes the computing resource configuration ratio and execution order of each execution body, the task scheduling strategy, the memory reuse strategy, and the pipeline parallel strategy; as well as The runtime initialization component is used to initialize the first specific graph runtime instance according to the first runtime execution plan, thereby completing the dynamic allocation of computing resources and the configuration of the execution environment.

7. The method for generating a static image pattern supporting dynamic resolution according to claim 6, wherein: When receiving a second specific graph generation task containing a second input resolution attribute, the operation plan generation component modifies the first runtime execution plan into a second runtime execution plan corresponding to the second specific graph generation task based on the comparison difference between the second input resolution attribute and the first input resolution attribute and based on the data dependency relationship of the first runtime logical graph; and the runtime initialization component initializes the second specific graph runtime instance according to the second runtime execution plan to complete the dynamic allocation of computing resources and execution environment configuration.

8. The method for generating a static image pattern supporting dynamic resolution according to claim 7, wherein: The operation plan generation component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task. The execution plan only updates the differentiated logic graph part in the first runtime logic graph by comparing the second input resolution attribute with the first input resolution attribute, and enables parameter mirroring for the second specific graph generation task with the same hardware configuration, as well as parameter adaptive conversion for heterogeneous device environments.

9. The method for generating a static image pattern supporting dynamic resolution according to claim 7, wherein: The runtime initialization component modifies the first runtime execution plan into a second runtime corresponding to the second specific graph generation task, and creates the second runtime execution plan having a shared memory area with the first runtime execution plan.

10. The method for generating a static image pattern supporting dynamic resolution according to claim 7, wherein: The runtime initialization component detects identical sub-graph structural features between two or more specific graphs when comparing the difference between the second input resolution attribute and the first input resolution attribute, verifies the compatibility of the device environment parameter with the first specific graph, and receives a parameter inheritance instruction specified by a user.

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