Display device, method of driving display device, and electronic device

By dividing the display unit into sub-blocks of different areas and using a temperature determiner to predict the temperature in units of blocks, the problem of display quality degradation caused by temperature errors around the driver is solved, achieving higher display accuracy and quality.

CN120690120APending Publication Date: 2025-09-23SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202510301614.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-03-21
Filing Date
2025-03-14
Publication Date
2025-09-23

AI Technical Summary

Technical Problem

Temperature errors around the driver in a display unit lead to degradation of display quality, and it is difficult to effectively minimize such errors with existing technologies.

Method used

The display unit is divided into a plurality of blocks, including a first sub-block adjacent to the driver and a second sub-block spaced apart from the driver, and the temperature is predicted in units of blocks by a temperature determiner, wherein the area of ​​the first sub-block is smaller than that of the second sub-block, and the area gradually increases as the distance from the driver increases.

Benefits of technology

Improves display quality, accurately detects the temperature of the area around the driver, and reduces temperature errors.

✦ Generated by Eureka AI based on patent content.

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Abstract

According to an embodiment of the present disclosure, a display device, a method of driving the display device, and an electronic device are provided. The display device includes: a display unit including pixels connected to data lines and scan lines, and including a plurality of blocks divided into each including two or more of the pixels; at least one driver for driving the display unit; and a temperature determiner for predicting a temperature of the display unit in units of blocks, the blocks including a first block including a first sub-block arranged adjacent to the driver and a second block including a second sub-block arranged spaced apart from the driver, and an area of each of the first sub-blocks is different from an area of each of the second sub-blocks.
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Description

[0001] This application claims priority to and all benefits derived from Korean Patent Application No. 10-2024-0039116, filed on March 21, 2024, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to a display device, a method of driving a display device, and an electronic device. Background Art

[0003] The display device includes a timing controller, a data driver, a display unit, etc., and the display unit includes one or more pixels. The pixels can display a predetermined image, and the timing controller and the data driver can be drivers for controlling the pixels.

[0004] The driver may be positioned adjacent to or overlapping the display unit, and the temperature of a portion of the display unit adjacent to the driver may be higher than that of other portions. That is, the temperature of the display unit may be set differently depending on the location of the driver. Therefore, a method for minimizing temperature errors when determining the temperature of the display unit is needed. Summary of the Invention

[0005] A feature of the present disclosure is to provide a display device that minimizes a temperature error in a display unit around a driver, a method of driving the display device, and an electronic device.

[0006] A feature of the present disclosure is to provide a display device, a method of driving the display device, and an electronic device that can improve display quality by minimizing a temperature error in a display unit.

[0007] According to an embodiment of the present disclosure, a display device includes: a display unit including pixels connected to data lines and scan lines, and including a plurality of blocks each including two or more of the pixels; at least one driver for driving the display unit; and a temperature determiner for predicting the temperature of the display unit on a block-by-block basis. The blocks include a first block including a first sub-block arranged adjacent to the driver and a second block including a second sub-block arranged spaced apart from the driver. The area of ​​each of the first sub-blocks is different from the area of ​​each of the second sub-blocks.

[0008] According to an embodiment, an area of ​​each of the first sub-blocks is smaller than an area of ​​each of the second sub-blocks.

[0009] According to an embodiment, the area of ​​the first sub-block gradually increases as the distance from the driver increases.

[0010] According to an embodiment, the display unit is divided into a plurality of horizontal lines and a plurality of vertical lines corresponding to the disposition of the first sub-block and the second sub-block.

[0011] According to an embodiment, the first sub-blocks arranged in the same horizontal line or the same vertical line have the same area.

[0012] According to an embodiment, the area of ​​the first sub-block gradually increases as the distance from the driver increases.

[0013] According to an embodiment, the driver is provided at an upper side or a lower side of the display unit, and the first sub-block is arranged in at least one horizontal line adjacent to the driver among the plurality of horizontal lines.

[0014] According to an embodiment, the driver is provided on the left or right side of the display unit, and the first sub-block is arranged in at least one vertical line adjacent to the driver among the plurality of vertical lines.

[0015] According to an embodiment, the driver overlaps the display unit, and the first sub-block is arranged at an intersection of at least one horizontal line and at least one vertical line overlapping the driver among the plurality of horizontal lines and the plurality of vertical lines.

[0016] According to an embodiment, the plurality of first sub-blocks are arranged adjacent to the driver, and areas of the first sub-blocks are the same.

[0017] According to an embodiment, the plurality of first sub-blocks are arranged adjacent to the driver, and areas of the first sub-blocks gradually increase as distances from the driver increase.

[0018] According to an embodiment, the display device may further include: at least one data integrated circuit for driving the data lines; a scan driver for driving the scan lines; and a timing controller that controls the data integrated circuit and the scan driver and includes a temperature determiner.

[0019] According to an embodiment, a driver includes at least one of a data integrated circuit, a scan driver, and a timing controller.

[0020] According to an embodiment, a temperature determiner includes: a temperature calculator for generating a temperature of a display unit by calculating temperatures of a first sub-block and a second sub-block included in the display unit in response to a temperature prediction value of a driver; and a memory for providing position information and area information of the first sub-block and the second sub-block to the temperature calculator.

[0021] According to an embodiment, the temperature determiner further includes: a voltage determiner for generating voltage data including voltage information corresponding to a grayscale level of the input data; and a temperature predictor for generating a temperature prediction value using the voltage data.

[0022] According to an embodiment of the present disclosure, a method for driving a display device includes dividing a display unit of the display device into a plurality of blocks for determining a temperature of the display unit; determining the temperature of the blocks in response to input data; and displaying an image corresponding to the input data on the display unit using at least one driver. The blocks include at least one first sub-block arranged adjacent to the driver and at least one second sub-block arranged spaced apart from the driver, and the first sub-block and the second sub-block have different areas.

[0023] According to an embodiment, the area of ​​the first sub-block is smaller than the area of ​​the second sub-block.

[0024] According to an embodiment, the block includes a plurality of first sub-blocks, and areas of the first sub-blocks gradually increase as distances from the driver increase.

[0025] According to an embodiment of the present disclosure, an electronic device includes: a display module including a display panel for displaying an image and at least one driver for driving the display panel; and a processor for controlling the display module. The display panel is divided into a plurality of blocks for determining a temperature, and an area of ​​a first sub-block arranged adjacent to the driver in the block is different from an area of ​​a second sub-block arranged spaced apart from the driver in the block.

[0026] According to an embodiment, the area of ​​the first sub-block is smaller than the area of ​​the second sub-block.

[0027] The features of the present disclosure are not limited to the features described above, and other technical features not described will be clearly understood by those skilled in the art from the following description.

[0028] According to the display device, method for driving the display device, and electronic device according to embodiments of the present disclosure, the area of ​​a block adjacent to the driver can be set to be smaller than the area of ​​a block spaced apart from the driver, and the temperature of the display unit can be determined on a per-block basis. In this case, even if the temperature of the driver increases, the temperature of the area surrounding the driver can be detected more accurately, thereby improving display quality.

[0029] However, the effects of the present disclosure are not limited to the above-described effects, and can be variously extended to the extent that they do not depart from the spirit and scope of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] The above and other features of the present disclosure will become more apparent by describing in further detail embodiments of the present disclosure with reference to the accompanying drawings.

[0031] Figure 1 and Figure 2 is a diagram illustrating a display device according to an embodiment of the present disclosure.

[0032] Figure 3 is a block diagram illustrating a temperature determiner according to an embodiment of the present disclosure.

[0033] Figure 4 is a diagram illustrating an embodiment of blocks included in a display unit.

[0034] Figure 5 is a block diagram illustrating a temperature determiner according to an embodiment of the present disclosure.

[0035] Figure 6 is a box plot illustrating temperature dispersion in the first horizontal line.

[0036] Figure 7 is a box plot illustrating the temperature error between the temperature value generated in the temperature determiner and the actually measured temperature value.

[0037] Figure 8A and Figure 8B is a diagram illustrating an embodiment of blocks included in a display unit.

[0038] Figure 9A and Figure 9B is a box plot illustrating a temperature error between a temperature value generated in a temperature determiner and an actually measured temperature value when the first image is displayed.

[0039] Figure 10A and Figure 10B is a box plot illustrating a temperature error between a temperature value generated in the temperature determiner and an actually measured temperature value when the second image is displayed.

[0040] Figure 11A and Figure 11B is a diagram illustrating an embodiment of blocks included in a display unit.

[0041] Figure 12 is a diagram illustrating an embodiment of blocks included in a display unit.

[0042] Figure 13 is a diagram illustrating an embodiment of blocks included in a display unit.

[0043] Figure 14 is a diagram illustrating an embodiment of blocks included in a display unit.

[0044] Figure 15 It is an icon Figure 2 An embodiment of a pixel is shown in FIG.

[0045] Figure 16 Graphic driver Figure 15 FIG. 1 is a diagram of an exemplary method for processing pixels of a pixel.

[0046] Figure 17is a diagram illustrating an electronic device according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0047] Hereinafter, various embodiments of the present disclosure will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the present disclosure. The present disclosure can be implemented in many different forms and is not limited to the embodiments described herein.

[0048] In order to clearly describe the present disclosure, parts not related to the present description are omitted, and the same or similar elements are represented by the same reference numerals throughout the specification. Therefore, the reference numerals described above can be used in other drawings.

[0049] In addition, since the size and thickness of each structure shown in the drawings are arbitrarily shown for the convenience of description, the present disclosure is not necessarily limited to what is shown in the drawings. In order to clearly express multiple layers and regions in the drawings, the thickness may be exaggerated.

[0050] In addition, the expression "same" in this description may mean "substantially the same." That is, the expression "same" may be sufficiently similar to allow a person of ordinary skill in the art to understand that it is the same. Other expressions may also be expressions in which "substantially" is omitted.

[0051] Some embodiments are described in relation to functional blocks, units and / or modules and are illustrated in the accompanying drawings. Those skilled in the art will appreciate that such blocks, units and / or modules are physically implemented by logic circuits, independent components, microprocessors, hard-wired circuits, memory elements, line connections and other electronic circuits. This can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. Blocks, units and / or modules implemented by microprocessors or other similar hardware can be programmed and controlled to perform the various functions discussed herein using software, and can alternatively be driven by firmware and / or software. In addition, each block, unit and / or module can be implemented by a combination of dedicated hardware or by a processor (e.g., one or more programmed microprocessors and associated circuits) that performs a function different from the function of the dedicated hardware. In addition, in some embodiments, blocks, units and / or modules can be physically separated into two or more interacting independent blocks, units and / or modules without departing from the scope of the present invention. In addition, in some embodiments, blocks, units and / or modules can be physically combined into more complex blocks, units and / or modules without departing from the scope of the present invention.

[0052] The term "connection" between two structures may mean, but is not limited to, both electrical and physical connections. For example, "connection" used in a circuit diagram may mean electrical connection, and "connection" used in a cross-sectional view or plan view may mean physical connection.

[0053] Although "first" and "second" are used to describe various components, these components are not limited by these terms. These terms are used only to distinguish one component from another. Therefore, the first component described below can be the second component within the technical spirit of the present disclosure. Expressions in the singular include expressions in the plural form unless the context clearly dictates otherwise.

[0054] The present disclosure is not limited to the embodiments disclosed below and can be modified and implemented in various forms. In addition, each of the embodiments disclosed below can be implemented alone or in combination with at least one of the other embodiments.

[0055] Figure 1 and Figure 2 is a diagram illustrating a display device 100 according to an embodiment of the present disclosure. Figure 1 shows a perspective view of the display device 100, and Figure 2 A block diagram of the display device 100 is shown.

[0056] refer to Figure 1 and Figure 2 The display device 100 according to an embodiment of the present disclosure may include a display unit 110 (or a display panel or panel), a scan driver 120, a data driver 130, a timing controller 140, and an emission driver 150. The scan driver 120, the data driver 130, the timing controller 140, and the emission driver 150 may constitute a driving device (or driver) that drives the display unit 110.

[0057] The display unit 110 can display images and can be an organic light emitting display panel, a liquid crystal display panel, an electrophoretic display panel, or an inorganic light emitting display panel.

[0058] like Figure 1 As shown in , the display unit 110 may include a lower substrate 111 and an upper substrate 112. The lower substrate 111 may be a thin film transistor substrate formed of plastic or glass. The upper substrate 112 may be an encapsulation substrate formed of a plastic film, an organic substrate, or a protective film.

[0059] The display unit 110 may include scan lines S0, S1, S2, ... and Sn, data lines D1, D2, D3, ... and Dm, emission control lines EL1, EL2, EL3, ... and ELn, a first power line PL1, a second power line PL2, and pixels PX (here, each of n and m is a natural number equal to or greater than 4).

[0060] The pixels PX may be arranged in an area divided by the scan lines S0 to Sn, the data lines D1 to Dm, and the emission control lines EL1 to ELn. Each of the pixels PX may be connected to at least one of the scan lines S0 to Sn, one of the data lines D1 to Dm, and at least one of the emission control lines EL1 to ELn. For example, the pixel PXij arranged in the i-th row and j-th column (refer to FIG. Figure 15 ) can be connected to the i-th scan line Si (reference Figure 15 ), the i-th emission control line ELi (reference Figure 15 ) and the jth data line Dj (reference Figure 15 ). Here, i is a natural number equal to or smaller than n, and j is a natural number equal to or smaller than m.

[0061] In addition, each of the pixels PX may be electrically connected between a first power line PL1 and a second power line PL2. A voltage of a first driving power source VDD may be applied to the first power line PL1, and a voltage of a second driving power source VSS may be applied to the second power line PL2. The first driving power source VDD and the second driving power source VSS may be power supply voltages or driving voltages required for the operation of the pixel PX, and the first driving power source VDD may have a higher voltage level than the second driving power source VSS.

[0062] Each of the pixels PX can receive a data signal from a data line connected thereto when a scan signal is supplied to the scan line connected thereto. The pixel receiving the data signal can emit light of a brightness corresponding to the data signal to the outside. Each of the pixels PX can emit light of one of a first color, a second color, and a third color to the outside. The first color, the second color, and the third color can be different colors. For example, the first color can be set to red, the second color can be set to green, and the third color can be set to blue. In an embodiment, the first color can be set to magenta, the second color can be set to cyan, and the third color can be set to yellow.

[0063] In addition, the signal lines (e.g., scan lines, data lines, and emission control lines) and power lines connected to each of the pixels PX, as well as the driving method, can be changed according to the structure of the pixel. For example, the emission control line can be removed according to the structure of the pixel. In an embodiment of the present disclosure, the pixel PX can be selected from various currently known pixels.

[0064] The scan driver 120 may generate a scan signal in response to a control signal from the timing controller 140 and supply the scan signal to the scan lines S0 to Sn. For example, the timing controller 140 may supply control signals such as a scan start pulse and a clock signal to the scan driver 120. The scan driver 120 may be implemented as a shift register that sequentially generates and outputs a pulse-form scan signal by sequentially shifting a pulse-form scan start pulse using a clock signal.

[0065] The scan driver 120 may be formed together with the pixels PX in the display unit 110. However, the present disclosure is not limited thereto, and for example, the scan driver 120 may be mounted on a circuit film and connected to the timing controller 140 via at least one circuit film and a printed circuit board.

[0066] The emission driver 150 may generate an emission control signal in response to a control signal from the timing controller 140 and supply the emission control signal to the emission control lines EL1 to ELn.

[0067] For example, the timing controller 140 may supply control signals such as an emission start pulse and a clock signal to the emission driver 150. The emission driver 150 may be implemented as a shift register that sequentially generates and outputs pulse-form emission control signals by sequentially shifting pulse-form emission start pulses using a clock signal.

[0068] The emission driver 150 may be formed together with the pixel PX in the display unit 110. However, the present disclosure is not limited thereto, and for example, the emission driver 150 may be mounted on a circuit film and connected to the timing controller 140 via at least one circuit film and a printed circuit board.

[0069] The data driver 130 may receive output data Dout and a control signal from the timing controller 140. The data driver 130, which receives the control signal, may generate an analog data signal (or data voltage) using the digital output data Dout and supply the data signal to the data lines D1 to Dm. The data driver 130 may supply data signals in units of pixel rows (or horizontal lines). Here, a pixel row may refer to a row in which pixels PX connected to the same scan line are arranged.

[0070] The timing controller 140 may receive input data Din and a timing control signal TCS transmitted from an external system (eg, an application processor, etc.), and generate control signals to be supplied to the scan driver 120 , the data driver 130 , and the emission driver 150 based on the timing control signal TCS.

[0071] In addition, the timing controller 140 may determine the temperature of the display unit 110 in response to the input data Din. To this end, the timing controller 140 may include a temperature determiner 160. However, the embodiments of the present disclosure are not limited thereto, and the temperature determiner 160 may be a structure separate from the timing controller 140 (e.g., such as an integrated circuit (IC)) and may be disposed outside the timing controller 140.

[0072] The temperature determiner 160 may determine the temperature of the display unit 110 in response to the load of the input data Din, etc., and supply the determined temperature value to the timing controller 140. For example, the temperature determiner 160 may predict the temperature of at least one driver (e.g., the timing controller 140, the data driver 130, the scan driver 120, and the emission driver 150) in response to the load of the input data Din, and may determine the temperature of the display unit 110 in response to the predicted temperature.

[0073] For example, the timing controller 140 may convert the input data Din to generate the output data Dout. For example, the timing controller 140 may correct the input data Din in response to the temperature value of the display unit 110 determined in the temperature determiner 160 to generate the output data Dout. In an embodiment, the temperature value of the display unit 110 determined in the temperature determiner 160 may be used in various currently known driving methods.

[0074] like Figure 1 As shown in , the data driver 130 may include a plurality of data integrated circuits S-IC (or source integrated circuits S-IC). The data integrated circuits S-IC may be mounted on a flexible printed circuit board FPCB and connected to the timing controller 140 via at least one printed circuit board PCB1 and PCB2 and / or at least one cable CONN1 and CONN2.

[0075] In an embodiment, the data integrated circuit S-IC may be mounted on a flexible printed circuit board FPCB, and one side of the flexible printed circuit board FPCB may be electrically connected to a pad (not shown) disposed in the display unit 110. Here, the pad may be electrically connected to the data lines D1 to Dm, and thus, the data integrated circuit S-IC may be electrically connected to the data lines D1 to Dm.

[0076] The timing controller 140 may be mounted on the second printed circuit board PCB2. The second printed circuit board PCB2 may be electrically connected to the first printed circuit board PCB1 via the first cable CONN1. Furthermore, the first printed circuit boards PCB1 may be electrically connected to each other via the second cable CONN2. In this case, the timing controller 140 may be electrically connected to the data integrated circuit S-IC via the first printed circuit board PCB1, the second printed circuit board PCB2, the first cable CONN1, and the second cable CONN2.

[0077] although Figure 1 Although only the timing controller 140 is shown as being mounted on the second printed circuit board PCB2, embodiments of the present disclosure are not limited thereto. For example, various structures including a sensing unit and a power supply may be additionally mounted on the second printed circuit board PCB2. Furthermore, an application processor may be additionally mounted on the second printed circuit board PCB2. For example, the application processor may be mounted on the second printed circuit board PCB2 at a finished product manufacturer (or package manufacturer), or may be mounted on a separate circuit board electrically connected to the second printed circuit board PCB2.

[0078] In addition, the timing controller 140 and the data driver 130 (or data integrated circuit S-IC) may be integrally formed. The driving module in which the timing controller 140 and the data driver 130 are integrally formed may be named a timing controller embedded data driver (TED). The TED may be mounted on the first printed circuit board PCB1 or the second printed circuit board PCB2.

[0079] Figure 3 is a block diagram illustrating the temperature determiner 160 according to an embodiment of the present disclosure. Figure 4 is a diagram illustrating an embodiment of blocks BL11 to BL66 included in the display unit 110 . Figure 4 One data integrated circuit S-IC and some blocks BL11 to BL66 corresponding thereto are shown.

[0080] refer to Figure 3 , the temperature determiner 160 according to an embodiment of the present disclosure may include a voltage determiner 302 , a temperature predictor 304 , a temperature calculator 306 , and a memory 308 .

[0081] The voltage determiner 302 may convert the grayscale information of the input data Din into voltage information and generate voltage data VDin including the voltage information. For example, the voltage determiner 302 may be a lookup table including voltage information corresponding to the grayscale information of the input data Din. The voltage data VDin generated in the voltage determiner 302 may be supplied to the temperature predictor 304.

[0082] The temperature predictor 304 may generate a temperature prediction value PT corresponding to the temperature of the driver using the voltage data VDin. For example, the driver may be set as a data integrated circuit S-IC, and the temperature predictor 304 may predict the temperature of the data integrated circuit S-IC using the voltage data VDin.

[0083] The voltage data VDin may correspond to a voltage (i.e., a voltage of a data signal) to be supplied from the data integrated circuit S-IC to the display unit 110. Here, the temperature of the data integrated circuit S-IC may be set differently in response to the voltage (i.e., a voltage of a data signal) to be supplied to the display unit 110. The temperature predictor 304 may determine a load of the data integrated circuit S-IC using the voltage data VDin and may generate a temperature prediction value PT corresponding to the temperature of the data integrated circuit S-IC in accordance with the load.

[0084] In an embodiment, the driver may be provided as the timing controller 140, and the temperature predictor 304 may use the voltage data VDin (and / or the input data Din) to determine the temperature of the timing controller 140. For example, the temperature predictor 304 may use the voltage data VDin (and / or the input data Din) to determine the load of the timing controller 140, and may generate a temperature prediction value PT corresponding to the temperature of the timing controller 140 in accordance with the load.

[0085] The position information and size (or area) information of the blocks BL11, BL12, BL13, BL14, BL15, BL16, BL21, BL22, BL23, BL24, BL25, BL26, BL31, BL32, BL33, BL34, BL35, BL36, BL41, BL42, BL43, BL44, BL45, BL46, BL51, BL52, BL53, BL54, BL55, BL56, BL61, BL62, BL63, BL64, BL65, and BL66 may be stored in the memory 308. Each of the blocks BL11 to BL66 may include more than two pixels PX. A lookup table and / or an algorithm (or mathematical equation) may be stored in the memory 308 so that the temperature value TV can be calculated in the temperature calculator 306.

[0086] The temperature calculator 306 may generate a temperature value TV corresponding to the temperature of each of the blocks BL11 to BL66 using the temperature prediction value PT. The temperature value TV generated in the temperature calculator 306 may be provided to various drivers including the timing controller 140.

[0087] refer to Figure 4, the display unit 110 may be divided into a plurality of blocks BL11 to BL66. The display unit 110 may be divided into horizontal lines Row1, Row2, Row3, Row4, Row5, and Row6 and vertical lines Column1, Column2, Column3, Column4, Column5, and Column6 corresponding to the arrangement of the blocks BL11 to BL66.

[0088] Here, the horizontal line may mean a row direction in which the blocks BL11 to BL66 are arranged, and the vertical line may mean a column direction in which the blocks BL11 to BL66 are arranged.

[0089] For example, blocks BL11, BL12, BL13, BL14, BL15 and BL16 may be set in the first horizontal line Row1, blocks BL21, BL22, BL23, BL24, BL25 and BL26 may be set in the second horizontal line Row2, blocks BL31, BL32, BL33, BL34, BL35 and BL36 may be set in the third horizontal line Row3, blocks BL41, BL42, BL43, BL44, BL45 and BL46 may be set in the fourth horizontal line Row4, blocks BL51, BL52, BL53, BL54, BL55 and BL56 may be set in the fifth horizontal line Row5, and blocks BL61, BL62, BL63, BL64, BL65 and BL66 may be set in the sixth horizontal line Row6.

[0090] For example, blocks BL11, BL21, BL31, BL41, BL51 and BL61 can be set in the first vertical line Column1, blocks BL12, BL22, BL32, BL42, BL52 and BL62 can be set in the second vertical line Column2, blocks BL13, BL23, BL33, BL43, BL53 and BL63 can be set in the third vertical line Column3, blocks BL14, BL24, BL34, BL44, BL54 and BL64 can be set in the fourth vertical line Column4, blocks BL15, BL25, BL35, BL45, BL55 and BL65 can be set in the fifth vertical line Column5, and blocks BL16, BL26, BL36, BL46, BL56 and BL66 can be set in the sixth vertical line Column6.

[0091] The area (or size) information and position information of each of the blocks BL11 to BL66 may be stored in the memory 308. For example, the area of ​​each of the blocks BL11 to BL66 may be set to be the same. The temperature calculator 306 may generate a temperature value TV for each of the blocks BL11 to BL66 corresponding to the temperature prediction value PT.

[0092] Figure 5 is a block diagram illustrating the temperature determiner 160 according to an embodiment of the present disclosure. Figure 5 The same reference numerals are given to Figure 3 The structure is the same as that in , and repeated description is omitted.

[0093] refer to Figure 5 , the temperature determiner 160 according to an embodiment of the present disclosure may include a temperature calculator 306 and a memory 308 .

[0094] The temperature calculator 306 can receive a temperature prediction value PT from the outside. The temperature prediction value PT may include temperature information of at least one driver and may be input to the temperature calculator 306 from the application processor and / or the timing controller 140, etc. For example, the temperature of the driver corresponding to the input data Din may be measured during the process, and such information may be pre-stored outside the temperature determiner 160. The timing controller 140 and / or the application processor, etc. may use the pre-stored temperature information to generate the temperature prediction value PT of the driver corresponding to the input data Din.

[0095] The temperature calculator 306 may generate a temperature value TV corresponding to the temperature of each of the blocks BL11 to BL66 using the temperature prediction value PT. The temperature value TV generated in the temperature calculator 306 may be provided to various drivers including the timing controller 140.

[0096] Figure 6 is a box plot illustrating the temperature dispersion in the first horizontal line Row1. Figure 6 In the block BL11 to BL66, three data integrated circuits S-IC1, S-IC2, and S-IC3 are included, and the three data integrated circuits S-IC1, S-IC2, and S-IC3 are arranged adjacent to the first horizontal line Row1. In addition, each of the blocks BL11 to BL66 includes 32×32 pixels PX. Here, each of the pixels PX may include three sub-pixels of different colors. Figure 6 , the Y-axis represents temperature ° C., and the X-axis represents blocks arranged in the first horizontal line Row1.

[0097] exist Figure 4 , for the convenience of describing the present disclosure, the blocks BL13 and BL14 are shown as being disposed adjacent to the data integrated circuit S-IC. Figure 6 is a simulation of a predetermined panel, and it is understood that Figure 6 The blocks 9, 10, 11, 12, 13, and 14, etc., written in the X-axis of FIG. 1 are arranged adjacent to the data integrated circuit S-IC1.

[0098] refer to Figure 6 , it can be seen that temperature dispersion occurs significantly in the blocks arranged adjacent to the data integrated circuits S-IC1, S-IC2, and S-IC3 (e.g., the first area AA1, the second area AA2, and the third area AA3). In this case, when a temperature value TV is generated in each of the blocks arranged in the first area AA1, the second area AA2, and the third area AA3, an error may occur between the actual temperature and the temperature value TV.

[0099] Figure 7 is a box plot illustrating the temperature error between the temperature value TV generated in the temperature determiner 160 and the actually measured temperature value. Figure 7 In FIG, the Y axis represents the temperature error. The temperature error represents the absolute temperature value obtained by subtracting the actual temperature value of the display unit 110 from the temperature value TV. Each of the blocks BL11 to BL66 includes 32×32 pixels PX and is Figure 7 , the X-axis represents a case where the temperature values ​​of the sub-blocks including 4×4 pixels PX are arranged in the vertical direction after the temperature value TV of each of the blocks BL11 to BL66 is interpolated in units of the sub-blocks including 4×4 pixels PX.

[0100] In this case, Figure 7 The blocks 1, 2, 3, 4, 5, 6, 7 and 8 written in the X-axis of Figure 4 The blocks (at least one of BL11 to BL16) in the first horizontal line Row1 of FIG. 1 and blocks 9, 10, 11, 12, 13, 14, 15, and 16 may correspond to the blocks arranged in Figure 4 The blocks (at least one of BL21 to BL26) in the second horizontal line Row2.

[0101] refer to Figure 7 , the temperature error between the temperature value TV generated by the temperature determiner 160 and the actually measured temperature value is large in the blocks BL11 to BL16 arranged in the first horizontal line Row1. In other words, it can be seen that the temperature error between the temperature value TV generated by the temperature determiner 160 and the actually measured temperature value is large in the blocks adjacent to the driver. As described above, when the temperature error between the temperature value TV generated by the temperature determiner 160 and the actually measured temperature value increases, the display quality of the display unit 110 may deteriorate.

[0102] In view of this, a method of minimizing temperature errors by reducing the area (or size) of blocks BL11 to BL16 can be predicted. However, when the area (or size) of blocks BL11 to BL16 is reduced, the capacity of memory 308 may increase, and thus practical application may be difficult. Therefore, in an embodiment of the present disclosure, a method is proposed to minimize the increase in the capacity of memory 308 while minimizing the temperature errors in the blocks adjacent to the driver.

[0103] Figure 8A and Figure 8B 1 is a diagram illustrating an embodiment of blocks BL11a, BL12a, BL13a, BL14a, BL15a, BL16a, BL21a, BL22a, BL23a, BL24a, BL25a, BL26a, BL31 to BL66, BL71, BL72, BL73, BL74, BL75, and BL76 included in the display unit 110. Figure 8A and Figure 8B In the embodiment, the data integrated circuit S-IC is included as a driver, and the data integrated circuit S-IC may be disposed on an upper side or a lower side of the panel. Figure 8A and Figure 8B Shown are one data integrated circuit S-IC among a plurality of data integrated circuits S-IC included in the display unit 110 and blocks BL11a, BL12a, BL13a, BL14a, BL15a, BL16a, BL21a, BL22a, BL23a, BL24a, BL25a, BL26a, BL31 to BL66, BL71, BL72, BL73, BL74, BL75, and BL76 corresponding to the data integrated circuit S-IC.

[0104] For ease of description, Figure 8A In the example, the blocks arranged in the first horizontal line Row1 are named BL11a, BL12a, ... and so on, and Figure 8B , the blocks arranged in the seventh horizontal line Row7 are named BL11a, BL12a, ..., etc. In this case, the name of each of the blocks, such as BL11a, BL31, and BL76, etc., is used to distinguish the blocks and may be independent of the position of the blocks.

[0105] refer to Figure 8A and Figure 8B, the display unit 110 may include a first block BL1 arranged adjacent to a driver (i.e., a data integrated circuit S-IC) and a second block BL2 arranged spaced apart from the data integrated circuit S-IC. The first block BL1 may include a plurality of first sub-blocks BL11a to BL26a arranged adjacent to the data integrated circuit S-IC, and the second block BL2 may include a plurality of second sub-blocks BL31 to BL76 arranged spaced apart from the data integrated circuit S-IC. Each of the first sub-blocks BL11a to BL26a and the second sub-blocks BL31 to BL76 may include two or more pixels PX.

[0106] Each of the first sub-blocks BL11a to BL26a may have an area (or size) different from the area (or size) of each of the second sub-blocks BL31 to BL76. For example, each of the first sub-blocks BL11a to BL26a may have an area smaller than that of each of the second sub-blocks BL31 to BL76. Here, the first block BL1 may be defined as a block including sub-blocks (e.g., BL11a to BL26a) having an area smaller than that of the second block BL2.

[0107] The first block BL1 may be arranged adjacent to the data integrated circuit S-IC. For example, each of the first sub-blocks BL11a to BL26a included in the first block BL1 may be arranged in at least one horizontal line adjacent to the data integrated circuit S-IC.

[0108] For example, when the data integrated circuit S-IC is Figure 8A When the first sub-blocks BL11a to BL26a are disposed on the upper side of the display unit 110 (or the upper side of the panel) as shown in FIG. , the first sub-blocks BL11a to BL26a may be arranged in at least one horizontal line (e.g., the first horizontal line Row1 and the second horizontal line Row2) adjacent to the data integrated circuit S-IC. Here, the area of ​​each of the first sub-blocks BL11a to BL26a arranged in the same horizontal line (e.g., the first horizontal line Row1 and / or the second horizontal line Row2) may be the same.

[0109] For example, when the data integrated circuit S-IC is Figure 8B When the first sub-blocks BL11a to BL26a are disposed on the lower side of the display unit 110 (or the lower side of the panel) as shown in FIG. , the first sub-blocks BL11a to BL26a may be arranged in at least one horizontal line (e.g., the sixth horizontal line Row6 and the seventh horizontal line Row7) adjacent to the data integrated circuit S-IC. Here, the area of ​​each of the first sub-blocks BL11a to BL26a arranged in the same horizontal line (e.g., the sixth horizontal line Row6 and / or the seventh horizontal line Row7) may be the same.

[0110] In the above-described embodiment of the present disclosure, the area of ​​each of the first sub-blocks BL11a to BL26a adjacent to the data integrated circuit S-IC (i.e., the driver) is set to be smaller than the area of ​​each of the second sub-blocks BL31 to BL76 spaced apart from the data integrated circuit S-IC. In this case, the area adjacent to the data integrated circuit S-IC can be subdivided, and thus, the accuracy of the temperature value TV modeled in the temperature determiner 160 can be improved. For example, the temperature determiner 160 can calculate the temperature value TV in units of the area of ​​each of the first sub-blocks BL11a to BL26a and the second sub-blocks BL31 to BL76, and thus, the accuracy of the temperature value TV can be improved.

[0111] In addition, position information and area (or size) information of each of the first sub-blocks BL11 a to BL26 a and the second sub-blocks BL31 to BL76 may be stored in the memory 308 .

[0112] Figure 9A and Figure 9B is a box plot illustrating a temperature error between a temperature value TV generated in the temperature determiner 160 and an actually measured temperature value when the first image is displayed. The first image may display a black and white image in most areas and may be an image including box-shaped and circular-shaped graphs. Figure 9A The case where a block includes 32×32 pixels PX is illustrated, and Figure 9B A case is illustrated in which a block arranged in a first horizontal line Row1 adjacent to a driver includes 32×16 pixels PX and blocks arranged in the remaining horizontal lines include 32×32 pixels PX.

[0113] exist Figure 9A and Figure 9B In the figure, the Y axis represents the temperature error. Figure 9A and Figure 9B , the X-axis represents the case where the temperature values ​​of the sub-blocks are set in the vertical direction after interpolating the temperature values ​​measured in each of the blocks in units of 4×4 pixels PX. In this case, the numbers 1, 2, 3, ... of the X-axis may mean a sub-block including 4×4 pixels PX.

[0114] refer to Figure 9A and Figure 9B , when the blocks of the display unit 110 are as Figure 9A When only 32×32 pixels PX are included as shown in FIG, the maximum temperature error is set to approximately 2.4° C., and when the blocks arranged in the area adjacent to the driver are as shown in FIG. Figure 9BWhen 32×16 pixels PX are included as shown in FIG, the maximum temperature error is set to approximately 1.7°C. That is, when the area of ​​the block in the region adjacent to the driver is reduced as in the embodiment of the present disclosure, the temperature error can be reduced. In addition, as the area of ​​the first sub-blocks BL11a to BL26a included in the first block BL1 is reduced, the temperature error can be reduced.

[0115] Figure 10A and Figure 10B is a box plot illustrating a temperature error between the temperature value TV generated in the temperature determiner 160 and the actually measured temperature value when the second image is displayed. The second image may display a color image in most areas and may be an image including a quadrangular box-shaped graph. Figure 10A The case where a block includes 32×32 pixels PX is illustrated, and Figure 10B A case is illustrated in which a block arranged in a first horizontal line Row1 adjacent to a driver includes 32×16 pixels PX and blocks arranged in the remaining horizontal lines include 32×32 pixels PX.

[0116] exist Figure 10A and Figure 10B In the figure, the Y axis represents the temperature error. Figure 10A and Figure 10B , the X-axis illustrates the case where the temperature values ​​of the sub-blocks are set in the vertical direction after interpolating the temperature values ​​measured in each of the blocks in units of 4×4 pixels PX. In this case, the numbers 1, 2, 3, ... of the X-axis may mean a sub-block including 4×4 pixels PX.

[0117] refer to Figure 10A and Figure 10B , when the blocks of the display unit 110 are as Figure 10A When only 32×32 pixels PX are included as shown in FIG, the maximum temperature error is set to approximately 2.1° C., and when the blocks arranged in the area adjacent to the driver are as shown in FIG. Figure 10B When 32×16 pixels PX are included as shown in FIG, the maximum temperature error is set to approximately 1.4°C. That is, when the first block BL1, which has an area smaller than that of the second block BL2, is disposed in an area adjacent to the driver as in the embodiment of the present disclosure, the temperature error can be reduced. In addition, as the area of ​​the first sub-blocks BL11a to BL26a included in the first block BL1 is reduced, the temperature error can be reduced.

[0118] Figure 11A and Figure 11B1 is a diagram illustrating an embodiment of blocks B11, B12, B13, B14, B15, B16, B17, B21, B22, B23, B24, B25, B26, B27, B31, B32, B33, B34, B35, B36, B37, B41, B42, B43, B44, B45, B46, B47, B51, B52, B53, B54, B55, B56, B57, B61, B62, B63, B64, B65, B66, and B67 included in the display unit 110. Figure 11A and Figure 11B In the embodiment, the data integrated circuit S-IC is included as a driver, and the data integrated circuit S-IC may be disposed on the left or right side of the panel. Figure 11A and Figure 11B Shown are one data integrated circuit S-IC among a plurality of data integrated circuits S-IC included in the display unit 110, and blocks B11, B12, B13, B14, B15, B16, B17, B21, B22, B23, B24, B25, B26, B27, B31, B32, B33, B34, B35, B36, B37, B41, B42, B43, B44, B45, B46, B47, B51, B52, B53, B54, B55, B56, B57, B61, B62, B63, B64, B65, B66, and B67 corresponding to the data integrated circuit S-IC.

[0119] For ease of description, Figure 11A In the example, the blocks arranged in the first vertical line Column1 are named B11, B21, ... and so on, and Figure 11B , the blocks arranged in the seventh vertical line Column7 are named B11, B21, ... etc. In this case, the name of each of the blocks, such as B11, B35, and B67, etc., is used to distinguish the blocks and may be irrelevant to the position of the blocks.

[0120] refer to Figure 11A and Figure 11BThe display unit 110 may include a first block BL1 (e.g., B11, B21, B31, B41, B51, B61, B12, B22, B32, B42, B52, and B62) arranged adjacent to a driver (e.g., a data integrated circuit S-IC) and a second block BL2 (e.g., B13, B23, B33, B43, B53, B63, B14, B24, B34, B44, B54, B64, B15, B25, B35, B45, B55, B65, B16, B26, B36, B46, B56, B66, B17, B27, B37, B47, B57, and B67) arranged spaced apart from the data integrated circuit S-IC.

[0121] The first block BL1 may include a plurality of first sub-blocks B11 to B62 arranged adjacent to the data integrated circuit S-IC, and the second block BL2 may include a plurality of second sub-blocks B13 to B67 arranged spaced apart from the data integrated circuit S-IC. The first sub-blocks B11 to B62 may be arranged in at least one vertical line adjacent to the data integrated circuit S-IC. Each of the first sub-blocks B11 to B62 and the second sub-blocks B13 to B67 may include two or more pixels PX.

[0122] Each of the first sub-blocks B11 to B62 may have an area (or size) different from that of each of the second sub-blocks B13 to B67. For example, each of the first sub-blocks B11 to B62 may have an area smaller than that of each of the second sub-blocks B13 to B67.

[0123] For example, when the data integrated circuit S-IC is Figure 11A When the first sub-blocks B11 to B62 are arranged on the left side of the display unit 110 (or the left side of the panel) as shown in FIG, the first sub-blocks B11 to B62 may be arranged in at least one vertical line (e.g., the first vertical line Column 1 and the second vertical line Column 2) adjacent to the data integrated circuit S-IC. Here, the area of ​​each of the first sub-blocks B11 to B62 arranged in the same vertical line (e.g., the first vertical line Column 1 and / or the second vertical line Column 2) may be the same.

[0124] For example, when the data integrated circuit S-IC is Figure 11BWhen arranged on the right side of the display unit 110 (or the right side of the panel) as shown in , the first sub-blocks B11 to B62 may be placed in at least one vertical line (e.g., the sixth vertical line Column 6 and the seventh vertical line Column 7) adjacent to the data integrated circuit S-IC. Here, the area of ​​each of the first sub-blocks B11 to B62 arranged in the same vertical line (e.g., the sixth vertical line Column 6 and / or the seventh vertical line Column 7) may be the same.

[0125] In the above-described embodiment of the present disclosure, the area of ​​each of the first sub-blocks B11 to B62 adjacent to the data integrated circuit S-IC (i.e., driver) is set to be smaller than the area of ​​each of the second sub-blocks B13 to B67 spaced apart from the data integrated circuit S-IC. In this case, the area adjacent to the data integrated circuit S-IC can be subdivided, and thus, the accuracy of the temperature value TV modeled in the temperature determiner 160 can be improved. For example, the temperature determiner 160 can calculate the temperature value TV in units of the area of ​​each of the first sub-blocks B11 to B62 and the second sub-blocks B13 to B67, and thus, the accuracy of the temperature value TV can be improved.

[0126] In addition, position information and area (or size) information of each of the first sub-blocks B11 to B62 and the second sub-blocks B13 to B67 may be stored in the memory 308 .

[0127] Figure 12 is a diagram illustrating an embodiment of blocks BL1 and BL2 included in the display unit 110. Figure 12 In the embodiment, the data integrated circuit S-IC may be included as a driver, and the data integrated circuit S-IC may be provided on the upper side of the panel (or display unit 110). Figure 8B 、 Figure 11A and Figure 11B As described, the data integrated circuit S-IC may be disposed on the lower side, left side, or right side of the panel.

[0128] refer to Figure 12 The display unit 110 may include a first block BL1 (e.g., BL11b, BL12b, BL13b, BL14b, BL15b, BL16b, BL21b, BL22b, BL23b, BL24b, BL25b, and BL26b) arranged adjacent to a driver (i.e., a data integrated circuit S-IC) and a second block BL2 (e.g., BL31 to BL76) arranged spaced apart from the data integrated circuit S-IC.

[0129] The first block BL1 may include a plurality of first sub-blocks BL11b to BL26b arranged adjacent to the data integrated circuit S-IC, and the second block BL2 may include a plurality of second sub-blocks BL31 to BL76 arranged spaced apart from the data integrated circuit S-IC. Each of the first sub-blocks BL11b to BL26b and the second sub-blocks BL31 to BL76 may include two or more pixels PX.

[0130] Each of the first sub-blocks BL11b to BL26b may have an area (or size) different from that of each of the second sub-blocks BL31 to BL76. For example, each of the first sub-blocks BL11b to BL26b may have an area smaller than that of each of the second sub-blocks BL31 to BL76.

[0131] The first block BL1 may be arranged adjacent to the data integrated circuit S-IC. For example, each of the first sub-blocks BL11b to BL26b included in the first block BL1 may be arranged in at least one horizontal line adjacent to the data integrated circuit S-IC. For example, the first sub-blocks BL11b to BL26b may be arranged in a first horizontal line Row1 and a second horizontal line Row2 adjacent to the data integrated circuit S-IC. Here, the area of ​​the first sub-blocks BL11b to BL26b may be arranged to increase as the distance in the vertical direction from the data integrated circuit S-IC increases.

[0132] For example, each of the first sub-blocks BL11b to BL16b arranged in the first horizontal line Row1 may be set to a first area, and each of the first sub-blocks BL21b to BL26b arranged in the second horizontal line Row2 may be set to a second area. Here, the second area may be larger than the first area. When the areas of the first sub-blocks BL11b to BL16b and BL21b to BL26b are set differently based on the distance from the data integrated circuit S-IC, the capacity of the memory 308 included in the temperature determiner 160 can be reduced, and the accuracy of the temperature value TV generated in the temperature determiner 160 can be improved.

[0133] Figure 13 is a diagram illustrating an embodiment of blocks BL1 and BL2 included in the display unit 110. Figure 13 In the embodiment, the data integrated circuit S-IC may be included as a driver, and the data integrated circuit S-IC may be provided on the upper side of the panel (or display unit 110). Figure 8B 、 Figure 11A and Figure 11B As described, the data integrated circuit S-IC may be disposed on the lower side, left side, or right side of the panel.

[0134] refer to Figure 13 The display unit 110 may include a first block BL1 (e.g., BL11c, BL12c, BL13c, BL14c, BL15c, BL16c, BL17c, BL18c, BL19c, BL20c, BL21c, BL22c, BL23c, BL24c, BL25c, BL26c, BL27c, BL28c, BL29c, and BL30c) arranged adjacent to a driver (i.e., a data integrated circuit S-IC) and a second block BL2 (e.g., BL31 to BL76) arranged to be spaced apart from the data integrated circuit S-IC.

[0135] Each of the first sub-blocks BL11c to BL30c included in the first block BL1 may have an area (or size) different from the area (or size) of each of the second sub-blocks BL31 to BL76 included in the second block BL2. For example, each of the first sub-blocks BL11c to BL30c may have an area smaller than that of each of the second sub-blocks BL31 to BL76. Each of the first sub-blocks BL11c to BL30c and the second sub-blocks BL31 to BL76 may include two or more pixels PX.

[0136] The first block BL1 may be arranged adjacent to the data integrated circuit S-IC. For example, the first block BL1 may be arranged in at least one horizontal line adjacent to the data integrated circuit S-IC. For example, the first sub-blocks BL11c to BL30c may be arranged in a first horizontal line Row1 and a second horizontal line Row2 adjacent to the data integrated circuit S-IC. Here, the areas of the first sub-blocks BL11c to BL30c may be arranged to increase with increasing distance from the data integrated circuit S-IC in the horizontal and vertical directions, that is, to increase with increasing distance from the data integrated circuit S-IC.

[0137] For example, the first sub-block BL14c arranged at a first distance from the data integrated circuit S-IC in the first horizontal line Row1 may have an area smaller than the area of ​​the first sub-block BL11c arranged at a second distance from the data integrated circuit S-IC greater than the first distance. For example, the first sub-block BL14c arranged in the first horizontal line Row1 may have an area smaller than the area of ​​the first sub-block BL24c arranged in the second horizontal line Row2.

[0138] When areas of the first subblocks BL11c to BL30c are differently set based on distances from the data integrated circuit S-IC, capacity of the memory 308 included in the temperature determiner 160 may be reduced and accuracy of the temperature value TV generated in the temperature determiner 160 may be improved.

[0139] Furthermore, position information and area (or size) information of each of the first sub-blocks BL11 c to BL30 c and the second sub-blocks BL31 to BL76 may be stored in the memory 308 .

[0140] Figure 14 is a diagram illustrating an embodiment of blocks BL1 and BL2 included in the display unit 110. Figure 14 , the timing controller 140 is shown as a driver, and the timing controller 140 may be provided to overlap with the panel (or display unit 110). However, in addition to the timing controller 140, various drivers including a data integrated circuit S-IC may also be provided to overlap with the panel (or display unit 110).

[0141] refer to Figure 14 , when the timing controller 140 overlaps with the display unit 110, the first blocks BL1 (e.g., BL22d, BL23d, BL24d, BL25d, BL22e, BL23e, BL24e, BL25e, BL32d, BL33d, BL34d, BL35d, BL32e, BL33e, BL34e, and BL35e) may be disposed in a region where the display unit 110 overlaps with the timing controller 140 and in a region adjacent to the region, and the second blocks BL2 (e.g., BL11 to BL16, BL21, BL26, BL31, BL36, and BL41 to BL66) may be disposed to be spaced apart from the timing controller 140.

[0142] The first block BL1 may include first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d, and BL32e to BL35e, and at least one of the first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d, and BL32e to BL35e may be arranged at an intersection of at least one horizontal line and at least one vertical line overlapping with the timing controller 140. Each of the first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d, and BL32e to BL35e may have an area smaller than that of each of the second sub-blocks BL11 to BL16, BL21, BL26, BL31, BL36, and BL41 to BL66 included in the second block BL2. Each of the first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d, and BL32e to BL35e and the second sub-blocks BL11 to BL16, BL21, BL26, BL31, BL36, and BL41 to BL66 may include two or more pixels PX.

[0143] Each of the first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d, and BL32e to BL35e may have the same area, but the embodiments of the present disclosure are not limited thereto. For example, the area of ​​each of the first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d, and BL32e to BL35e may gradually increase as the distance from the timing controller 140 (or driver) increases.

[0144] When the first block BL1 is disposed adjacent to (or overlapped with) the timing controller 140 , the capacity of the memory 308 included in the temperature determiner 160 may be reduced, and the accuracy of the temperature value TV generated in the temperature determiner 160 may be improved.

[0145] In addition, the position information and area (or size) information of each of the first sub-blocks BL22d to BL25d, BL22e to BL25e, BL32d to BL35d and BL32e to BL35e and the second sub-blocks BL11 to BL16, BL21, BL26, BL31, BL36 and BL41 to BL66 can be stored in the memory 308.

[0146] Figure 15 It is an icon Figure 2 An embodiment of a pixel PXij is shown in FIG.

[0147] refer to Figure 15 , the pixel PXij includes transistors T11, T12, T13, T14, T15, T16 and T17, a storage capacitor Cst and a light emitting element LD.

[0148] Hereinafter, a circuit consisting of a P-type transistor is described as an example. However, those skilled in the art can design a circuit consisting of an N-type transistor by distinguishing the polarity of the voltage applied to the gate terminal. Similarly, those skilled in the art can design a circuit consisting of a combination of a P-type transistor and an N-type transistor. The transistor can be configured in various forms such as a thin film transistor (TFT), a field effect transistor (FET), and a bipolar junction transistor (BJT).

[0149] The eleventh transistor T11 may have a gate electrode connected to the first node N1, a first electrode connected to the second node N2, and a second electrode connected to the third node N3. The eleventh transistor T11 may be referred to as a driving transistor.

[0150] The twelfth transistor T12 may have a gate electrode connected to the scan line Si1, a first electrode connected to the j-th data line Dj, and a second electrode connected to the second node N2. The thirteenth transistor T13 may have a gate electrode connected to the scan line Si2, a first electrode connected to the first node N1, and a second electrode connected to the third node N3.

[0151] The fourteenth transistor T14 may have a gate electrode connected to the scan line Si3, a first electrode connected to the first node N1, and a second electrode connected to the initialization line INTL. The fifteenth transistor T15 may have a gate electrode connected to the i-th emission control line ELi, a first electrode connected to the first power line PL1, and a second electrode connected to the second node N2. In an embodiment, the gate electrode of the fifteenth transistor T15 may be connected to an emission control line different from the emission control line connected to the gate electrode of the sixteenth transistor T16.

[0152] The sixteenth transistor T16 may have a gate electrode connected to the i-th emission control line ELi, a first electrode connected to the third node N3, and a second electrode connected to the anode of the light emitting element LD. The seventeenth transistor T17 may have a gate electrode connected to the scan line Si4, a first electrode connected to the initialization line INTL, and a second electrode connected to the anode of the light emitting element LD.

[0153] A first electrode of the storage capacitor Cst may be connected to the first power line PL1 , and a second electrode may be connected to the first node N1 .

[0154] The anode of the light-emitting element LD can be connected to the second electrode of the sixteenth transistor T16, and the cathode can be connected to the second power supply line PL2. The light-emitting element LD can be a light-emitting diode. The light-emitting element LD can be composed of an organic light-emitting element (for example, an organic light-emitting diode), an inorganic light-emitting element (for example, an inorganic light-emitting diode) or a quantum dot / well light-emitting element (for example, a quantum dot / well light-emitting diode). The light-emitting element LD can emit light of one color among the first color, the second color and the third color. In addition, although only one light-emitting element LD is provided in each pixel in the present embodiment, a plurality of light-emitting elements can be provided in each pixel in an embodiment. At this time, the plurality of light-emitting elements can be connected in series, in parallel, or in series and parallel.

[0155] The voltage of the first driving power supply VDD may be applied to the first power line PL1, the voltage of the second driving power supply VSS may be applied to the second power line PL2, and the voltage of the initialization power supply may be applied to the initialization line INTL. For example, the voltage of the first driving power supply VDD may be greater than the voltage of the second driving power supply VSS. For example, the voltage of the initialization power supply may be equal to or greater than the voltage of the second driving power supply VSS. For example, the voltage of the initialization power supply may correspond to the smallest data voltage among the available data voltages. In another example, the voltage of the initialization power supply may be smaller than the voltage of the available data voltage.

[0156] Figure 16 Graphic driver Figure 15 The method for the pixel PXij is shown in the figure.

[0157] Hereinafter, for ease of description, it is assumed that scan lines Si1, Si2, and Si4 are the i-th scan line Si, and scan line Si3 is the i-1-th scan line S(i-1). However, depending on the embodiment, the connection relationship of scan lines Si1, Si2, Si3, and Si4 may be different. For example, scan line Si4 may be the i-1-th scan line or the i+1-th scan line.

[0158] First, an emission control signal of an off level (logic high level) is applied to the i-th emission control line ELi, a data signal DATA(i-1)j of the i-1-th pixel is applied to the j-th data line Dj, and a scan signal of an on level (logic low level) is applied to the scan line Si3. The high / low of the logic level can be changed depending on whether the transistor is P-type or N-type.

[0159] At this time, since the scan signal of the off level is applied to the scan lines Si1 and Si2 , the twelfth transistor T12 is turned off and prevents the data signal DATA(i−1)j from being input to the pixel PXij.

[0160] At this time, since the fourteenth transistor T4 is turned on, the first node N1 is connected to the initialization line INTL, and the voltage of the first node N1 is initialized. Since the emission control signal of the off level is applied to the i-th emission control line ELi, the transistors T15 and T16 are turned off, and unnecessary light emission of the light emitting element LD caused by the process of applying the voltage of the initialization power supply is prevented.

[0161] The data signal DATAij of the i-th pixel PXij is applied to the j-th data line Dj, and a scan signal of a conduction level is applied to the scan lines Si1 and Si2. Accordingly, transistors T12, T11, and T13 are turned on, and the j-th data line Dj and the first node N1 are electrically connected to each other. Therefore, the compensation voltage obtained by subtracting the threshold voltage of the eleventh transistor T11 from the data signal DATAij is applied to the second electrode of the storage capacitor Cst (i.e., the first node N1), and the storage capacitor Cst maintains a voltage corresponding to the difference between the first driving power supply VDD and the compensation voltage. This period can be referred to as a threshold voltage compensation period or a data write period.

[0162] In addition, when the scan line Si4 is the i-th scan line Si, since the seventeenth transistor T17 is turned on, the anode of the light emitting element LD and the initialization line INTL are connected to each other, and the light emitting element LD is initialized to an amount of charge corresponding to the voltage difference between the voltage of the initialization power supply and the second driving power supply VSS.

[0163] After that, since the emission control signal of the on level is applied to the i-th emission control line ELi, the transistors T15 and T16 can be turned on. Therefore, a driving current path connecting the first power line PL1, the fifteenth transistor T15, the eleventh transistor T11, the sixteenth transistor T16, the light emitting element LD, and the second power line PL2 is formed.

[0164] The amount of driving current flowing to the first and second electrodes of the eleventh transistor T11 is adjusted according to the voltage maintained in the storage capacitor Cst. The light-emitting element LD emits light having a brightness corresponding to the amount of driving current. The light-emitting element LD emits light until an emission control signal of an off level is applied to the i-th emission control line ELi.

[0165] When the emission control signal is at the on level, the pixel receiving the corresponding emission control signal can be in the display state. Therefore, the period when the emission control signal is at the on level can be referred to as the emission period EP (or emission enabled period). In addition, when the emission control signal is at the off level, the pixel receiving the corresponding emission control signal can be in the non-display state. Therefore, the period when the emission control signal is at the off level can be referred to as the non-emission period NEP (or emission disabled period).

[0166] refer to Figure 16 The described non-emission period NEP is for preventing the pixel PXij from emitting light with undesired brightness during the initialization period and the data writing period.

[0167] While the data written to the pixel PXij is maintained (e.g., one frame period), one or more non-emission periods NEP may be additionally provided. This can be used to effectively express low grayscales by shortening the emission period EP of the pixel PXij, or to smoothly blur the motion of the image.

[0168] Figure 17 is a diagram illustrating an electronic device 1000 according to an embodiment of the present disclosure.

[0169] refer to Figure 17 , the electronic device 1000 outputs various information through the display module 1140. When the processor 1110 executes an application stored in the memory 1120, the display module 1140 provides the user with application information through the display panel 1141.

[0170] The processor 1110 may obtain external input through the input module 1130 or the sensor module 1161 and execute an application corresponding to the external input. For example, when a user selects a camera icon (or a camera application icon) displayed on the display panel 1141, the processor 1110 may obtain user input through the input sensor 1161-2 and activate the camera module 1171. The processor 1110 may transmit image data corresponding to a captured image obtained through the camera module 1171 to the display module 1140. The display module 1140 may display an image corresponding to the captured image through the display panel 1141.

[0171] As another example, when personal information authentication is performed in the display module 1140, the fingerprint sensor 1161-1 obtains input fingerprint information as input data. The processor 1110 can compare the input data obtained by the fingerprint sensor 1161-1 with the authentication data stored in the memory 1120 and execute the application based on the comparison result. The display module 1140 can display information executed according to the logic of the application through the display panel 1141. The fingerprint sensor 1161-1 can be configured to obtain fingerprint information from the entire area of ​​the display module 1140 (or display panel 1141).

[0172] As yet another example, when a music streaming icon displayed on the display module 1140 is selected, the processor 1110 obtains a user input through the input sensor 1161-2 and activates a music streaming application stored in the memory 1120. When a music execution command is input in the music streaming application, the processor 1110 activates the sound output module 1163 to provide the user with sound information corresponding to the music execution command.

[0173] In the above, the operation of the electronic device 1000 is briefly described. Hereinafter, the structure of the electronic device 1000 will be described in detail. Some of the structures of the electronic device 1000 to be described later may be integrated and provided as one structure, or one structure may be separated into two or more structures.

[0174] The electronic device 1000 can communicate with the external electronic device 2000 through a network (e.g., a short-range wireless communication network or a long-range wireless communication network). According to an embodiment, the electronic device 1000 may include a processor 1110, a memory 1120, an input module 1130, a display module 1140, a power module 1150, an internal module 1160, and an external module 1170. According to an embodiment, in the electronic device 1000, at least one of the components described above may be omitted, or one or more other components may be added. According to an embodiment, some of the components described above (e.g., the sensor module 1161, the antenna module 1162, or the sound output module 1163) may be integrated into another component (e.g., the display module 1140).

[0175] The processor 1110 may execute software to control at least one other component (e.g., a hardware component or a software component) of the electronic device 1000 connected to the processor 1110 and perform various data processing or operations. According to an embodiment, as at least part of the data processing or operation, the processor 1110 may store a command or data received from another component (e.g., the input module 1130, the sensor module 1161, or the communication module 1173) in the volatile memory 1121, process the command or data stored in the volatile memory 1121, and store the resulting data in the non-volatile memory 1122.

[0176] The processor 1110 may include a main processor 1111 and an auxiliary processor 1112. The main processor 1111 may include a central processing unit (CPU) 1111-1. The main processor 1111 may further include any one or more of a graphics processing unit (GPU) 1111-2, a communication processor (CP), and an image signal processor (ISP). The main processor 1111 may further include a neural network processing unit (NPU) 1111-3. NPU 1111-3 is a processor specifically for processing artificial intelligence models, and the artificial intelligence model can be generated through machine learning. The artificial intelligence model may include multiple artificial neural network layers. The artificial neural network may be one of a deep neural network (DNN), a convolutional neural network (CNN), a recurrent neural network (RNN), a restricted Boltzmann machine (RBM), a deep belief network (DBN), a bidirectional recurrent deep neural network (BRDNN), and a deep Q network, or a combination of two or more of the above, but is not limited to the examples described above. In addition or alternatively, in addition to the hardware structure, the artificial intelligence model may also include a software structure. At least two of the processing units and processors described above may be implemented as one integrated structure (eg, a single chip), or each may be implemented as an independent structure (eg, a plurality of chips).

[0177] The auxiliary processor 1112 may include a controller 1112-1. The controller 1112-1 may include an interface conversion circuit and a timing control circuit. For example, the controller 1112-1 may include Figure 1 For example, the controller 1112-1 may include Figure 2 The temperature determiner 160 is shown in FIG.

[0178] The controller 1112-1 receives an image signal from the main processor 1111, converts the image signal data format according to the interface specification with the display module 1140, and outputs the converted image data. The controller 1112-1 may further output various control signals required to drive the display module 1140.

[0179] The auxiliary processor 1112 may further include a data conversion circuit 1112-2, a gamma correction circuit 1112-3, a rendering circuit 1112-4, a touch control circuit 1112-5, etc. The data conversion circuit 1112-2 may receive image data from the controller 1112-1, compensate the image data according to the characteristics of the electronic device 1000 or user settings to display an image with desired brightness, or convert the image data to reduce power consumption or compensate for afterimages.

[0180] The gamma correction circuit 1112-3 may convert image data using a gamma reference voltage, etc. so that an image displayed on the electronic device 1000 has a desired gamma characteristic. The rendering circuit 1112-4 may receive image data from the controller 1112-1 and render the image data in consideration of pixel placement, etc., of the display panel 1141 applied to the electronic device 1000.

[0181] The touch control circuit 1112 - 5 may supply a touch signal to the input sensor 1161 - 2 and receive a sensing signal in response to the touch signal from the input sensor 1161 - 2 .

[0182] At least one of the data conversion circuit 1112-2, the gamma correction circuit 1112-3, the rendering circuit 1112-4, and the touch control circuit 1112-5 may be integrated into another component (e.g., the main processor 1111 or the controller 1112-1). At least one of the data conversion circuit 1112-2, the gamma correction circuit 1112-3, and the rendering circuit 1112-4 may be integrated into a source driver 1143 described later.

[0183] The memory 1120 may store various data used by at least one component of the electronic device 1000 (e.g., the processor 1110 or the sensor module 1161) and input data or output data for commands related to the at least one component. In addition, various setting data corresponding to user settings may be stored in the memory 1120. The memory 1120 may include at least one of a volatile memory 1121 and a non-volatile memory 1122.

[0184] The input module 1130 may receive commands or data to be used by components of the electronic device 1000 (eg, the processor 1110 , the sensor module 1161 , or the sound output module 1163 ) from outside the electronic device 1000 (eg, a user or an external electronic device 2000 ).

[0185] The input module 1130 may include a first input module 1131 to which a command or data is input from a user and a second input module 1132 to which a command or data is input from an external electronic device 2000. The first input module 1131 may include a microphone, a mouse, a keyboard, a key (e.g., a button) or a pen (e.g., a passive pen or an active pen). The second input module 1132 may support a specified protocol that can be connected to the external electronic device 2000 by wire or wireless. According to an embodiment, the second input module 1132 may include a high-definition multimedia interface (HDMI), a universal serial bus (USB) interface, an SD card interface or an audio interface. The second input module 1132 may include a connector that can be physically connected to the external electronic device 2000, such as an HDMI connector, a USB connector, an SD card connector or an audio connector (e.g., a headphone connector).

[0186] The display module 1140 provides information to the user visually. The display module 1140 may include a display panel 1141, a gate driver 1142, a source driver 1143, and a voltage generating circuit 1144. The display module 1140 may further include a window, a chassis, and a bracket for protecting the display panel 1141. The display module 1140 may include Figure 2 At least part of the structure of the display device 100 shown in FIG.

[0187] The display panel 1141 (or display) may include a liquid crystal display panel, an organic light emitting display panel, or an inorganic light emitting display panel, and the type of the display panel 1141 is not particularly limited. The display panel 1141 may be a rigid type or a flexible type that can be rolled or folded. The display module 1140 may further include a support, a bracket, or a heat dissipation member to support the display panel 1141. The display panel 1141 may include Figure 2 The display unit 110 shown in FIG.

[0188] The gate driver 1142 may be mounted on the display panel 1141 as a driver chip. In addition, the gate driver 1142 may be integrated into the display panel 1141. For example, the gate driver 1142 may include an amorphous silicon TFT gate driver circuit (ASG), a low temperature polysilicon (LTPS) TFT gate driver circuit, or an oxide semiconductor TFT gate driver circuit (OSG) built into the display panel 1141. The gate driver 1142 receives a control signal from the controller 1112-1 and outputs a scan signal to the display panel 1141 in response to the control signal. The gate driver 1142 may include Figure 2 The scan driver 120 shown in FIG.

[0189] The display module 1140 may further include an emission driver. The emission driver may output an emission control signal to the display panel 1141 in response to a control signal received from the controller 1112-1. The emission driver may be formed separately from the gate driver 1142 or may be integrated into the gate driver 1142. The emission driver may include Figure 2 The transmit driver 150 shown in FIG.

[0190] The source driver 1143 receives a control signal from the controller 1112-1, converts image data into an analog voltage (eg, a data signal) in response to the control signal, and outputs the data signal to the display panel 1141. The source driver 1143 may include Figure 2 The data driver 130 is shown in FIG.

[0191] The source driver 1143 may be integrated into another component (eg, the controller 1112-1). The functions of the interface conversion circuit and the timing control circuit of the controller 1112-1 described above may be integrated into the source driver 1143. The voltage generating circuit 1144 may output various voltages required to drive the display panel 1141.

[0192] In an embodiment, the source driver 1143 may convert data corresponding to red (R), green (G), and blue (B) included in image data received from the processor 1110 into a red data signal (or data voltage), a green data signal, and a blue data signal, and may provide the red data signal, the green data signal, and the blue data signal to a plurality of pixel columns included in the display panel 1141 during one horizontal period.

[0193] The power module 1150 supplies power to the components of the electronic device 1000. The power module 1150 may include a battery that supplies a power supply voltage. The battery may include a non-rechargeable primary battery and a rechargeable secondary battery, or a fuel cell. The power module 1150 may include a power management integrated circuit (PMIC). The PMIC supplies optimized power to each of the modules described above and those described later. The power module 1150 may include a wireless power transmission / reception component electrically connected to the battery. The wireless power transmission / reception component may include multiple antenna radiators in the form of coils. In an embodiment, at least part of the structure of the power module 1150 and the voltage generation circuit 1144 may be integrated and provided in one. As an example, the voltage generation circuit 1144 may be included in the power module 1150.

[0194] The electronic device 1000 may further include an internal module 1160 and an external module 1170. The internal module 1160 may include a sensor module 1161, an antenna module 1162, and a sound output module 1163. The external module 1170 may include a camera module 1171, an optical module 1172, and a communication module 1173.

[0195] The sensor module 1161 can sense input by the user's body or input by a pen in the first input module 1131 and can generate an electrical signal or data value corresponding to the input. The sensor module 1161 can include at least one of a fingerprint sensor 1161-1, an input sensor 1161-2, and a digitizer 1161-3.

[0196] Fingerprint sensor 1161 - 1 may generate a data value corresponding to the user's fingerprint.

[0197] The input sensor 1161-2 can generate data values ​​corresponding to the coordinate information of the input performed by the user's body or the pen. The input sensor 1161-2 generates a capacitance change as a data value according to the input. The input sensor 1161-2 can sense the input performed by the passive pen, or can transmit and receive data to and from the active pen.

[0198] The input sensor 1161-2 can measure biometric signals such as blood pressure, water content, or body fat. For example, when a user touches the sensor layer or sensing panel with a body part and does not move for a specific period of time, the input sensor 1161-2 can sense the biometric signal based on the change in the electric field caused by the body part and output the user's desired information to the display module 1140.

[0199] The digitizer 1161-3 can generate a data value corresponding to the coordinate information of the input performed by the pen. The digitizer 1161-3 generates the amount of electromagnetic change as a data value by the input. The digitizer 1161-3 can sense the input performed by the passive pen, or can transmit and receive data to and from the active pen.

[0200] At least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be implemented as a sensor layer formed on the display panel 1141 through a continuous process. At least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be disposed above the display panel 1141, and any one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 (e.g., the digitizer 1161-3) may be disposed below the display panel 1141.

[0201] At least two of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be formed using the same process and integrated into a single sensing panel. When at least two of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 are integrated into a single sensing panel, the sensing panel may be disposed between the display panel 1141 and a window disposed above the display panel 1141. Depending on the embodiment, the sensing panel may be disposed on the window, and the position of the sensing panel is not particularly limited.

[0202] At least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be embedded in the display panel 1141. That is, at least one of the fingerprint sensor 1161-1, the input sensor 1161-2, and the digitizer 1161-3 may be simultaneously formed by a process of forming elements (e.g., a light emitting element and a transistor, etc.) included in the display panel 1141.

[0203] In addition, the sensor module 1161 can generate an electrical signal or a data value corresponding to an internal state or an external state of the electronic device 1000. The sensor module 1161 may further include, for example, a gesture sensor, a gyro sensor, an air pressure sensor, a magnetic sensor, an acceleration sensor, a grip sensor, a proximity sensor, a color sensor, an infrared (IR) sensor, a biometric sensor, a temperature sensor, a humidity sensor, or an illumination sensor.

[0204] The antenna module 1162 may include one or more antennas for transmitting signals or power to the outside or receiving signals or power from the outside. Depending on the embodiment, the communication module 1173 may transmit signals to the external electronic device 2000 or receive signals from the external electronic device 2000 through an antenna suitable for the communication method. The antenna pattern of the antenna module 1162 may be integrated into a structure of the display module 1140 (e.g., the display panel 1141) or the input sensor 1161-2.

[0205] The sound output module 1163 may be a device for outputting sound signals to the outside of the electronic device 1000, and may include, for example, a speaker for general purposes such as multimedia playback or recording playback, and a receiver specifically for receiving calls. Depending on the embodiment, the receiver may be integrally formed with the speaker or formed separately. The sound output mode of the sound output module 1163 may be integrated into the display module 1140.

[0206] The camera module 1171 can capture still images and moving images. Depending on the embodiment, the camera module 1171 may include one or more lenses, image sensors, or image signal processors. The camera module 1171 may further include an infrared camera capable of measuring the presence or absence of a user, the user's position, and the user's gaze.

[0207] The light module 1172 may provide light. The light module 1172 may include a light emitting diode or a xenon lamp. The light module 1172 may operate in conjunction with the camera module 1171 or may operate independently.

[0208] The communication module 1173 can support the establishment of a wired or wireless communication channel between the electronic device 1000 and the external electronic device 2000 and communication through the established communication channel. The communication module 1173 may include any one or two of a wireless communication module such as a cellular communication module, a short-range wireless communication module or a global navigation satellite system (GNSS) communication module and a wired communication module such as a local area network (LAN) communication module or a power line communication module. The communication module 1173 can communicate with the external electronic device 2000 through a short-range communication network such as Bluetooth, WiFi Direct or Infrared Data Association (IrDA) or a long-range communication network such as a cellular network, the Internet or a computer network (e.g., LAN or WAN). The various types of communication modules 1173 described above can be implemented as a single chip or as separate chips.

[0209] The input module 1130 , the sensor module 1161 , the camera module 1171 , and the like may be used to control the operation of the display module 1140 in conjunction with the processor 1110 .

[0210] The processor 1110 may output commands or data to the display module 1140, the sound output module 1163, the camera module 1171, or the optical module 1172 based on input data received from the input module 1130. For example, the processor 1110 may generate image data in response to input data applied via a mouse or an active pen, etc., and output the image data to the display module 1140, or generate command data in response to the input data and output the command data to the camera module 1171 or the optical module 1172. When no input data is received from the input module 1130, the processor 1110 may convert the operation mode of the electronic device 1000 into a low power consumption mode or a sleep mode to reduce power consumption in the electronic device 1000.

[0211] The processor 1110 can output commands or data to the display module 1140, the sound output module 1163, the camera module 1171, or the optical module 1172 based on the sensing data received from the sensor module 1161. For example, the processor 1110 can compare the authentication data applied by the fingerprint sensor 1161-1 with the authentication data stored in the memory 1120 and execute an application based on the comparison result. The processor 1110 can execute a command based on the sensing data sensed by the input sensor 1161-2 or the digitizer 1161-3, or output corresponding image data to the display module 1140. When the sensor module 1161 includes a temperature sensor, the processor 1110 can receive temperature data corresponding to the measured temperature from the sensor module 1161 and further perform brightness correction on the image data based on the temperature data.

[0212] The processor 1110 may receive measurement data regarding the user's presence, the user's position, and the user's gaze from the camera module 1171. The processor 1110 may further perform brightness correction on the image data based on the measurement data. For example, the processor 1110, having determined the presence or absence of the user based on the input from the camera module 1171, may output image data to the display module 1140 after the brightness of the image data has been corrected by the data conversion circuit 1112-2 or the gamma correction circuit 1112-3.

[0213] Some of the components described above may be connected to each other through a communication method such as a bus, general-purpose input / output (GPIO), serial peripheral interface (SPI), mobile industry processor interface (MIPI), or ultra-path interconnect (UPI) link between peripheral devices to exchange signals (e.g., commands or data). The processor 1110 may communicate with the display module 1140 through an interface agreed upon by both parties (e.g., any of the communication methods described above may be used, but is not limited to the communication methods described above).

[0214] Although the above has been described with reference to the embodiments of the present disclosure, it will be understood by those skilled in the art that various modifications and changes can be made to the present disclosure without departing from the spirit and scope of the present disclosure as described in the claims.

Claims

1. A display device comprising: A display unit including pixels connected to data lines and scan lines and divided into a plurality of blocks each including two or more of the pixels; at least one driver, configured to drive the display unit; as well as a temperature determiner for predicting the temperature of the display unit in units of the block, The block includes a first block including a first sub-block arranged adjacent to the driver and a second block including a second sub-block arranged spaced apart from the driver, and an area of ​​each of the first sub-blocks is different from an area of ​​each of the second sub-blocks.

2. The display device according to claim 1, wherein The area of ​​each of the first sub-blocks is smaller than the area of ​​each of the second sub-blocks.

3. The display device according to claim 2, wherein: The area of ​​the first sub-block gradually increases as the distance from the driver increases.

4. The display device according to claim 2, wherein The display unit is divided into a plurality of horizontal lines and a plurality of vertical lines corresponding to the disposition of the first sub-block and the second sub-block.

5. The display device according to claim 4, wherein The first sub-blocks arranged in the same horizontal line or the same vertical line have the same area. The display device according to claim 5 , wherein: The area of ​​the first sub-block gradually increases as the distance from the driver increases.

7. The display device according to claim 4, wherein The driver is provided on an upper side or a lower side of the display unit, and the first sub-block is arranged in at least one horizontal line adjacent to the driver among the plurality of horizontal lines.

8. The display device according to claim 4, wherein The driver is provided on the left or right side of the display unit, and the first sub-block is arranged in at least one vertical line adjacent to the driver among the plurality of vertical lines.

9. The display device according to claim 4, wherein: The driver overlaps the display unit, and the first sub-block is arranged at an intersection of at least one horizontal line and at least one vertical line overlapping the driver among the plurality of horizontal lines and the plurality of vertical lines.

10. The display device according to claim 9, wherein A plurality of the first sub-blocks are arranged adjacent to the driver, and the areas of the first sub-blocks are the same.

11. The display device according to claim 9, wherein A plurality of the first sub-blocks are arranged adjacent to the driver, and the areas of the first sub-blocks gradually increase as the distance from the driver increases.

12. The display device according to claim 1, further comprising: at least one data integrated circuit, configured to drive the data line; A scan driver, configured to drive the scan lines; as well as A timing controller controls the data integrated circuit and the scan driver and includes the temperature determiner.

13. The display device according to claim 12, wherein: The driver includes at least one of the data integrated circuit, the scan driver, and the timing controller.

14. The display device according to any one of claims 1 to 13, wherein: The temperature determiner comprises: a temperature calculator for generating the temperature of the display unit by calculating temperatures of the first sub-block and the second sub-block included in the display unit in response to the temperature prediction value of the driver; and A memory is configured to provide the temperature calculator with position information and area information of the first sub-block and the second sub-block.

15. The display device according to claim 14, wherein The temperature determiner further comprises: a voltage determiner for generating voltage data including voltage information corresponding to a grayscale level of input data; and A temperature predictor is configured to generate the temperature prediction value using the voltage data.

16. A method for driving a display device, the method comprising: dividing a display unit of the display device into a plurality of blocks for determining a temperature of the display unit; determining a temperature of the mass in response to input data; as well as displaying an image corresponding to the input data on the display unit using at least one driver, The block includes at least one first sub-block arranged adjacent to the driver and at least one second sub-block arranged spaced apart from the driver, and an area of ​​the first sub-block is different from an area of ​​the second sub-block.

17. The method according to claim 16, wherein The area of ​​the first sub-block is smaller than the area of ​​the second sub-block.

18. The method according to claim 17, wherein: The block includes a plurality of the first sub-blocks, and the areas of the first sub-blocks gradually increase as the distance from the driver increases.

19. An electronic device comprising: a display module comprising a display panel for displaying an image and at least one driver for driving the display panel; as well as a processor for controlling the display module, The display panel is divided into a plurality of blocks for determining temperature, and an area of ​​a first sub-block arranged adjacent to the driver in the block is different from an area of ​​a second sub-block arranged spaced apart from the driver in the block.

20. The electronic device according to claim 19, wherein The area of ​​the first sub-block is smaller than the area of ​​the second sub-block.

Citation Information

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