Testing device and interface resistivity detection method

Abstract

The embodiment of the invention provides a testing device and an interface resistivity detection method, and relates to the field of semiconductors. The testing device is used for detecting a to-be-tested sample. The testing device comprises a sample table, and an image detection device, a first detection device and a second detection device which are arranged on the sample table, the testing device further comprises a current source, a voltage detection device and a processor. The current source and the voltage detection device are connected with the first detection device and the second detection device. Wherein the image detection device is used for acquiring an image of a to-be-detected sample placed on the sample table; the processor is used for controlling the first detection device to be in contact with a first electrode in the to-be-detected sample and controlling the second detection device to be in contact with a second electrode in the to-be-detected sample according to the image, displayed by the image detection device, of the to-be-detected sample; the current source is used for providing constant current for the to-be-tested sample; the voltage detection device is used for detecting a voltage value between the first electrode and the second electrode of the to-be-detected sample.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of semiconductor technology, and in particular to a testing device and a method for detecting interface resistivity. Background Art

[0002] Semiconductor devices often have interfaces between dissimilar materials, such as semiconductor materials and metal alloy electrodes, which can generate interfacial resistance. This interface resistance can affect device performance. For example, increased interface resistance can severely impair the cooling performance of a refrigeration device. Therefore, it is necessary to measure the interfacial resistivity of semiconductor devices. Summary of the Invention

[0003] The embodiments of the present application provide a testing device and a method for detecting interface resistivity, which are used to detect the interface resistivity of a sample to be tested and improve the test accuracy of the interface resistivity.

[0004] To achieve the above objectives, the embodiments of the present application adopt the following technical solutions:

[0005] In a first aspect, a testing device is provided, which is used to detect a sample to be tested, wherein the sample to be tested includes a semiconductor layer and a first electrode and a second electrode arranged on the semiconductor layer in sequence along a first direction.

[0006] The testing device includes: a sample stage, an image detection device, a first detection device and a second detection device arranged on the sample stage; the testing device also includes: a current source, a voltage detection device and a processor, the current source is connected to the first detection device and the second detection device; the voltage detection device is connected to the first detection device and the second detection device; wherein, the image detection device is used to obtain an image of the sample to be tested placed on the sample stage; the processor is used to control the first detection device to contact the first electrode in the sample to be tested, and control the second detection device to contact the second electrode in the sample to be tested according to the image of the sample to be tested displayed by the image detection device; the current source is used to provide a constant current to the sample to be tested; the voltage detection device is used to detect the voltage value between the first electrode and the second electrode of the sample to be tested.

[0007] The test device provided in the embodiment of the present application is combined with an image detection device, a first detection device and a second detection device. The processor can identify the positions of the first electrode and the second electrode in the sample to be tested based on the image of the sample to be tested taken by the image detection device. Then, the first detection device is controlled to contact the first electrode in the sample to be tested, and the second detection device is controlled to contact the second electrode in the sample to be tested based on the recognition result. In this way, the constant current provided by the current source can be applied to the sample to be tested through the first detection device and the second detection device, and the voltage value between the first electrode and the second electrode of the sample to be tested can be measured. Therefore, the test device provided in the embodiment of the present application can also test the sample to be tested when the size of the sample to be tested is at the micron level, which can improve the test accuracy and expand the test range. It is suitable for small samples where the uniformity of the thin film fails under large-scale conditions, and has broad application prospects.

[0008] In one possible embodiment, the first detection device includes a first probe and a second probe, and the stepping accuracy of the first probe and the second probe in three directions perpendicular to each other is less than or equal to 1 μm; the second detection device includes a third probe and a fourth probe, and the stepping accuracy of the third probe and the fourth probe in three directions perpendicular to each other is less than or equal to 1 μm.

[0009] This testing device can also test the sample to be tested when the size of the sample is at the micron level, expanding the test range. It is suitable for tiny samples where film uniformity fails under large-scale conditions and has broad application prospects.

[0010] In one possible embodiment, the first and third probes are used to apply a constant current to the sample under test. The second and fourth probes, together with the voltage detection device and the sample under test, form a conductive loop for detecting the voltage between the first and second electrodes of the sample under test. This creates a four-wire connection between the sample under test, the current source, and the voltage detection device. This four-wire connection effectively reduces the impact of internal circuit resistance on measurement results, improving measurement accuracy.

[0011] In one possible embodiment, the testing apparatus further includes a temperature control station disposed on the sample stage, configured to provide a preset temperature for the sample to be tested. Thus, the temperature control station simulates the actual temperature field conditions of the sample to be tested, allowing for accurate measurement of the interface resistivity of the sample to be tested at different temperatures.

[0012] In a possible embodiment, the testing device further includes a temperature controller, which is used to control the temperature control platform to provide a preset temperature for the sample to be tested.

[0013] In one possible embodiment, the testing device further includes a vacuum chamber and a first vacuum pump. The first detection device, the second detection device, the image detection device, and the sample to be tested are disposed within the vacuum chamber. The first vacuum pump is configured to create a vacuum within the vacuum chamber, thereby reducing heat leakage caused by air convection.

[0014] In one possible embodiment, the testing device further includes a second vacuum pump. The sample stage is provided with a vacuum channel that is connected to the second vacuum pump. The second vacuum pump is configured to adsorb the sample to be tested onto the sample stage through the vacuum channel, thereby ensuring insulation between the sample stage and the sample to be tested.

[0015] In one possible embodiment, the sample to be tested also includes a third electrode arranged along the first direction on the semiconductor layer; the processor is also used to control the second detection device to contact the third electrode in the sample to be tested based on the image of the sample to be tested displayed by the image detection device; and the voltage detection device is used to detect the voltage value between the first electrode and the third electrode of the sample to be tested.

[0016] In one possible embodiment, the processor is also used to calculate the interface resistance and interface resistivity of the sample to be tested based on the voltage value between the first electrode and the second electrode of the sample to be tested, the distance between the first electrode and the second electrode, the voltage value between the first electrode and the third electrode of the sample to be tested, and the distance between the first electrode and the third electrode.

[0017] In a second aspect, a method for detecting interface resistivity is provided. The method is used to detect a sample to be tested, wherein the sample to be tested includes a semiconductor layer and a first electrode, a second electrode, and a third electrode arranged in an array on the semiconductor layer. The method for detecting interface resistivity includes: applying a constant current to the sample to be tested; obtaining a voltage value between the first electrode and the second electrode of the sample to be tested; obtaining a voltage value between the first electrode and the third electrode of the sample to be tested; and calculating the interface resistivity of the sample to be tested based on the voltage value between the first electrode and the second electrode of the sample to be tested, the distance between the first electrode and the second electrode, the voltage value between the first electrode and the third electrode of the sample to be tested, and the distance between the first electrode and the third electrode.

[0018] In a possible implementation, the detection method further includes: changing the temperature of the sample to be tested; and obtaining the interface resistivity of the sample to be tested at different temperatures.

[0019] In a third aspect, a computer-readable storage medium is provided, wherein the computer-readable storage medium includes a computer program, and when the computer program is executed on an electronic device, the electronic device executes the method provided in the second aspect.

[0020] In a fourth aspect, a computer program product is provided. When the computer program product is run on a computer, the computer is caused to execute the method provided in the second aspect.

[0021] Among them, the technical effects brought about by any possible implementation of the second to fourth aspects can refer to the technical effects brought about by different implementations of the above-mentioned first aspect, and will not be repeated here. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 A schematic diagram of the structure of the test device provided in an embodiment of the present application;

[0023] Figure 2 A schematic structural diagram of a testing device provided in yet another embodiment of the present application;

[0024] Figure 3 A schematic structural diagram of a testing device provided in yet another embodiment of the present application;

[0025] Figure 4 A schematic flow chart of a method for detecting interface resistivity provided in an embodiment of the present application;

[0026] Figure 5 A schematic diagram of the corresponding relationship between the electrode spacing and the total resistance value of the device under test provided in an embodiment of the present application;

[0027] Figure 6 A schematic diagram of the corresponding relationship between the electrode spacing and the total resistance value of the device under test provided in another embodiment of the present application;

[0028] Figure 7 A schematic diagram of the corresponding relationship between the electrode spacing and the total resistance value of the device under test provided in another embodiment of the present application;

[0029] Figure 8 A schematic diagram of the corresponding relationship between the electrode spacing and the total resistance value of the device under test provided in another embodiment of the present application;

[0030] Figure 9 A schematic diagram of the corresponding relationship between the electrode spacing and the total resistance value of the device to be tested provided in another embodiment of the present application. DETAILED DESCRIPTION

[0031] The technical solutions in the embodiments of the present application will be described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments.

[0032] In the following, the terms "first," "second," etc., are used for descriptive convenience only and should not be understood to indicate or imply relative importance or implicitly specify the number of the technical features indicated. Thus, a feature specified as "first," "second," etc. may explicitly or implicitly include one or more of the features. In the description of this application, unless otherwise specified, "plurality" means two or more.

[0033] In the embodiments of this application, words such as "exemplary" or "for example" are used to indicate examples, illustrations, or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of this application should not be construed as being preferred or advantageous over other embodiments or designs. Rather, the use of words such as "exemplary" or "for example" is intended to present the relevant concepts in a concrete manner.

[0034] Semiconductor devices often involve interfaces between heterogeneous materials, such as semiconductor materials and metal alloy electrodes. These surface and interfacial physical effects significantly impact the device's characteristic parameters, stability, and reliability. For example, Ohmic contacts and Schottky contacts in semiconductor devices can form different interfacial resistances. This interfacial resistance can lead to device failure, significantly increasing production costs and losses. Therefore, testing the contact resistivity of heterogeneous interfaces, such as those between metals and semiconductors, has significant technical and economic value.

[0035] For example, in the field of thermoelectrics, thermoelectric devices are power generation and cooling devices based on the Seebeck effect and the Peltier effect. Thermoelectric devices are able to achieve power generation or cooling because the charge carriers within the material can be used as heat transport. Thermoelectric devices have the advantages of being noiseless, fully solid-state, highly reliable, and having a fast response speed. Compared with traditional passive heat dissipation methods such as air cooling and heat pipes, thermoelectric cooling technology has ultra-high cooling density and cooling response rate, and does not require complex external components and external installation conditions. Therefore, thermoelectric cooling technology has become one of the technologies for active cooling of hot spots in optoelectronic chips and high-power chips, and is of great significance to the future development of the semiconductor chip industry. Compared with traditional three-dimensional thermoelectric cooling devices, two-dimensional thermoelectric thin film cooling devices have the advantages of miniaturization, bendability, and ease of integration. Thermoelectric thin film cooling devices are expected to be directly integrated with chips through metal oxide semiconductor (CMOS) technology, which can greatly stabilize the chip's operating performance.

[0036] In a specific example, the influence of interface resistivity on device performance is described below using a thermoelectric thin film cooling device as an example.

[0037] Thermoelectric thin-film cooling devices typically consist of a multilayered structure consisting of a thermoelectric film, a barrier layer, a transition layer, a solder layer, and electrodes, with each layer thickness limited to the micrometer level. The barrier layer prevents diffusion and chemical reactions between the thermoelectric material and the electrode layer, forming a stable interface. The transition layer promotes bonding between the thermoelectric material and the electrode, enhancing bonding strength. Solder, a filler in the solder layer, secures the thermoelectric material and electrode, enabling current conduction. Due to the unique fabrication characteristics of thermoelectric thin-film devices, the interfacial resistance formed at the heterojunction interface is often related to the surface morphology, microstructure, and work function of the bonding materials. This affects carrier transport across the interface, resulting in significant interfacial resistance. Increased interfacial resistance can severely impair the device's cooling performance, reducing the maximum temperature difference across the device, the maximum cooling capacity, and the cooling efficiency coefficient. Therefore, it is essential to test the interfacial contact resistance of thermoelectric thin-film devices. The test results serve as a reference for controlling interfacial resistance, optimizing thermoelectric device manufacturing processes and refining simulation theoretical models. This allows for the establishment of interfacial resistance optimization standards to achieve highly reliable, low-resistivity interfacial connections between the thermoelectric film and the electrode.

[0038] However, the authenticity of current interface resistivity test data is difficult to guarantee. Due to the special properties of thin film preparation, semiconductor materials grown using either chemical vapor deposition (CVD) or physical vapor deposition (PVD) methods cannot be prepared without a substrate. Therefore, they are significantly different from bulk materials. This makes the methods and testing devices suitable for bulk material interface resistivity testing unsuitable for testing semiconductor layers formed on substrates. Existing semiconductor interface resistance test results are single, essentially representing the interface resistivity at room temperature. However, under operating conditions, the temperature of the device's heat-absorbing and heat-releasing ends changes in real time, and the interface resistivity changes with temperature. Even slight changes can significantly affect the device's cooling performance. Therefore, the room-temperature measurement data cannot meet the modulation requirements of semiconductor devices.

[0039] To this end, an embodiment of the present application provides a method for detecting interface resistivity. The detection method includes: assuming a Pb-Al material reference body with no interface contact resistance and the same shape and cross-sectional area as the material to be tested, measuring the total resistance of the body to be tested and the resistances of the Al and Pb matrix materials R-(Al) and R-(Pb) using a four-point collinear probe method. Using scanning electron microscope microscale calibration technology, the Pb matrix width l~(')-(Pb), Al matrix width l-(Al), single-side interface width l-(interface), and cross-sectional area S of the body to be tested are measured, and the resistivities of the Al and Pb matrices of the Pb-Sn-Al layered composite bulk material to be tested are calculated. The reference body resistance is obtained based on the resistivities of the Al and Pb matrices, and the interface resistivity is then calculated based on the reference body resistance.

[0040] The method provided in the embodiments of the present application has the advantages of easy operation, simple and easy calculation method, and the interface width of the measured layered composite bulk material can reach below the micron level. However, the method can only measure the interface resistivity between multilayer structures if there is no interface reaction during the device preparation process and the scanning electron microscope is required to accurately measure the interface thickness. When the film thickness of the device is reduced to the nanometer level, or when the film material preparation requires high temperature or chemical treatment such as annealing, the measurement conditions will not be met, which will lead to significant test errors in the final measured interface resistivity.

[0041] The present application provides a method for detecting interface resistivity. The method includes: measuring the thickness of an insulating film; applying an active slurry on the insulating film and drying it to obtain an insulating film with an active coating, and measuring the total thickness of the insulating film with the active coating and the resistance of the active coating; providing a current collector foil and measuring the thickness of the foil; applying the active slurry on the foil and drying it to obtain a pole piece, and measuring the thickness and pole piece resistance of the pole piece; and obtaining the pole piece interface resistance based on the thickness of the insulating film, the total thickness of the insulating film with the active coating, the resistance of the active coating on the insulating film, the thickness of the foil, the thickness of the pole piece, and the pole piece resistance.

[0042] This method has a narrow scope of application. The semiconductor layers of a large number of samples to be tested do not use this preparation method. In addition, the thickness of each layer needs to be measured during the test process, such as the thickness of the insulating film and the thickness of the foil. When the thickness of each layer of the sample to be tested is reduced to the nanometer level, it is easy to introduce large errors.

[0043] The present application also provides a testing device for testing a sample 11, wherein the sample 11 includes a semiconductor layer and a first electrode and a second electrode arranged in sequence along a first direction on the semiconductor layer.

[0044] like Figure 1As shown, the test device includes: a sample stage 1, an image detection device 3, a first detection device 21 and a second detection device 22 arranged on the sample stage 1; the test device also includes: a current source 6, a voltage detection device 5 and a processor 9, the current source 6 is connected to the first detection device 21 and the second detection device 22; the voltage detection device 5 is connected to the first detection device 21 and the second detection device 22; wherein, the image detection device 3 is used to obtain an image of the sample to be tested 11 placed on the sample stage 1; the processor 9 is used to control the first detection device 21 to contact with the first electrode in the sample to be tested 11, and control the second detection device 22 to contact with the second electrode in the sample to be tested 11 according to the image of the sample to be tested 11 displayed by the image detection device 3; the current source 6 is used to provide a constant current to the sample to be tested 11; the voltage detection device 5 is used to detect the voltage value between the first electrode and the second electrode of the sample to be tested 11.

[0045] The test device provided in the embodiment of the present application is combined with the image detection device 3, the first detection device 21 and the second detection device 22. The processor 9 can identify the positions of the first electrode and the second electrode in the sample to be tested 11 based on the image of the sample to be tested 11 taken by the image detection device 3. Then, according to the recognition result, the first detection device 21 is controlled to contact the first electrode in the sample to be tested 11, and the second detection device 22 is controlled to contact the second electrode in the sample to be tested 11. In this way, the constant current provided by the current source 6 can be applied to the sample to be tested 11 through the first detection device 21 and the second detection device 22, and the voltage value between the first electrode and the second electrode of the sample to be tested 11 can be measured. Therefore, the test device provided in the embodiment of the present application can also test the sample to be tested 11 when the size of the sample to be tested 11 is at the micron level, which can improve the test accuracy and expand the test range. It is suitable for small samples where the uniformity of the thin film fails under large-scale conditions and has broad application prospects.

[0046] The present application also provides a testing device. Figure 2 and Figure 3 As shown, the testing device includes: a sample stage 1 , a current source 6 , a voltage detection device 5 , an image detection device 3 , a first detection device 21 , a second detection device 22 and a processor 9 .

[0047] The processor 9 may include one or more processing units, for example, the processor 9 may include an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and / or a neural network processing unit (NPU). The different processing units may be independent devices or integrated into one or more processors. The controller may generate an operation control signal based on the instruction opcode and the timing signal to complete the control of instruction fetching and execution.

[0048] Processor 9 may also include a memory for storing instructions and data. In some embodiments, the memory in processor 9 is a high-speed cache memory that can store instructions or data that have just been used or are recycled by processor 9. If processor 9 needs to use the same instruction or data again, it can directly call it from the memory. This avoids repeated accesses, reduces processor 9's waiting time, and thus improves system efficiency.

[0049] In some embodiments, the processor 9 may include multiple interfaces. The processor 9 is connected to the current source 6, the voltage detection device 5, the image detection device 3, the first detection device 21, and the second probe 212 device 22 respectively through the multiple interfaces. The multiple interfaces of the processor 9 may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a subscriber identity module (SIM) interface, and / or a universal serial bus (USB) interface, etc.

[0050] A vacuum channel is provided at the bottom of the sample stage 1, which is connected to a second vacuum pump. The second vacuum pump is used to adsorb the sample 11 to be tested on the sample stage 1 through the vacuum channel, thereby ensuring that the sample stage 1 is insulated from the sample 11 to be tested. For example, the sample 11 to be tested can be a self-supporting single-layer thermoelectric film, that is, the sample 11 to be tested includes a semiconductor layer 112 and an array of a first electrode 111, a second electrode 114 and at least one third electrode 115 arranged on the semiconductor layer 112, and the widths of the first electrode 111, the second electrode 114 and the at least one third electrode 115 are greater than the width of the semiconductor layer. Or the sample 11 to be tested is a double-layer material formed on a hard substrate 113, that is, Figure 3 As shown, the sample 11 to be tested includes a substrate 113 , a semiconductor layer 112 disposed on the substrate, and a first electrode 111 , a second electrode 114 and a third electrode 115 disposed on the semiconductor layer 112 .

[0051] like Figure 3 As shown, the first detection device 21 and the second detection device 22 are respectively arranged at the two ends of the sample stage 1, and the first detection device 21 and the second detection device 22 are connected to the current source 6 and the voltage detection device 5. Exemplarily, a three-axis stepping device 2 is also provided on the sample stage 1, and the first detection device 21 and the second detection device 22 are arranged on the three-axis stepping device 2, so that the first detection device 21 and the second detection device 22 can move along any direction of the x-axis direction, the y-axis direction and the z-axis direction, the x-axis direction is parallel to the first direction, and the x-axis direction, the y-axis direction and the z-axis direction are perpendicular to each other.

[0052] In a specific example, the first detection device 21 includes a first probe 211 and a second probe 212, wherein the first probe 211 and the second probe 212 can move along any direction of the x-axis direction, the y-axis direction, and the z-axis direction. The stepping accuracy of the first probe 211 and the second probe 212 in the three directions is less than or equal to 1 μm. Accordingly, the second detection device 22 includes a third probe 221 and a fourth probe 222, wherein the third probe 221 and the fourth probe 222 can move along any direction of the x-axis direction, the y-axis direction, and the z-axis direction. The stepping accuracy of the third probe 221 and the fourth probe 222 in the three directions is less than or equal to 1 μm, thereby enabling the first detection device 21 to accurately contact the first electrode 111, and the second detection device to accurately contact the second electrode 114 and the third electrode 115.

[0053] Among them, the first probe 211 and the second probe 212 are in contact with the first electrode 111, and the third probe 221 and the fourth probe 222 are in contact with the second electrode 114, that is, the sample to be tested 11 forms a four-wire connection with the current source 6 and the voltage detection device 5, that is, the first probe 211 and the third probe 221 are used to apply a constant current to the sample to be tested 11; the second probe 212 and the fourth probe 222 are used to form a conductive circuit with the voltage detection device 5 and the sample to be tested 11 to detect the voltage value between the first electrode 111 and the second electrode 114 of the sample to be tested 11.

[0054] In one example, the voltage detection device 5 may be a voltmeter, the current source 6 communicates with the voltage detection device 5 via a serial port, and the noise of the voltage detection device 5 should be less than 0.009 mV.

[0055] The image detection device 3 is arranged on the sample stage 1 and above the sample to be tested 11, and is used to capture a static image or video of the sample to be tested 11. Exemplarily, the image detection device 3 is an electron microscope, and the sample to be tested 11 generates an optical image through a lens and projects it onto a photosensitive element. The photosensitive element can be a charge coupled device (CCD) or a complementary metal oxide semiconductor (CMOS) phototransistor. The photosensitive element converts the optical signal into an electrical signal, and then transmits the electrical signal to the ISP to convert it into a digital image signal. The ISP outputs the digital image signal to the DSP for processing. The DSP converts the digital image signal into an image signal in a standard format such as RGB, YUV, etc.

[0056] The current source 6 provides a constant transient alternating current to the sample 11 to be tested, and the current amplitude is controlled at the order of 1 mA; the voltage detection device 5 measures the real-time voltage information of the sample 11 to be tested, reads the low-noise voltage signal, and transmits it to the processor 9.

[0057] In some optional embodiments, the test device further includes a temperature control table 4 and a temperature controller 8. The temperature control table 4 is provided on the sample table 1, and the temperature control table 4 is used to provide a preset temperature for the sample to be tested 11. The temperature controller 8 is used to control the temperature control table 4 to provide a preset temperature for the sample to be tested 11. Exemplarily, the temperature controller 8 can be a PID controller, which can control the temperature control table 4 to provide a specific ambient temperature for the sample to be tested 11, with a temperature control range of -100°C to 300°C and a temperature control accuracy within ±1°C, thereby changing the temperature of the sample to be tested 11 itself or changing the temperature of the environment in which the sample to be tested 11 is located through the temperature control table 4. It can be understood that in other examples, the test device may only include the temperature control table 4, which provides a fixed ambient temperature for the sample to be tested 11.

[0058] In some optional embodiments, the testing device further includes a vacuum chamber 10 and a first vacuum pump 7. The sample stage 1, the temperature control stage 4, the first detection device 21, the second detection device 22, the image detection device 3, and the sample to be tested 11 are all arranged in the vacuum chamber 10. The first vacuum pump 7 is used to evacuate the vacuum chamber 10. For example, the first vacuum pump 7 is used to reduce the vacuum degree inside the vacuum chamber 10 to below 0.1 Pa, thereby reducing heat leakage caused by air convection. In some optional examples, the testing device further includes a vacuum connector, which is used to ensure the normal connection of the internal and external circuits of the vacuum chamber 10.

[0059] It should be noted that, in some optional embodiments, the testing device may also include only a first vacuum pump 7 , which is connected to the vacuum channel on the sample stage 1 and can also make the vacuum chamber 10 vacuum.

[0060] The present application also provides a method for detecting interface resistivity, which can be applied to the test device provided in the above embodiment. Figure 4 As shown, the detection method is as follows:

[0061] S10: The sample 11 to be tested is placed on the sample stage 1 and fixed, and the inside of the vacuum chamber is vacuumed.

[0062] S20: Adjust the focal length of the image detection device 3 until the image of the sample to be tested 11 is clear.

[0063] S21 : moving the image detection device 3 to above the first electrode 111 , and controlling the first probe 211 and the second probe 212 of the first detection device 21 to move to above the first electrode 111 based on the image of the sample 11 captured by the image detection device 3 .

[0064] S22 : Move the image detection device 3 along the x-axis stepping direction to move the image detection device 3 to above the second electrode 114 .

[0065] Exemplarily, the processor 9 calculates the width of the second electrode 114 based on the image of the sample to be tested 11 taken by the image detection device 3 and positions it to the middle position of the second electrode 114, or the processor 9 can also directly position the preset position of the second electrode 114 based on the image of the sample to be tested 11 taken by the image detection device 3, and then control the third probe 221 and the fourth probe 222 of the second detection device 22 to move to the middle position of the second electrode 114 or above the preset position.

[0066] S30 : controlling the first probe 211 and the third probe 221 to be pressed downward until the first probe 211 contacts the first electrode 111 and the third probe 221 contacts the second electrode 114 .

[0067] Since the current source 6 is turned on and the first detection device 21 and the second detection device 22 are connected to the current source 6 , the constant current provided by the current source 6 is applied to the sample 11 through the first probe 211 and the third probe 221 .

[0068] S31 : controlling the second probe 212 and the fourth probe 222 to be pressed downward until the second probe 212 contacts the first electrode 111 and the fourth probe 222 contacts the second electrode 114 .

[0069] S40: The temperature controller 8 controls the temperature control platform 4 to a predetermined temperature.

[0070] S41: The processor 9 receives the voltage value between the first electrode 111 and the second electrode 114 sent by the voltage detection device 5, and calculates a first total resistance value of the sample 11 under the first length. It is understood that the first length is the distance between the first electrode 111 and the second electrode 114.

[0071] In some optional examples, in order to further increase the accuracy of the test, when testing the total resistance value of the sample to be tested 11, the current source 6 can be made to generate a constant current that rises in a step-by-step manner, and a voltage value that rises in a step-by-step manner is correspondingly obtained, and the total resistance value of the multiple samples to be tested 11 is calculated accordingly. Finally, the average value of the total resistance value of the multiple samples to be tested 11 is calculated. Alternatively, in other optional examples, when testing the total resistance value of the sample to be tested 11, the voltage value between the first electrode 111 and the second electrode 114 can be tested multiple times while the magnitude of the constant current remains unchanged, for example, the voltage value between the first electrode 111 and the second electrode 114 is tested 10 times, thereby calculating the total resistance value of the multiple samples to be tested 11 based on the 10 voltage values ​​between the first electrode 111 and the second electrode 114, and calculating the average value of the total resistance value of the multiple samples to be tested 11 to obtain the first total resistance value of the sample to be tested 11 at the first length.

[0072] S42: Control the second detection device 22 to move to above the third electrode 115 along with the image detection device 3. The processor 9 calculates the width of the third electrode 115 based on the image of the sample to be tested 11 taken by the image detection device 3 and positions it to the middle position of the third electrode 115. Alternatively, the processor 9 can directly position the preset position of the third electrode 115 based on the image of the sample to be tested 11 taken by the image detection device 3, and then control the third probe 221 and the fourth probe 222 of the second detection device 22 to move to the middle position of the third electrode 115 or above the preset position.

[0073] S43: The processor 9 receives the voltage value between the first electrode 111 and the second electrode 114 sent by the voltage detection device 5, and calculates a second total resistance value of the sample 11 under the second length. It is understood that the second length is the distance between the first electrode 111 and the third electrode 115.

[0074] It can be understood that when the sample to be tested includes multiple third electrodes 115, in order to ensure the accuracy of the test, the second detection device 22 can also be controlled to contact the multiple third electrodes 115 in sequence, that is, repeat the above steps S41-S43 to obtain the voltage value between the first electrode 111 and different third electrodes 115, so as to calculate the total resistance value of the sample to be tested 11 at different lengths.

[0075] S50: Calculate the interface resistance and interface resistivity of the sample 11 according to the first total resistance value of the sample 11, the distance between the first electrode 111 and the second electrode 114, the second total resistance value of the sample 11, and the distance between the first electrode 111 and the third electrode 115.

[0076] For example, taking the cross-section of the test sample 11 as a Si / BST / Cu layered structure, the dimensions of the test sample 11 as 4μm in height, 0.3mm in width, and 9mm in length, and the test temperature as room temperature of 27°C, the contact resistivity of the interface between the ternary bismuth telluride film and Cu is tested. According to the above steps S10-S43, the first total resistance value of the test sample 11, the distance between the first electrode 111 and the second electrode 114, the second total resistance value of at least one test sample 11, and the distance between at least one first electrode 111 and the third electrode 115 can be measured, thereby obtaining the corresponding relationship between the distances between multiple electrodes and the total resistance value of the device under test.

[0077] Specifically, since the total resistance of the sample 11 to be tested changes linearly with the length of the sample 11 to be tested and the interface resistance does not change accordingly, the corresponding relationship between the distances between the multiple electrodes and the total resistance of the device to be tested can be obtained as follows:

[0078]

[0079] Among them, R T is the total resistance value of the sample 11 to be tested, R c is the interface resistance, R film is the resistance of the semiconductor layer 112, ρ C is the interface resistivity value, L T is the effective length for voltage transmission, L is the distance between the electrodes, W is the width of the semiconductor layer 112, that is, W is the length of the semiconductor layer 112 in the direction perpendicular to the arrangement direction of the first electrode 111 and the second electrode 114, R skis the sheet resistance of the semiconductor layer 112 .

[0080] According to the first total resistance value R of the sample to be tested 11 T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 The distance L2 between the first electrode 111 and the third electrode 115 can be fitted as follows: Figure 5 The corresponding curve of the distance between multiple electrodes and the total resistance value of the device under test is shown. The horizontal axis of the corresponding curve is the distance between multiple electrodes, which can also be regarded as the length of the sample 11 under test, and the vertical axis is the total resistance value of the sample 11 under test. According to the above formula, when the horizontal axis of the curve is 0, the absolute value of the corresponding value should be twice the interface resistance, that is, 2×R c =19.301Ω. When the vertical coordinate of the curve is 0, the absolute value of the corresponding value should be twice the effective length resistance of voltage transmission, that is, 2×L T =0.6039mm, due to The width W of the sample to be tested is 0.3 mm, so the interface resistivity value ρ of the sample to be tested can be calculated C 8100 μΩ·cm 2 .

[0081] In another optional example, taking the cross section of the sample 11 to be tested as a Si / BST / Ti / Cu layered structure, the size of the sample 11 to be tested as 4μm*width 0.5mm*length 13mm, and the test temperature as room temperature 27°C as an example, the contact resistivity of the interface between the ternary bismuth telluride film and Cu is tested. According to the above steps S10-S43, the first total resistance value R of the sample 11 to be tested can be measured. T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 and the distance L2 between the first electrode 111 and the third electrode 115 , thereby obtaining the corresponding relationship between the distances between the multiple electrodes and the total resistance value of the device under test.

[0082] Specifically, the corresponding relationship between the distance between the multiple electrodes and the total resistance value of the device under test is:

[0083]

[0084] Among them, R c is the interface resistance, R film is the resistance of the semiconductor layer 112, ρ C is the interface resistivity value, L Tis the effective length for voltage transmission, W is the width of the semiconductor layer 112, that is, W is the length of the semiconductor layer 112 in the direction perpendicular to the arrangement direction of the first electrode 111 and the second electrode 114, R sk is the sheet resistance of the semiconductor layer 112 .

[0085] According to the first total resistance value R of the sample to be tested 11 T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 The distance L2 between the first electrode 111 and the third electrode 115 can be fitted as follows: Figure 6 The corresponding curve of the distance between multiple electrodes and the total resistance value of the device under test is shown. The horizontal axis of the corresponding curve is the length of the sample 11 under test, and the vertical axis is the total resistance value of the sample 11 under test. According to the above formula, when the horizontal axis of the curve is 0, the absolute value of the corresponding value should be twice the interface resistance, that is, 2×R c =18.171Ω, when the vertical coordinate of the curve is 0, the absolute value of the corresponding value should be twice the effective length resistance of voltage transmission, that is, 2×L T =0.66mm. The width W of the sample to be tested is 0.5 mm, so the interface resistivity value ρ of the sample to be tested can be calculated C =14900μΩ·cm 2 .

[0086] In another optional example, taking the cross section of the sample 11 to be tested as a Si / Cr / BST / Ti / Cu layered structure, the size of the sample 11 to be tested as 4μm*width 0.5mm*length 13mm, and the test temperature as room temperature 27°C as an example, the contact resistivity of the interface between the ternary bismuth telluride film and Cu is tested. According to the above steps S10-S43, the first total resistance value R of the sample 11 to be tested can be measured. T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 and the distance L2 between the first electrode 111 and the third electrode 115 , thereby obtaining the corresponding relationship between the distances between the multiple electrodes and the total resistance value of the device under test.

[0087] Specifically, the corresponding relationship between the distance between the multiple electrodes and the total resistance value of the device under test is:

[0088]

[0089] Among them, R c is the interface resistance, R film is the resistance of the semiconductor layer 112, ρ C is the interface resistivity value, LT is the effective length for voltage transmission, W is the width of the semiconductor layer 112, that is, W is the length of the semiconductor layer 112 in the direction perpendicular to the arrangement direction of the first electrode 111 and the second electrode 114, R sk is the sheet resistance of the semiconductor layer 112 .

[0090] According to the first total resistance value R of the sample to be tested 11 T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 The distance L2 between the first electrode 111 and the third electrode 115 can be fitted as follows: Figure 7 The corresponding curve of the distance between multiple electrodes and the total resistance value of the device under test is shown. The horizontal axis of the corresponding curve is the length of the sample 11 under test, and the vertical axis is the total resistance value of the sample 11 under test. According to the above formula, when the horizontal axis of the curve is 0, the absolute value of the corresponding value should be twice the interface resistance, that is, 2×R c =0.2713Ω. When the vertical coordinate of the curve is 0, the absolute value of the corresponding value should be twice the effective length resistance of voltage transmission, that is, 2×L T =0.00231mm, due to The width W of the sample to be tested is 0.5 mm, so the interface resistivity value ρ of the sample to be tested can be calculated C =7.5μΩ·cm 2 .

[0091] In another optional example, taking the cross section of the sample 11 to be tested as a Si / Cr / BST / Cr / Cu layered structure, the size of the sample 11 to be tested as 4μm*width 0.5mm*length 13mm, and the test temperature as room temperature 87°C as an example, the contact resistivity of the interface between the ternary bismuth telluride film and Cu is tested. According to the above steps S10-S43, the first total resistance value R of the sample 11 to be tested can be measured. T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 and the distance L2 between the first electrode 111 and the third electrode 115 , thereby obtaining the corresponding relationship between the distances between the multiple electrodes and the total resistance value of the device under test.

[0092] Specifically, the corresponding relationship between the distance between the multiple electrodes and the total resistance value of the device under test is:

[0093]

[0094] Among them, R c is the interface resistance, R film is the resistance of the semiconductor layer 112, ρ C is the interface resistivity value, LT is the effective length for voltage transmission, W is the width of the semiconductor layer 112, that is, W is the length of the semiconductor layer 112 in the direction perpendicular to the arrangement direction of the first electrode 111 and the second electrode 114, R sk is the sheet resistance of the semiconductor layer 112 .

[0095] According to the first total resistance value R of the sample to be tested 11 T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 The distance L2 between the first electrode 111 and the third electrode 115 can be fitted as follows: Figure 8 The corresponding curve of the distance between multiple electrodes and the total resistance value of the device under test is shown. The horizontal axis of the corresponding curve is the length of the sample 11 under test, and the vertical axis is the total resistance value of the sample 11 under test. According to the above formula, when the horizontal axis of the curve is 0, the absolute value of the corresponding value should be twice the interface resistance, that is, 2×R c =1.6972Ω. When the vertical coordinate of the curve is 0, the absolute value of the corresponding value should be twice the effective length resistance of voltage transmission, that is, 2×L T =0.00231mm, due to The width W of the sample to be tested is 0.5 mm, so the interface resistivity value ρ of the sample to be tested can be calculated C 330μΩ·cm 2 .

[0096] In another optional example, the cross section of the sample 11 to be tested is a Si / Cr / BST / Cr / Cu layered structure, the size of the sample 11 to be tested is 4μm*width 0.5mm*length 13mm, and the test temperature is room temperature 25°C. For example, the contact resistivity of the interface between the ternary bismuth telluride film and Cu is tested. In this embodiment, the detection method of steps S10-S43 is performed multiple times to measure the first total resistance value R of multiple groups of samples 11 to be tested. T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 and the distance L2 between the first electrode 111 and the third electrode 115 , thereby obtaining the corresponding relationship between the distances between the multiple electrodes and the total resistance value of the device under test.

[0097] Specifically, the corresponding relationship between the distance between the multiple electrodes and the total resistance value of the device under test is:

[0098]

[0099] Among them, R c is the interface resistance, R film is the resistance of the semiconductor layer 112, ρC is the interface resistivity value, L T is the effective length for voltage transmission, W is the width of the semiconductor layer 112, that is, W is the length of the semiconductor layer 112 in the direction perpendicular to the arrangement direction of the first electrode 111 and the second electrode 114, R sk is the sheet resistance of the semiconductor layer 112 .

[0100] The first total resistance value R of each group of samples 11 to be tested T1 , the distance L1 between the first electrode 111 and the second electrode 114, the second total resistance value R of the sample 11 to be tested T2 and the distance L2 between the first electrode 111 and the third electrode 115 are fitted respectively, so as to obtain the following Figure 9 The corresponding curve of the distance between multiple electrodes and the total resistance value of the device under test is shown. Figure 9 (1) to Figure 9 (4) in the figure shows the corresponding curves of the distance between multiple electrodes and the total resistance value of the device under test obtained from four tests. The horizontal coordinate of each corresponding curve is the length of the sample 11 under test, and the vertical coordinate is the total resistance value of the sample 11 under test. According to the above formula, when the horizontal coordinate of the curve is 0, the absolute value of the corresponding value should be twice the interface resistance, and when the vertical coordinate of the curve is 0, the absolute value of the corresponding value should be twice the voltage transmission effective length resistance. Finally, according to The width W of the sample to be tested is 0.5 mm, and the interface resistivity value of the sample to be tested is calculated as shown in Table 1. It can be seen that the four test results of the detection method provided in the embodiment of the present application are all within 8.07 uΩcm -2 -8.69uΩcm -2 , with good stability.

[0101] Table 1

[0102] Interface resistivity First test <![CDATA[8.09μΩcm -2 ]]> Second test <![CDATA[8.69μΩcm -2 ]]> The third test <![CDATA[8.35μΩcm -2 ]]> Fourth test <![CDATA[8.32μΩcm -2 ]]>

[0103] In some optional embodiments, the detection method further includes: S60: the temperature controller 8 controls the temperature control platform 4 to change the temperature of the sample 11 to be tested.

[0104] S61: Obtain the resistance value of the sample to be tested 11 at different temperatures.

[0105] S62: Obtaining the interface resistivity of the sample 11 at different temperatures according to the resistance values ​​of the sample 11 at different temperatures.

[0106] In this embodiment, the temperature controller 8 controls the temperature control table 4 to change the temperature of the sample to be tested 11, and then the above steps S10-S50 can be referred to to obtain the resistance value of the sample to be tested 11 at different temperatures, and the interface resistivity of the sample to be tested 11 at different temperatures is obtained according to the resistance value of the sample to be tested 11 at different temperatures, thereby constructing a corresponding relationship between temperature and the interface resistivity of the sample to be tested 11. Therefore, the resistivity of the sample to be tested 11 at different temperatures can be obtained through this detection method.

[0107] An embodiment of the present application further provides a computer storage medium, in which computer instructions are stored. When the computer instructions are executed on an electronic device, the electronic device executes the method described in the above method embodiment.

[0108] Computer-readable storage media include, but are not limited to, any of the following: a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk, and other media that can store program codes.

[0109] An embodiment of the present application provides a computer program product, which includes: a computer program or instructions, which, when executed on a computer, enables the computer to execute the method described in the above method embodiment.

[0110] Among them, the computer storage medium and computer program product provided in this embodiment are used to execute the corresponding methods provided above. Therefore, the beneficial effects that can be achieved can refer to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0111] The steps of the method described in conjunction with the disclosure of the embodiments of the present application can be implemented in a hardware manner or by the processor 9 executing software instructions. The software instructions can be composed of corresponding software modules, which can be stored in a random access memory (RAM), a flash memory, a read-only memory, an erasable programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a register, a hard disk, a mobile hard disk, a compact disc read-only memory (CD-ROM) or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor 9 so that the processor 9 can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor 9. The processor 9 and the storage medium can be located in an application-specific integrated circuit (ASIC).

[0112] The above content is merely a specific embodiment of the present application, but the scope of protection of the present application is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this application should be included in the scope of protection of the present application. Therefore, the scope of protection of the present application should be based on the scope of protection of the claims.

Claims

1. A testing device, characterized in that: Used to detect a sample to be tested, wherein the sample to be tested includes a semiconductor layer and a first electrode and a second electrode arranged in sequence along a first direction on the semiconductor layer; The testing device includes: a sample stage, an image detection device, a first detection device and a second detection device arranged on the sample stage; The testing device further comprises: a current source, a voltage detection device and a processor, wherein the current source is connected to the first detection device and the second detection device; the voltage detection device is connected to the first detection device and the second detection device; Wherein, the image detection device is used to obtain an image of the sample to be tested placed on the sample stage; The processor is configured to control the first detection device to contact the first electrode in the sample to be tested, and control the second detection device to contact the second electrode in the sample to be tested, based on the image of the sample to be tested displayed by the image detection device; The current source is used to provide a constant current to the sample to be tested; The voltage detection device is used to detect the voltage value between the first electrode and the second electrode of the sample to be tested.

2. The testing device according to claim 1, wherein: The first detection device includes a first probe and a second probe, and the stepping accuracy of the first probe and the second probe in three mutually perpendicular directions is less than or equal to 1 μm; The second detection device includes a third probe and a fourth probe, and the stepping accuracy of the third probe and the fourth probe in three directions perpendicular to each other is less than or equal to 1 μm.

3. The testing device according to claim 2, characterized in that The first probe and the third probe are used to apply a constant current to the sample to be tested; The second probe and the fourth probe are used to form a conductive loop together with the voltage detection device and the sample to be tested to detect the voltage value between the first electrode and the second electrode of the sample to be tested.

4. The testing device according to any one of claims 1 to 3, characterized in that: The testing device further includes a temperature control stage arranged on the sample stage, The temperature control platform is used to provide a preset temperature for the sample to be tested.

5. The testing device according to claim 4, characterized in that: The testing device also includes a temperature controller, The temperature controller is used to control the temperature control platform to provide a preset temperature for the sample to be tested.

6. The testing device according to any one of claims 1 to 5, characterized in that: The testing device further includes a vacuum chamber and a first vacuum pump, wherein the first detection device, the second detection device, the image detection device and the sample to be tested are arranged inside the vacuum chamber; The first vacuum pump is used to create a vacuum in the vacuum chamber.

7. The testing device according to any one of claims 1 to 6, characterized in that: The testing device further includes a second vacuum pump. The sample stage is provided with a vacuum channel, which is in communication with the second vacuum pump. The second vacuum pump is used to adsorb the sample to be tested on the sample stage through the vacuum channel.

8. The testing device according to any one of claims 1 to 7, characterized in that: The sample to be tested further includes a third electrode arranged along the first direction on the semiconductor layer; The processor is further configured to control the second detection device to contact the third electrode in the sample to be tested based on the image of the sample to be tested displayed by the image detection device; The voltage detection device is used to detect the voltage value between the first electrode and the third electrode of the sample to be tested.

9. The testing device according to claim 8, characterized in that: The processor is also used to calculate the interface resistivity of the sample to be tested based on the voltage value between the first electrode and the second electrode of the sample to be tested, the distance between the first electrode and the second electrode, the voltage value between the first electrode and the third electrode of the sample to be tested, and the distance between the first electrode and the third electrode.

10. A method for detecting interface resistivity, characterized in that: Used to detect a sample to be tested, wherein the sample to be tested includes a semiconductor layer and a first electrode, a second electrode, and a third electrode arranged in an array and disposed on the semiconductor layer; The method for detecting the interface resistivity includes: applying a constant current to the sample to be tested; Obtaining a voltage value between the first electrode and the second electrode of the sample to be tested; Obtaining a voltage value between the first electrode and the third electrode of the sample to be tested; The interface resistivity of the sample to be tested is calculated based on the voltage value between the first electrode and the second electrode of the sample to be tested, the distance between the first electrode and the second electrode, the voltage value between the first electrode and the third electrode of the sample to be tested, and the distance between the first electrode and the third electrode.

11. The method according to claim 10, characterized in that The detection method further comprises: Changing the temperature of the sample to be tested; Obtain the interface resistivity of the sample to be tested at different temperatures.

12. A computer-readable storage medium, characterized in that The computer-readable storage medium comprises a computer program, which, when executed on an electronic device, causes the electronic device to perform the method according to claim 10 or 11.

13. A computer program product, characterized in that When the computer program product is run on a computer, the computer is caused to perform the method according to claim 10 or 11.

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