Circuit solving method for batch pipeline calculation task based on identification
By assigning a unique hardware identifier to each trajectory equation and transmitting the identifier synchronously in the pipeline, the problems of asynchronous trajectory task calculation cycles and disordered results in traditional solvers are solved, efficient and orderly batch trajectory solving is achieved, and system efficiency and resource utilization are improved.
Patent Information
- Application Number
- CN202510651328.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-05-20
- Publication Date
- 2025-10-03
AI Technical Summary
Traditional numerical solvers face challenges in dealing with real-time performance, computational efficiency, and dynamic scheduling overhead, resulting in asynchronous calculation cycles of batch trajectory tasks and disordered output results, affecting system efficiency and resource utilization.
By dynamically assigning a unique hardware identifier to each computing task and synchronously transmitting the identifier in the pipeline, a computing circuit design is implemented that allows batch tasks to be output in sequence without secondary sorting. The PCIe high-speed interface protocol and identifier allocation module are used to manage hardware resources.
The orderly solution of batch trajectory equations is achieved, which improves hardware resource utilization and overall system throughput and reduces computational delay and sorting overhead.
Smart Images
Figure CN120743572A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of numerical computing hardware acceleration, and in particular to a circuit solving method for batch pipeline computing tasks based on identification. Background Art
[0002] Trajectory simulation and numerical calculation are core components of weapon system performance evaluation, mission planning, and on-orbit control. Trajectory equations, as a set of differential equations describing the motion of a flying object, accurately model its spatial motion and predict key parameters such as position, velocity, and acceleration. In fields such as aerospace, guided weapons, and robotic control, high-precision, real-time trajectory solutions have a decisive impact on system response speed and decision-making accuracy.
[0003] As application scenarios become more complex, traditional numerical solvers face challenges in handling real-time performance, computational efficiency, and dynamic scheduling overhead. Traditional numerical trajectory equation solution platforms typically utilize software solutions, which struggle to meet the requirements of high concurrency, low latency, and multi-task parallel processing. The dynamic scheduling of software introduces additional timing uncertainty. Circuitization of numerical solvers is an effective technical means to address these issues. In such engineering applications, FPGA chips are often used as the carrier for circuit implementation, leveraging their abundant hardware resources to fully demonstrate their powerful circuit processing capabilities and computational efficiency.
[0004] In the process of parallel solution of hardware circuits in existing devices, affected by factors such as trajectory initial conditions, environmental parameters, boundary conditions, etc., the differences in the iterative algorithm paths of various trajectory tasks lead to asynchronous calculation cycles and disordered output results, which destroys the sequential consistency of batch trajectory tasks. Secondary sorting by the host computer is required, which increases system delays, affects the system's maximum work efficiency, and makes it impossible to calculate batch trajectory equations, affecting the system's ability to solve trajectory equations.
[0005] Therefore, there is an urgent need for a circuit design method that takes into account both the efficiency of parallel solution of hardware circuits and orderly processing, which can not only meet the high-precision and flexible solution requirements of different trajectories, but also improve computing efficiency, reduce computing delays, realize the orderly solution of batch trajectory equations, and improve resource utilization. Summary of the Invention
[0006] The purpose of the present invention is to provide a computing circuit and a solution method thereof that dynamically assigns a unique hardware identifier to each computing task and transmits it synchronously in a pipeline, thereby achieving batch tasks that can be output in sequence without secondary sorting.
[0007] The technical solution of the present invention is to provide a circuit solving method for batch pipeline computing tasks based on identification, the method comprising:
[0008] S1. The host computer transmits the initial input parameters and batch configuration information of the batch trajectory equations in batches to the data transmission control module through the PCIe high-speed interface protocol; the initial input parameters include trajectory configuration algorithm information;
[0009] S2. The data transmission control module transmits the initial input parameters and batch configuration information of the batch trajectory equations to the parameter cache module. The parameter cache module caches the initial input parameters in sequence. At the same time, the parameter cache module reads the batch configuration information to determine the number of trajectory equations in the batch. The parameter cache module feeds back the number of trajectory equations in the batch to the identification allocation module. The identification allocation module determines the identification cutoff value based on the number of trajectory equations in the batch.
[0010] S3. After the parameter cache module completes caching of a set of initial input parameters for the trajectory equations, it generates a signal to trigger the operation of the identifier allocation module. The identifier allocation module assigns an increasing hardware identifier to each trajectory equation in the set, starting from 0, in a round-robin manner. After the allocation is completed, the identifier is used as an index address and written into the RAM together with the corresponding initial input parameters, thereby realizing the binding management of the identifier and the parameters.
[0011] S4. After the parameter cache module completes the caching of the initial parameters of all trajectory equations, it binds the cached initial input parameters to the hardware identifiers one by one and feeds them back to the data path control module and the state management module in sequence. The state management module parses the trajectory configuration algorithm information of each trajectory and selects the RK4-Adams4 or RK6-Adams6 combination algorithm;
[0012] S5. The data path control module starts the operation control and distributes the initial input parameters of the cache to the function solving module according to the state jump of the state management module. The function solving module gradually solves the trajectory equation. The data path control module manages the transfer of identifiers. If a lost identifier is detected, the corresponding trajectory is marked as an error state.
[0013] S6. The function solving module caches the calculated parameter results and distributes them to the algorithm iteration module of the corresponding trajectory. When the algorithm iteration module completes the operation of the iteration segment, the parameter results are cached and redistributed to the function solving unit, and the calculation iteration is cyclical.
[0014] S7. When the iterative calculation task is completed, the algorithm iteration module caches the iterative parameter results in the parameter cache module, and the identifier corresponding to the trajectory equation is passed by the data path control module to the identifier allocation module cache; when all the parameter results of the batch trajectory equations are cached, the data transmission control module transmits the iterative parameter results of the batch trajectory to the host computer in sequence according to the identifier order.
[0015] In any of the above technical solutions, further, the initial input parameters include trajectory configuration algorithm information, expected trajectory flight time, three components of initial trajectory position, three components of initial trajectory velocity, pressure-related parameters and inertial force-related parameters, and the batch configuration information includes the trajectory quantity information of the current batch and is packaged in the IEEE754 standard 64-bit double-precision floating point format.
[0016] In any of the above technical solutions, further, the identifier is a 16-bit unsigned integer, and the data structure format after the identifier is bound to the parameter is a combination of a 16-bit sign bit and 10 64-bit parameter data.
[0017] In any of the above technical solutions, further, in step S3, when the configuration quantity reaches the identified cutoff value, the system immediately stops receiving new data packets and triggers an interrupt operation, and at the same time notifies the host computer to resend the task.
[0018] In any of the above technical solutions, further, the process of detecting the lost identifier in step S5 includes: immediately starting the corresponding operation cycle timer after each trajectory equation is assigned an identifier; if the data path control module does not receive the calculation return result corresponding to the identifier within the set time limit, the identifier is judged to be lost and the parameter result corresponding to the identifier is assigned to 0, and then the identifier and the newly assigned parameter result are bound and transmitted to the parameter cache module.
[0019] In any of the above technical solutions, further, the state management module includes a master state machine and two slave state machines, wherein the master state machine includes four states: IDLE, INIT, RK, and Adams, wherein the RK and Adams states switch the operation logic of RK4-Adams4 or RK6-Adams6 according to the algorithm configuration; the RK slave state machine includes 8 sub-states, which correspond to the multi-stage iteration of the RK4 / RK6 algorithm, and complete the slope calculation through the pipeline operator;
[0020] The Adams slave state machine contains three sub-states: Ad_IDLE, Ad_1, and Ad_2, which respectively execute the initialization, prediction, and correction steps of the Adams prediction-correction algorithm;
[0021] When switching the RK4-Adams4 logic, the master state machine instructs the RK slave state machine to execute three RK4 algorithm sub-state cycles, and after completion, jumps to the Adams slave state machine to execute one Adams4 prediction-correction cycle; when switching the RK6-Adams6 logic, the master state machine instructs the RK slave state machine to execute five RK6 algorithm sub-state cycles, and after completion, jumps to the Adams slave state machine to execute one Adams6 prediction-correction cycle;
[0022] The calculation formula of RK4-Adams4 includes:
[0023]
[0024] The calculation formula of RK6-Adams6 includes:
[0025]
[0026] Among them, K1 to K7 represent the slope estimates of different sub-stages within the time step in the RK algorithm, f(*) is the differential equation function, which describes the change law of the state variables in the trajectory equation over time, t n is the current time point, y n At time t n The state variable at , h is the time step, that is, the interval between adjacent time points, Represents the intermediate prediction value of the Adams prediction formula, which is used in subsequent correction steps, y n+1 Represents the final numerical solution after correction, representing the next time t n+1 The state variables at .
[0027] In any of the above technical solutions, further, the algorithm iteration module splits the operation process compatible with RK4-Adams4 and RK6-Adams6 into 7 multiplication stages and 5 addition stages, and realizes parallel synchronous calculation of multiple algorithms by reusing the operator.
[0028] The beneficial effects of the present invention are:
[0029] The technical solution of the present invention dynamically assigns a unique hardware identifier to each trajectory equation in the storage unit and designs an identifier transmission mechanism in the control unit, so that the identifier and the corresponding calculation data flow synchronously in the multi-stage pipeline, thereby realizing batch pipeline calculation tasks that can be output in the original order without relying on secondary sorting, avoiding the complex sequence reconstruction overhead and improving the hardware resource utilization and the overall system throughput. BRIEF DESCRIPTION OF THE DRAWINGS
[0030] The advantages of the above and additional aspects of the present invention will become apparent and readily understood from the following description of the embodiments with reference to the accompanying drawings, in which:
[0031] Figure 1 is a schematic flow chart of a circuit solving method for batch pipeline computing tasks based on identification according to an embodiment of the present invention;
[0032] Figure 2 is a schematic flow chart of a method for managing batch trajectory equations based on identification in a circuit solving method for batch pipeline computing tasks based on identification according to an embodiment of the present invention;
[0033] Figure 3This is a block diagram of a circuit structure for numerically solving a trajectory equation of a circuit solving method for batch pipeline computing tasks based on identification according to an embodiment of the present invention;
[0034] Figure 4 1. It is a schematic diagram of a master-slave state machine jump scheme of a circuit solving method for batch pipeline computing tasks based on identification according to an embodiment of the present invention;
[0035] Figure 5 This is a schematic flow chart of data transmission between a host computer and a slave computer in a circuit solving method for batch pipeline computing tasks based on identification according to an embodiment of the present invention;
[0036] Figure 6 It is a waveform diagram of a batch trajectory equation pipeline identification processing and numerical solution process of a circuit solving method for batch pipeline computing tasks based on identification according to an embodiment of the present invention. DETAILED DESCRIPTION
[0037] In order to more clearly understand the above-mentioned objects, features and advantages of the present invention, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that the embodiments of the present invention and the features therein can be combined with each other without conflict.
[0038] In the following description, many specific details are set forth to facilitate a full understanding of the present invention. However, the present invention may also be implemented in other ways different from those described herein. Therefore, the scope of protection of the present invention is not limited to the specific embodiments disclosed below.
[0039] like Figures 1 to 3 As shown, this embodiment provides a circuit solving method for batch pipeline computing tasks based on identification, the method comprising:
[0040] S1. Configure the data transmission control module, parameter cache module, identification allocation module, state management module, data path control module, function solution module and algorithm iteration module on the hardware circuit of the lower computer. The upper computer (PC) transmits the initial input parameters and batch configuration information of the batch trajectory equations in batches to the data transmission control module through the high-speed interface communication protocol (PCIe 3.0×8 interface protocol) in a predetermined data format (compliant with the IEEE754 standard 64-bit double-precision floating point number).
[0041] Each trajectory equation includes 10 initial input parameters: trajectory configuration algorithm information parameters, trajectory expected flight time, three components of initial trajectory position, three components of initial trajectory velocity, pressure-related parameters, inertial force-related parameters, etc. The batch configuration information sent by the host computer is at the front of the data packet, and the batch configuration information includes information about the number of trajectories in the batch.
[0042] S2. The data transmission control module transmits the initial input parameters and batch configuration information of the batch trajectory equations to the parameter cache module, and the parameter cache module caches the initial input parameters in sequence; at the same time, the parameter cache module reads the batch configuration information to determine the number of trajectory equations in the batch, and the parameter cache module feeds back the number information of the trajectory equations in the batch to the identification allocation module, and the identification allocation module determines the identification cutoff value based on the number.
[0043] S3. After the parameter cache module completes the caching of a set of initial input parameters of the trajectory equation, it generates a signal to trigger the operation of the identifier allocation module. The identifier allocation module allocates an increasing hardware identifier to each trajectory equation in this group starting from 0 in a round-robin arbitration loop. After the allocation is completed, the identifier is used as the index address and written into the RAM together with the corresponding initial input parameters to realize the binding management of the identifier and the parameter and avoid data disorder.
[0044] In this embodiment, the identifier is a 16-bit unsigned integer, which serves as the unique number of each trajectory and can support up to 65536 trajectories. The data structure format after the identifier and parameter are bound is a combination of a 16-bit sign bit and 10 64-bit parameter data. The index address is a 16-bit address obtained through identifier mapping.
[0045] If the configured number reaches the identified cutoff value (65536), the system will immediately stop receiving new data packets and trigger an interrupt operation, notifying the host computer to resend the task.
[0046] S4. After completing the caching of the initial parameters of all trajectory equations, the parameter cache module binds the cached initial input parameters to the hardware identifiers one by one and feeds them back to the data path control module and the state management module in turn. The state management module determines the order algorithm selected for each trajectory equation.
[0047] The state management module parses the first input parameter in each trajectory equation, namely the trajectory configuration algorithm information parameter. The trajectory configuration algorithm information parameter records the algorithm that should be selected for the trajectory equation. The optional algorithms include the RK4-Adams4 and RK6-Adams6 combination algorithms.
[0048] The calculation formula of RK4-Adams4 includes:
[0049]
[0050] The calculation formula of RK6-Adams6 includes:
[0051]
[0052] Among them, K1 to K7 represent the slope estimates of different sub-stages within the time step in the RK algorithm, f(*) is the differential equation function, which describes the change law of the state variables in the trajectory equation over time, t n is the current time point, y n At time t n The state variable at , h is the time step, that is, the interval between adjacent time points, Represents the intermediate prediction value of the Adams prediction formula, which is used in subsequent correction steps, y n+1 Represents the final numerical solution after correction, representing the next time t n+1 The state variables at .
[0053] like Figure 4 As shown, the state management module integrates a new numerical solution framework, consisting of a master state machine and two slave state machines. The master state machine has two state switching logics: RK4-Adams4 or RK6-Adams6. The master state machine has four states: IDLE, INIT, RK (RK4 / RK6) algorithm iteration state RK, and Adams (Adams4 / Adams6) algorithm iteration state Adams. If the fourth-order algorithm is selected, the master state machine switches to the RK4-Adams4 state switching logic. At this time, the RK slave state machine jumps to the state according to the RK4 algorithm logic loop. After completing the RK4 operation, the master state machine jumps to the Adams state. The Adams slave state machine obtains the RK4 iteration result as the startup value and executes the Adams4 algorithm logic loop. After completion, the master state machine jumps from the Adams state to IDLE, terminating the state management module operation. The same applies to the sixth-order algorithm.
[0054] The two slave state machines control the iteration process of the RK and Adams algorithms respectively. The RK slave state machine has 8 sub-states. Except for the initialization data state RK_IDLE, the other 7 sub-states RK_1, RK_2, RK_3, RK_4, RK_5, RK_6, and RK_7 represent different iterative algorithm stages respectively. The RK slave state machine is compatible with RK4 or RK6 iterations.
[0055] RK needs to use the iterative calculation results as the starting value for the subsequent Adams algorithm. RK4 provides the starting value for Adams4, and RK6 provides the starting value for Adams6. RK4 needs to iterate 12 stages, and the RK slave state machine cycles through the RK4 algorithm logic sub-state jump cycle three times. Similarly, RK6 needs to iterate 35 stages, and the RK slave state machine cycles through the RK6 algorithm logic sub-state jump cycle five times. After completing the RK4 or RK6 sub-state jump cycle, the slave state machine jumps to the RK_IDLE state, ending its operation.
[0056] Adams4 and Adams6, executed by the Adams slave state machine, both loop through three sub-states, initializing the data state Ad_IDLE, the prediction state Ad_1, and the correction state Ad_2. The prediction state and correction state correspond to the principle structure of the Adams prediction-correction algorithm.
[0057] S5. The data path control module starts the operation control and distributes the cached initial input parameters to the function solving module according to the state jump of the state management module. The function solving module gradually solves the trajectory equation; the data path control module manages the identification transmission. If a lost identification is detected, the corresponding trajectory will be marked as an error state.
[0058] Specifically, after each trajectory equation is assigned an identifier, the corresponding calculation cycle timer is immediately started. If the data path control module does not receive the calculation result corresponding to the identifier within the set time limit, the identifier is judged to be lost and the parameter result corresponding to the identifier is assigned to 0. The identifier and the newly assigned parameter result are then bound and transmitted to the parameter cache module.
[0059] S6. The function solving module caches the calculated parameter results and distributes them to the algorithm iteration module of the corresponding trajectory. When the algorithm iteration module completes the operation of the iteration segment, it caches the parameter results and redistributes them to the function solving unit, and the calculation iteration is cyclical.
[0060] S7. When the iterative calculation task is completed, the algorithm iteration module caches the iterative parameter results in the parameter cache module, and the identifier corresponding to the trajectory equation is passed by the data path control module to the identifier allocation module cache; when all the parameter results of the batch trajectory equations are cached, the data transmission control module transmits the iterative parameter results of the batch trajectory to the host computer in sequence according to the identifier order.
[0061] like Figure 5 As shown in the figure, at the transmission process level between the upper computer and the lower computer, the upper computer uses the PCIe interface to send the initial input parameters and configuration information to the lower computer. After the data information transmission is completed, the upper computer sends a start command to the lower computer, and the circuit starts to perform the calculation and solution task. After the calculation and solution is completed, the lower computer transmits the cached iteration results back to the upper computer.
[0062] When the amount of initial data stored in the parameter cache module is lower than the set threshold, that is, the initial input parameters of the trajectory equation sent by the upper computer are incomplete, the lower computer generates an interrupt request A, the upper computer responds to the request, continues to send data, and supplements the data until it is complete; when the amount of parameter iteration result data stored in the parameter cache module is higher than the set threshold, that is, there is too much iteration final value data in the output buffer, the lower computer generates an interrupt request B, the upper computer responds to the request, and reads the parameter iteration results in batches until the calculation is completely completed.
[0063] like Figure 6 As shown, the waveform principle of the batch trajectory equation pipeline identification processing and numerical solution is consistent with the above-described steps, where in_para* refers to any one of the 10 initial input parameters of the trajectory equation. in_para_en refers to the corresponding batch trajectory equation parameter input valid signal. When the corresponding initial input parameter of the first trajectory equation is input, the in_para_en signal is pulled high. When all batch trajectory parameters are input, the in_para_en signal is pulled low. cache_para* refers to the corresponding trajectory equation parameter input to the parameter cache module for polling arbitration cache. cache_en refers to the batch trajectory equation parameter cache valid signal. id_en refers to the identification register allocation identification valid signal. When the initial input parameters of the first group of trajectory equations are cached, the identification register begins to allocate parameters, and the id_en signal is pulled high until the allocation identification task of n groups of trajectory equations is completed. tra_en refers to the valid signal of the identification register completing the traversal of all trajectory identifications, that is, the iterative results of all trajectory equation parameters are cached, and the tra_en signal is pulled high. out_para* refers to the output data after the corresponding parameter task is completed, which is transmitted to the host computer in the order of identification. When the final parameter result is transmitted, finish_en is pulled high in response.
[0064] In summary, the present invention proposes a circuit solving method for batch pipeline computing tasks based on identification, including:
[0065] S1. The host computer transmits the initial input parameters and batch configuration information of the batch trajectory equations in batches to the data transmission control module through the PCIe high-speed interface protocol; the initial input parameters include the trajectory configuration algorithm information.
[0066] S2. The data transmission control module transmits the initial input parameters and batch configuration information of the batch trajectory equations to the parameter cache module, and the parameter cache module caches the initial input parameters in sequence; at the same time, the parameter cache module reads the batch configuration information to determine the number of trajectory equations in the batch, and the parameter cache module feeds back the number information of the trajectory equations in the batch to the identification allocation module, and the identification allocation module determines the identification cutoff value based on the number.
[0067] S3. After the parameter cache module completes the caching of a set of initial input parameters of the trajectory equation, it generates a signal to trigger the operation of the identifier allocation module. The identifier allocation module allocates an increasing hardware identifier to each trajectory equation in this group starting from 0 in a round-robin arbitration loop. After the allocation is completed, the identifier is used as the index address and written into the RAM together with the corresponding initial input parameters to realize the binding management of the identifier and the parameter.
[0068] S4. After the parameter cache module completes the caching of the initial parameters of all trajectory equations, it binds the cached initial input parameters to the hardware identifiers one by one and feeds them back to the data path control module and the state management module in turn. The state management module parses the trajectory configuration algorithm information of each trajectory and selects the RK4-Adams4 or RK6-Adams6 combination algorithm.
[0069] S5. The data path control module starts the operation control and distributes the cached initial input parameters to the function solving module according to the state jump of the state management module. The function solving module gradually solves the trajectory equation; the data path control module manages the identification transmission. If a lost identification is detected, the corresponding trajectory will be marked as an error state.
[0070] S6. The function solving module caches the calculated parameter results and distributes them to the algorithm iteration module of the corresponding trajectory. When the algorithm iteration module completes the operation of the iteration segment, it caches the parameter results and redistributes them to the function solving unit, and the calculation iteration is cyclical.
[0071] S7. When the iterative calculation task is completed, the algorithm iteration module caches the iterative parameter results in the parameter cache module, and the identifier corresponding to the trajectory equation is passed by the data path control module to the identifier allocation module cache; when all the parameter results of the batch trajectory equations are cached, the data transmission control module transmits the iterative parameter results of the batch trajectory to the host computer in sequence according to the identifier order.
[0072] The steps in the present invention can be adjusted in sequence, combined, or deleted according to actual needs.
[0073] The units in the device of the present invention can be combined, divided and deleted according to actual needs.
[0074] Although the present invention has been disclosed in detail with reference to the accompanying drawings, it should be understood that these descriptions are merely illustrative and are not intended to limit the application of the present invention. The scope of the present invention is defined by the appended claims and includes various modifications, variations, and equivalents made to the invention without departing from the scope and spirit of the present invention.
Claims
1. A circuit solving method for batch pipeline computing tasks based on identification, characterized in that: The method comprises: S1. The host computer transmits the initial input parameters and batch configuration information of the batch trajectory equations in batches to the data transmission control module through the PCIe high-speed interface protocol; the initial input parameters include trajectory configuration algorithm information; S2. The data transmission control module transmits the initial input parameters and batch configuration information of the batch trajectory equations to the parameter cache module. The parameter cache module caches the initial input parameters in sequence. At the same time, the parameter cache module reads the batch configuration information to determine the number of trajectory equations in the batch. The parameter cache module feeds back the number of trajectory equations in the batch to the identification allocation module. The identification allocation module determines the identification cutoff value based on the number of trajectory equations in the batch. S3. After the parameter cache module completes caching of a set of initial input parameters for the trajectory equations, it generates a signal to trigger the operation of the identifier allocation module. The identifier allocation module assigns an increasing hardware identifier to each trajectory equation in the set, starting from 0, in a round-robin manner. After the allocation is completed, the identifier is used as an index address and written into the RAM together with the corresponding initial input parameters, thereby realizing the binding management of the identifier and the parameters. S4. After the parameter cache module completes the caching of the initial parameters of all trajectory equations, it binds the cached initial input parameters to the hardware identifiers one by one and feeds them back to the data path control module and the state management module in sequence. The state management module parses the trajectory configuration algorithm information of each trajectory and selects the RK4-Adams4 or RK6-Adams6 combination algorithm; S5. The data path control module starts the operation control and distributes the initial input parameters of the cache to the function solving module according to the state jump of the state management module. The function solving module gradually solves the trajectory equation. The data path control module manages the transfer of identifiers. If a lost identifier is detected, the corresponding trajectory is marked as an error state. S6. The function solving module caches the calculated parameter results and distributes them to the algorithm iteration module of the corresponding trajectory. When the algorithm iteration module completes the operation of the iteration segment, the parameter results are cached and redistributed to the function solving unit, and the calculation iteration is cyclical. S7. When the iterative calculation task is completed, the algorithm iteration module caches the iterative parameter results in the parameter cache module, and the identifier corresponding to the trajectory equation is passed by the data path control module to the identifier allocation module cache; when all the parameter results of the batch trajectory equations are cached, the data transmission control module transmits the iterative parameter results of the batch trajectory to the host computer in sequence according to the identifier order.
2. The circuit solving method for batch pipeline computing tasks based on identification according to claim 1, characterized in that: The initial input parameters include trajectory configuration algorithm information, expected trajectory flight time, three components of initial trajectory position, three components of initial trajectory velocity, pressure-related parameters, and inertial force-related parameters. The batch configuration information includes the number of trajectories in the current batch and is packaged in the IEEE754 standard 64-bit double-precision floating-point format.
3. The circuit solving method for batch pipeline computing tasks based on identification according to claim 1, characterized in that: The identifier is a 16-bit unsigned integer, and the data structure format after the identifier is bound to the parameter is a combination of a 16-bit sign bit and ten 64-bit parameter data.
4. The circuit solving method for batch pipeline computing tasks based on identification according to claim 1, characterized in that: In step S3, when the configuration quantity reaches the identified cutoff value, the system immediately stops receiving new data packets and triggers an interrupt operation, while notifying the host computer to resend the task.
5. The circuit solving method for batch pipeline computing tasks based on identification according to claim 1, characterized in that: The process of detecting the lost identifier in step S5 includes: immediately starting the corresponding operation cycle timer after assigning an identifier to each trajectory equation; if the data path control module does not receive the calculation result corresponding to the identifier within a set time limit, the identifier is determined to be lost and the parameter result corresponding to the identifier is assigned to 0; then, the identifier and the newly assigned parameter result are bound and transmitted to the parameter cache module.
6. The circuit solving method for batch pipeline computing tasks based on identification according to claim 1, characterized in that: The state management module includes a master state machine and two slave state machines. The master state machine includes four states: IDLE, INIT, RK, and Adams. The RK and Adams states switch the operation logic of RK4-Adams4 or RK6-Adams6 according to the algorithm configuration; the RK slave state machine includes 8 sub-states, which correspond to the multi-stage iteration of the RK4 / RK6 algorithm, and complete the slope calculation through the pipeline operator. The Adams slave state machine contains three sub-states: Ad_IDLE, Ad_1, and Ad_2, which respectively execute the initialization, prediction, and correction steps of the Adams prediction-correction algorithm; When switching the RK4-Adams4 logic, the master state machine instructs the RK slave state machine to execute three RK4 algorithm sub-state cycles, and after completion, jumps to the Adams slave state machine to execute one Adams4 prediction-correction cycle; when switching the RK6-Adams6 logic, the master state machine instructs the RK slave state machine to execute five RK6 algorithm sub-state cycles, and after completion, jumps to the Adams slave state machine to execute one Adams6 prediction-correction cycle; The calculation formula of RK4-Adams4 includes: The calculation formula of RK6-Adams6 includes: Among them, K1 to K7 represent the slope estimates of different sub-stages within the time step in the RK algorithm, f(*) is the differential equation function, which describes the change law of the state variables in the trajectory equation over time, t n is the current time point, y n At time t n The state variable at , h is the time step, that is, the interval between adjacent time points, Represents the intermediate prediction value of the Adams prediction formula, which is used in subsequent correction steps, y n+1 Represents the final numerical solution after correction, representing the next time t n+1 The state variables at .
7. The calculation method for batch trajectory equation pipeline depth control and sequential output according to claim 1 is characterized in that: The algorithm iteration module splits the operation process compatible with RK4-Adams4 and RK6-Adams6 into 7 multiplication stages and 5 addition stages, and realizes multi-algorithm parallel synchronous calculation by reusing operators.