Pine tree specific variant DNA fragment high-speed classification system and method based on FPGA

Abstract

The invention relates to a high-speed classification system and a high-speed classification method for special variant DNA fragments of pine trees, in particular to a high-speed classification system and a high-speed classification method for special variant DNA fragments of pine trees based on an FPGA (Field Programmable Gate Array). The invention aims to solve the problems of low calculation speed, high energy consumption and poor real-time performance when a CPU (Central Processing Unit) or a GPU (Graphics Processing Unit) is used for analyzing the pine tree variation DNA fragment in the prior art. A data input interface module of the classification system is used for receiving to-be-analyzed DNA sequence data and reference genome sequence data from an external memory or a host and loading the to-be-analyzed DNA sequence data and reference genome sequence data into an on-chip memory; the FPGA processing unit is connected with the data input interface module and the on-chip memory, and is used for carrying out high-speed parallel processing on the DNA sequence data and generating a classification result of variant DNA fragments; and the result output interface module is used for transmitting the classification result to an external host or storage equipment from the FPGA processing unit. The invention belongs to the technical field of bioinformatics and computer hardware acceleration.

Description

TECHNICAL FIELD

[0001] The present application relates to a high-speed classification system and method for pine-specific variant DNA fragments, belonging to the field of bioinformatics and computer hardware acceleration technology. BACKGROUND

[0002] As an important component of global forest ecosystems, pines play a crucial role in maintaining biodiversity, regulating climate, and conserving water resources, as well as having high economic value. Among the many pine species, Pinus taeda and Pinus tabulaeformis are important afforestation and economic tree species in China, occupying a central position in timber production, resin chemical industry, and ecological protection forest construction. Therefore, accurate identification of Pinus taeda and Pinus tabulaeformis germplasm resources, genetic diversity analysis, and disease resistance (such as pine wood nematode disease) research have profound strategic significance for promoting the sustainable development of forestry, implementing efficient genetic improvement plans, and ensuring national ecological security.

[0003] Variations present in DNA (deoxyribonucleic acid) sequences, such as single nucleotide polymorphisms (SNPs) and insertions and deletions (InDels), are the fundamental sources of genetic diversity between and within species. These variation information is the cornerstone of research such as species identification, kinship tracing, functional gene positioning, and molecular marker-assisted breeding. With the rapid development of second and third generation high-throughput sequencing (HTS) technology and the sharp decline in sequencing costs, we have entered a "post-genomic era", enabling the acquisition of massive genomic data, including Pinus taeda and Pinus tabulaeformis, on an unprecedented scale. However, this has also brought unprecedented challenges: how to efficiently and accurately extract valuable biological information from TB or even PB levels of raw sequencing data.

[0004] Currently, the standard analysis process for large-scale genomic variation data is a complex and computationally intensive multi-step task, which usually relies heavily on high-performance computing clusters, with central processing units (CPUs) or graphics processing units (GPUs) as the main processing units. A typical analysis process includes: Sequence alignment: This step is to accurately map hundreds of millions of short sequencing reads back to the corresponding positions of the reference genome. Widely used tools such as BWA (Burrows-Wheeler Aligner) use compressed indexes based on BWT to achieve fast lookup. Although the algorithm is efficient, this process is still one of the most time-consuming steps in the entire process when faced with massive data, as CPUs need to handle a large amount of string matching, index querying, and alignment scoring, with a heavy computational burden.

[0005] Variant detection: After alignment is completed, tools such as Samtools, BCFtools, etc. are needed to process the generated alignment file (BAM format) to identify variant sites different from the reference genome. This process includes read sorting, duplicate removal, local rearrangement, and statistical analysis at each base position, using complex probability models to determine whether a site's variation is a true biological difference or a sequencing error. This step is not only computationally intensive, but also involves a large amount of disk I / O operations, further exacerbating processing delays.

[0006] Feature extraction and classification: After identifying variant sites, in order to perform species-specific analysis, DNA fragments around each variant site need to be extracted and their features calculated. The technical solution involved in this invention uses two key features: GC content and chaotic game representation (FCGR). GC content is a classic global feature, while FCGR is an innovative method that can map one-dimensional DNA sequence information into a two-dimensional image that preserves k-mer frequency and spatial distribution information. This image-based feature representation is very suitable for using deep learning models such as convolutional neural networks (CNN) for advanced pattern recognition and classification.

[0007] Although the above process is theoretically perfect, in practical applications, the implementation based on traditional computing architecture exposes many drawbacks: CPU architecture bottleneck: As a general-purpose processor, the design goal of CPU is to handle various complex logic and serial tasks. However, its core number is limited, and when faced with genome data analysis, which is a highly parallel task, performance improvement is limited. A large amount of computing resources and time are consumed in instruction decoding, task scheduling, and waiting for data I / O overhead, resulting in a very long analysis time for the entire analysis process. Analysis of a large-scale sample often takes several days or even weeks, which cannot meet the requirements of rapid breeding and real-time disease monitoring and other application scenarios for timeliness.

[0008] Limitations of GPU architecture: Although GPUs have thousands of computing cores, providing powerful parallel computing capabilities, and have achieved great success in the field of deep learning, there are still limitations when applying them to the whole process of bioinformatics analysis. First, the SIMT (Single Instruction Multiple Thread) architecture of GPU is most suitable for processing regular, data-parallel tasks (such as matrix operations), while many algorithms in genomic analysis (such as dynamic programming in sequence alignment, complex condition judgment in variant detection) have a large number of data dependencies and branch prediction, which will cause GPU thread bundle divergence (thread divergence), and cannot fully exert its parallel advantage. Second, as a co-processor, GPU relies on data communication between CPU and GPU through PCIe bus. In genomic analysis, massive data need to be frequently transmitted between host memory and GPU memory, which produces significant delay and becomes the "Achilles heel" of system performance. In addition, high-performance GPUs have huge power consumption, and the cost of building and maintaining GPU clusters is also very high.

[0009] Performance problems of feature extraction and classification: The process of converting DNA fragments into FCGR images and using CNN for classification itself also involves huge amount of computation. Generating FCGR images for millions or even billions of DNA fragments involves massive windowing and frequency statistics operations. The forward inference of CNN model, especially the convolution layer, involves millions of multiplication and addition operations. Executing this process on CPU is inefficient, while on GPU, although the speed is improved, it is still limited by the above-mentioned data transmission delay and architecture mismatch problems.

[0010] In summary, the existing technology in processing large-scale genomic variation data of pine and other plants, whether using CPU or GPU solution, generally faces the problems of slow processing speed, long analysis period, large demand for computing resources, and high energy consumption cost. There are multiple performance bottlenecks in the whole analysis process, and there is a lack of an overall solution that can provide efficient, low-latency, and low-power acceleration from beginning to end. Therefore, there is an urgent need in the field for a new technology that breaks through the limitations of traditional computing architecture to meet the real needs of fast and accurate classification of pine genomic data. SUMMARY

[0011] To solve the problems of slow computing speed, high energy consumption, and poor real-time performance in analyzing pine variant DNA fragments using CPU or GPU in the prior art, the present application proposes a high-speed classification system and method for pine-specific variant DNA fragments based on FPGA.

[0012] The technical solution adopted by the present application to solve the above problems is as follows: The high-speed classification system for pine-specific variant DNA fragments based on FPGA of the present application comprises: a data input interface module for receiving DNA sequence data to be analyzed and reference genome sequence data from an external storage or a host computer and loading them into on-chip memory; an FPGA processing unit connected to the data input interface module and the on-chip memory, for performing high-speed parallel processing on the DNA sequence data and generating classification results of variant DNA fragments; a result output interface module for transmitting the classification results from the FPGA processing unit to an external host computer or storage device.

[0013] Further, the FPGA processing unit comprises: a hardware-based sequence alignment module for performing parallel alignment of input DNA sequence data with a reference genome; a hardware-based variant detection module for identifying variant sites in the DNA sequence according to the output of the sequence alignment module; a variant fragment extraction module for extracting DNA fragments containing the variant sites and their context from the on-chip memory according to the identified variant sites; a hardware-based feature extraction module for generating a fused feature vector for each extracted DNA fragment; a hardware-based classification prediction module for classifying the fused feature vector and outputting a final result; The hardware-based sequence alignment module, the hardware-based variant detection module, the variant fragment extraction module, the hardware-based feature extraction module, and the hardware-based classification prediction module are integrated in a pipeline manner inside the FPGA processing unit.

[0014] Further, the hardware-based feature extraction module comprises: a GC content calculation submodule comprising parallel counter circuits for calculating the total number of guanine and cytosine bases in a DNA fragment within a single data read cycle and generating a GC content scalar feature; a chaotic game representation feature generation submodule for converting a DNA fragment into a two-dimensional frequency matrix image feature through k-mer frequency statistics; a feature fusion submodule comprising hardware splicing circuits for fusing the GC content scalar feature and the FCGR image feature to form a combined, multi-dimensional feature vector for processing by downstream modules.

[0015] Further, the hardware-based classification prediction module is a hardware-implemented deep learning model, and the model comprises: a backbone network based on a convolutional neural network for extracting deep spatial features from the FCGR image feature; A hardware-implemented Transformer encoder layer for self-attention weighting of features extracted by the convolutional neural network-based backbone network to capture long-range dependencies between features; the core attention calculation follows the formula: (1), In formula (1), denotes the query, denotes the key, denotes the value matrix, denotes the dimension of the key vector; A classifier circuit for integrating the output of the Transformer encoder layer and the GC content feature and finally outputting the classification result through a fully connected layer circuit.

[0016] Further, the chaotic game representation feature generation submodule maps k-mer to two-dimensional image coordinates through a hardware logic circuit, where the coordinates of each k-mer are Through iterative calculation, the iterative formula is: (2), In formula (2), denotes the coordinates of the th iteration, denotes the vertex coordinates of the current th base in the preset two-dimensional coordinate system.

[0017] Further, a pine tree-specific variant DNA fragment high-speed classification system based on FPGA, characterized in that the method for obtaining the classification prediction module training model is realized through the following steps: Step one, load the training data set of pine DNA fragments with known labels and their classification labels on a computing device; the classification labels include Pinus massoniana specific, Pinus tabulaeformis specific, and uncertain; Step two, for each DNA fragment in the training data set, extract its GC content feature and FCGR image feature and fuse them; Step three, construct a deep learning model containing a convolutional neural network layer and a Transformer encoder layer, and set a loss function for measuring the difference between the predicted value and the true label, wherein the loss function adopts cross-entropy loss, and its calculation formula is: (3), In formula (3), denotes the total number of categories, denotes the one-hot encoding of the true label, denotes the probability of the corresponding category predicted by the model.

[0018] The application discloses a FPGA-based high-speed classification method for pine-specific variant DNA fragments, and specific steps include: Step 1, through a data input interface module, load pine DNA sequence data to be classified and reference genome sequence data into on-chip memory of the system; Step 2, in the FPGA processing unit, start a hardware sequence comparison module, perform high-speed comparison between input sequences and reference genomes, and transmit comparison results in the form of a data stream to the next module; Step 3, start a hardware variant detection module, process received comparison data streams in real time, and identify variant sites; Step 4, according to the variant sites, extract DNA fragments containing the variant sites and adjacent regions on both sides from the on-chip memory by a variant fragment extraction module; Step 5, start a hardware feature extraction module, calculate GC content of each extracted DNA fragment in parallel and generate an FCGR feature image thereof, and then fuse the two features into a multi-dimensional feature vector; Step 6, input the multi-dimensional feature vector into a hardware classification prediction module, perform forward inference calculation through a solidified deep learning model, and obtain a classification result; Step 7, output the final classification result of each DNA fragment through a result output interface module, wherein pine-specific variant fragments are marked as 1, oil pine-specific variant fragments are marked as 0, and uncertain fragments are marked as 2.

[0019] Further, the process of generating an FCGR feature image in step 5 includes: A hardware shift register is used to perform window decomposition on a DNA fragment sequence to generate k-mers, an on-chip memory is used to construct a hash lookup table to parallelly count the occurrence frequency of each k-mer, and finally the frequency value is mapped to the corresponding position of a two-dimensional matrix to form a feature image.

[0020] Further, the multiply-add operation of the convolution layer and the fully connected layer of the classification prediction module in step 6 is realized as a parallel, pipelined hardware multiply-accumulate array in the FPGA to realize deep acceleration of the inference calculation process.

[0021] The application has the following beneficial effects: 1. The application realizes full-process hardware acceleration from original sequences to classification results, and the processing flux and efficiency are improved by orders of magnitude; 2、The application hardware realizes multiple computationally intensive steps such as sequence alignment, variation detection, fragment extraction, feature extraction and deep learning classification in the form of a deep pipeline on the FPGA, and data seamlessly flows on the chip, completely eliminating the huge delay caused by software scheduling, inter-module data transmission and PCIe bus bottleneck in the traditional CPU / GPU solution, and shortening the overall analysis time from several days to several hours or even minutes; 3、The hardware of excessive feature fusion and advanced deep learning model in the application significantly improves the accuracy and sensitivity of classification, the GC content feature capable of representing the global information of the sequence and the chaotic game representation (FCGR) image feature capable of capturing the local sequence pattern and k-mer frequency are efficiently fused at the hardware level, the high-dimensional feature after fusion is sent to the hardware solidified CNN-Transformer hybrid model for classification, the powerful spatial feature extraction capability of CNN and the ability of Transformer to capture long-distance dependency are utilized, so that the slight differences of the unique variations of Pinus massoniana and Pinus tabuliformis can be more accurately identified, and the detection sensitivity and accuracy are far higher than those of traditional methods; 4、The application adopts a highly parallel special circuit design, effectively solving the computational bottleneck of bioinformatics algorithms. For massive pattern matching in sequence alignment and complex statistical filtering in variation detection, the application designs a special parallel processing circuit to overcome the limitations of serial processing of CPU; for large-scale multiplication and accumulation operations in FCGR generation and CNN inference, the application constructs a parallel hardware multiplier and adder array to avoid the thread bundle divergence problem that may occur when GPU architecture processes irregular data, so that the computing resources are optimally utilized; 5、The application greatly reduces system energy consumption and deployment cost, promotes the popularization of genomic analysis technology, compared with large-scale GPU server clusters that need to be equipped with high-power power supply and complex cooling system, the single FPGA chip solution of the application significantly reduces the running power consumption while achieving the same or even higher performance; this not only reduces the power and operation cost, but also reduces the deployment threshold of high-performance genomic analysis platforms, making them possible in more laboratories and application scenarios; 6、The automatic processing process reduces manual intervention, improves the stability and repeatability of detection, the entire analysis process is automatically executed on the FPGA, and users only need to input the original data to obtain the final classification report, which avoids the errors introduced by manual operation, inconsistent parameter settings and software version compatibility in traditional multi-software processes, and ensures the high stability and repeatability of the analysis results, 7. This invention achieves extremely low single-sample processing latency, enabling real-time or near-real-time applications. Since data processing is performed entirely in hardware in a pipeline manner, once the pipeline is full, the system can continuously output classification results at an extremely high rate. This extremely low processing latency characteristic makes this invention not only suitable for large-scale batch analysis, but also provides strong technical support for scenarios that require rapid response (such as rapid species quarantine at ports of entry and exit, and early warning of diseases). 8. The present invention has a high degree of system integration, compact structure and strong reliability. The present invention integrates the functions that originally required multiple servers and complex software stacks into a single FPGA chip, which greatly simplifies the system architecture. The reduction in physical space, the reduction in the number of components and the high reliability of the hardware itself together ensure that the entire system can operate stably for a long time. 9. This invention possesses excellent reconfigurability and scalability, enabling it to adapt to future algorithm developments. The core advantage of FPGAs lies in the reprogrammability of their hardware logic. When more advanced sequence alignment algorithms or more efficient deep learning models emerge in the future, hardware functionality can be upgraded by updating the FPGA's configuration file, without replacing the entire hardware platform. This flexibility ensures a long technological lifecycle for this invention, allowing it to maintain its advanced nature. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the overall structure of a high-speed classification system for pine-specific variant DNA fragments based on FPGA provided by the present invention; Figure 2 This is a schematic diagram of the internal pipelined hardware module of the FPGA processing unit provided by the present invention; Figure 3 This is a detailed structural diagram of the hardware-based feature extraction and fusion module provided by the present invention; Figure 4 A schematic diagram of the hardware-based classification prediction module (CNN-Transformer hybrid model) provided by this invention; Figure 5 This is a flowchart of a high-speed classification method for pine-specific variant DNA fragments based on FPGA provided by the present invention. Detailed Implementation

[0023] Specific implementation method one: as follows Figures 1 to 4 As shown, a high-speed classification system for pine-specific variant DNA fragments based on FPGA includes: The data input interface module is used to receive DNA sequence data to be analyzed and reference genome sequence data from external storage or host, and load them into on-chip memory; The FPGA processing unit is connected with the data input interface module and the on-chip memory, and is configured to perform high-speed parallel processing on the DNA sequence data and generate a classification result of the variant DNA fragments. A result output interface module is configured to transmit the classification result from the FPGA processing unit to an external host or a storage device.

[0024] The FPGA processing unit comprises: A hardware-based sequence alignment module configured to perform parallel alignment of the input DNA sequence data with a reference genome; A hardware-based variant detection module configured to identify a variant site in the DNA sequence according to an output of the sequence alignment module; A variant fragment extraction module configured to extract, from the on-chip memory, a DNA fragment containing the site and its context according to the identified variant site; A hardware-based feature extraction module configured to generate a fused feature vector for each extracted DNA fragment; A hardware-based classification prediction module configured to perform classification on the fused feature vector and output a final result; The hardware-based sequence alignment module, the hardware-based variant detection module, the variant fragment extraction module, the hardware-based feature extraction module and the hardware-based classification prediction module are integrated in a pipeline manner inside the FPGA processing unit.

[0025] The hardware-based feature extraction module comprises: A GC content calculation submodule comprising a parallel counter circuit configured to calculate a total number of guanine and cytosine bases in a DNA fragment in a single data reading period and generate a GC content scalar feature; A chaotic game representation feature generation submodule configured to convert a DNA fragment into a two-dimensional frequency matrix image feature through k-mer frequency statistics; A feature fusion submodule comprising a hardware splicing circuit configured to fuse the GC content scalar feature and the FCGR image feature to form a combined, multi-dimensional feature vector for processing by a downstream module.

[0026] The hardware-based classification prediction module is a hardware-implemented deep learning model, and the model comprises: A backbone network based on a convolutional neural network configured to extract deep spatial features from the FCGR image feature; A hardware-implemented Transformer encoder layer configured to perform self-attention weighting on the features extracted by the backbone network based on the convolutional neural network to capture long-distance dependency relationships between the features; core attention calculation thereof follows the following formula: (1), In formula (1), denotes a query, denotes a key, denotes a value matrix, denotes the dimension of the key vector; a classifier circuit for integrating the output of the Transformer encoder layer and the GC content feature, and finally outputting the classification result through a fully connected layer circuit.

[0027] wherein the chaotic game representation feature generation submodule realizes the mapping of k-mer to two-dimensional image coordinates through a hardware logic circuit, wherein the coordinates of each k-mer is obtained by iterative calculation, and the iterative formula is: (2), In formula (2), denotes the coordinates of the i-th iteration, denotes the vertex coordinates of the current i-th base in the preset two-dimensional coordinate system.

[0028] wherein the method for obtaining the training model of the classification prediction module is realized through the following steps: Step one, load the training data set of the DNA fragment of the pine tree with known labels and its classification labels on the computing device; the classification labels include Pinus massoniana specific, Pinus tabulaeformis specific and uncertain; Step two, for each DNA fragment in the training data set, extract its GC content feature and FCGR image feature, and fuse them; Step three, construct a deep learning model containing a convolutional neural network layer and a Transformer encoder layer, and set a loss function for measuring the difference between the predicted value and the true label, wherein the loss function adopts cross-entropy loss, and its calculation formula is: (3), In formula (3), denotes the total number of categories, denotes the one-hot encoding of the true label, denotes the probability of the corresponding category predicted by the model.

[0029] The method for obtaining the training model of the classification prediction module further includes using a learning rate scheduling strategy such as “ReduceLROnPlateau” to dynamically adjust the learning rate according to the accuracy of the model on the validation set, so as to accelerate the convergence of the model and improve the performance.

[0030] ​​The method for obtaining the training model of the classification prediction module also includes a step of imbalance processing the training dataset, wherein the imbalance processing method is selected from at least one of the following methods: The SMOTE (Synthetic Minority Over-sampling Technique) algorithm is applied to oversample classes with small sample sizes to generate new synthetic samples; In the loss function of step three, class weights are introduced to assign higher weight values ​​to classes with smaller sample sizes, thereby enhancing their influence during model training.

[0031] Specific implementation method two: such as Figure 5 As shown, the steps of a high-speed classification method for pine-specific variant DNA fragments based on FPGA include: Step 1: Load the pine DNA sequence data to be classified and the reference genome sequence data into the system's on-chip memory through the data input interface module; Step 2: In the FPGA processing unit, the hardware sequence alignment module is started to perform high-speed alignment of the input sequence with the reference genome, and the alignment results are transmitted to the next module in the form of a data stream. Step 3: Activate the hardware-based mutation detection module to process the received comparison data stream in real time and identify mutation sites; Step 4: Based on the mutation site, the mutation fragment extraction module extracts the DNA fragment containing the mutation site and its adjacent regions from the on-chip memory. Step 5: Start the hardware-based feature extraction module, calculate the GC content of each extracted DNA fragment in parallel and generate its FCGR feature image, and then fuse the two features into a multi-dimensional feature vector. Step 6: Input the multidimensional feature vector into the hardware-based classification prediction module, and perform forward inference calculation through the fixed deep learning model to obtain the classification result; Step 7: Output the final classification result of each DNA fragment through the result output interface module, where the unique variant fragment of pine is marked as 1, the unique variant fragment of Chinese pine is marked as 0, and the indeterminate fragment is marked as 2.

[0032] The process of generating the FCGR feature image in step 5 includes: A hardware shift register is used to perform sliding window decomposition of DNA fragment sequences to generate k-mers, and an on-chip memory is used to build a hash lookup table to count the frequency of each k-mer in parallel. Finally, the frequency values ​​are mapped to the corresponding positions in a two-dimensional matrix to form a feature image.

[0033] In step 6, the multiply-accumulate operations of the convolutional and fully connected layers of the classification prediction module are implemented in the FPGA as a parallel, pipelined hardware multiply-accumulate array to achieve a deep acceleration of the inference computation process.

[0034] Example like Figure 1 As shown, a high-speed classification system for pine-specific variant DNA fragments based on FPGA typically uses a hardware acceleration card containing a large FPGA chip, onboard DDR memory, and high-speed I / O interfaces (such as PCIe) as its physical carrier. This acceleration card is installed in a standard server or workstation.

[0035] The system mainly consists of a data input interface module, an FPGA processing unit, and a result output interface module. The data input and output interface module communicates with the host CPU and memory via the PCIe bus, and is responsible for task distribution, data transmission, and result retrieval.

[0036] The core is the FPGA processing unit, which does not run an operating system or software program internally, but rather a dedicated data processing pipeline composed of pure hardware logic circuits. For example... Figure 2 As shown, the pipeline includes multiple serially connected, function-specific hardware modules: Sequence Alignment Module: This module reads the reference genome and the DNA sequence to be analyzed (FASTQ format) from the onboard DDR. The reference genome is preprocessed into a hardware-friendly index structure (such as a hash-based lookup table) and stored in the FPGA's on-chip memory (BRAM) for extremely fast lookups. For each sequencing read, this module utilizes its internal massively parallel logic units to simultaneously match and score multiple candidate positions, achieving speeds far exceeding those of CPU-based software implementations.

[0037] Variance Detection Module: This module directly receives the data stream from the sequence alignment module without waiting for the entire alignment file to be written to disk. It parses the alignment information (such as CIGAR strings) in real time using a hardware state machine, accumulates base coverage information at each genomic location, and identifies high-confidence variant sites using a hardware-implemented statistical filter.

[0038] The variant fragment extraction module, feature extraction module, and classification prediction module will be detailed in subsequent embodiments. This pipeline design ensures efficient data flow throughout the entire process from entering the FPGA to generating results, minimizing data handling and waiting time.

[0039] In some embodiments, such as Figure 3As shown, the feature extraction module is key to achieving high-precision classification in this invention. When the variant fragment extraction module outputs a DNA fragment, this fragment is simultaneously fed into two parallel hardware sub-modules: GC content calculation submodule: This circuit design is extremely efficient. It can check multiple bases within one clock cycle, accumulating the number of G and C bases using parallel adders. When a segment is processed, a hardware divider or CORDIC (Coordinate Rotating Digital Computer) unit immediately calculates the GC content ratio.

[0040] FCGR Feature Generation Submodule: This module is the core of DNA sequence imaging. It uses a k (e.g., k=6) bit shift register to slide-window scan the entire DNA fragment, generating k-mers one by one. Each generated k-mer is used as an address in a BRAM (Block Random Access Memory), and the count value in that address is incremented, thus efficiently performing frequency statistics for all k-mers. After the fragment scanning is complete, a control unit reads all frequency values ​​from the BRAM in a predetermined order and arranges them into a two-dimensional matrix (e.g., 64x64) to form the FCGR feature image of the DNA fragment.

[0041] Feature fusion submodule: Finally, the scalar value of GC content and the FCGR feature image are concatenated by hardware circuitry into a unified, higher-dimensional feature vector, ready to be sent to the classification prediction module.

[0042] In some embodiments, such as Figure 4 As shown, the classification prediction module is the hardware "incarnation" of the pre-trained deep learning model.

[0043] The model in this embodiment is a CNN-Transformer hybrid model. The model's weights, biases, and other parameters are extracted after training and stored as constants in the FPGA's on-chip ROM or BRAM.

[0044] When the fused feature vector is input, its FCGR image portion first flows through the CNN backbone network. Each layer of the CNN (convolution, pooling, activation) is implemented by dedicated parallel hardware circuitry, and the convolution operation, in particular, is implemented as a large-scale multiply-accumulate (MAC) unit array.

[0045] The output feature maps of the CNN are fed into the Transformer encoder layer, which uses a hardware-implemented self-attention mechanism to capture long-distance dependencies between features.

[0046] Finally, the fully connected classifier circuit integrates the output from the Transformer and the GC content features from the input, and after final computation, outputs a label (0, 1, or 2) representing the classification result. The entire forward inference process is completed in a hardware pipeline, with a delay of up to nanoseconds.

[0047] As shown in Figure 5 A FPGA-based high-speed classification method for pine-specific variant DNA fragments, the specific steps include: S1: Data loading: the user specifies the Pinus taeda / P. massoniana DNA sequencing file and reference genome file to be analyzed on the host end. The control software transmits these data to the on-board DDR memory of the FPGA acceleration card through DMA.

[0048] S2: Sequence alignment: the sequence alignment module in the FPGA processing unit automatically starts working, reads data from the DDR for high-speed parallel alignment.

[0049] S3: Variant detection: the output of the alignment module is directly sent to the variant detection module in the form of a data stream, which is processed in real time to identify variant sites.

[0050] S4: Fragment extraction: according to the coordinates of the identified variant sites, the variant fragment extraction module accurately locates and extracts the DNA sequences of the adjacent regions on both sides from the DDR.

[0051] S5: Feature engineering: the extracted fragments flow to the feature extraction module, which calculates the GC content and generates FCGR images for each fragment in parallel, and then fuses them into a unified feature vector.

[0052] S6: Classification prediction: the feature vector is sent to the hardware CNN-Transformer model for fast inference, and the classification result of "Pinus taeda specific (1)", "Pinus massoniana specific (0)", or "uncertain (2)" is obtained.

[0053] S7: Result feedback: the classification results and corresponding variant site information are summarized and fed back to the host through the result output interface via the PCIe bus. The host software saves the results as a user-readable CSV file or other format report.

[0054] Working principle The above merely describes preferred embodiments of the present application, and is not intended to limit the present application in any form. Although the present application has been disclosed with preferred embodiments as above, it is not intended to limit the present application. Any person skilled in the art, without departing from the technical solution of the present application, can make some changes or modifications to the above disclosed technical content to obtain equivalent embodiments with equivalent changes. However, as long as it does not depart from the technical solution of the present application, and is within the spirit and principle of the present application, any simple modification, equivalent replacement and improvement of the above embodiments are still within the protection scope of the technical solution of the present application.

Claims

1. A FPGA-based high-speed classification system for pine-specific variant DNA fragments, characterized in that, The application relates to a DNA sequence analysis system based on FPGA, comprising: a data input interface module for receiving DNA sequence data to be analyzed and reference genome sequence data from an external storage or a host computer and loading the data into on-chip memory; an FPGA processing unit connected to the data input interface module and the on-chip memory, for high-speed parallel processing of the DNA sequence data and generating classification results of variant DNA fragments; a result output interface module for transmitting the classification results from the FPGA processing unit to an external host computer or a storage device.

2. The FPGA-based high-speed classification system for pine-specific variant DNA fragments according to claim 1, wherein, The FPGA processing unit comprises: a hardware-based sequence alignment module for parallel alignment of input DNA sequence data and a reference genome; a hardware-based variant detection module for identifying variant sites in the DNA sequence according to the output of the sequence alignment module; a variant fragment extraction module for extracting a DNA fragment containing the site and its context from the on-chip memory according to the identified variant site; a hardware-based feature extraction module for generating a fused feature vector for each extracted DNA fragment; a hardware-based classification prediction module for classifying the fused feature vector and outputting a final result; The hardware-based sequence alignment module, the hardware-based variant detection module, the variant fragment extraction module, the hardware-based feature extraction module and the hardware-based classification prediction module are integrated in a pipeline manner inside the FPGA processing unit.

3. The FPGA-based high-speed classification system for pine-specific variant DNA fragments according to claim 2, wherein, The hardware-based feature extraction module comprises: a GC content calculation submodule comprising parallel counter circuits for calculating the total number of guanine and cytosine bases in a DNA fragment in a single data reading cycle and generating a GC content scalar feature; a chaotic game representation feature generation submodule for converting a DNA fragment into a two-dimensional frequency matrix image feature through k-mer frequency statistics; a feature fusion submodule comprising a hardware splicing circuit for fusing the GC content scalar feature and the FCGR image feature to form a combined, multi-dimensional feature vector for processing by a downstream module.

4. The FPGA-based high-speed classification system for pine-specific variant DNA fragments of claim 2, wherein, The hardware-based classification prediction module is a hardware-implemented deep learning model, and the model comprises: a backbone network based on a convolutional neural network for extracting deep spatial features from the FCGR image feature; a hardware-implemented Transformer encoder layer for self-attention weighting of the features extracted by the backbone network based on the convolutional neural network to capture long-distance dependency relationships between the features; the core attention calculation follows the formula: （1）， In Equation (1), denotes a query, denotes a key, denotes a value matrix, denotes a dimension of a key vector; a classifier circuit for integrating the output of the Transformer encoder layer and the GC content feature and finally outputting the classification result through a fully connected layer circuit.

5. The FPGA-based high-speed classification system for pine-specific variant DNA fragments of claim 3, wherein, The chaotic game representation feature generation submodule realizes the mapping of k-mers to two-dimensional image coordinates by a hardware logic circuit, wherein the coordinates of each k-mer The iterative formula is obtained by iterative calculation: （2）， In formula (2), represents the first coordinate of the step iteration, represents the current first base in the preset two-dimensional coordinate system.

6. The FPGA-based high-speed classification system for pine-specific variant DNA fragments according to claim 4, wherein, The method for obtaining the classification prediction module training model is realized through the following steps: Step 1: loading a training data set of pine DNA fragments with known labels and classification labels on a computing device; the classification labels include Pinus massoniana specific, Pinus tabulaeformis specific and uncertain; Step 2: extracting the GC content feature and the FCGR image feature of each DNA fragment in the training data set and fusing them. Step three, a deep learning model containing convolutional neural network layers and Transformer encoder layers is constructed, and a loss function for measuring the difference between the predicted value and the true label is set, which adopts cross-entropy loss, and its calculation formula is: （3）， In Equation (3), denotes the total number of classes, denotes the one-hot encoding of the true label, denotes the probability of the corresponding class predicted by the model.

7. A method for high-speed classification of pine-specific variant DNA fragments based on FPGA, characterized in that, The specific steps include: Step 1, through the data input interface module, load the pine DNA sequence data to be classified and the reference genome sequence data into the on-chip memory of the system; Step 2, in the FPGA processing unit, start the hardware sequence alignment module, perform high-speed alignment on the input sequence and the reference genome, and transmit the alignment result to the next module in the form of a data stream; Step 3, start the hardware variation detection module to process the received alignment data stream in real time and identify the variation sites; Step 4, according to the variation sites, the variation fragment extraction module extracts the DNA fragments containing the variation sites and their adjacent regions from the on-chip memory; Step 5, start the hardware feature extraction module, calculate the GC content of each extracted DNA fragment in parallel and generate its FCGR feature image, and then fuse the two features into a multi-dimensional feature vector; Step 6, input the multi-dimensional feature vector into the hardware classification prediction module, and perform forward inference calculation through the solidified deep learning model to obtain the classification result; Step 7, through the result output interface module, output the final classification result of each DNA fragment, wherein the Pinus massoniana specific variation fragment is marked as 1, the Pinus taeda specific variation fragment is marked as 0, and the uncertain fragment is marked as 2.

8. The FPGA-based method for high-speed classification of pine-specific variant DNA fragments according to claim 7, wherein, The process of generating FCGR feature images in step 5 includes: Using hardware shift registers to slide window decomposition of DNA fragment sequence to generate k-mers, and using on-chip memory to build a hash lookup table to count the frequency of each k-mer in parallel, and finally map the frequency value to the corresponding position of the two-dimensional matrix to form the feature image.

9. The FPGA-based method for high-speed classification of pine-specific variant DNA fragments according to claim 7, wherein, The multiply-add operation of the convolution layer and the fully connected layer of the classification prediction module in step 6 is realized as a parallel, pipelined hardware multiply-accumulate array in FPGA to realize deep acceleration of the inference calculation process.

Images