Power supply circuit and switching tube control circuit thereof

Abstract

The invention discloses a power supply circuit and a switching tube control circuit thereof. In the circuit, a time delay circuit is connected with a corresponding controlled switching tube; the driving unit is connected with the phase splitting unit and provides an initial pulse width modulation signal for the phase splitting unit; and the phase splitting unit is connected with the delay circuits and is used for respectively providing driving pulse width modulation signals with the phase opposite to or the same as that of the initial pulse width modulation signal for the two delay circuits in the same pair according to the initial pulse width modulation signal. Whenever an initial pulse width modulation signal reaches a trigger edge, the time delay circuit corresponding to the originally switched-on controlled switch tube controls the corresponding controlled switch tube to be switched off immediately and stores energy for the controlled switch tube itself, and the time delay circuit corresponding to the originally switched-off controlled switch tube controls the controlled switch tube to be switched on after the controlled switch tube continues to be switched off for a preset duration by using the electric energy stored last time; alternating conduction control and dead time generation of the paired controlled switch tubes are realized, the circuit structure is simple, software design is not needed, and the development duration and the debugging cost are reduced.

Description

TECHNICAL FIELD

[0001] The present application relates to switch control technology, in particular to a power supply circuit and a switch control circuit thereof. BACKGROUND

[0002] With the development and progress of science and technology, electronic circuits have been rapidly developed. In order to realize the control function, electronic circuits often use a large number of MOSFET and IGBT switch devices.

[0003] In the prior art, the on-off control of MOSFET and IGBT switch devices generally uses a special driving chip with dead time and negative voltage generation function. In this scheme, the driving chip often needs a large number of software methods, and the development time is longer and the debugging cost is higher. SUMMARY

[0004] The present application provides a power supply circuit and a switch control circuit thereof to reduce the development time and the modulation cost.

[0005] According to an aspect of the present application, a switch control circuit is provided, which is applied to a pair of controlled switches to control the two controlled switches in the pair to be alternately turned on and to generate a preset dead time.

[0006] The switch control circuit comprises a phase splitting unit, a driving unit and a delay circuit corresponding to each of the controlled switches.

[0007] The delay circuit is connected to the corresponding controlled switch, the driving unit is connected to the phase splitting unit, and the driving unit is used to provide an initial pulse width modulation signal to the phase splitting unit; the phase splitting unit is connected to the delay circuit, and the phase splitting unit is used to provide a driving pulse width modulation signal with opposite phase and same phase of the initial pulse width modulation signal to each of the two delay circuits in the pair according to the initial pulse width modulation signal.

[0008] Whenever the initial pulse width modulation signal reaches a trigger edge, the delay circuit corresponding to the originally turned-on controlled switch controls the corresponding controlled switch to be immediately turned off and stores energy for itself according to the corresponding driving pulse width modulation signal, and the delay circuit corresponding to the originally turned-off controlled switch controls the controlled switch to be turned on after continuing to be turned off for the preset time according to the corresponding driving pulse width modulation signal and the stored energy.

[0009] Optionally, the switch control circuit further comprises a negative voltage generation circuit corresponding to each of the controlled switches, and the negative voltage generation circuit is arranged between the control end of the corresponding controlled switch and the corresponding delay circuit.

[0010] When the control signal outputted by the corresponding delay circuit changes from low level to high level, the negative voltage generating circuit controls the corresponding controlled switch tube to be turned off immediately and stores energy by using the high level; when the control signal outputted by the corresponding delay circuit changes from high level to low level, the negative voltage generating circuit provides a negative voltage signal with a potential lower than the low level at the control end of the corresponding controlled switch tube by using the stored energy, so as to ensure that the controlled switch tube can be reliably turned off.

[0011] Optionally, the negative voltage generating circuit comprises a Zener diode and a negative voltage capacitor, and the Zener diode and the negative voltage capacitor are arranged in parallel between the control end of the corresponding controlled switch tube and the control signal output end of the corresponding delay circuit.

[0012] Optionally, the phase splitting unit comprises a phase splitting transformer, and the phase splitting transformer comprises a primary winding and secondary windings corresponding to the controlled switch tubes in one-to-one correspondence, wherein the same name end of one of the secondary windings is a first terminal of the secondary winding, and the same name end of the other secondary winding is a second terminal of the secondary winding.

[0013] The primary winding is connected with the driving unit, and the secondary windings are connected with the corresponding delay circuits in one-to-one correspondence.

[0014] Optionally, the delay circuit comprises a delay switch tube, a delay capacitor, a first resistor and a second resistor.

[0015] The first end of the delay switch tube serves as a first control signal output end of the delay circuit and is connected with the control end of the corresponding controlled switch tube; and the second end of the delay switch tube serves as a second control signal output end of the delay circuit and is connected with the second end of the corresponding controlled switch tube.

[0016] The first end of the delay capacitor is connected with the control end of the delay switch tube, and the second end of the delay capacitor is connected with the second end of the delay switch tube.

[0017] The first terminal of the secondary winding in the corresponding phase splitting transformer is connected with the first end of the delay switch tube, and the second terminal of the secondary winding is connected with the first end of the delay capacitor through the first resistor and is connected with the second end of the delay capacitor through the second resistor.

[0018] Optionally, the delay switch tube comprises an N-type field effect tube.

[0019] Optionally, the driving unit comprises a power management chip.

[0020] According to another aspect of the present application, there is provided a power supply circuit, comprising: a pair of controlled switching tubes and a switching tube control circuit of any one of the first aspect corresponding to the pair of controlled switching tubes; the switching tube control circuit is connected to the control end of each of the controlled switching tubes, and is configured to control the two controlled switching tubes in the pair to be turned on alternately and generate a preset dead time.

[0021] Optionally, the power supply circuit further comprises: a power supply transformer corresponding to the pair of controlled switching tubes, a first filter capacitor assembly and a second filter capacitor assembly;

[0022] The pair of controlled switching tubes are connected in series between a bus power supply and a first ground terminal.

[0023] The first terminal of the primary side winding of the power supply transformer is connected to the connection point of the corresponding two controlled switching tubes, and the second terminal of the primary side winding of the power supply transformer is also connected to the connection point through the corresponding first filter capacitor assembly; the second filter capacitor assembly is connected between the bus power supply and the second terminal of the primary side winding of the power supply transformer; and the secondary side winding of the power supply transformer is configured to supply power externally.

[0024] The switching tube control circuit is connected to the control end of each of the controlled switching tubes, and is configured to control the two controlled switching tubes in the pair to be turned on alternately and generate a preset dead time.

[0025] Optionally, the controlled switching tube comprises an N-type MOSFET or an N-type IGBT.

[0026] The power supply circuit and the switching tube control circuit thereof provided by the present application comprise a driving unit, a phase splitting unit and a delay circuit corresponding to each controlled switching tube. The delay circuit is connected to the corresponding controlled switching tube; the driving unit is connected to the phase splitting unit to provide an initial pulse width modulation signal for the phase splitting unit; the phase splitting unit is connected to the delay circuit, and is configured to provide a driving pulse width modulation signal with opposite phase and the same phase as the initial pulse width modulation signal for each of the two delay circuits in the pair according to the initial pulse width modulation signal. Whenever the initial pulse width modulation signal reaches a trigger edge, the delay circuit corresponding to the controlled switching tube that is originally turned on controls the corresponding controlled switching tube to be turned off immediately and stores energy for itself according to the corresponding driving pulse width modulation signal, while the delay circuit corresponding to the controlled switching tube that is originally turned off controls the controlled switching tube to be turned on after a preset dead time according to the corresponding driving pulse width modulation signal using the energy stored in the last time, thereby realizing the alternate on-off control of the pair of controlled switching tubes and the generation of the dead time. The circuit structure is simple and does not require software design, thereby reducing the development time and debugging cost.

[0027] It is to be understood that the embodiments described herein are merely exemplary of the application and that a person skilled in the art can devise other embodiments without departing from the scope of the present application. It is also to be understood that not all of the benefits described herein need necessarily be realized in any particular embodiment of the application and that various embodiments of the present application can be directed to one or more particular benefits or be directed to no benefits at all. It should also be understood that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting. BRIEF DESCRIPTION OF DRAWINGS

[0028] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments description. Obviously, the drawings in the following description are only some embodiments of the present application, and other drawings can be obtained by those skilled in the art without any creative effort based on these drawings.

[0029] Figure 1 A composition schematic diagram of a switch tube and its control circuit provided by the embodiment of the present application is shown in FIG. 1.

[0030] Figure 2 A composition schematic diagram of another switch tube and its control circuit provided by the embodiment of the present application is shown in FIG. 2.

[0031] Figure 3 A composition schematic diagram of still another switch tube and its control circuit provided by the embodiment of the present application is shown in FIG. 3.

[0032] Figure 4 A composition schematic diagram of a power supply circuit provided by the embodiment of the present application is shown in FIG. 4. DETAILED DESCRIPTION

[0033] In order to make the technical personnel in the art better understand the present application, the following will combine the drawings in the embodiments of the present application to make a clear and complete description of the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, not all. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without any creative effort should be within the scope of the present application.

[0034] It should be noted that the terms "first", "second", and the like in the specification and claims of the present application and the above drawings are used to distinguish similar objects, and do not necessarily describe a specific order or sequence. It should be understood that the data used in this way can be interchanged under appropriate circumstances, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "include" and "have" and any variations thereof are intended to cover non-exclusive inclusion, for example, a process, method, system, product or device including a series of steps or units does not necessarily limit to those steps or units clearly listed, but can include other steps or units not clearly listed or inherent to these processes, methods, products or devices.

[0035] To solve the problems mentioned in the background, the embodiments of the present application provide a switch tube control circuit, Figure 1 The switch tube and the control circuit thereof provided by the embodiments of the present application have the advantages that Figure 1 The switch tube control circuit 100 is applied to a pair of controlled switch tubes Q, the pair of controlled switch tubes Q are connected in series between a bus power supply and a ground terminal GND, and the controlled switch tubes Q can include MOSFETs or IGBTs, for example. The switch tube control circuit 100 is used to control the two controlled switch tubes Q in the same pair to be turned on alternately and generate a preset dead time. The switch tube control circuit 100 includes a driving unit 101, a phase splitting unit 102, and a delay circuit 103 corresponding to each controlled switch tube Q. The delay circuit 103 is connected to the corresponding controlled switch tube Q; the driving unit 101 is connected to the phase splitting unit 102, and the driving unit 101 is used to provide an initial pulse width modulation signal for the phase splitting unit 102; the phase splitting unit 102 is connected to the delay circuit 103, and the phase splitting unit 102 is used to provide driving pulse width modulation signals with opposite and same phases to the two delay circuits 103 in the same pair according to the initial pulse width modulation signal. Whenever the initial pulse width modulation signal reaches a trigger edge, the delay circuit 103 corresponding to the controlled switch tube Q that is originally turned on controls the corresponding controlled switch tube Q to be turned off immediately and stores energy for itself according to the corresponding driving pulse width modulation signal, and the delay circuit 103 corresponding to the controlled switch tube Q that is originally turned off controls the corresponding controlled switch tube Q to be turned on after a preset time according to the corresponding driving pulse width modulation signal.

[0036] Specifically, the driving unit 101 refers to a functional circuit capable of generating a corresponding driving signal according to a set parameter, wherein the set parameter can be determined according to a locally stored signal or can be obtained in real time according to a front-stage control device, the driving signal can be a pulse width modulation signal, referred to as an initial pulse width modulation signal, and the frequency and duty cycle of the initial pulse width modulation signal are related to the on-off switching frequency and on-time ratio of the controlled switch tube. For example, the driving unit 101 can include a domestic power management chip without an isolation function.

[0037] The phase splitting unit 102 refers to a phase splitting functional circuit capable of splitting the initial pulse width modulation signal output by the driving unit 101 into two driving pulse width modulation signals with a phase difference of 180°, wherein one driving pulse width modulation signal has the same phase as the initial pulse width modulation signal, and the other driving pulse width modulation signal has an opposite phase to the initial pulse width modulation signal, so as to realize the alternate turn-on control of the pair of controlled switch tubes Q. For example, the phase splitting unit can include a phase splitting transformer or an electronic phase splitter, which can realize 180° phase splitting output.

[0038] The delay circuit 103 refers to a function circuit capable of maintaining the original control signal of the original off controlled switch tube Q by using the stored electric energy when the driving pulse signal reaches the trigger edge. The delay circuit 103 can include a capacitor or a battery, which realizes the storage and utilization of electric energy by using the battery or the capacitor. Exemplarily, the delay circuit 103 can include a delay capacitor and a delay switch tube, the delay switch tube is connected between the corresponding controlled switch tube Q and the ground terminal GND, and the delay capacitor is connected between the control terminal of the delay switch tube and the ground terminal GND. When the corresponding driving pulse width modulation signal reaches the trigger edge of the switching from the on control to the off control, on the one hand, the delay circuit 103 controls the corresponding controlled switch tube Q to be immediately off by using the driving pulse width modulation signal, and on the other hand, the delay capacitor is charged to a preset voltage by using the driving pulse width modulation signal to turn on the delay switch tube. Once the corresponding driving pulse width modulation signal switches to the trigger edge of the switching from the off control to the on control, the delay circuit 103 controls the delay switch to be on for a preset time by using the electric quantity stored in the delay capacitor, so that the corresponding controlled switch tube Q can be turned on again for a preset time. In the preset time, the potential of the control terminal of the corresponding controlled switch can be maintained at the off potential by the on delay switch, so that a preset dead time is formed between the off time of the other controlled switch tube Q and the on time of the controlled switch tube Q, thereby ensuring that the two controlled switch tubes Q will not be simultaneously turned on, and the control reliability between the paired controlled switch tubes Q is greatly improved.

[0039] The switch tube control circuit provided by the embodiment includes a driving unit, a phase splitting unit, and a delay circuit corresponding to each controlled switch tube. The delay circuit is connected with the corresponding controlled switch tube; the driving unit is connected with the phase splitting unit and provides an initial pulse width modulation signal for the phase splitting unit; the phase splitting unit is connected with the delay circuit and is configured to provide driving pulse width modulation signals with opposite phases and the same phase as the initial pulse width modulation signal for the two delay circuits in the pair, respectively, according to the initial pulse width modulation signal. Whenever the initial pulse width modulation signal reaches a trigger edge, the delay circuit corresponding to the originally on controlled switch tube controls the corresponding controlled switch tube to be immediately off and stores energy according to the corresponding driving pulse width modulation signal, and the delay circuit corresponding to the originally off controlled switch tube controls the controlled switch tube to be on after a preset off time according to the corresponding driving pulse width modulation signal by using the previously stored electric energy, thereby realizing the alternating on control of the paired controlled switch tubes and the generation of the dead time. The circuit structure is simple and does not require software design, thereby reducing the development time and debugging cost.

[0040] Optionally, Figure 2 Another composition schematic diagram of a switch tube and a control circuit thereof provided by the embodiment is provided, which is based on the foregoing embodiment and with reference to Figure 2The switch tube control circuit 100 further comprises a negative voltage generating circuit 104 corresponding to each controlled switch tube Q. The negative voltage generating circuit 104 is arranged between the control terminal of the corresponding controlled switch tube Q and the corresponding delay circuit 103. When the control signal output by the corresponding delay circuit 103 changes from low level to high level, the negative voltage generating circuit 104 controls the corresponding controlled switch tube Q to be immediately turned off and stores energy by using high level. When the control signal output by the corresponding delay circuit 103 changes from high level to low level, the negative voltage generating circuit 104 provides a negative voltage signal lower than low level at the control terminal of the corresponding controlled switch tube Q by using the stored energy, so as to ensure that the controlled switch tube Q is reliably turned off.

[0041] Specifically, the negative voltage generating circuit 104 refers to a functional circuit capable of providing a negative voltage signal at the control terminal of the controlled switch tube Q according to the turn-off control signal output by the delay circuit 103. Exemplarily, the negative voltage generating circuit 104 can comprise a Zener diode ZD and a negative voltage capacitor C1. The Zener diode ZD and the negative voltage capacitor C1 are arranged in parallel between the control terminal of the corresponding controlled switch tube Q and the control signal output terminal of the corresponding delay circuit 103. During the conduction of the corresponding controlled switch tube Q, the negative voltage capacitor C1 is charged by using the high-level control signal output by the delay circuit 103. Once the control signal output by the delay circuit 103 changes from high level to low level, the negative voltage capacitor C1 generates a negative voltage signal lower than low level at the control terminal of the controlled switch tube Q in order to ensure the original voltage difference between the two terminals of the negative voltage capacitor C1, thereby realizing the negative voltage generation of the controlled switch tube Q, ensuring the fast and reliable turn-off of the controlled switch tube Q, and improving the control reliability.

[0042] Optionally, Figure 3 Another component schematic diagram of a switch tube and a control circuit thereof provided by an embodiment of the present application is provided based on the foregoing embodiment, and the foregoing description is referred to. Figure 3 The phase splitting unit 102 comprises a phase splitting transformer T0, and the phase splitting transformer T0 comprises a primary winding T1 and secondary windings T2 corresponding to the controlled switch tubes Q. The same name end of one secondary winding T2 is a first terminal of the secondary winding T2, and the same name end of the other secondary winding T2 is a second terminal of the secondary winding T2. The primary winding T1 is connected with the driving unit 101, and the secondary windings T2 are connected with the corresponding delay circuits 103 one by one.

[0043] The delay circuit 103 comprises a delay switch tube K, a delay capacitor C2, a first resistor R1 and a second resistor R2. The first end of the delay switch tube K is connected with the control end of the corresponding controlled switch tube Q as the first control signal output end of the delay circuit 103; the second end of the delay switch tube K is connected with the second end of the corresponding controlled switch tube Q as the second control signal output end of the delay circuit 103. The first end of the delay capacitor C2 is connected with the control end of the delay switch tube K, and the second end of the delay capacitor C2 is connected with the second end of the delay switch tube K. The first terminal of the secondary side winding T2 of the corresponding split-phase transformer T0 is connected with the first end of the delay switch tube K, and the second terminal of the secondary side winding T2 is connected with the first end of the delay capacitor C2 through the first resistor R1 and connected with the second end of the delay capacitor C2 through the second resistor R2.

[0044] Specifically, the driving unit 101 provides two groups of initial pulse width modulation signals for the two ends of the primary side winding T1 respectively, and the phases of the two groups of signals are completely opposite, that is, when the first terminal of the primary side winding T1 is high, the second terminal is low (also referred to as zero potential), and vice versa. The split-phase transformer T0 can output driving pulse width modulation signals with opposite phases using the paired two secondary side windings T2 according to the initial pulse width modulation signals, that is, when the first terminal of the primary side winding T1 is high and the second terminal is low, the first terminal of one secondary side winding T2 in the same pair is high and the second terminal is low, but the first terminal of the other secondary side winding T2 is low and the second terminal is high. The phases of the pulse width modulation signals input to the paired two secondary side windings T2 are opposite, which can realize the alternate conduction of the corresponding paired controlled switch tubes Q.

[0045] The delay circuit 103 can further comprise a third resistor R3 and a first diode D1 connected in parallel with the first resistor R1, a fourth resistor R4 connected in parallel with the second resistor R2, and a second diode D2 connected in series with the parallel branch, wherein the parallel branch refers to the branch formed by the second resistor R2 and the fourth resistor R4 in parallel. In addition, the delay circuit corresponding to the controlled switch tube Q close to the bus power in the paired controlled switch tubes Q can further comprise a fifth resistor R5 connected between the first end of the delay switch tube K and the first terminal of the secondary side winding T2 of the corresponding split-phase transformer T0.

[0046] For example, when the initial pulse width modulation signal output by the drive unit 101 to the same-name terminal of the primary winding T1 of the phase transformer T0 changes from high level to low level, the first terminal of a secondary winding T2 (the one above in the figure) of the phase transformer T0 changes from high level to low level, and its second terminal changes from low level to high level. In this situation, on the one hand, the first terminal of the secondary winding T2 applies a low level to one end of the negative voltage capacitor C1 through the fifth resistor R5. In order to maintain the potential difference of the previous moment, the negative voltage capacitor C1 will use its stored charge to generate a negative voltage signal lower than the low level at its other end (that is, the control terminal of the corresponding controlled switch Q) and continue for a period of time. The voltage of this negative voltage signal is lower than the low level, thereby ensuring the reliable turn-off of the corresponding controlled switch Q. The duration of the negative voltage signal is related to the capacitance of the negative voltage capacitor C1 and the voltage regulation value of the Zener diode ZD. On the other hand, the high level on the second terminal of the secondary winding T2 will charge the delay capacitor C2 through the first resistor R1, thereby turning on the delay switch K. For example, the delay switch K can be an N-type MOSFET or an N-type IGBT.

[0047] Conversely, when the initial pulse width modulation signal output by the drive unit 101 to the corresponding terminal of the primary winding T1 of the phase-splitting transformer T0 changes from high to low, the first terminal of the other secondary winding T2 (bottom in the figure) changes from low to high, while its second terminal changes from high to low. Since there is still charge in the delay capacitor C2, the delay switch K will remain on for a preset duration. During this process, the on-duty delay switch K will pull down the potential of the control terminal of the corresponding controlled switch Q, so that the controlled switch Q will remain off for at least a preset duration after the other controlled switch Q is turned off. This creates a dead time between the simultaneous switching of the two controlled switches Q, ensuring that the two controlled switches Q will not be turned on at the same time, further improving control reliability.

[0048] This invention also provides a power supply circuit. Figure 4 This is a schematic diagram of a power supply circuit provided in an embodiment of the present invention. Based on the foregoing embodiments, refer to... Figure 4 The power supply circuit 400 includes a pair of controlled switches Q and a switch control circuit 100 corresponding to the number of pairs of controlled switches Q. For example, the controlled switches Q may include N-type MOSFETs or N-type IGBTs. The switch control circuit 100 is connected to the control terminal of each controlled switch Q. The switch control circuit 100 is used to control the two controlled switches Q in the same pair to turn on alternately and generate a dead time of a preset duration.

[0049] For example, the power supply circuit 400 further includes a power supply transformer T3 corresponding one-to-one with the logarithm of the controlled switch Q, a first filter capacitor assembly C1, and a second filter capacitor assembly C2, wherein the first filter capacitor assembly C1 and the second filter capacitor assembly C2 may each include multiple capacitors connected in parallel. Figure 4 (Only the case with one capacitor is shown as an example). A pair of controlled switches Q are connected in series between the bus power supply VBUS and the first ground terminal GND. The first terminal of the primary winding of the power supply transformer T3 is connected to the connection point of the corresponding two controlled switches Q. The second terminal of the primary winding of the power supply transformer T3 is also connected to the connection point via the corresponding first filter capacitor assembly C1. The second filter capacitor assembly C2 is connected between the bus power supply VBUS and the second terminal of the primary winding of the power supply transformer T3. The secondary winding of the power supply transformer T3 is used for external power supply. The switch control circuit 100 is connected to the control terminal of each controlled switch Q. The switch control circuit 100 is used to control the two controlled switches Q of the same pair to conduct alternately and generate a dead time of a preset duration to ensure stable external power supply.

[0050] The power supply circuit and its switching transistor control circuit provided by this invention include a driving unit, a phase-splitting unit, and delay circuits corresponding to the controlled switching transistors. The delay circuits are connected to their corresponding controlled switching transistors; the driving unit is connected to the phase-splitting unit, providing an initial pulse width modulation signal to the phase-splitting unit; the phase-splitting unit is connected to the delay circuits, providing driving pulse width modulation signals with opposite and same phases to the initial pulse width modulation signal to the two delay circuits in the same pair, respectively. Whenever the initial pulse width modulation signal reaches the trigger edge, the delay circuit corresponding to the previously turned-on controlled switching transistor controls the corresponding controlled switching transistor to immediately turn off and store energy, based on the corresponding driving pulse width modulation signal. Meanwhile, the delay circuit corresponding to the previously turned-off controlled switching transistor uses the previously stored energy to control the controlled switching transistor to turn on after a preset off time, based on the corresponding driving pulse width modulation signal. This achieves alternating on / off control of paired controlled switching transistors and dead-time generation. The circuit structure is simple and requires no software design, reducing development time and debugging costs.

[0051] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A switching transistor control circuit, characterized in that, The application is applied to a pair of controlled switch tubes to control the two controlled switch tubes of the pair to be alternately conducted and generate a preset dead time; The switch tube control circuit comprises a phase separation unit, a driving unit and a delay circuit corresponding to the controlled switch tube; The delay circuit is connected with the corresponding controlled switch tube; the driving unit is connected with the phase separation unit, and the driving unit is used to provide an initial pulse width modulation signal for the phase separation unit; the phase separation unit is connected with the delay circuit, and the phase separation unit is used to provide driving pulse width modulation signals with opposite and same phases of the initial pulse width modulation signal for the two delay circuits of the pair respectively according to the initial pulse width modulation signal; When the initial pulse width modulation signal reaches a trigger edge, the delay circuit corresponding to the originally conducted controlled switch tube controls the corresponding controlled switch tube to be immediately turned off and stores energy for itself according to the corresponding driving pulse width modulation signal, while the delay circuit corresponding to the originally turned off controlled switch tube controls the controlled switch tube to be turned on after continuing to be turned off for the preset time according to the corresponding driving pulse width modulation signal by using the previously stored energy.

2. The switch tube control circuit according to claim 1, characterized in that Further comprising: A negative voltage generation circuit corresponding to the controlled switch tube; the negative voltage generation circuit is arranged between the control end of the corresponding controlled switch tube and the corresponding delay circuit; When the control signal output by the corresponding delay circuit is converted from low level to high level, the negative voltage generation circuit controls the corresponding controlled switch tube to be immediately turned off and stores energy by using the high level; when the control signal output by the corresponding delay circuit is converted from high level to low level, the negative voltage generation circuit provides a negative voltage signal with a potential lower than the low level at the control end of the corresponding controlled switch tube by using the stored energy, so as to ensure that the controlled switch tube can be reliably turned off.

3. The switch tube control circuit according to claim 2, characterized in that The negative voltage generation circuit comprises a voltage stabilizing diode and a negative voltage capacitor, and the voltage stabilizing diode and the negative voltage capacitor are arranged in parallel between the control end of the corresponding controlled switch tube and the control signal output end of the corresponding delay circuit.

4. The switch tube control circuit according to claim 1, characterized in that, The phase separation unit comprises a phase separation transformer, and the phase separation transformer comprises a primary side winding and a secondary side winding corresponding to the controlled switch tube; wherein the same name end of one of the secondary side windings is a first terminal of the secondary side winding, and the same name end of the other secondary side winding is a second terminal of the secondary side winding; The primary side winding is connected with the driving unit, and the secondary side winding is connected with the corresponding delay circuit one by one.

5. The switch tube control circuit according to claim 4, characterized in that The delay circuit comprises a delay switch tube, a delay capacitor, a first resistor and a second resistor; The first end of the delay switch tube is connected with the control end of the corresponding controlled switch tube as the first control signal output end of the delay circuit; the second end of the delay switch tube is connected with the second end of the corresponding controlled switch tube as the second control signal output end of the delay circuit; The first end of the delay capacitor is connected with the control end of the delay switch tube, and the second end of the delay capacitor is connected with the second end of the delay switch tube; A first terminal of the secondary winding of the phase-splitting transformer is connected to a first terminal of the delay switch tube, and a second terminal of the secondary winding is connected to a first terminal of the delay capacitor through a first resistor and connected to a second terminal of the delay capacitor through a second resistor.

6. The switch tube control circuit according to claim 5, characterized in that The delay switch tube comprises an N-type field effect tube.

7. A switch tube control circuit according to any one of claims 1-6, characterized in that The driving unit comprises a power management chip.

8. A power supply circuit, characterized by comprising: The application further comprises a pair of controlled switch tubes and a switch tube control circuit according to any one of claims 1-7 corresponding to each of the controlled switch tubes; the switch tube control circuit is connected to a control terminal of each of the controlled switch tubes, and is configured to control two controlled switch tubes in the pair to be turned on alternately and generate a preset dead time.

9. The power supply circuit of claim 8, wherein, The application further comprises: a power supply transformer, a first filter capacitor assembly and a second filter capacitor assembly corresponding to each of the controlled switch tubes; the pair of controlled switch tubes are connected in series between a bus power supply and a first grounding terminal; a first terminal of a primary winding of the power supply transformer is connected to a connection point of two corresponding controlled switch tubes, and a second terminal of the primary winding of the power supply transformer is also connected to the connection point through the first filter capacitor assembly; the second filter capacitor assembly is connected between the bus power supply and the second terminal of the primary winding of the power supply transformer; and a secondary winding of the power supply transformer is configured to supply power externally; the switch tube control circuit is connected to a control terminal of each of the controlled switch tubes, and is configured to control two controlled switch tubes in the pair to be turned on alternately and generate a preset dead time.

10. The power supply circuit according to claim 8 or 9, characterized in that, The controlled switch tube comprises an N-type MOSFET or an N-type IGBT.

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