Low complexity clock skew synchronization method for quantum key distribution

By employing a random interleaving synchronization mode and a binary search algorithm, the high complexity and resource consumption of clock synchronization in quantum key distribution systems are solved, achieving low-complexity, fast, and reliable clock offset synchronization, suitable for quantum channels with high loss and low signal-to-noise ratio.

CN121283630APending Publication Date: 2026-01-06HEFEI GUOXIN STAR SHIELD QUANTUM TECHNOLOGY CO LTD
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Patent Information

Application Number
CN202511734090.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-24
Publication Date
2026-01-06

AI Technical Summary

Technical Problem

Existing clock synchronization methods in quantum key distribution systems suffer from high time complexity, high resource consumption, and complex information exchange, making them unsuitable for fast and reliable operation on high-loss, low-signal-noise-ratio quantum channels.

Method used

A random interleaving synchronization mode is adopted, and the clock offset is recovered bit by bit through a binary search algorithm. The start signal is sent through the data channel, the synchronization mode is sent through the quantum channel, and integer operations are performed on low-level hardware to achieve clock offset synchronization with sublinear time complexity.

Benefits of technology

It achieves low time complexity, low resource requirements, fast synchronization and high robustness, can work reliably under high channel loss and low signal-to-noise ratio conditions, and has extremely low communication overhead, making it suitable for various preparation-measurement QKD protocols.

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Abstract

The invention relates to clock synchronization, in particular to a low-complexity clock offset synchronization method for quantum key distribution, which comprises the following steps: Alice and Bob agree in advance to determine the maximum level of maximum recoverable offset and interleaving degree; the Alice sends a starting signal to the Bob through the data channel; alice generates a synchronization mode and sends the synchronization mode to Bob through a quantum channel; after Bob receives the starting signal, single photon events are collected, and clock skew is recovered by adopting a binary search algorithm; according to the technical scheme provided by the invention, the defects of high calculation complexity, high resource consumption and need of a large amount of information interaction in the prior art can be effectively overcome.
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Description

Technical Field

[0001] This invention relates to clock synchronization, and more specifically to a low-complexity clock offset synchronization method for quantum key distribution. Background Technology

[0002] In quantum key distribution (QKD) systems, precise clock synchronization is required between the sender (Alice) and the receiver (Bob). QKD is based on the transmission and detection of single photons, and Bob typically receives only a very small fraction (usually 1 / 10 to 1 / 10) of the symbols transmitted by Alice. 7 Furthermore, the quantum bit error rate (QBER) can be as high as approximately 11%, far exceeding that of classical optical communication systems (which are typically below 10%). -9 This means that classic clock synchronization methods cannot be directly applied.

[0003] Existing clock offset synchronization schemes using single-photon detection via quantum channels have the following significant drawbacks:

[0004] 1) Fast Fourier Transform (FFT) method: The time complexity is O(n log2n). For large offsets (such as hundreds of milliseconds), it has high requirements for CPU and memory, and requires floating-point operations, making it difficult to implement on low-level hardware such as FPGA.

[0005] 2) Improved FFT methods (such as those proposed by Calderaro et al.): Although the time complexity is reduced to O(nlog2log2n), FFT and floating-point operations are still required on large datasets, which is not suitable for low-level hardware with limited resources.

[0006] 3) Binary search method (such as the one proposed by Braithwaite): Although it only requires simple computation instructions, its synchronization mode duration grows superlinearly with the maximum recoverable offset by O(n log2n), and it requires the exchange of multiple acknowledgment messages between Alice and Bob, making the process complex.

[0007] Therefore, there is an urgent need in this field for a clock offset synchronization method that has low time complexity, low resource consumption, requires no complex information interaction, and can work quickly and reliably on high-loss, low-signal-noise-ratio quantum channels. Summary of the Invention

[0008] (a) Technical problems to be solved

[0009] In view of the above-mentioned shortcomings of the existing technology, the present invention provides a low-complexity clock offset synchronization method for quantum key distribution, which can effectively overcome the defects of high time complexity, large resource consumption and large amount of information interaction required by the existing technology.

[0010] (II) Technical Solution

[0011] To achieve the above objectives, the present invention provides the following technical solution:

[0012] A low-complexity clock offset synchronization method for quantum key distribution includes the following steps:

[0013] S1. Alice and Bob pre-agreed upon the maximum level of the maximum recoverable offset, as well as the degree of interleaving;

[0014] S2. Alice sends a start signal to Bob via the data channel;

[0015] S3, Alice generates a synchronization mode and sends it to Bob via a quantum channel;

[0016] After receiving the start signal, Bob begins to collect single-photon events and uses a binary search algorithm to recover the clock offset.

[0017] Alice and Bob are connected by a data channel, a quantum channel, and a clock channel.

[0018] Preferably, in S1, Alice and Bob pre-agree to determine the maximum level of the maximum recoverable offset and the interleaving degree, including:

[0019] Maximum level l max With maximum recoverable offset The relationship between them is:

[0020] ;

[0021] Among them, t s The duration of the symbol;

[0022] When the interlacing degree d i =1, meaning no interleaving, the total number of mode symbols N s The relationship between time complexity and sample size n is: N s ~O(n log2n); when the interleaving degree d i =l max That is, during maximum interleaving, the total number of pattern symbols N s The relationship between time complexity and sample size n is: N s ~O(n);

[0023] Among them, the maximum recoverable offset This represents the maximum number of misaligned symbols between Alice and Bob that can be successfully corrected in time or sequence.

[0024] Interlacing degree d iThe number of levels contained in each group in the control synchronization mode defines the degree of temporal mixing of probe pulses of different bits when generating the synchronization mode.

[0025] Total number of pattern symbols N s The number of synchronization mode symbols required to complete one synchronization process;

[0026] The sample size n is the number of quantum signals acquired at one time for synchronous processing.

[0027] Preferably, in S3, Alice generates a synchronization mode and sends it to Bob via a quantum channel, including:

[0028] According to the interlacing degree d i From level 0 to the maximum level l max Grouping multiple levels, each group contains d i Each level;

[0029] For each symbol position, from the current group's d i A level l' is randomly selected from the levels, and the sign value is determined by the l'th least significant bit of the current sign index;

[0030] The synchronization mode consists of multiple levels. Each level, except for level 0, corresponds to one bit in the binary representation of the clock offset, which is used to recover the clock offset. Level 0 contains only the symbol 0, which is equivalent to achieving symbol alignment in a multi-slot coding system.

[0031] Preferably, after Bob receives the start signal in S4, he begins to collect single-photon events and uses a binary search algorithm to recover the clock offset, including:

[0032] S41, Sub-time slot alignment: Bob statistically analyzes the distribution of single-photon events to determine the shift amount required to align the single-photon events to the time slot, thereby achieving sub-time slot precision synchronization;

[0033] S42, Time Slot Granularity Shift Reconstruction:

[0034] Initialize the reconstructed clock offset ;

[0035] Outer loop: Iterates from level 0 to the highest level. max For each level, initialize the counter C=0;

[0036] Inner loop: Iterate through all single-photon events belonging to the current level l. For each single-photon event, calculate the time offset based on the recovered clock offset. Perform a shift operation and determine if the sign matches the expectation. If it does, increment counter C; otherwise, decrement counter C. After the current level l evaluation is complete, if C < 0, update the clock offset. ;

[0037] S43. After the loop ends, adjust the clock offset. Range adjustment and sign correction are performed to obtain the final sign precision offset. .

[0038] (III) Beneficial Effects

[0039] Compared with existing technologies, the low-complexity clock offset synchronization method for quantum key distribution provided by this invention has the following advantages:

[0040] 1) Low time complexity: It has sublinear time complexity, and its efficiency is much higher than FFT-type methods when processing large offsets;

[0041] 2) Extremely low hardware resource requirements: Only integer, addition and bit shift operations are required. No floating-point unit or large-capacity memory is needed. It can be efficiently implemented directly on low-level hardware such as FPGA and microcontroller.

[0042] 3) High robustness: It can work reliably under conditions of high channel loss (experimentally verified to be over 70dB) and low signal-to-noise ratio (supporting up to 11% QBER);

[0043] 4) Fast synchronization speed: Even with a large initial clock offset, synchronization can be completed within a few seconds;

[0044] 5) Extremely low communication overhead: The entire synchronization process only requires Alice to send a start signal to Bob, without the need for multiple confirmation messages.

[0045] 6) High flexibility: By adjusting the interlacing degree d i It allows for flexible trade-offs and optimizations between synchronization speed, failure probability, and resource consumption;

[0046] 7) High versatility: Applicable to various preparation-measurement QKD protocols, and does not depend on a specific quantum state encoding method. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0048] Figure 1 This is a schematic diagram illustrating the interaction between Alice and Bob in this invention;

[0049] Figure 2The maximum recoverable offset in this invention Interlacing degree d i With the total number of pattern symbols N s Relationship diagram;

[0050] Figure 3 N is the total number of mode symbols in this invention. s Interlacing degree d i A graph showing the relationship between the probability of failure and the probability of failure.

[0051] Figure 4 The maximum recoverable offset in this invention The relationship between the tolerance channel attenuation and the channel attenuation is shown in the graph.

[0052] Figure 5 The maximum recoverable offset in this invention A graph showing the relationship between computational complexity and computational complexity. Detailed Implementation

[0053] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0054] The core idea of ​​the technical solution in this application is to continuously recover the binary representation of the clock offset bit by bit through a random interleaving synchronization mode, starting from the least significant bit, thereby realizing a clock offset synchronization algorithm with sublinear time complexity and significantly reducing the total duration of the synchronization mode.

[0055] The following describes the specific process of the low-complexity clock offset synchronization method for quantum key distribution provided by this invention, using concrete examples (e.g.) Figure 1 As shown, Alice and Bob are connected by a data channel, a quantum channel, and a clock channel, along with their technical effects.

[0056] S1. Alice and Bob pre-agreed upon the maximum level of recoverable offset and the degree of interleaving, including:

[0057] Maximum level l max With maximum recoverable offset The relationship between them is:

[0058] ;

[0059] Among them, t s The duration of the symbol;

[0060] When the interlacing degree d i =1, meaning no interleaving, the total number of mode symbols N s The relationship between time complexity and sample size n is: N s ~O(n log2n); when the interleaving degree d i =l max That is, during maximum interleaving, the total number of pattern symbols N s The relationship between time complexity and sample size n is: N s ~O(n);

[0061] Among them, the maximum recoverable offset This represents the maximum number of misaligned symbols between Alice and Bob that can be successfully corrected in time or sequence.

[0062] Interlacing degree d i The number of levels contained in each group in the control synchronization mode defines the degree of temporal mixing of probe pulses of different bits when generating the synchronization mode.

[0063] Total number of pattern symbols N s The number of synchronization mode symbols required to complete one synchronization process;

[0064] The sample size n is the number of quantum signals acquired at one time for synchronous processing.

[0065] S2. Alice sends a start signal to Bob via the data channel (this is the only classic message required by the technical solution of this application).

[0066] S3, Alice generates a synchronization mode and sends it to Bob via a quantum channel, including:

[0067] According to the interlacing degree d i From level 0 to the maximum level l max Grouping multiple levels, each group contains d i Each level;

[0068] For each symbol position, from the current group's d i A level l' is randomly selected from the levels, and the sign value is determined by the l'th least significant bit of the current sign index;

[0069] The synchronization mode consists of multiple levels. Each level, except for level 0, corresponds to one bit in the binary representation of the clock offset, which is used to recover the clock offset. Level 0 contains only the symbol 0, which is equivalent to achieving symbol alignment in a multi-slot coding system.

[0070] S4. After receiving the start signal, Bob begins collecting single-photon events and uses a binary search algorithm to recover the clock offset, including:

[0071] S41, Sub-time slot alignment: Bob statistically analyzes the distribution of single-photon events to determine the shift amount required to align the single-photon events to the time slot, thereby achieving sub-time slot precision synchronization;

[0072] S42, Time Slot Granularity Shift Reconstruction:

[0073] Initialize the reconstructed clock offset ;

[0074] Outer loop: Iterates from level 0 to the highest level. max For each level, initialize the counter C=0;

[0075] Inner loop: Iterate through all single-photon events belonging to the current level l (filtered by the accept window). For each single-photon event, based on the recovered clock offset... Perform a shift operation and determine if the sign matches the expectation. If it does, increment counter C; otherwise, decrement counter C. After the current level l evaluation is complete, if C < 0, update the clock offset. ;

[0076] S43. After the loop ends, adjust the clock offset. Range adjustment and sign correction are performed to obtain the final sign precision offset. .

[0077] Figure 1 This is a schematic diagram illustrating the interaction between Alice and Bob in this invention.

[0078] Quantum Channel: A channel used to transmit quantum states;

[0079] Data Channel: A two-way data channel used for information exchange and post-processing;

[0080] Clock Channel: An optional clock channel used for clock phase locking.

[0081] Figure 2 The maximum recoverable offset in this invention Interlacing degree d i With the total number of pattern symbols N s A relationship diagram showing the relationship between different degrees of interlacing d i Below, the total number of pattern symbols N s With maximum recoverable offset The curves of change are shown, and compared with existing FFT-type methods. Figure 2 middle:

[0082] Max. recoverable offset (symbols): Maximum recoverable offset (Unit: symbols) represents the maximum number of misalignment symbols between Alice and Bob that can be successfully corrected in time or sequence, and is a key indicator for measuring the robustness of clock offset synchronization methods.

[0083] d i (Degree of Interleaving): Interleaving degree d i The core innovative parameter of this invention controls the number of levels contained in each group in the synchronization mode, and defines the degree of temporal mixing of probe pulses of different bits when generating the synchronization mode.

[0084] Total pattern duration N s (symbols): Total number of pattern symbols N s (Total mode duration), the number of synchronization mode symbols (in symbols) required to complete one synchronization process, directly determines the time overhead and resource consumption of the synchronization process. Total mode symbols N s The smaller the value, the faster the synchronization speed and the less computing resources are consumed;

[0085] iQSync: A clock offset synchronization method with sublinear time complexity designed specifically for low-level hardware (in this invention, it refers to the technical solution of this application).

[0086] Cross-correlation: This refers to the traditional, FFT-based clock offset synchronization scheme. Such schemes require calculating the cross-correlation function between the received sequence and the local sequence, resulting in extremely high time complexity and resource requirements (in this invention, it refers to existing technologies).

[0087] Figure 3 N is the total number of mode symbols in this invention. s Interlacing degree d i The graph showing the relationship between the probability of detection and the probability of failure is presented under different signal and noise conditions, and with varying interleaving degrees d. i Below, the failure probability increases with the total number of pattern symbols N. s The curve showing the change. Figure 3 middle:

[0088] Failure probability P fail Failure probability refers to the probability of failure in the time synchronization process. This is a core indicator for measuring the reliability of clock offset synchronization methods. The lower the value, the more reliable the system.

[0089] Figure 4 The maximum recoverable offset in this invention The graph shows the relationship between noise level and tolerable channel attenuation, with different noise levels and interleaving degrees. i The tolerable channel attenuation required to achieve a 50% success probability. With maximum recoverable offset The curve showing the change. Figure 4 middle:

[0090] P noise Noise probability represents the level of noise in the channel, such as the probability of erroneous signals caused by dark counting, background light, etc.

[0091] P sig Probability per pulse, usually refers to the probability that a single photon pulse contains a detectable signal;

[0092] QBER: Quantum Bit Error Rate, the proportion of erroneous bits in quantum communication, is a key indicator for measuring system performance.

[0093] Figure 5 The maximum recoverable offset in this invention The graph showing the relationship between computational complexity and noise level illustrates the maximum recoverable offset that three algorithms with different computational complexities can handle at different noise levels. . Figure 5 middle:

[0094] Computational complexity: the degree of computational complexity.

[0095] Calderaro et al. cited a research work that proposed an efficient clock offset synchronization method with a time complexity of O(n log2log2n);

[0096] n: Block size or number of samples, usually referring to the number of quantum signals acquired at one time for synchronous processing.

[0097] The performance and complexity of the technical solution in this application are as follows:

[0098] • Success probability: By establishing statistical models for signal detection and noise detection, the success probability (e.g., Figure 3 As shown in the figure, the results are in high agreement with the experimental measurements;

[0099] • Time Complexity: The average time complexity of the technical solution in this application is sublinear (e.g., ...). Figure 4 and Figure 5 As shown in the figure, it significantly outperforms FFT-type methods when handling large offsets;

[0100] • Resource requirements: The pattern generation and synchronization process requires very little computing and storage resources and can run in real time on low-level hardware.

[0101] To better illustrate the technical solution of this application, the following detailed explanation is provided in conjunction with two specific experiments.

[0102] Experiment 1: Clock Offset Synchronization of High-Loss Fiber QKD System

[0103] •System parameters:

[0104] oQKD protocol: Time phase encoding BB84;

[0105] o Symbol rate: 625MHz (symbol duration t) s =1.6ns).

[0106] Maximum recoverable offset: =2 (28-1) ≈134,217,728 symbols ≈215ms;

[0107] o Interlacing degree: d i The values ​​are 1 (no interlacing) and 4.

[0108] • Experimental conditions:

[0109] o Channel attenuation: exceeding 70dB at its highest;

[0110] o Detector: Dead time 96.3 μs, detection efficiency 15.4%.

[0111] •Experimental results:

[0112] o when the interlacing degree d i =1, Maximum Level l max When =28, the total number of pattern symbols N s With a time of 24.9 seconds and a channel attenuation of 71.2 dB, the clock offset was successfully recovered in 47 out of 50 runs.

[0113] o when the interlacing degree d i =4, maximum level l max When =28, the total number of pattern symbols N s The time was shortened to 6.9 seconds, and the clock offset was successfully recovered in 49 out of 50 runs with a channel attenuation of 61.0 dB.

[0114] The experimental results are in high agreement with the theoretical success probability model (e.g. Figure 4 (As shown).

[0115] Experiment 2: Implementation of Resource-Constrained Microcontrollers

[0116] • Hardware platform: Low-cost ARM Cortex-M series microcontrollers.

[0117] •Key points for implementation:

[0118] Both Algorithm 1 and Algorithm 2 are implemented in C language, using only integer type variables;

[0119] All power operations involving multiplication and division by 2 are replaced by bit shift operations.

[0120] The random number generation uses a lightweight linear feedback shift register.

[0121] • Experimental Results: At the maximum recoverable offset =2 20 In the case of approximately 1 million symbols, the number of inner loop iterations required for clock offset recovery is only a few thousand, and the memory usage is less than 1KB, verifying the feasibility of the present invention under strict hardware resource constraints.

[0122] The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions will not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A low-complexity clock-offset synchronization method for quantum key distribution, characterized in that: The method comprises the following steps: S1, Alice and Bob agree on the maximum level of the maximum recoverable offset and the interleaving degree in advance; S2, Alice sends a start signal to Bob through a data channel; S3, Alice generates a synchronization pattern and sends it to Bob through a quantum channel; S4, after receiving the start signal, Bob starts collecting single photon events and uses a binary search algorithm to recover the clock offset; Wherein, a data channel, a quantum channel and a clock channel are set between Alice and Bob.

2. The low complexity clock offset synchronization method for quantum key distribution of claim 1, wherein: In S1, Alice and Bob agree on the maximum level of the maximum recoverable offset and the interleaving degree in advance, including: Maximum level l max The relationship between the maximum recoverable skew is: ; where t s is the symbol duration; When interleaving degree d i =1, i.e. no interleaving, the time complexity of total mode symbol number N s and sample number n is: N s ~O(n log2n); when interleaving degree d i =l max , i.e. maximum interleaving, the time complexity of total mode symbol number N s and sample number n is: N s ~O(n); wherein the maximum recoverable offset is the maximum number of mispositioned symbols between Alice and Bob that can be successfully corrected in time or sequence; Interleaving degree d i Controlling the number of levels contained in each group in the synchronization pattern defines the degree of mixing of the probing pulses in time for different bits when the synchronization pattern is generated; Total number of mode symbols N s Number of symbols of synchronization pattern transmitted for completing one synchronization process; The sample number n is the number of quantum signals collected at a time for synchronization processing.

3. The low complexity clock offset synchronization method for quantum key distribution of claim 2, wherein: In S3, Alice generates a synchronization pattern and sends it to Bob through a quantum channel, including: According to the interleaving degree d i grouping the plurality of levels from level 0 to a maximum level l max into d i groups, each group containing d + 1 levels. For each symbol position, a level l' is randomly selected from the d i levels of the current group, and the symbol value is determined by the l'th least significant bit of the current symbol index; Wherein, the synchronization pattern is composed of multiple levels, and each level except level 0 corresponds to a bit in the binary representation of the clock offset, which is used to recover the clock offset; level 0 only contains symbol 0, which is used to realize symbol alignment in a multi-time slot encoding system.

4. The low-complexity clock-offset synchronization method for quantum key distribution of claim 3, wherein: In S4, after receiving the start signal, Bob starts collecting single photon events and uses a binary search algorithm to recover the clock offset, including: S41, sub-time slot alignment: Bob counts the distribution of single photon events to determine the shift amount required to align the single photon events to the time slots, realizing sub-time slot precision synchronization; S42, time slot granularity offset reconstruction: Initializing a reconstructed clock offset ; Outer loop: iterate from level 0 to maximum level l max For each level, initialize counter C = 0; Inner loop: iterate over all single-photon events belonging to the current level l, for each single-photon event, perform a shift according to the recovered clock offset and determine whether its sign is as expected, if so, increment the counter C, otherwise, decrement the counter C; after the current level l evaluation is finished, if C < 0, update the clock offset ; S43. After the loop ends, adjust the clock offset. Range adjustment and sign correction are performed to obtain the final sign precision offset. .