Self-adaptive windowing differential integration and drift suppression method of electromagnetic flowmeter

Abstract

The invention relates to a self-adaptive windowing differential integration and drift suppression method for an electromagnetic flowmeter. The method comprises the following implementation methods of hardware platform building, an action matching process after hardware platform building and a working process after the action matching process. The FPGA periodically sends out step wave excitation signals according to an excitation period, and an excitation current source is generated through excitation drive to drive an excitation coil; meanwhile, an electrode signal on a measuring pipe assembly mounted on the water pipe firstly enters a first-stage peak suppression, filtering and differential amplification circuit to prevent a first-stage operational amplifier from being saturated, then the signal enters a high-frequency filter to filter out a high-frequency signal and then enters a low-noise differential instrument amplifier, and the signal has a certain amplitude at the moment; then the signals enter an analog switch, and the signals subjected to windowing control of the analog switch enter an ADC for sampling through simple passive rc filtering; and the FPGA carries out I / Q calculation on the sampled data.

Description

Technical Field

[0001] This invention relates to an adaptive windowed differential integration and drift suppression method. Specifically, it addresses the problems of existing electromagnetic flowmeters under low-frequency excitation conditions, such as non-adaptive windowing, insufficient zero-point drift and polarization suppression, residual low-frequency noise and power frequency interference, slow dynamic response, and high system cost. The invention proposes an adaptive windowed differential integration and drift suppression method for electromagnetic flowmeters. Background Technology

[0002] Existing electromagnetic flowmeters generally employ a fixed dead-zone windowing + half-cycle differential integration scheme. While this method is simple in structure and can suppress power frequency interference and electrode zero drift to some extent, it still has the following main drawbacks: Fixed parameters lack adaptability: Dead time and integration window length are usually set to fixed values ​​and cannot be dynamically adjusted according to the L / R time constant of the excitation coil, temperature drift, or circuit aging. Under certain operating conditions, a dead time that is too short will introduce edge spikes, while a dead time that is too long will shorten the effective integration time and reduce the signal-to-noise ratio.

[0003] Zero-point drift and insufficient polarization compensation: Differential integration can only partially offset slow drift, but when the drift speed increases or the polarization is asymmetrical, the residual terms will still be added to the measurement results, affecting long-term stability.

[0004] Significant low-frequency and 1 / f noise: Low-frequency excitation causes the measurement bandwidth to fall within the 1 / f noise-dominated region of the amplifier and ADC, resulting in instability of low-flow-rate, small-signal signals. Existing solutions mainly rely on increasing the filter time constant for smoothing, which easily leads to a decrease in response speed.

[0005] Limited power frequency interference suppression capability: Although the excitation frequency is designed to be a power frequency divider, when there are harmonics or electromagnetic interference with non-integer relationships, the fixed window / fixed integral window cannot effectively suppress them, which easily produces differential frequency residue and low frequency fluctuations.

[0006] Poor dynamic response and robustness: To suppress zero-point drift and noise, existing solutions often increase the integration time or use large time constant filters, resulting in a slower dynamic response. Furthermore, they lack real-time detection and adaptive adjustment mechanisms for abnormal conditions such as electrode contamination, fluid disturbances, and environmental electromagnetic shocks, leading to insufficient robustness.

[0007] System cost and efficiency issues: To compensate for the shortcomings of the fixed-window scheme, additional hardware filters, precision operational amplifiers, or high-precision power supplies are often required, leading to an increase in overall cost. On the software side, averaging takes a long time to stabilize the results, resulting in low efficiency and large computational latency, which is not conducive to rapid measurement and control applications. Summary of the Invention

[0008] To address the aforementioned problems, the main objective of this invention is to propose an adaptive windowing differential integration and drift suppression method for existing electromagnetic flowmeters that suffer from issues such as non-adaptive windowing, insufficient zero-point drift and polarization suppression, residual low-frequency noise and power frequency interference, slow dynamic response, and high system cost under low-frequency excitation conditions.

[0009] The present invention solves the above-mentioned technical problems through the following technical solution: an adaptive window differential integration and drift suppression method for an electromagnetic flowmeter, wherein the adaptive window differential integration and drift suppression method for the electromagnetic flowmeter includes the following implementation method: Step 1: Hardware platform setup; Step 2: The coordination process after the hardware platform is built in Step 1; Step 3: Workflow after the action coordination process.

[0010] In a specific embodiment of the present invention, the hardware in step 1 includes an excitation drive module, a filtering and peak suppression circuit, a differential amplifier circuit, a high-frequency filter, a low-noise differential instrumentation amplifier, a differential analog window switch, and an FPGA signal processing and controller. Excitation drive module: The coil is excited by the power excitation drive circuit. The excitation current is detected by Hall effect / shunt and shaped into a synchronization signal SYNC by a comparator, which is provided to the FPGA as a phase and timing reference. Filtering, spike suppression, and differential amplifier circuitry: Each pin of the electrode output is connected in series with a small resistor Rin=47-100Ω and an RF suppression capacitor, mode Cdm, 100-470 pF, common mode Ccm≈Cdm / 5, for EMI suppression only; Back-to-back microcurrent diode soft clamping is configured at the two electrode input terminals to limit extreme spikes and avoid saturation of the first-stage op-amp; The signal then enters the first-stage differential amplifier, which is selected as AD620. High-frequency filter: Removes high-frequency components. The excitation frequency of the machine is selectable, choose 8–12 times the excitation frequency. Differential analog window switch: Topology: Differential analog switch, single-pole double-throw SPDT.

[0011] Opening the window (plateau period): Connecting to the main signal channel.

[0012] Window closed (peak period): The input differential signal is switched to the shunt branch and slowly discharged to the common mode potential Vcm through the resistor Rdump=10-100kΩ.

[0013] A high-precision differential ADC with PGA. The signal after windowing enters the PGA inside the differential ADC, with a maximum gain of 128.

[0014] The differential high-precision ADC continuously and uniformly samples the signal; its input terminal is connected in series with an RC matching circuit, with each pin connected to Rs=33-100Ω, and the differential input pin of the ADC is connected across a differential capacitor Cdm=1nF, and each pin is connected to a common-mode capacitor to ground Ccm≈Cdm / 5C to suppress sampling and high-frequency noise.

[0015] FPGA signal processing and controller: generates windowing control, performs I / Q synchronous demodulation, drift suppression, decimation and automatic gain control on samples during the windowing period.

[0016] In a specific embodiment of the present invention, step 2 includes the following steps: Step 201: After SYNC arrives, the FPGA sets the delay Td and window width Tw according to the table, and drives the differential switch to "turn on" only during the plateau period, and switches to shunt at other times; Step 202: The ADC continuously samples; the FPGA only performs I / Q accumulation on windowed samples; Step 203: If a residual spike or amplitude close to full scale is detected during the plateau period, shorten / shift the window and reduce the second-level amplification factor G2 or the first-level amplification factor G1. Step 204: After performing step 203, the input terminal of the ADC needs to be monitored in real time to ensure that the input voltage is not saturated or too low; the input of the ADC should be kept at 2 / 3 of its full scale by adjusting the automatic gain. This will maximize the utilization of the ADC's resolution.

[0017] Step 205: After several excitation cycles, the above parameters need to be updated by repeating steps 201-203; through continuous dynamic tracking and updating, ensure that the windowing meets the requirements of the algorithm.

[0018] In a specific embodiment of the present invention, step 3, following the action coordination process, includes the following workflow: Step 301: Power-on calibration: Estimate the link phase ϕ0 and group delay τ0 using I / Q, and initialize Td and Tw; Step 302: Adaptive Windowing: FPGA-based During certain periods, windows are opened; at other times, crowd control measures are implemented. Step 303: Differential Integral (I / Q) and DC Deprojection: Calculated only for windowed samples x[n]: ; in The signal samples acquired by the ADC are only sampled / accumulated during the windowing period; A reference cosine wave that is synchronized with the excitation current at the same frequency. ; Reference sine, ; refer to (Ω represents the sample index set within this window); Similarly, ; ∑x: The sum of samples within this window; ∑c, ∑s: the sum of the reference sequences within this window; K: Number of valid samples (the number of samples included in the cumulative count within this window) therefore ; Equivalent to ; In other words, the mean value within the block of x (DC / slow drift) is subtracted first, and then correlated with the reference; in this way, even if the window opening is not an integer period (∑c,∑s≠0), the DC bias will not be introduced into I and Q; Find Then, a moving average is performed to obtain the final amplitude and phase, where the amplitude is proportional to the flow velocity, and the phase is used to adaptively open the window and determine the direction of water flow. Step 304: AGC and Protection: Adaptively adjust the gain based on the plateau peak value and clipping indicator; if abnormal noise is detected, temporarily shrink the window and lock the lower gain until stability is restored.

[0019] The positive and progressive effects of this invention are as follows: The adaptive window differential integration and drift suppression method for electromagnetic flowmeters provided by this invention has the following advantages: 1. More thorough isolation between spikes and transients: The simulated window is located at the end of the low-resistance stage, combined with shunt and RC absorption, to avoid spikes directly loading the electrode and INA; the non-overlapping timing of window closing-shunt-reopening in this invention significantly reduces injection and reopening spikes.

[0020] 2. Amplitude is not sensitive to phase error: This invention uses I / Q coherent integration, and A is inherently independent of phase shift; traditional "bandpass rectification / fixed window" will produce systematic attenuation or deviation due to group delay.

[0021] 3. Strong ability to suppress drift and low-frequency noise: The windowing of this invention only takes the plateau period, and the "projection to DC" inside the window eliminates slow drift; the slow high-pass between windows further suppresses polarization and temperature drift, and the low-flow-rate small signal is more stable.

[0022] 4. High adaptability and faster response: The Td / Tw of this invention is self-adjusted with ϕ, shortening unnecessary dead zones; the required integration time is shorter under the same stability, and the dynamic response is improved.

[0023] 5. Strong robustness and diagnosability: This invention can self-check whether the window is off-target or empty by online measurement of |Q| / A, ϕ stability and coherence ρ, and trigger AGC / window shrinkage to avoid risks.

[0024] 6. Superior Differential Link and ENOB: This invention features a full-link differential + ADC pre-drive matching RC, improving CMRR and effective bit depth; it is also less sensitive to long cables and power frequency / common mode disturbances.

[0025] 7. Controllable cost: The complexity of this invention is mainly in the fixed-point operation on the FPGA / MCU side; the analog part only retains the necessary switches, PGIA and small RC, the hardware is not complicated and the parameters are easy to produce in a consistent manner. Attached Figure Description

[0026] Figure 1 This is a schematic diagram of the overall structure of the present invention. Detailed Implementation

[0027] The preferred embodiments of the present invention are given below with reference to the accompanying drawings to illustrate the technical solution of the present invention in detail.

[0028] The present invention proposes an adaptive window differential integration and drift suppression method for electromagnetic flowmeters, comprising the following implementation methods: Step 1: Hardware platform construction; Step 2: Action coordination process after hardware platform construction in the first step; Step 3: Work process after action coordination process.

[0029] Figure 1 This is a schematic diagram of the overall structure of the present invention, as shown below. Figure 1 As shown: The hardware of this invention includes an excitation drive module, a filtering and spike suppression circuit, a differential amplifier circuit, a high-frequency filter, a low-noise differential instrumentation amplifier, a differential analog window switch, and an FPGA signal processing and controller.

[0030] In this invention, the FPGA periodically emits a stepped excitation signal according to the excitation cycle, which is then used to generate an excitation current source to drive the excitation coil. Simultaneously, the electrode signal on the measuring tube assembly installed on the water pipe first enters the first-stage spike suppression, filtering, and differential amplification circuit to prevent the first-stage operational amplifier from saturating. Then, the signal enters a high-frequency filter to remove high-frequency signals before entering a low-noise differential instrumentation amplifier, at which point the signal has a certain amplitude. Then, it enters the analog switch, which is controlled by the FPGA according to the 201-204 algorithm strategy mentioned earlier. The signal controlled by the analog switch windowing is then sampled by the ADC through a simple passive RC filter, and the FPGA performs I / Q calculations on the sampled data.

[0031] The excitation drive module in this invention: the coil is excited by the power excitation drive circuit, the excitation current is detected by Hall / shunt and shaped by the comparator into a synchronization signal SYNC, which is provided to the FPGA as a phase and timing reference.

[0032] The filtering, spike suppression, and differential amplification circuit of this invention: each pin of the electrode output is connected in series with a small resistor Rin=47-100Ω and an RF suppression capacitor (differential mode Cdm, 100-470 pF, common mode Ccm≈Cdm / 5), which is used only for EMI suppression.

[0033] Back-to-back microcurrent diode soft clamping is configured at the two electrode input terminals to limit extreme spikes and avoid saturation of the first-stage op-amp.

[0034] The signal then enters the first-stage differential amplifier, which is selected as AD620.

[0035] The high-frequency filter of this invention removes high-frequency components. The excitation frequency of the device is selectable, with the highest excitation frequency being 15Hz. Therefore, selecting 8–12 times the excitation frequency (approximately 120–180Hz at 15Hz) is just right: ensuring that the 15Hz waveform has almost no distortion; providing significant attenuation for harmonics such as 45Hz and 75Hz; and ensuring that the noise bandwidth is not too wide.

[0036] The low-noise differential instrumentation amplifier of this invention has a gain set to G=16 to 256 (to prevent saturation and improve SNR); the output common-mode voltage is set to Vref / 2.

[0037] Differential analog window switch: Topology: The differential analog switch uses a single-pole double-throw SPDT; Opening the window (plateau period): Connecting to the main signal channel; Window closed (peak period): The input differential signal is switched to the shunt branch and slowly discharged to the common mode potential Vcm through the resistor Rdump=10-100kΩ.

[0038] High-precision differential ADC with PGA (Programmable Gain).

[0039] After the window is opened, the signal enters the PGA inside the differential ADC, with a maximum gain of 128.

[0040] The differential high-precision ADC continuously and uniformly samples the signal; its input terminals are connected in series with an RC matching capacitor (each pin is connected to Rs=33-100Ω, the differential input pins of the ADC are connected across a differential capacitor Cdm=1nF, and each pin is connected to a common-mode capacitor to ground Ccm≈Cdm / 5C to suppress sampling and high-frequency noise.

[0041] FPGA Signal Processing and Controllers: Generate window opening control (Td / Tw synchronized with SYNC); I / Q synchronous demodulation (differential integration), drift suppression, decimation, and automatic gain control (AGC) are performed on the samples during the windowing period.

[0042] This invention addresses the problems of existing electromagnetic flowmeters under low-frequency excitation conditions, including non-adaptive windowing, insufficient zero-point drift and polarization suppression, residual low-frequency noise and power frequency interference, slow dynamic response, and high system cost. It proposes an adaptive windowing differential integration and drift suppression method. The basic principle is as follows: Excitation current reference and window triggering: The excitation current, rather than the voltage, is used as the synchronization reference to avoid phase errors caused by coil inductance and hysteresis.

[0043] During excitation reversal, the system first enters a dead-zone shielding period, skipping the magnetic field establishment and edge spikes. Unlike existing technologies, the dead time of this invention is not fixed, but dynamically adjusted according to the real-time slope, curvature, and steady-state performance indicators of the excitation current, achieving adaptive windowing.

[0044] Symmetrical differential integration: During the steady-state plateau period of each excitation half-cycle, an integration window symmetrical about the center of the half-cycle is selected, and the electrode signals are integrated separately.

[0045] Subtracting the integral results of the positive and negative half-cycles in a differential manner can both enhance the flow signal and cancel out the polarization potential and zero-point drift.

[0046] Compared to existing fixed-window schemes, the symmetrical differential method of this invention ensures effective cancellation of residual DC terms.

[0047] Drift suppression mechanism: Based on symmetric difference, this invention introduces drift state estimation and compensation.

[0048] By tracking the trend of multi-cycle integration results, slowly varying DC components and polarization terms are identified and subtracted in real time at the output, achieving long-term zero-point stability.

[0049] Robustness Criterion and Windowing Reliability: The windowing determination considers not only the amplitude of the excitation current, but also the steady-state properties of the electrode signal (such as root mean square error, MAD, or slope threshold).

[0050] Integration is initiated only when the electrode signal enters the steady-state platform, effectively avoiding spike interference and abnormal triggering, and improving anti-interference capability.

[0051] Power frequency and harmonic interference suppression: The excitation frequency is still taken as a sub-frequency of the power frequency to suppress the fundamental frequency.

[0052] For harmonic or non-integer interference, this invention combines symmetrical differential and adaptive filtering to model the interference as a slowly varying vector in the I / Q plane or time series and subtract it, thus solving the problem of insufficient suppression of differential frequency residue in existing technologies.

[0053] Dynamic response and efficiency improvement: The adaptive windowing of this invention can automatically shorten unnecessary redundant dead zones, making the effective integration region more concentrated on the magnetic field stability platform and reducing the required integration length.

[0054] Therefore, while maintaining high accuracy, the system's real-time performance and dynamic response speed are improved, and the dependence on long-term averaging is reduced.

[0055] Cost and Implementation: This invention is mainly implemented using Verilog algorithms on FPGAs. The algorithm has moderate complexity and can run in real time on common FPGAs (such as Intel's 10M04 series), demonstrating good engineering feasibility.

[0056] Without departing from the purpose and substance of the invention, the following equivalent implementations or alternative configurations are possible: Variations in switch topology / location: SPDT shunt type ↔ Paired SPST disconnect type; The window position has been moved from "after stage 1" to "before ADC", as long as it is still at the low-resistance amplified node; The shunt target can be Vcm (recommended) or ground / virtual ground, allowing discharge through resistors or RC networks.

[0057] Variations of demodulation methods: I / Q sine reference ↔ square wave synchronous (±1) reference; Using only the I branch and a phase-compensated LUT to convert Q to I (more resource-efficient); Change "inside the window to remove DC" to outside the window differential or adjacent window differential to achieve zero drift cancellation.

[0058] Gain and ADC substitution: External PGIA or fixed high-gain INA, secondary use FDA / ADC-PGA; The pseudo-differential connection method for a single-ended ADC: INP is connected to the signal and INN is connected to VcmV, retaining the advantages of differential sampling.

[0059] Reference and phase-locked loop: Use the excitation current as a reference (recommended); in special cases, the excitation voltage + phase correction table can be used. The NCO / DPLL implementation can be replaced by a scalar phase-locked loop or edge-timing method, provided that it can stably provide c[n], s[n] or their equivalent square waves.

[0060] Filtering and decimation: Moving average ↔ CIC ↔ Low-order IIR; 50 / 60 Hz can be replaced by digital notch filtering or "coherent averaging" after I / Q.

[0061] The sampling rate and integration length can be linearly scaled according to aperture / accuracy / response requirements.

[0062] Air traffic control / anomaly detection: Air traffic control is determined solely by amplitude thresholds. This paper uses the method described in this article. Joint criteria; common-mode / electrode impedance measurement can be added as supplementary evidence (e.g., high-frequency micro-injection method).

[0063] All the above alternative solutions, without changing the core idea of ​​"adaptive windowing of excitation synchronization + differential link + I / Q differential integration and projection to remove DC", are within the protection scope of this invention.

[0064] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as defined by the appended claims and their equivalents.

Claims

1. An adaptive windowed differential integration and drift suppression method for electromagnetic flowmeters, characterized in that: The adaptive window differential integration and drift suppression method for the electromagnetic flowmeter includes the following implementation methods: Step 1: Hardware platform setup; Step 2: The coordination process after the hardware platform is built in Step 1; Step 3: Workflow after the action coordination process.

2. The adaptive window differential integration and drift suppression method for electromagnetic flowmeters according to claim 1, characterized in that: The hardware in step 1 includes an excitation drive module, filtering and spike suppression, differential amplifier circuit, high-frequency filter, low-noise differential instrumentation amplifier, differential analog window switch, and FPGA signal processing and controller. Excitation drive module: The coil is excited by the power excitation drive circuit. The excitation current is detected by Hall effect / shunt and shaped into a synchronization signal SYNC by a comparator, which is provided to the FPGA as a phase and timing reference. Filtering, spike suppression, and differential amplifier circuitry: Each pin of the electrode output is connected in series with a small resistor Rin=47-100Ω and an RF suppression capacitor, mode Cdm, 100-470 pF, common mode Ccm≈Cdm / 5, for EMI suppression only; Back-to-back microcurrent diode soft clamping is configured at the two electrode input terminals to limit extreme spikes and avoid saturation of the first-stage op-amp; The signal then enters the first-stage differential amplifier, which is selected as AD620. High-frequency filter: Removes high-frequency components. The excitation frequency of the machine is selectable, choose 8–12 times the excitation frequency. Differential analog window switch: Topology: Differential analog switch, single-pole double-throw SPDT; Opening the window (plateau period): Connecting to the main signal channel; Window closed (peak period): The input differential signal is switched to the shunt branch and slowly discharged to the common mode potential Vcm through the resistor Rdump=10-100kΩ; A high-precision differential ADC with PGA; the signal after windowing enters the PGA inside the differential ADC, with a maximum gain of 128. The differential high-precision ADC continuously and uniformly samples the signal; its input terminal is connected in series with an RC matching circuit, with each pin connected to Rs=33-100Ω, and the differential input pin of the ADC is connected across a differential capacitor Cdm=1nF, and each pin is connected to a common-mode capacitor to ground Ccm≈Cdm / 5C to suppress sampling and high-frequency noise; FPGA signal processing and controller: generates windowing control, performs I / Q synchronous demodulation, drift suppression, decimation and automatic gain control on samples during the windowing period.

3. The adaptive windowed differential integration and drift suppression method for electromagnetic flowmeters according to claim 1, characterized in that: Step 2's action coordination process includes the following steps: Step 201: After SYNC arrives, the FPGA sets the delay Td and window width Tw according to the table, and drives the differential switch to "turn on" only during the plateau period, and switches to shunt at other times; Step 202: The ADC continuously samples; the FPGA only performs I / Q accumulation on windowed samples; Step 203: If a residual spike or amplitude close to full scale is detected during the plateau period, shorten / shift the window and reduce the second-level amplification factor G2 or the first-level amplification factor G1. Step 204: After executing step 203, the input terminal of the ADC needs to be monitored in real time to ensure that the input voltage is not saturated or too low; the input of the ADC should always be maintained at 2 / 3 of the full scale by adjusting the automatic gain; this can make the best use of the ADC resolution. Step 205: After several excitation cycles, the above parameters need to be updated by repeating steps 201-203; through continuous dynamic tracking and updating, ensure that the windowing meets the requirements of the algorithm.

4. The adaptive window differential integration and drift suppression method for electromagnetic flowmeters according to claim 1, characterized in that: The workflow following step 3 in the action coordination process includes the following: Step 301: Power-on calibration: Estimate the link phase ϕ0 and group delay τ0 using I / Q, and initialize Td and Tw; Step 302: Adaptive Windowing: FPGA-based During certain periods, windows are opened; at other times, crowd control measures are implemented. Step 303: Differential Integral (I / Q) and DC Deprojection: Calculated only for windowed samples x[n]: ； in The signal samples acquired by the ADC are only sampled / accumulated during the windowing period; A reference cosine wave that is synchronized with the excitation current at the same frequency. ; Reference sine, ; refer to (Ω represents the sample index set within this window); Similarly, ; ∑x: The sum of samples within this window; ∑c, ∑s: the sum of the reference sequences within this window; K: The number of samples included in the accumulation within this window; therefore ； Equivalent to ； In other words, the mean value within the block of x (DC / slow drift) is subtracted first, and then correlated with the reference; in this way, even if the window opening is not an integer period (∑c,∑s≠0), the DC bias will not be introduced into I and Q; Find Then, a moving average is performed to obtain the final amplitude and phase, where the amplitude is proportional to the flow velocity, and the phase is used to adaptively open the window and determine the direction of water flow. Step 304: AGC and Protection: Adaptively adjust the gain based on the plateau peak value and clipping indicator; if abnormal noise is detected, temporarily shrink the window and lock the lower gain until stability is restored.

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