Improved continuous wavelet traveling wave fault wave head identification system and method based on FPGA (Field Programmable Gate Array)

An improved continuous wavelet transform algorithm implemented using FPGA solves the problems of insufficient frequency resolution and mode aliasing in fault location of high-voltage transmission lines, achieving high-precision, real-time fault wavefront identification and reducing false identification rate and transmission error.

CN121432064APending Publication Date: 2026-01-30HOHAI UNIV
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Patent Information

Application Number
CN202511856852.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-12-10
Publication Date
2026-01-30

AI Technical Summary

Technical Problem

Existing traveling wave ranging methods suffer from insufficient frequency resolution and mode aliasing in high-voltage transmission line fault location, resulting in large location errors. Furthermore, the existing device structure affects real-time performance and location accuracy.

Method used

An improved continuous wavelet transform algorithm based on FPGA is adopted. Initial identification is performed through a discrete wavelet module, and precise positioning is performed by combining windowing processing and a continuous wavelet module. The fault wavefront is determined by multi-layer wavelet coefficients and modulus maxima.

Benefits of technology

It improves frequency resolution, reduces the false recognition rate of non-faulty high-frequency pulse signals, achieves high-precision fault location, and avoids data transmission errors by identifying faults locally, with a millisecond-level response time.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides an FPGA (Field Programmable Gate Array)-based improved continuous wavelet traveling wave fault wave head identification system and method. The system comprises a discrete wavelet module, a windowing module and a continuous wavelet module. In the discrete wavelet module, real-time fault pre-identification is carried out on the traveling wave signals based on a multilayer discrete wavelet algorithm; the windowing module performs windowing processing on the fault section signal; the continuous wavelet module obtains a wavelet coefficient through Fourier transform, frequency domain product and inverse Fourier transform, searches a modulus maximum line according to the multilayer wavelet coefficient, judges whether a local modulus maximum is caused by noise or a fault wave head, and achieves the precise positioning of the fault wave head. Compared with a traditional discrete wavelet traveling wave head identification method, the method is higher in frequency resolution. And more wavelet decomposition coefficients can be decomposed for the fault frequency band of the fault traveling wave, and the positioning precision is higher.
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Description

TECHNICAL FIELD

[0001] The application relates to the field of high-voltage transmission line fault positioning, and in particular to a traveling wave fault wave head identification system and method based on improved continuous wavelet and FPGA. BACKGROUND

[0002] With the rapid development of China's economy, the requirements for power supply reliability and safety of the power grid are getting higher and higher, and the demand for electricity on the power consumption side is getting larger and larger, and power supply shortage or interruption will bring irreparable economic losses, and in severe cases, it may also cause casualties. The high-voltage transmission line in the power grid is too long in transmission distance, and many lines are exposed to the wild for a long time, and are affected by factors such as bad weather, animal activities and human damage, resulting in reduced production, equipment damage and personal accidents. Therefore, it is of great significance for the power system to quickly identify the fault on the transmission line and accurately find the location of the fault point.

[0003] The traveling wave distance measurement method has obvious advantages in transmission line fault positioning and is widely used. The core of the traveling wave distance measurement method is the wave head identification algorithm, and the accuracy of the wave head identification algorithm is directly related to the distance measurement accuracy. At present, the industry mainly uses discrete wavelet transform and related methods for wave head identification, which has low calculation complexity and high efficiency. However, the frequency resolution of the discrete wavelet is insufficient, and the modal aliasing problem is prone to occur, specifically, the energy of different frequency components cannot be completely separated. This will cause the positioning error to increase, and the non-fault high-frequency pulse signal generated by the switch lightning will be misidentified as the fault wave head. The existing traveling wave distance measurement device mainly adopts the structure of device recording and background distance measurement, which reduces the calculation power requirement of the distance measurement device to a certain extent, but reduces the real-time performance, cannot achieve fault positioning, and the long-distance transmission of data will also affect the positioning accuracy of the background. SUMMARY

[0004] The purpose of the present application is to provide a traveling wave fault wave head identification system and method based on improved continuous wavelet and FPGA, which preliminarily identifies the traveling wave fault wave head through the discrete wavelet algorithm, and then uses the improved continuous wavelet transform algorithm to decompose the fault traveling wave fault frequency band into more wavelet decomposition coefficients, thereby improving the positioning accuracy.

[0005] To achieve the above purpose, the following technical solutions are adopted in the present application:

[0006] The present application provides a traveling wave fault wave head identification system based on improved continuous wavelet and FPGA, comprising:

[0007] A discrete wavelet module adopts a discrete wavelet algorithm to preliminarily identify the fault of the acquired traveling wave signal, and generates a fault signal; the traveling wave signal is the line module component obtained by phase-to-module conversion of the three-phase current signal in the high-voltage transmission line;

[0008] a windowing module, configured to store the traveling wave signal, and activate a windowing state based on the fault signal to window the fault segment data;

[0009] a continuous wavelet module, configured to obtain wavelet coefficients of the windowed fault segment data through Fourier transform, frequency domain multiplication and inverse Fourier transform, find a modulus maximum value line according to the multi-layer wavelet coefficients, and accurately locate the fault wave head based on the modulus maximum value line.

[0010] Preferably, the discrete wavelet module and the continuous wavelet module are modularly modeled by using a system generator in matlab.

[0011] Preferably, the discrete wavelet module is implemented by using a set of FIR filter banks constructed based on a Mallat algorithm, and the data processing process is as follows:

[0012] The to-be-processed traveling wave signal is subjected to high-pass filtering and down-sampling to obtain corresponding wavelet decomposition coefficients; the to-be-processed traveling wave signal is subjected to low-pass filtering to obtain an approximation component, which is subjected to down-sampling and then decomposed again;

[0013] The decomposed again is subjected to high-pass filtering and down-sampling to obtain corresponding wavelet decomposition coefficients; and is subjected to low-pass filtering and down-sampling to obtain an approximation component which is decomposed again;

[0014] Different layers of wavelet decomposition coefficients, i.e. different frequency bands of the corresponding signal, are obtained through multi-layer decomposition;

[0015] The wavelet decomposition coefficients of different layers are compared with preset threshold values of the layers respectively, and if the wavelet decomposition coefficients of any layer exceed the corresponding preset threshold value, a preliminary fault judgment is triggered, and a fault signal is generated.

[0016] Preferably, the windowing module is programmed by using FPGA code, and internally instantiates a window function coefficient storage ROM with a size of a single Fourier transform length, and a signal storage asynchronous dual-port RAM;

[0017] The traveling wave signal is written into the RAM through the discrete wavelet module to the windowing module; when the discrete wavelet module generates a fault signal, the windowing state of the windowing module is activated, the fault segment data is read, multiplied by the window function coefficients in the ROM, and the continuous wavelet module is activated.

[0018] Preferably, the fault segment data selects a total of N data before and after the fault point, and the fault point, i.e. the wave head, is placed at N / 2, wherein N is a single Fourier transform length.

[0019] Preferably, the continuous wavelet module comprises:

[0020] a Fourier transform module, which performs Fourier transform on the fault segment data after windowing, and outputs real part and imaginary part data of the frequency domain signal;

[0021] a down-sampling product module, which stores the real part and imaginary part data of the frequency domain signal output by the Fourier transform module, and then performs product with the wavelet frequency domain representation;

[0022] an inverse Fourier transform module, which performs inverse Fourier transform on the output data of the down-sampling product module, and converts the frequency domain data into time domain; and obtains the modulus value, i.e. the wavelet coefficient, by adding the square of the output real part and imaginary part and taking square root;

[0023] a modulus maximum line module, which judges the fault traveling wave signal and the traveling wave head position based on the wavelet coefficient;

[0024] The down-sampling product module and the modulus maximum line module are user-defined modules of the Block Box of the system generator imported from the Verilog file.

[0025] Preferably, the down-sampling product module is completed by a state machine and a counter, wherein the state machine states include: an idle state, a data storage state and a frequency domain product state;

[0026] After entering the frequency domain product state, the real part and imaginary part data of the frequency domain signal stored in the RAM and the wavelet frequency domain representation stored in the ROM are read in a loop;

[0027] The wavelet is down-sampled each time to obtain down-sampling coefficients of different frequency bands;

[0028] The down-sampling coefficients of different frequency bands are multiplied with the frequency domain signal and sent to the inverse Fourier transform module.

[0029] Preferably, the ROM stores the frequency domain representation of the Morlet wavelet.

[0030] Preferably, the modulus maximum line module includes: an idle state, a modulus maximum positioning state, a modulus maximum line positioning state and an output fault position state;

[0031] In the modulus maximum positioning state, the wavelet coefficient of the inverse Fourier transform module is received, the modulus maximum index of the wavelet coefficient of each frequency band is found and stored in a modulus maximum index array;

[0032] In the modulus maximum line positioning state, the modulus maximum index array is traversed, and it is judged whether the modulus maximum of each frequency band is adjacent in the time domain; if adjacent, the modulus maximum line is added; if not adjacent, the modulus maximum line is recounted;

[0033] In the output fault position state, if the length of the modulus maximum line exceeds a threshold value, it is determined that the fault section data is a fault traveling wave signal, otherwise it is noise or a non-fault pulse signal; after positioning the modulus maximum line, the fault wave head position is calculated by weighting according to different frequency bands, and finally the time label of the fault wave head is output in combination with the starting time label of the fault section data.

[0034] The application also provides an improved continuous wavelet traveling wave fault wave head identification method based on FPGA, which is realized based on the improved continuous wavelet traveling wave fault wave head identification system based on FPGA.

[0035] Three-phase current signals in a high-voltage transmission line are collected.

[0036] After the three-phase current signals are converted into zero-mode, line-mode and space-mode components, the line-mode component is selected as a traveling wave signal. The discrete wavelet algorithm is used to pre-identify the obtained traveling wave signal to generate a fault signal. Based on the fault signal, a windowing module is activated to intercept fault section data and perform windowing processing.

[0037] The fault section data after windowing processing is subjected to Fourier transform, frequency domain multiplication and inverse Fourier transform to obtain wavelet coefficients.

[0038] The modulus maximum line is found according to the multi-layer wavelet coefficients, and the fault wave head is accurately positioned based on the modulus maximum line.

[0039] Compared with the prior art, the application has the following beneficial effects:

[0040] (1) The improved continuous wavelet traveling wave fault wave head identification method based on FPGA has higher frequency resolution than the traditional discrete wavelet traveling wave wave head identification method.

[0041] (2) The method of continuous wavelet transform and modulus maximum line effectively avoids false triggering caused by non-fault high-frequency pulse signals and noise.

[0042] In the discrete wavelet module, all high-frequency signals causing the modulus maximum value to be higher than the threshold value are transmitted to the continuous wavelet module.

[0043] Only the fault traveling wave has energy to form a modulus maximum line from high frequency to low frequency, thereby triggering fault positioning.

[0044] Non-fault high-frequency pulse signals and noise only produce modulus maximum values in specific high-frequency bands, not modulus maximum lines, thereby reducing the false recognition rate caused by high-frequency pulses.(3) The existing device adopts a system architecture that terminal recording is performed and then the signal is transmitted to the background for wave head recognition. This method has low requirements on the computing power of the terminal device, but will cause background redundancy and additional transmission error. The power transmission line is located in a remote place, and the data transmission distance is long. Errors may occur in the data transmission process, which affects the wave head recognition accuracy. The application adopts local recognition and direct transmission of traveling wave wave head, so that the time tag effectively avoids the error caused by transmission.

[0045] (4) The implementation of the application is entirely based on FPGA. The parallelism and high speed of FPGA guarantee the real-time performance of the method. The method uses a high-speed AD with a sampling frequency of 10M for sampling, and can realize millisecond-level fault positioning response. BRIEF DESCRIPTION OF DRAWINGS

[0046] Figure 1 The improved continuous wavelet traveling wave fault wave head recognition system architecture based on FPGA is provided for the embodiments of the application.

[0047] Figure 2 The discrete wavelet algorithm flowchart is provided for the embodiments of the application.

[0048] Figure 3 The improved continuous wavelet algorithm flowchart is provided for the embodiments of the application.

[0049] Figure 4 The improved continuous wavelet traveling wave fault wave head recognition method flowchart based on FPGA is provided for the embodiments of the application. DETAILED DESCRIPTION

[0050] In order to make the purpose, technical scheme and advantages of the application clearer and more apparent, the application will be further described in detail below in combination with embodiments and drawings. Herein, the illustrative embodiments of the application and the description thereof are used to explain the application, but are not used as a limitation of the application.

[0051] It should be noted that, in order to avoid obscuring the application due to unnecessary details, only structures and / or processing steps closely related to the scheme according to the application are shown in the drawings, and other details not closely related to the application are omitted.

[0052] It should be emphasized that the term "comprises / comprising" is used herein to indicate the presence of a feature, element, step or component, but does not exclude the presence or addition of one or more other features, elements, steps or components.

[0053] It should be noted that, if not otherwise specified, the term "connection" used herein can not only mean direct connection, but also indirect connection with the presence of an intermediate.

[0054] Embodiments of the present application will be described hereinafter with reference to the accompanying drawings. In the drawings, like reference numerals designate identical or similar parts, or identical or similar steps.

[0055] It is emphasized here that the step marks mentioned hereinafter are not a limitation of the order of the steps, but it should be understood that the steps can be performed in the order mentioned in the embodiments, or in an order different from the embodiments, or several steps can be performed simultaneously.

[0056] The embodiment provides an improved continuous wavelet traveling wave fault wave head recognition system based on FPGA, which is shown in Figure 1 , and comprises a discrete wavelet module, a windowing module and a continuous wavelet module.

[0057] The multi-layer discrete wavelet algorithm is realized in the discrete wavelet module. The function thereof is to preliminarily identify the fault by comparing the obtained wavelet decomposition coefficients with a threshold value, if the threshold value is exceeded, the fault is preliminarily identified, the fault segment signal is intercepted, and the continuous wavelet module is activated to accurately position the wave head.

[0058] The main function of the windowing module is data storage and data processing. Fourier transform and inverse transform are block processing algorithms, so the subsequent operation can be performed only after the data acquisition and storage, and since the Fourier transform spectrum leakage problem exists, the input signal needs to be processed by windowing.

[0059] The continuous wavelet module is used for accurately positioning the fault wave head position, and the wavelet coefficients are obtained through Fourier transform, frequency domain multiplication and inverse Fourier transform, the maximum modulus line is found according to the multi-layer wavelet coefficients, it is judged whether the local maximum modulus is caused by noise or the fault wave head, and the fault wave head is accurately positioned.

[0060] In the present application, the core of the discrete wavelet module is the FPGA implementation of the discrete wavelet algorithm. The specific implementation is to use the system generator in matlab to perform modular modeling. The basic principle is to use a set of FIR (finite length unit impulse response) filter banks constructed according to the Mallat algorithm to perform multi-resolution analysis on the input traveling wave signal. The filter coefficients are generated by Matlab. Referring to Figure 2The filter set of db4 is used in the embodiment. The data processing process is as follows: the to-be-processed traveling wave signal is subjected to high-pass filtering to obtain a detail component D1, and then is subjected to downsampling to obtain corresponding wavelet decomposition coefficients; the approximate component A1 is obtained after low-pass filtering, and then is subjected to downsampling for subsequent decomposition; similarly, the corresponding wavelet decomposition coefficients D2 are obtained after high-pass filtering and downsampling; and the approximate component A2 is obtained after low-pass filtering and downsampling. Different layers of wavelet decomposition coefficients, i.e., different frequency bands of the corresponding signal, are obtained through multi-layer decomposition. The preliminary fault wave head identification is realized through threshold judgment on the wavelet decomposition coefficients of different layers, specifically: different thresholds correspond to different layers, and the preliminary fault judgment is triggered as long as any layer exceeds the threshold, and if the threshold is exceeded, the continuous wavelet module is activated to accurately position the fault wave head.

[0061] In the application, the windowing module is mainly used for data storage and data processing, and the fault segment signal detected by the discrete wavelet cannot be directly used for fast continuous wavelet transform based on Fourier transform. Fourier transform theoretically requires analyzing an infinitely long periodic signal. However, a finite length signal segment is actually intercepted and analyzed, which is equivalent to multiplying the original infinitely long signal by a rectangular window (i.e., directly truncated without any processing). The mutation of the rectangular window in the time domain will cause very significant sidelobes in the frequency spectrum. In the application, the fault segment signal is multiplied by the Hanning window coefficients stored in the ROM of the windowing module, so that the signal is smoothly transitioned to zero at both ends, the mutation caused by time domain truncation is eliminated, and the frequency spectrum leakage is maximally suppressed. Meanwhile, in order to prevent the wave head from being affected by the window function and highlight the frequency characteristics of the wave head, the fault point, i.e., the wave head, is placed at the position of N / 2, which is the vertex position of the window function, and N is the length of single Fourier transform, and N is 4096 in the embodiment.

[0062] It should be noted that the windowing module is programmed by using FPGA code, internally instantiates a window function coefficient storage ROM with a size of 4096, which is the length of single Fourier transform, and a signal storage asynchronous dual-port RAM. The size of the RAM is 8192, and a buffer is added to the data. The signal is written into the RAM after passing through the discrete wavelet module to the windowing module, and this process is continuously performed regardless of whether there is a fault. When the discrete wavelet detects a possible fault, the windowing module is activated to read the data in the RAM and multiply the window function in the ROM, and then the data is transmitted to the continuous wavelet module.

[0063] The internal logic of the windowing module is realized by using a state machine. The discrete wavelet fault signal activates the windowing state, the windowing module reads 4096 data before and after the fault point and performs windowing processing, and then activates the fast continuous wavelet module.

[0064] In this invention, the continuous wavelet module mainly includes a Fourier transform module (FFT module), a downsampling product module, an inverse Fourier transform module (IFFT module), and a modulus maxima module. Its data processing procedure is as follows: Figure 3 As shown, the model primarily uses modular system generator modeling in MATLAB, supplemented by Verilog code. Within the system generator, the FFT module is called, with length N set to 4096, natural sorting, efficiency priority, and the enable port enabled. The real-number input port of the FFT module is connected to the signal input, where the input is the windowed fault segment data. The complex input port connection constant is 0. The signal bit width is 14 bits. The butterfly operation inside the FFT will expand the dynamic range of the data. To prevent calculation overflow and ensure accuracy, the output bit width will systematically increase. According to the rules of block floating-point arithmetic, the output bit width is determined by the formula: input bit width + log2 (number of FFT points). In this embodiment, the output bit width is: 14 + log2(4096) = 26 bits. Therefore, the FFT module will output 26 bits of real part and 26 bits of imaginary part data. The frequency domain signal output by the FFT module is represented as: This increased bit width provides a lossless data precision foundation for subsequent spectral complex multiplication and IFFT transformation.

[0065] The real and imaginary parts of the FFT output are fed into the downsampling product module (Frequency_Product module). This module is a user-defined module imported from the Verilog file into the system generator's Block Box. Its function is to store the real and imaginary parts of the FFT output, and then, based on the frequency division number and downsampling coefficients, read the frequency domain data of the signal and the frequency domain representation of the wavelet, and multiply them.

[0066] The Frequency_Product module is mainly implemented by a state machine and a counter. The state machine includes: idle state, data storage state, and frequency domain product state. After the FFT operation is completed, the start_frame_out signal goes high, indicating the start of outputting the real and imaginary parts of the frequency domain signal. Upon receiving start_frame_out, the Frequency_Product module enters the data storage state. After storing 4096 units of data, it enters the frequency domain product state. In this state, it cyclically reads the real and imaginary signals stored in RAM and the wavelet frequency domain representation in ROM X times, where X is the frequency division number (corresponding to...). Figure 3 In Each frequency division involves downsampling the wavelet frequency domain representation, and the downsampling coefficients... Determined by the corresponding frequency band, the wavelet coefficients of different frequency bands are obtained by multiplying the downsampling coefficients of the frequency domain signal by the downsampling coefficients of different frequency bands and then performing an inverse Fourier transform. .

[0067] In this embodiment, the mother wavelet is the Morlet wavelet. The Morlet wavelet exhibits a complex exponential oscillation waveform with Gaussian envelope modulation in the time domain. Its oscillation decay pattern is highly similar to the transient impact characteristics of the fault traveling wavefront, enabling it to generate the maximum response output and effectively improving the sensitivity and signal-to-noise ratio of wavefront identification. The time-domain expression of the Morlet wavelet is as follows:

[0068] (1)

[0069] in For wavelet mother function, The normalization constant is usually taken as... To ensure that the wavelet function has unit energy. dimensionless center frequency The complex sinusoidal oscillation term determines the oscillation characteristics of the wavelet. The Gaussian window function ensures rapid energy decay and localization of the wavelet in the time domain.

[0070] The ROM stores the frequency domain representation of the Morlet wavelet, whose frequency domain expression is as follows:

[0071] (2)

[0072] This is the frequency domain representation of the wavelet mother function. Let ω represent the angular frequency. This formula clearly shows that the Morlet wavelet in the frequency domain is a Gaussian function with a mean of center frequency ω0.

[0073] Each downsampling of the mother wavelet shifts the center frequency, resulting in mother wavelet coefficients for different frequency bands. Multiplying these mother wavelet coefficients by the frequency domain data of the signal and then performing an inverse Fourier transform yields the wavelet coefficients for each frequency band.

[0074] The inverse Fourier transform is performed using the IFFT module in the system generator. The IFFT module is set to a length N of 4096, with natural sorting, efficiency prioritized, and its enable port enabled. This module performs an inverse Fourier transform on the output data from the Frequency_Product module, converting the frequency domain data into the time domain. The IFFT output contains both real and imaginary parts; the squares of these two parts are summed, and the square root is taken to obtain the modulus, i.e., the wavelet coefficients, which are used for subsequent modulus maxima determination.

[0075] The module maximum line module is used for judging whether the signal is a fault traveling wave signal and the position of the traveling wave head.

[0076] The state machine state of the module maximum line module includes: an idle state, a module maximum locating state, a module maximum line locating state and an output fault position state.

[0077] Based on the same inventive concept, another embodiment of the application provides a fast continuous wavelet traveling wave fault head identification method based on FPGA, which is realized based on the identification device. Figure 4 , and mainly includes the following steps:

[0078] S1, collecting three-phase current signals in a high-voltage transmission line;

[0079] S2, obtaining line module components by performing phase-to-module conversion on the three-phase current signals, and selecting the line module components as traveling wave signals;

[0080] S3, performing fault pre-identification on the obtained traveling wave signals by using a discrete wavelet algorithm, and generating fault signals;

[0081] S4, activating a windowing module based on the fault signals, intercepting fault segment data, and performing windowing processing;

[0082] S5, obtaining wavelet coefficients by performing Fourier transform, frequency domain multiplication and inverse Fourier transform on the fault segment data after the windowing processing;

[0083] S6, finding a module maximum line according to the multi-layer wavelet coefficients, and accurately positioning the fault head based on the module maximum line.

[0084] It should be noted that the embodiment is applied to a high-voltage transmission traveling wave distance measurement device, and the entire device is installed in a transformer substation.

[0085] The general device has three ADs to detect three-phase currents, and the three-phase currents are converted into line-mode components through phase-mode conversion. In the embodiment, the line-mode components obtained through phase-mode conversion of the three-phase currents are taken as the traveling wave signals.

[0086] The phase-mode conversion is described as follows:

[0087] Fault analysis is an important aspect of power system research. When we analyze the fault of a power system, we usually use phase sequence conversion or phase-mode conversion to convert three-phase voltage and current into corresponding values in sequence space or modulus space. The main purpose of this is to decouple the phases. Through phase sequence conversion or phase-mode conversion, the impedance matrix between the current and the voltage is changed from a symmetric non-diagonal matrix in phase space to a diagonal matrix in sequence space or modulus space. Each sequence (modulus) current is only related to its corresponding sequence (modulus) voltage, so that the three-phase system, which is coupled with each other, is decomposed into three independent subsystems. On the other hand, some electrical phenomena and laws are not very clear in phase space, but they are very clear in sequence space or modulus space.

[0088] For the analysis of traveling wave distance measurement, which is a kind of transient electrical quantity, the phase-mode conversion is usually used. The Karenbauer conversion is used in the method, and the conversion matrix is as follows,

[0089] ,

[0090]

[0091] In the formula, I0, I1 and I2 respectively represent the zero-mode, positive-mode and negative-mode components of the three-phase current. , , , These three modulus components. , , Ia, Ib and Ic respectively represent the instantaneous values of the three-phase current. The signal used in the method is the I0 component after phase-mode conversion.

[0092] Those skilled in the art should understand that the embodiments of the present application can be provided as a method, a system or a computer program product. Therefore, the present application can be in the form of a complete hardware embodiment, a complete software embodiment or an embodiment combining software and hardware aspects. Moreover, the present application can be in the form of a computer program product implemented on one or more computer usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer usable program code.

[0093] ​​The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 one or more flow or blocks

[0094] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 one or more flow or blocks

[0095] The computer program instructions can also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer-implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart block or blocks. Figure 1 one or more flow or blocks Figure 1 one or more flow or blocks

[0096] Finally, it should be noted that the above-mentioned embodiments are merely used to illustrate the technical solutions of the present application, rather than limit the technical solutions of the present application. Although the present application is described in detail with reference to the above embodiments, those skilled in the art should understand that the specific embodiments of the present application can be modified or replaced, and any modification or replacement without departing from the spirit and scope of the present application should be covered in the protection scope of the claims of the present application.

Claims

1. A FPGA-based improved continuous wavelet-based traveling wave fault front identification system, characterized in that, The application relates to a fault identification device for high-voltage transmission lines, which comprises the following modules: a discrete wavelet module, which adopts a discrete wavelet algorithm to pre-identify faults of acquired traveling wave signals and generates fault signals; the traveling wave signals are line module components obtained by phase module conversion of three-phase current signals in high-voltage transmission lines; a windowing module, which is used for storing the traveling wave signals and activating a windowing state based on the fault signals to intercept fault section data for windowing processing; a continuous wavelet module, which is used for obtaining wavelet coefficients of the fault section data after windowing processing through Fourier transform, frequency domain multiplication and inverse Fourier transform, finding a modulus maximum value line according to multi-layer wavelet coefficients, and accurately positioning a fault wave head based on the modulus maximum value line.

2. The FPGA-based improved continuous wavelet-based traveling wave fault front identification system according to claim 1, characterized in that, The discrete wavelet module and the continuous wavelet module are modularly modeled by using a system generator in matlab.

3. The FPGA-based improved continuous wavelet-based traveling wave fault front identification system according to claim 2, characterized in that, The discrete wavelet module is realized by using a set of FIR filter groups based on a Mallat algorithm, and the data processing process is as follows: After high-pass filtering and down-sampling, the to-be-processed traveling wave signals obtain corresponding wavelet decomposition coefficients; after low-pass filtering, the to-be-processed traveling wave signals obtain approximation components, which are down-sampled and then decomposed again; After high-pass filtering and down-sampling again, the second decomposition obtains corresponding wavelet decomposition coefficients; after low-pass filtering and down-sampling, the approximation components are decomposed again; Through multi-layer decomposition, wavelet decomposition coefficients of different layers, i.e. different frequency bands of corresponding signals, are obtained; The wavelet decomposition coefficients of different layers are compared with preset threshold values of the layers respectively, and if the wavelet decomposition coefficients of any layer exceed the corresponding preset threshold value, a preliminary fault judgment is triggered, and a fault signal is generated.

4. The FPGA-based improved continuous wavelet-based traveling wave fault front identification system of claim 1, wherein, The windowing module is programmed by using FPGA codes, internally instantiates a window function coefficient storage ROM with a single Fourier transform length, and a signal storage asynchronous dual-port RAM; The traveling wave signals are written into the RAM through the discrete wavelet module and the windowing module; when the discrete wavelet module generates a fault signal, the windowing state of the windowing module is activated, fault section data are read, multiplied with window function coefficients in the ROM, and the continuous wavelet module is activated.

5. The FPGA-based improved continuous wavelet-based traveling wave fault front identification system of claim 4, wherein, The fault section data select a total of N data before and after a fault point, the fault point is placed at N / 2, and N is the single Fourier transform length.

6. The FPGA-based improved continuous wavelet-based traveling wave fault front identification system of claim 2, wherein, The continuous wavelet module comprises: a Fourier transform module, which performs Fourier transform on the fault section data after windowing processing and outputs real part and imaginary part data of a frequency domain signal; a down-sampling multiplication module, which stores the real part and imaginary part data of the frequency domain signal output by the Fourier transform module and then performs multiplication with a wavelet frequency domain representation; an inverse Fourier transform module, which performs inverse Fourier transform on the output data of the down-sampling multiplication module, converts frequency domain data into time domain, and obtains modulus values, i.e. wavelet coefficients, by adding squares of the output real part and imaginary part and taking square roots; a modulus maximum value line module, which judges fault traveling wave signals and a traveling wave head position based on the wavelet coefficients; The down-sampling multiplication module and the modulus maximum value line module are user-defined modules of a Block Box of a system generator into which Verilog files are imported.

7. The FPGA-based improved continuous wavelet-based traveling wave fault front identification system of claim 6, wherein, The downsampling product module is completed by a state machine and a counter, wherein the state machine states include: an idle state, a data storage state and a frequency domain product state; After entering the frequency domain product state, the real part and the imaginary part of the frequency domain signal stored in the RAM and the wavelet frequency domain representation stored in the ROM are read in a loop; Each time the wavelet is downsampled, a downsampled coefficient of a different frequency band is obtained; The downsampled coefficients of different frequency bands are multiplied with the frequency domain signal and sent to the inverse Fourier transform module.

8. The FPGA-based modified continuous wavelet-based traveling wave fault front identification system of claim 7, wherein, The ROM stores the frequency domain representation of the Morlet wavelet.

9. The FPGA-based modified continuous wavelet-based traveling wave fault front identification system of claim 6, wherein, The modulus maximum line module includes: an idle state, a modulus maximum positioning state, a modulus maximum line positioning state and an output fault position state; In the modulus maximum positioning state, the wavelet coefficients from the inverse Fourier transform module are received, the modulus maximum index of the wavelet coefficients of each frequency band is found and stored in a modulus maximum index array; In the modulus maximum line positioning state, the modulus maximum index array is traversed, it is judged whether the modulus maximum of each frequency band is adjacent in the time domain, if adjacent, the modulus maximum line is added, and if not adjacent, the modulus maximum line is recounted; In the output fault position state, if the length of the modulus maximum line exceeds a threshold, the fault segment data is determined as a fault traveling wave signal, otherwise, it is noise or a non-fault pulse signal; after the modulus maximum line is positioned, the fault wave head position is calculated by weighting according to different frequency bands, and finally the time label of the fault wave head is output in combination with the starting time label of the fault segment data.

10. A method for identifying the head of a traveling wave fault based on an improved continuous wavelet transform based on FPGA, characterized in that, The FPGA-based improved continuous wavelet traveling wave fault wave head identification system implementation based on claim 1, the method comprising: Collecting three-phase current signals in a high-voltage transmission line; The three-phase current signal is converted into a zero-mode signal after phase-mode conversion. , Three linear model components, selected The component is treated as a traveling wave signal; Using a discrete wavelet algorithm to perform fault pre-identification on the obtained traveling wave signal to generate a fault signal; Activating a windowing module based on the fault signal, intercepting fault segment data, and performing windowing processing; Obtaining wavelet coefficients by Fourier transform, frequency domain product and inverse Fourier transform on the fault segment data after windowing processing; Finding a modulus maximum line according to the multi-layer wavelet coefficients, and accurately positioning the fault wave head based on the modulus maximum line.