Processor load preheating and exiting method, device, equipment and storage medium

Abstract

The application discloses a processor load preheating and exiting method, device, equipment and storage medium, and is applied to the field of processor control, and comprises the following steps: setting a load preheating / exiting control register in a global register of a processor, and configuring a field of the load preheating / exiting control register based on a task load; when reading that the load preheating field is in an activated state, controlling a calculation unit of the processor to execute an invalid calculation task with an increased task amount; and when reading that the load exiting field is in the activated state, controlling the calculation unit of the processor to execute an invalid calculation task with a decreased task amount. According to the method, meaningless calculation tasks are executed by the processor before and after starting or stopping heavy work loads, the load is gradually and slowly increased or decreased, the transition to a normal working state is smoothed, a complex power management strategy is not needed, and the starting stability and reliability of the system can be obviously improved.

Description

Technical Field

[0001] This invention relates to the field of processor control, and in particular to a processor load preheating and de-load method, apparatus, electronic device, and computer-readable storage medium. Background Technology

[0002] With the development of high-performance computing and intelligent computing, high-performance microprocessors commonly employ multi-core, vector, and matrix microarchitecture techniques to enhance performance. When a high-performance microprocessor experiences a sudden increase or decrease in load during heavy workload startup or shutdown, the power supply system may be unable to respond promptly, causing a momentary voltage drop or surge. This negatively impacts computational accuracy, system reliability, and overall performance. In extreme cases, such a sudden voltage drop or surge can lead to serious consequences such as computational errors, data corruption, or even system crashes. Therefore, effectively mitigating the impact of simultaneous startup or shutdown of heavy workloads and ensuring system voltage stability in high-performance microprocessor systems has become a pressing technical challenge.

[0003] In the prior art, in order to avoid voltage surges caused by load changes, common solutions include dynamic voltage and frequency regulation and complex power management strategies. However, these methods usually rely on sophisticated power regulation mechanisms, have a slow response speed, and are difficult to quickly cope with sudden load problems when multiple cores start up at the same time. Summary of the Invention

[0004] The purpose of this invention is to provide a processor load preheating and shutdown method, apparatus, electronic device, and computer-readable storage medium, which are applied in the field of processor control. This method controls the processor to perform meaningless computing tasks before and after heavy workload startup or shutdown, gradually and slowly increasing or decreasing the load to smoothly transition to normal working state. It does not rely on complex power management strategies and can significantly improve the startup stability and reliability of the system.

[0005] To solve the above-mentioned technical problems, the present invention provides a processor load preheating and exit method, comprising:

[0006] Configure the load warm-up / exit control register in the processor's global register, and configure the fields of the load warm-up / exit control register based on the task load;

[0007] When the load preheating field is read as active, the processor's computing unit is controlled to execute invalid computing tasks with increasing workload.

[0008] When the load exit field is read as active, the computing unit of the processor is controlled to execute the invalid computing task with decreasing task volume.

[0009] Optionally, controlling the processor's computing unit to execute invalid computing tasks with increasing workload includes:

[0010] Determine the workload of each level of invalid computing task; wherein, the higher the level, the greater the workload of the invalid computing task.

[0011] The load preheating termination level is determined based on the load preheating termination level field, and the switching cycle is determined based on the switching cycle field.

[0012] The computing unit controlling the processor starts execution from the lowest level of the invalid computing task, and increases the level of the invalid computing task every switching cycle until the level of the invalid computing task is the load preheating termination level.

[0013] Accordingly, controlling the computing unit of the processor to execute the invalid computing task with decreasing workload includes:

[0014] The load exit initial level is determined based on the load exit initial level field, and the switching period is determined based on the switching period field.

[0015] The computing unit controlling the processor starts executing an invalid computing task from the initial level of the load exit, and reduces the level of the invalid computing task every switching cycle until the level of the invalid computing task is the lowest level.

[0016] Optionally, controlling the processor's computing unit to execute invalid computing tasks with increasing workload includes:

[0017] Configure the computing unit control register in the global register;

[0018] The computation unit activation field of the computation unit control register is configured based on the workload of the invalid computation task; each computation unit activation field controls one computation unit.

[0019] Based on the activation field of the computing unit, the computing unit is activated to perform the invalid computing task with an increasing task volume;

[0020] Accordingly, controlling the computing unit of the processor to execute the invalid computing task with decreasing workload includes:

[0021] Configure the computing unit activation field of the computing unit control register based on the workload of the invalid computing task;

[0022] Based on the activation field of the computing unit, the invalid computing tasks that reduce the amount of tasks executed by the computing unit are turned off.

[0023] Optionally, the method further includes:

[0024] During the load warm-up process, if a target computing task is received, the "Disable Load Warm-up" field is set to active.

[0025] If the target computing task is received during the load exit process, the "Disable Load Exit" field is configured to be active.

[0026] Optionally, the load preheating / exit control register further includes a verification field; wherein, when the verification field is a preset value, the current configuration in the load preheating / exit control register is determined to be a valid configuration.

[0027] Optionally, the load preheating / exit control register may further include a load preheating status field and a load exit status field.

[0028] Optionally, the calculation unit is a multiplication-accumulation calculation unit.

[0029] To solve the above-mentioned technical problems, the present invention provides a processor load preheating and de-heating device, comprising:

[0030] The first module is used to set the load warm-up / exit control register in the processor's global register, and configure the fields of the load warm-up / exit control register based on the task load;

[0031] The second module is used to control the processor's computing unit to execute invalid computing tasks with increasing task volume when the load preheating field is read as active.

[0032] The third module is used to control the processor's computing unit to execute the invalid computing task with decreasing task volume when the load exit field is read as active.

[0033] To solve the above-mentioned technical problems, the present invention provides an electronic device, comprising:

[0034] Memory, used to store computer programs;

[0035] A processor for implementing the processor load warm-up and exit method described above when executing the computer program.

[0036] To solve the above-mentioned technical problems, the present invention provides a computer-readable storage medium, characterized in that the computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, implement the processor load preheating and exit method described above.

[0037] As can be seen, the method of this invention sets a load preheating / exit control register in the processor's global register, and configures the fields of the load preheating / exit control register based on the task load. When the load preheating field is read as active, the processor's computing unit is controlled to execute an invalid computing task with increasing workload; when the load exit field is read as active, the processor's computing unit is controlled to execute an invalid computing task with decreasing workload. This method of the present invention, by controlling the processor to execute meaningless computing tasks before and after the start or stop of a heavy workload, gradually and slowly increases or decreases the load to smoothly transition to normal operating conditions, without relying on complex power management strategies, and can significantly improve the startup stability and reliability of the system. Attached Figure Description

[0038] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0039] Figure 1 A flowchart illustrating a processor load preheating and exit method provided in an embodiment of the present invention;

[0040] Figure 2 This is an example diagram of a load preheating / exit control register structure provided in an embodiment of the present invention;

[0041] Figure 3 An example diagram of a processor framework provided in an embodiment of the present invention;

[0042] Figure 4 This is a structural block diagram of a processor load preheating and de-energizing device provided in an embodiment of the present invention. Detailed Implementation

[0043] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0044] With the development of high-performance computing and intelligent computing, high-performance microprocessors such as GPUs (Graphics Processing Units), accelerators, and training-oriented NPUs (Neural Network Processing Units) commonly employ multi-core, vector, and matrix microarchitecture techniques to improve performance. When high-performance microprocessors experience heavy workloads, especially when multiple cores, vector, and matrix multipliers start or stop simultaneously, sudden increases or decreases in load can cause the power supply system to be unable to respond in a timely manner, resulting in a momentary voltage drop or rise. This momentary voltage drop or rise leads to system voltage instability, negatively impacting computational accuracy, system reliability, and overall performance. In extreme cases, such a sudden voltage drop or rise can cause serious consequences such as computational errors, data corruption, or even system crashes. Therefore, effectively mitigating the impact of simultaneous heavy workloads starting or stopping in high-performance microprocessor systems and ensuring system voltage stability has become a pressing technical challenge.

[0045] In existing technologies, commonly used methods include Dynamic Voltage Frequency Scaling (DVFS) and complex power management strategies. However, these methods typically rely on sophisticated power regulation mechanisms, resulting in slow response times and difficulty in quickly handling sudden load spikes during multi-core simultaneous startup. To address this issue, this invention proposes an innovative load preheating and decommissioning method. By performing meaningless computational tasks before and after heavy workload startup or shutdown, the load is gradually and slowly increased or decreased to smoothly transition to normal operating conditions, effectively mitigating the impact of simultaneous heavy workload startup or shutdown. This method is simple and efficient, requires no complex power management, and significantly improves system startup stability and reliability.

[0046] Compared to existing technologies, it avoids the problem of sudden power fluctuations caused by multiple power-consuming components starting or stopping simultaneously, thus significantly reducing the risk of high dynamic voltage drop in the system; it allows users to flexibly configure the load level according to the system's operating status, making load adjustment highly adjustable and adaptable, suitable for diverse application scenarios; it is designed on the existing high-performance microprocessor architecture, without the need to add complex hardware circuit modules, optimizing system resource utilization, while reducing hardware implementation costs and design complexity.

[0047] The following combination Figure 1 , Figure 1 A flowchart of a processor load preheating and exit method provided in an embodiment of the present invention may include:

[0048] S101: Set the load warm-up / exit control register in the processor's global register, and configure the fields of the load warm-up / exit control register based on the task load.

[0049] This embodiment allows setting a load warm-up / exit control register (VPreheatR) in the processor's global register. This load warm-up / exit control register can contain multiple fields for configuring processor load warm-up and exit parameters. This embodiment does not limit the specific type of processor, nor does it limit the specific type of load warm-up / exit control register; it can be set based on the actual application.

[0050] This embodiment can configure the fields of the load preheating / exit control register based on the task load. This embodiment does not limit the specific type of the fields contained in the load preheating / exit control register. Generally, it can include a load preheating field (VpreH_S) for activating load preheating and a load exit field (VpostH_S) for activating load exit.

[0051] S102: When the load preheating field is read as active, the processor's computing unit executes invalid computing tasks with increasing task volume.

[0052] This embodiment does not limit the specific method of activating processor load preheating and exit. Generally, a control logic module can be set up to read the parameters configured in the load preheating / exit control register and then execute the load preheating / exit steps.

[0053] In this embodiment, when the load preheating field is read as active, the processor's computing units can be controlled to execute invalid computing tasks with increasing workload. Before the processor's high-power task load starts, invalid computing operations are executed by the computing units to gradually activate the computing units to achieve load increment, thereby achieving a smooth transition of power load and avoiding sudden voltage increases.

[0054] Furthermore, in this embodiment, the load preheating / exit control register may also include a load preheating termination level field (VpreH_EL), a load exit initial level field (VpostH_BL), and a switching cycle field (LevelSwitchNum). The load preheating termination level field and the switching cycle field are used to control the execution flow of load preheating, and the load exit initial level field and the switching cycle field are used to control the execution flow of load exit.

[0055] Specifically, the workload of invalid computing tasks at each level can be determined first; the higher the level, the greater the workload of invalid computing tasks. For example, four levels of invalid computing tasks can be set: 0, 1, 2, and 3. The higher the level number, the greater the workload of invalid computing tasks. This embodiment does not limit the size of the workload of invalid computing tasks at each level and can be set based on actual applications.

[0056] This embodiment determines the load preheating termination level based on the load preheating termination level field and the switching cycle based on the switching cycle field. The load preheating termination level determines the maximum load intensity during the load preheating phase, while the switching cycle sets the switching period for different levels of invalid computing tasks during the load preheating operation. For example, during load preheating, starting from the initial level 0, the load is adjusted upwards by one level after each switching cycle until the preheating termination level is reached.

[0057] Furthermore, the processor's computing unit starts executing from the lowest-level invalid computing task, and increases the level of the invalid computing task every switching cycle until the level of the invalid computing task is the load preheating termination level.

[0058] For example, in one embodiment, load preheating configuration values, such as load preheating field, load preheating termination level field, and switching cycle field, are written into the load preheating / exit control register to activate the load preheating function.

[0059] If the load preheating termination level is determined to be level 4 based on the load preheating termination level field, and the switching cycle is determined to be 256 clock cycles based on the switching cycle field, when the control logic module reads that the value of the load preheating field in the load preheating / exit control register is 1, then load preheating is started, and the computing unit is gradually activated. The computing unit is controlled to start from level 0 invalid computing tasks, and every 256 clock cycles, the level of invalid computing tasks is increased. After three switching cycles, the computing unit executes level 3 invalid computing tasks.

[0060] When the invalid computing task reaches level 3, the load preheating termination level is reached, and the load preheating function can be turned off. This embodiment does not limit the specific method of turning off the load preheating function. Generally, the load preheating / exit control register can be set with a load preheating off field (VpreH_F). Load preheating can be turned off by configuring the load preheating off field to be active. For example, when the load preheating off field is configured to 1, load preheating is turned off, and the processor is ready to receive the target computing task.

[0061] Furthermore, in this embodiment, if data for the target computing task is received during the load preheating process, the "Disable Load Preheating" field can be configured to be active, thus disabling load preheating and allowing the target computing task to be executed. This operation avoids load preheating from affecting the normal processing of the target computing task.

[0062] S103: When the load exit field is read as active, the processor's computing unit executes invalid computing tasks with decreasing task load.

[0063] In this embodiment, when the load exit field is read as active, the processor's computing unit can be controlled to execute invalid computing tasks with decreasing workload. When the processor exits the high-load state, by controlling the computing unit to execute invalid vector calculation operations, the computing unit is gradually shut down to reduce the load, achieving a smooth transition of power load and avoiding sudden voltage drops.

[0064] In this embodiment, the execution flow of load exit can be controlled through the load exit initial level field and the switching period field. The load exit initial level can be determined based on the load exit initial level field, and the switching period can be determined based on the switching period field. The load exit initial level can set the load intensity at the start of load exit, and the switching period can set the switching period for different levels of invalid computing tasks during the warm-up / load exit operation.

[0065] In this embodiment, the processor's computing units can be controlled to begin execution from the initial level of invalid computing tasks after the load exits, and the level of invalid computing tasks can be reduced every switching cycle until the level of invalid computing tasks reaches the lowest level. For example, during the load warm-up process, starting from the initial level 3, the load is adjusted down one level every switching cycle until the lowest level is reached.

[0066] In one embodiment, load exit configuration values, such as load exit field, load exit initial level field, and switching cycle field, can be written into the load preheat / exit control register to activate the load exit function.

[0067] If the initial negative exit level is determined to be level 3 based on the load exit initial level field, and the switching cycle is determined to be 256 clock cycles based on the switching cycle field, when the control logic module reads that the value of the load exit field in the load warm-up / exit control register is 1, the load exit is initiated, and the computing unit is gradually shut down. The control computing unit starts from level 3 invalid computing tasks, and every 256 clock cycles, the level of invalid computing tasks is reduced. After three switching cycles, the computing unit executes level 0 invalid computing tasks.

[0068] When the level of an invalid computing task is 0, the lowest level is reached. After the invalid computing task with level 0 is completed, the load exit function can be turned off.

[0069] This embodiment does not limit the specific method of disabling the load exit function. Generally, the load preheating / exit control register can be set with a load exit field (VpostH_F). The load exit can be disabled by configuring the load exit field to be active. For example, when the load exit field is configured to 1, the load exit is disabled. At this time, the load exit is completed, that is, all computing units used for load exit are shut down.

[0070] Furthermore, in this embodiment, if data from the target computing task is received during the load exit process, the "Disable Load Exit" field can be configured to be active, thus disabling load exit and allowing the target computing task to continue execution. This operation prevents load exit from affecting the normal processing of the target computing task.

[0071] This embodiment does not limit the configuration method of the switching cycle field; the switching cycle can be adjusted according to the actual system state. For example, under high load demand, a smaller switching cycle can be selected to accelerate load warm-up. Under power-constrained conditions, using a larger switching cycle can allow the load to increase gradually. By dynamically adjusting the load warm-up termination level, the load exit initial level, and the switching threshold, different system state requirements can be adapted to, improving the accuracy of power load regulation.

[0072] In this embodiment, the load preheating / exit control register may further include a load preheating status field (VpreH_ST) and a load exit status field (VpostH_ST). The load preheating status field characterizes the status of the load preheating process. In this embodiment, when the load preheating status field is 1, the load preheating status is determined to be in progress; when the load preheating status field is 0, the load preheating status is determined to be complete. The load exit status field characterizes the status of the load exit process. In this embodiment, when the load exit status field is 1, the load exit status is determined to be in progress; when the load exit status field is 0, the load exit status is determined to be complete.

[0073] In this embodiment, the load preheating / exit control register also includes a verification field (ProtectKey), wherein when the verification field is a preset value, the current configuration in the load preheating / exit control register is determined to be a valid configuration. To prevent configuration errors from causing abnormal states in the load preheating / exit control register, register operations will only take effect if the verification field is correctly set to 0x6713 (hexadecimal). This design improves the security of register operations.

[0074] In this embodiment, the descriptions of the fields included in the load preheating / exit control register can be as shown in Table 1, and the structure of the load preheating / exit control register can be as follows: Figure 2 As shown, the load warm-up / exit control register can contain a total of 64 bits, including two reserved fields 1 (Rvs1) and 2 (Rvs2). R is Read-Only, W is Write-Only, and RW is Read / Write.

[0075] Table 1: Description of Load Preheating / Exit Control Register Fields

[0076]

[0077] In this embodiment, the specific method of controlling the processor's computing unit to execute invalid computing tasks with increasing task volume and invalid computing tasks with decreasing task volume is not limited. Generally, the computing unit control register (VPreheat_Valid) can be set in the global register.

[0078] The computation unit activation field of the computation unit control register is configured based on the workload of invalid computation tasks. Generally, each computation unit activation field occupies 1 bit; each computation unit activation field controls one computation unit; the computation unit is activated based on the computation unit activation field to execute invalid computation tasks with increasing workload.

[0079] Accordingly, the computation unit activation field of the computation unit control register is configured based on the workload of invalid computation tasks; and invalid computation tasks with decreasing workloads are disabled by the computation unit activation field.

[0080] In this embodiment, the activation state of the computing unit can be controlled by the computing unit control register to ensure that invalid instructions are only used to simulate the load and do not affect the actual data operation.

[0081] In this embodiment, the processor architecture can be as follows: Figure 3 As shown, the processor core integrates a register file, a computing unit for load warm-up / exit, a global register, and other functional units. The global register contains a load warm-up / exit control register and a computing unit control register.

[0082] The computing unit control register is directly controlled by the load preheating / exit control register. The number of bits in the computing unit control register is related to the number of computing units. Generally, the number of bits in the computing unit control register is the same as the number of computing units. For example, if there are 4 computing units, the number of bits in the unit control register is 4 bits, and each bit can control the activation state of one computing unit.

[0083] This embodiment does not limit the specific type of the computation unit. It can generally be a multiply-accumulate (MAC) computation unit, such as a vector multiply-accumulate computation unit or a matrix multiply-accumulate computation unit.

[0084] The computing unit is responsible for performing invalid calculations and is the main execution module in the load warm-up and exit process. In this embodiment, invalid vector calculation operations, such as double-precision vector multiplication and addition instructions, are prohibited from writing results to the register file during execution and are only used to realize the slow load loading or unloading.

[0085] This embodiment does not limit the specific method by which the computing unit control register activates / deactivates the computing unit, causing it to enter the load preheating / exit process. The load preheating / exit control register can control a 4-bit computing unit control register (default value is 4'h0). When VPreheat_Valid[i]=1, it indicates that the i-th computing unit performs the preheating / load exit function, that is, it unconditionally executes an invalid computing task. The result of the invalid computing task is not written to the register file and will not affect the value of the register file. When VPreheat_Valid[i]=0, it indicates that the i-th computing unit is in normal operating state and executes the normal target computing task.

[0086] In this embodiment, if the configured load preheating termination level changes during the preheating process (e.g., from level 3 to level 2), the logic module will immediately adjust the value of the computing unit control register and shut down the redundant computing units.

[0087] In this embodiment, the value of the computing unit control register can be determined by the load preheating termination level, the load exit initial level, and the switching cycle, thereby realizing the function of gradually activating the computing unit according to the load preheating termination level and gradually shutting down the computing unit according to the load exit initial level.

[0088] In a certain load preheating process example, the configuration value for starting load preheating can first be written to the load preheating / exit control register, including key information such as load preheating field, load preheating termination level field, and switching cycle field, to activate the load preheating function.

[0089] The value of the initialization unit control register is 4'b0000, indicating that all four computing units are turned off.

[0090] When the load preheating field is read as active, the computing unit can start executing from an invalid computing task at level 0. Setting the activation field of a computing unit to 1 activates a computing unit to execute an invalid computing task.

[0091] After each switching cycle, the register value of VPreheat_Valid is updated synchronously. The calculation unit is activated based on this register value. The system will determine whether the updated value of VPreheat_Valid has reached the register value corresponding to the load preheating termination level.

[0092] If the updated value reaches the register value corresponding to the load preheating termination level, the value of VpreH_F in VPreheatR can be configured to 1, indicating that load preheating is complete and load preheating is turned off so that the system is ready to receive the target computing task.

[0093] In a certain load exit process example, the configuration value for starting load exit can first be written to the load preheat / exit control register, including key information such as the load exit field, the load exit initial level field, and the switching cycle field, to activate the load exit function.

[0094] The Vpreheat_Valid register value is initialized based on the load exit initial level field. After each switching cycle, the Vpreheat_Valid register value is updated synchronously, corresponding to the shutdown of one computing unit.

[0095] Further, it can be determined whether all computing units currently used for load exit have been shut down. If all are shut down, the value of the VpostH_F field in the VpreheatR register can be set to 1, and the system will exit the load exit function.

[0096] In this embodiment, during the load preheating / exit process, when the system receives the calculation instruction of the target computing task, it will terminate the load preheating / exit process in advance, so that the system can enter the normal target computing task processing process.

[0097] Based on the above embodiments, the method of the present invention controls the processor to perform meaningless computing tasks before and after heavy workload startup or shutdown, gradually and slowly increasing or decreasing the load to smoothly transition to normal working state, without relying on complex power management strategies, and can significantly improve the startup stability and reliability of the system.

[0098] The following combination Figure 4 , Figure 4 This is a structural block diagram of a processor load preheating and de-heating device provided in an embodiment of the present invention. The device may include:

[0099] The first module 100 is used to set the load warm-up / exit control register in the processor's global register, and configure the fields of the load warm-up / exit control register based on the task load;

[0100] The second module 200 is used to control the processor's computing unit to execute invalid computing tasks with increasing task volume when the load preheating field is read as being in an active state.

[0101] The third module 300 is used to control the computing unit of the processor to execute the invalid computing task with decreasing task volume when the load exit field is read as active.

[0102] Based on the above embodiments, the method of the present invention controls the processor to perform meaningless computing tasks before and after heavy workload startup or shutdown, gradually and slowly increasing or decreasing the load to smoothly transition to normal working state, without relying on complex power management strategies, and can significantly improve the startup stability and reliability of the system.

[0103] Based on the above embodiments, the second module 200 may include:

[0104] The first unit is used to determine the workload of the invalid computing tasks at each level; wherein, the higher the level, the greater the workload of the invalid computing tasks.

[0105] The second unit is used to determine the load preheating termination level based on the load preheating termination level field and the switching cycle based on the switching cycle field.

[0106] The third unit is used to control the computing unit of the processor to start executing from the lowest level of the invalid computing task, and to raise the level of the invalid computing task every switching cycle until the level of the invalid computing task is the load preheating termination level.

[0107] Correspondingly, the third module 300 may include:

[0108] The fourth unit is used to determine the load exit initial level based on the load exit initial level field and to determine the switching period based on the switching period field.

[0109] The fifth unit is used to control the computing unit of the processor to start executing the invalid computing task from the initial level of the load exit, and to reduce the level of the invalid computing task every switching cycle until the level of the invalid computing task is the lowest level.

[0110] Based on the above embodiments, the second module 200 may include:

[0111] The sixth unit is used to set the computing unit control register in the global register;

[0112] The seventh unit is used to configure the computing unit activation field of the computing unit control register based on the workload of the invalid computing task; each computing unit activation field controls one computing unit.

[0113] The eighth unit is used to activate the invalid computing task with increasing task volume of the computing unit based on the activation field of the computing unit;

[0114] Correspondingly, the third module 300 may include:

[0115] The ninth unit is used to configure the computing unit activation field of the computing unit control register based on the workload of the invalid computing task;

[0116] The tenth unit is used to disable the invalid computing tasks that are decreasing in the amount of tasks performed by the computing unit based on the activation field of the computing unit.

[0117] Based on the above embodiments, the device may further include:

[0118] The fourth module is used to configure the "Disable Load Preheating" field to be active if a target computing task is received during the load preheating process.

[0119] The fifth module is used to configure the "Disable Load Exit" field to be active if the target computing task is received during the load exit process.

[0120] Based on the above embodiments, the load preheating / exit control register further includes a verification field; wherein, when the verification field is a preset value, the current configuration in the load preheating / exit control register is determined to be a valid configuration.

[0121] Based on the above embodiments, the load preheating / exit control register further includes: a load preheating status field and a load exit status field.

[0122] Based on the above embodiments, the calculation unit is a multiplication-accumulation calculation unit.

[0123] Based on the above embodiments, the present invention also provides an electronic device, which may include a memory and a processor. The memory stores a computer program, and when the processor calls the computer program in the memory, it can implement the steps provided in the above embodiments. Of course, the device may also include various necessary network interfaces, a power supply, and other components.

[0124] The present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by an execution terminal or processor, can implement the method provided in the embodiments of the present invention; the storage medium may include various media capable of storing program code, such as a USB flash drive, a portable hard drive, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0125] In this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, without necessarily requiring or implying any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

Claims

1. A method for preheating and de-loading processor load, characterized in that, include: Configure the load warm-up / exit control register in the processor's global register, and configure the fields of the load warm-up / exit control register based on the task load; When the load preheating field is read as active, the processor's computing unit is controlled to execute invalid computing tasks with increasing workload. When the load exit field is read as active, the computing unit of the processor is controlled to execute the invalid computing task with decreasing task volume.

2. The processor load preheating and shutdown method according to claim 1, characterized in that, Controlling the processor's computing unit to execute invalid computing tasks with increasing workload includes: Determine the workload of each level of invalid computing task; wherein, the higher the level, the greater the workload of the invalid computing task. The load preheating termination level is determined based on the load preheating termination level field, and the switching cycle is determined based on the switching cycle field. The computing unit controlling the processor starts execution from the lowest level of the invalid computing task, and increases the level of the invalid computing task every switching cycle until the level of the invalid computing task is the load preheating termination level. Accordingly, controlling the computing unit of the processor to execute the invalid computing task with decreasing workload includes: The load exit initial level is determined based on the load exit initial level field, and the switching period is determined based on the switching period field. The computing unit controlling the processor starts executing an invalid computing task from the initial level of the load exit, and reduces the level of the invalid computing task every switching cycle until the level of the invalid computing task is the lowest level.

3. The processor load preheating and exit method according to claim 1, characterized in that, Controlling the processor's computing unit to execute invalid computing tasks with increasing workload includes: Configure the computing unit control register in the global register; The computation unit activation field of the computation unit control register is configured based on the workload of the invalid computation task; each computation unit activation field controls one computation unit. Based on the activation field of the computing unit, the computing unit is activated to perform the invalid computing task with an increasing task volume; Accordingly, controlling the computing unit of the processor to execute the invalid computing task with decreasing workload includes: Configure the computing unit activation field of the computing unit control register based on the workload of the invalid computing task; Based on the activation field of the computing unit, the invalid computing tasks that reduce the amount of tasks executed by the computing unit are turned off.

4. The processor load preheating and shutdown method according to claim 1, characterized in that, Also includes: During the load warm-up process, if a target computing task is received, the "Disable Load Warm-up" field is set to active. If the target computing task is received during the load exit process, the "Disable Load Exit" field is configured to be active.

5. The processor load preheating and shutdown method according to claim 1, characterized in that, The load preheating / exit control register further includes a verification field; wherein, when the verification field is a preset value, the current configuration in the load preheating / exit control register is determined to be a valid configuration.

6. The processor load preheating and shutdown method according to claim 1, characterized in that, The load preheating / exit control register also includes a load preheating status field and a load exit status field.

7. The processor load preheating and shutdown method according to claim 1, characterized in that, The calculation unit is a multiplication-accumulation calculation unit.

8. A processor load preheating and de-load device, characterized in that, include: The first module is used to set the load warm-up / exit control register in the processor's global register, and configure the fields of the load warm-up / exit control register based on the task load; The second module is used to control the processor's computing unit to execute invalid computing tasks with increasing task volume when the load preheating field is read as active. The third module is used to control the processor's computing unit to execute the invalid computing task with decreasing task volume when the load exit field is read as active.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for implementing the processor load warm-up and exit method as described in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-executable instructions, which, when executed by a processor, implement the processor load warm-up and exit method as described in any one of claims 1 to 7.

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