Wideband doherty power amplifier

Abstract

A broadband Doherty power amplifier is disclosed. The Doherty power amplifier includes a main power amplifier and a peak amplifier. Compared to the conventional method of combining the outputs of the main and peak amplifiers before an impedance transformation circuit, this Doherty power amplifier combines the outputs after an impedance transformation circuit in the peak amplifier output path. This eliminates or at least reduces the possible impedance step drop and corresponding impedance step rise for the main output path. This reduction or elimination of the step drop and rise reduces insertion loss and allows for increased efficiency at the first efficiency peak, thus improving the fractional bandwidth of the Doherty power amplifier.

Description

[0001] Cross-referencing related applications

[0002] This application claims the benefit of U.S. Provisional Patent Application Serial No. 63 / 602,791, filed on November 27, 2023, entitled “BROADBAND DOHERTY POWERAMPLIFIER”, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The technology disclosed herein relates generally to power amplifiers, and more specifically, to broadband Doherty power amplifiers that can be used, for example, in wireless transmission circuits. Background Technology

[0004] Modern society is teeming with computing devices, and more specifically, mobile communication devices have become increasingly ubiquitous. This proliferation is partly due to the numerous functions now available for such devices. The increased processing power means that mobile communication devices have evolved from simple communication tools into sophisticated mobile multimedia hubs, thus enhancing the user experience. With the emergence of countless functions available for such devices, the pressure to find ways to increase the amount of data transmitted to and received from them has grown. This pressure has led to, for example, evolved cellular standards, which place stringent requirements on the transmitters within mobile communication devices. These requirements include the ability to handle signals over a relatively large bandwidth compared to historical requirements. Simultaneously, there is pressure to reduce the overall size of the circuitry used in the transmitter. Balancing these design principles has created space for innovation. Summary of the Invention

[0005] The aspects disclosed in the detailed description include systems and methods for providing broadband Doherty power amplifiers. Specifically, the Doherty power amplifier includes a main power amplifier and a peak amplifier. Compared to conventional methods that combine the outputs of the main and peak amplifiers before impedance transformation circuitry, the aspects of this disclosure combine the outputs after impedance transformation circuitry in the peak amplifier output path. This eliminates or at least reduces possible impedance descent and corresponding impedance rise for the main output path. This reduction or elimination of descent and rise reduces insertion loss and allows for increased efficiency at the first efficiency peak and improves the fractional bandwidth of the Doherty power amplifier.

[0006] In this regard, in one aspect, a Doherty power amplifier is disclosed. The Doherty power amplifier includes a main power amplifier having a main output, a phase shifter coupled to the main output and a combination node, and a peak power amplifier having a peak output. The Doherty power amplifier also includes an impedance transfer converter circuit that is coupled to the peak output at the input side and to the combination node at the output side.

[0007] In another aspect, a Doherty power amplifier is disclosed. The Doherty power amplifier includes: a main path through a main power amplifier, the main path including a 90-degree phase shift after the main power amplifier; and a peak path through a peak power amplifier having an inverting input path for a differential signal to form a negative 180-degree phase shift, the peak path including an initial 90-degree phase shift before the peak power amplifier and at least one tunable element to add a delay to the peak path such that the negative 180-degree phase shift is canceled out.

[0008] On the other hand, a method for operating a Doherty power amplifier is disclosed. The method includes providing a first signal via a main path having a main power amplifier, and using a phase shifter to phase the first signal by ninety degrees. The method also includes providing a second signal via a peak path having a peak power amplifier, using an impedance transfer converter circuit to step the impedance of the peak path, and combining the main path and the peak path after stepping the impedance of the peak path.

[0009] In another aspect, a mobile terminal including a transceiver stage is disclosed. The mobile terminal includes a Doherty power amplifier, comprising a main power amplifier with a main output, a phase shifter coupled to the main output and a combination node, and a peak power amplifier with a peak output. The mobile terminal also includes an impedance transfer converter circuit coupled to the peak output at the input side and to the combination node at the output side. Attached Figure Description

[0010] Figure 1A This is a block diagram of a conventional Doherty power amplifier used in wireless communication devices.

[0011] Figures 1B to 1D It involves various transformations between single-ended and differential signals. Figure 1A A block diagram showing the variations of the Doherty power amplifier;

[0012] Figure 1EThis is a block diagram of a standard Doherty power amplifier, highlighting the shortcomings of the basic Doherty design.

[0013] Figure 2 This is a block diagram of a first exemplary aspect of a Doherty power amplifier having an output path combined after impedance transformation for a peak amplifier.

[0014] Figure 3 This is a block diagram of a second exemplary aspect of a Doherty power amplifier, which has an output path combined after impedance transformation for a peak amplifier, but maintains a small impedance step in the output path of the main power amplifier.

[0015] Figure 4 This is a block diagram of another exemplary aspect of the Doherty power amplifier, in which a DC bias is provided to the peak power amplifier via an impedance transfer converter circuit, thereby reducing the need for an additional radio frequency (RF) choke.

[0016] Figure 5 This is a block diagram of another exemplary aspect of the Doherty power amplifier, in which DC bias is provided for both the peak power amplifier and the main power amplifier via an impedance transfer converter circuit, thereby reducing the need for an additional RF choke.

[0017] Figure 6 This is a block diagram of a Doherty power amplifier with an output path combination point according to the present disclosure, the Doherty power amplifier having a delay compensation circuit for maintaining the Doherty effect;

[0018] Figure 7 This is a block diagram of a Doherty power amplifier with additional analog predistortion to assist linearization according to various aspects of this disclosure;

[0019] Figure 8 and Figure 9 It is a block diagram that reflects two possible design choices: whether a circuit can be digital or analog.

[0020] Figure 10 This is a flowchart illustrating exemplary procedures for operating a Doherty power amplifier according to various aspects of this disclosure; and

[0021] Figure 11 According to this disclosure, it can be included in the transceiver. Figures 2 to 9 Block diagram of the mobile terminal for the Doherty power amplifier. Detailed Implementation

[0022] The embodiments described below represent the information necessary to enable those skilled in the art to practice the embodiments and illustrate the best mode of practice. After reading the following description with reference to the accompanying drawings, those skilled in the art will understand the concepts of this disclosure and will appreciate the application of these concepts, even if not specifically set forth herein. It should be understood that these concepts and applications fall within the scope of this disclosure and the appended claims.

[0023] It will be understood that while the terms first, second, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of this disclosure, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0024] It should be understood that when an element, such as a layer, region, or substrate, is referred to as "on another element" or "extending to another element," it may be directly on or directly extended to the other element, or intermediate elements may be present. In contrast, when an element is referred to as "directly on" or "directly" extending "to" another element, no intermediate elements are present. Similarly, it should be understood that when an element, such as a layer, region, or substrate, is referred to as "above another element" or "extending above another element," it may be directly above or directly above the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly above another element" or "extending directly above another element," no intermediate elements are present. It will also be understood that when an element is referred to as "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or intermediate elements may be present. Conversely, when an element is referred to as "directly connected" or "directly coupled" to another element, no intermediate elements are present.

[0025] For example, relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe the relationship of one element, layer, or region to another element, layer, or region as shown in the figures. It should be understood that these terms, and those discussed above, are intended to include different orientations of the device other than those depicted in the figures.

[0026] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, unless the context clearly indicates otherwise, the singular forms “a / an” and “the” are intended to also include the plural forms. It should also be understood that, when used herein, the terms “comprises,” “comprising,” “includes,” and / or “including” specify the presence of the stated features, integers, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

[0027] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. It will be further understood that, unless expressly defined herein, the terms used herein shall be interpreted as having the same meaning as they have in the context of this specification and in the relevant art, and shall not be interpreted in an idealized or overly formal sense.

[0028] Consistent with the foregoing admonition regarding definitions, this disclosure uses the term "transceiver" in a broad sense. Current industry literature uses "transceiver" broadly to refer to multiple circuits that transmit and receive signals. Exemplary circuits may include a baseband processor coupled to one or more antennas, up / down conversion circuitry, filters, amplifiers, couplers, etc. Similarly, some authors in industry literature refer to the circuitry positioned between the baseband processor and the power amplifier circuitry as a transceiver. This intermediate circuitry may include up / down conversion circuitry, mixers, oscillators, filters, etc., but typically does not include a power amplifier. As used herein, the term transceiver is used in its primary sense. Where necessary to distinguish between the two definitions, the terms "transceiver chain" and "transceiver circuitry" are used respectively.

[0029] The aspects disclosed in the detailed description include systems and methods for providing broadband Doherty power amplifiers. Specifically, the Doherty power amplifier includes a main power amplifier and a peak amplifier. Compared to conventional methods that combine the outputs of the main and peak amplifiers before impedance transformation circuitry, the aspects of this disclosure combine the outputs after impedance transformation circuitry in the peak amplifier output path. This eliminates or at least reduces possible impedance descent and corresponding impedance rise for the main output path. This reduction or elimination of descent and rise reduces insertion loss and allows for increased efficiency at the first efficiency peak and improves the fractional bandwidth of the Doherty power amplifier.

[0030] Before outlining the various aspects of this disclosure, refer to Figures 1A to 1DAn overview of a typical Doherty power amplifier is provided. References Figure 1E Let's discuss the specific challenges that present to designers, and use references... Figure 2 Let's begin discussing solutions to these challenges.

[0031] In this regard, Figure 1A This is a simplified block diagram of a conventional Doherty amplifier 100. The Doherty amplifier 100 has an input node 102 and an output node 104. At the input node 102, the incoming signal is branched. A first signal path 106 leads to a primary or main power amplifier 108. A secondary signal path 110 is active when switches 112A and 112B are on (i.e., closed, allowing signals to pass through these switches), and inactive when switches 112A and 112B are off (i.e., open or unconnected, preventing signals from passing through these switches). When the secondary signal path 110 is active, the signal on this path passes through a phase shifter 114, which applies a 90-degree phase shift to the signal. A peak power amplifier 116 amplifies the shifted signal. A combiner 118 combines the signal paths 106 and 110 and provides the summed signal to the output node 104.

[0032] Therefore, during operation, when the power level is boosted at low power levels, switches 112A and 112B are open, and only the main power amplifier 108 is used to amplify the signal. When a gain exceeding the possible gain of the main power amplifier 108 is required, switches 112A and 112B are closed, and the peak power amplifier 116 is used to provide an additional boost to the signal, such that when the signals on paths 106 and 110 are summed, a sufficiently amplified signal appears at output node 104. To ensure that the signal paths 106 and 110 are in phase, a phase shifter 120 can be provided in the first signal path 106. It should be noted that the combiner 118 at output node 104 can be a simple shared conduction node and does not require explicit circuitry.

[0033] By design, the Doherty amplifier features a single-ended output. However, there may be situations where a differential signal is required for various reasons. Figures 1B to 1D Several possible configurations and possible variations in signal conditioning of the signal path are illustrated. It should be understood that, without explicit instructions to the contrary, aspects of this disclosure can work with any of these basic structures, regardless of which particular elements are located within which signal paths, and regardless of whether a particular portion of the path is single-ended or differential.

[0034] Figure 1BAn example of a Doherty power amplifier 100B is shown, which has a differential portion in the peak path and a driver amplifier stage in each path. More specifically, the Doherty power amplifier 100B has an input node 102 and an output node 104, the output node having a main path 126 and a peak path 128. The main path 126 has a main driver amplifier 130 and a main amplifier 132, as well as a phase shifter 134. The peak path 128 has a phase shifter 136, a single-ended to differential driver amplifier 138, a differential peak amplifier 140, and a differential to single-ended filter 142. Paths 126 and 128 are combined at the output node 104.

[0035] Figure 1C An example is illustrated of a Doherty power amplifier 100C having a differential main portion located in the main path. More specifically, the Doherty power amplifier 100C has an input node 102 and an output node 104, the output node having a main path 146 and a peak path 148. The main path 146 has a single-ended to differential drive amplifier 150, a differential main power amplifier 152, a differential to single-ended filter 154, and a phase shifter 156. The peak path 148 has a phase shifter 114, a single-ended drive amplifier 160, and a single-ended peak power amplifier 162. Paths 146 and 148 are combined at the output node 104.

[0036] Figure 1D A Doherty power amplifier 100D with a differential main path 166 and a differential peak path 168 is illustrated. More specifically, the Doherty power amplifier 100D has an input node 102 and an output node 104. The main path 166 has a single-ended drive amplifier 170, a single-ended to differential interstage matching circuit 172, a differential main power amplifier 174, and a phase shifter 175. The peak path 168 has a phase shifter 114, a single-ended drive amplifier 178, a single-ended to differential interstage matching circuit 180, and a differential peak power amplifier 182. Paths 166 and 168 are combined at a combination node 184, and a differential-to-single-ended filter 186 couples the combination node 184 to the output node 104.

[0037] Whether there are only single-ended components or some mixture of differential components, and regardless of whether there are driver amplifiers or interstage matching circuits, conventional Doherty amplifiers use phase shifters in the main path (e.g., phase shifters 120, 134, 156, and 175 for main paths 106, 126, 146, and 166, respectively).

[0038] Figure 1EA general representation of this structure is provided, in which the Doherty amplifier 100E has a main path 190 and a peak path 192. The main path has a main power amplifier 193 and a phase shifter 194, while the peak path 192 has a peak amplifier 195, and these paths are combined at node 196. For reasons explained below, an impedance transfer converter circuit 198 is provided at node 196.

[0039] Phase shifter 194 (and its associated phase shifters 120, 134, 156, and 175) is used for load modulation, specifically to place the signal in the main path 190 in the same phase as the signal in the peak path 192. In most cases, phase shifter 194 can be a transmission line of a certain length, the length of which shifts the phase of the main path 190. It is also possible to combine the transmission line with an LC circuit that applies the same phase shift.

[0040] The output of peak amplifier 195 is typically low impedance. This low impedance is used because power is more easily delivered from the power amplifier at low impedance than at higher impedance. Therefore, node 196 can be, for example, about ten ohms (10 Ω). To achieve proper impedance matching between paths 190 and 192 at node 196, phase shifter 194 (i.e., transmission line) can step down the impedance from a relatively high impedance (e.g., 40 Ω) to the low impedance at node 196 (indicated by the Z↓ symbol). While it is conceivable to have a low impedance at the output of main amplifier 193, the requirements of phase shifter 194 make this approach impractical.

[0041] In order to bring the output of the Doherty amplifier 100E back to a level suitable for use by other components in the amplifier chain, the impedance transfer converter circuit 198 typically brings the impedance step back to (indicated by the Z↑ symbol) fifty ohms.

[0042] This arrangement introduces two drawbacks. First, bandwidth is a function of the square root of the total impedance transformation, so having two impedance transformations after the main amplifier 193 limits the bandwidth. This bandwidth loss is not too problematic when the operating frequency is relatively low. However, with the increasing frequencies of emerging cellular and other wireless standards, this bandwidth loss becomes commercially impractical. Second, having these two functions after the main amplifier 193 introduces two insertion losses, which reduces efficiency.

[0043] By design, the Doherty amplifier achieves optimal efficiency when both the main amplifier 193 and the peak amplifier 195 are operating; however, the Doherty amplifier operates at average power for most of the time, meaning the peak amplifier 195 is off. Therefore, for the majority of the time, when only the main amplifier 193 is used, efficiency is reduced due to the two insertion losses. When the peak amplifier 195 operates with its individual insertion loss, efficiency improves, but again, this benefit is only available for a small fraction of the total time.

[0044] An exemplary aspect of this disclosure involves repositioning the combined node after the impedance transfer transformer so that the main path is no longer subject to the losses associated with two large impedance transfers, thereby improving the main path bandwidth and efficiency.

[0045] exist Figure 2 The first exemplary aspect illustrated here eliminates the impedance step for the combination node. Specifically, the Doherty amplifier 200 has a main path 202 and a peak path 204. The main path 202 includes a main power amplifier 206 and a phase shifter 208, which, as discussed above, can be a transmission line or a combiner line. The peak path 204 has a peak power amplifier 210 and an impedance transfer converter circuit 212, which can also perform differential-to-single-ended transfer functionality. After the impedance transfer converter circuit 212, paths 202 and 204 are combined at the combination node 214. Relatedly, the phase shifter 208 can have a uniform impedance along the length of the transmission line and can match the stepped impedance (e.g., 50 Ω) generated by the impedance transfer converter circuit 212. Now, the main path 202 has no losses from impedance transfer and only the insertion loss of the phase shifter 208, thereby improving both bandwidth and efficiency.

[0046] It should be understood that, although shown as single-ended main path 202 and differential peak path 204, Figures 1A to 1D Any arrangement and other changes shown in the diagram can still benefit from Figure 2 The arrangement.

[0047] It should be noted that the main power amplifier 206, with an output impedance of fifty ohms (50 Ω), may require a supply voltage of up to six (or higher) volts (6+V). Not every mobile computing device can provide this level of supply voltage. Therefore, alternatively, [the following can be used]. Figure 3The Doherty amplifier 300 is illustrated in the diagram. Specifically, the Doherty amplifier 300 has a main path 302 and a peak path 304. The main path 302 includes a main power amplifier 306 and a phase shifter 308, which, as discussed above, can be a transmission line or a combiner line. The peak path 304 includes a peak amplifier 310 and an impedance transfer converter circuit 312, which can also perform differential-to-single-ended transfer functionality. After the impedance transfer converter circuit 312, paths 302 and 304 are combined at a combination node 314.

[0048] and Figure 2 Compared to phase shifter 208, phase shifter 308 can also include a small impedance step. For example, combination node 314 can have an intermediate impedance of thirty-five ohms (35 Ω). Phase shifter 308 can step from a low initial impedance (e.g., 10 Ω) to this intermediate impedance. Subsequently, another small impedance transfer circuit 316 can be present to step the impedance to fifty ohms. By having two small impedance steps, the bandwidth is less affected than... Figure 1E The descending-ascending arrangement. Similarly, with... Figure 1E Compared to the previous arrangement, overall efficiency remains relatively high by using only a relatively small impedance transfer. Alternatively, the phase shifter 308 does not have an impedance function, and the main power amplifier 306 outputs to an intermediate impedance.

[0049] Figure 4 Additional details regarding the impedance transfer converter circuit 212 are provided, along with the auxiliary benefits it can offer to the differential peak power amplifier 210. Specifically, a DC bias signal is typically supplied to the peak power amplifier 210 via a large radio frequency (RF) choke. This RF choke is typically represented by an inductor. Inductors generally occupy a relatively large amount of space. However, by having a converter in the impedance transfer converter circuit 212, the opportunity to reduce or eliminate additional inductors is created. Specifically, the impedance transfer converter circuit 212 may include a primary coil (i.e., an inductor) 400 and a secondary coil (i.e., also an inductor) 402. The DC bias signal can be supplied to the peak power amplifier 210 via a center tap 404 on the primary coil 400. Similarly, the DC bias signal can be supplied to the main power amplifier via the bottom 406 of the secondary coil 402. Although not shown, the bottom 406 may need to be at AC ground. This ground can be provided by a suitable capacitor, as better explained below.

[0050] When both the peak power amplifier and the main power amplifier are differential, two center taps can be provided, such as Figure 5The Doherty amplifier 500 is illustrated in the diagram. The Doherty amplifier 500 may include a main path 502 and a peak path 504. The main path 502 has a differential main power amplifier 506 and phase shifters 508A and 508B. The peak path 504 has a differential peak power amplifier 510 and an impedance transfer converter circuit 512. Paths 502 and 504 are combined at a differential node 514. A differential-to-single-ended filter 516 is coupled to node 514 and provides a single-ended output at output node 518.

[0051] Continue to refer to Figure 5 The impedance transfer converter circuit 512 (similar to impedance transfer converter circuit 212) has a primary coil 520 and a secondary coil 522. A center tap 524 on the primary coil 520 provides a DC bias signal to the peak power amplifier 510. A center tap 526 on the secondary coil 522 provides a DC bias signal to the main power amplifier 506.

[0052] It should be noted that, according to various aspects of this disclosure, the active elements of a Doherty amplifier can impose a certain phase delay relative to the main path in the signal along the peak path. When the transform frequency (FT) is large compared to the operating frequency (OF), such delay can be considered negligible. However, modern operating frequencies are increasing and are therefore more likely to become a significant component of the FT. Therefore, these delays may be large enough to negatively impact the Doherty effect (because the signals are no longer in phase at the combination node).

[0053] Figure 6 A solution is provided for this unwanted phase shift. It should be noted that, according to various aspects of this disclosure, this complexity is not necessary for every Doherty amplifier, but this solution may be helpful to designers in certain situations. Specifically, the Doherty amplifier 600 has a main path 602 and a peak path 604. The main path 602 has a drive amplifier 608A and a main power amplifier 608B, as well as a phase shifter 610 that provides a 90-degree phase shift, as previously discussed.

[0054] Peak path 604 includes an initial phase shifter 612 that provides a 90-degree phase shift (similar to...). Figures 1A to 1D(Phase shifters 114 and 136). Peak path 604 also includes drive amplifier 614A and peak power amplifier 614B. However, instead of a direct connection between drive amplifier 614A and peak power amplifier 614B, the input of peak power amplifier 614B is inverted, effectively providing a negative 180-degree phase shift. Subsequently, tunable elements 618A and 618B are added to impedance transfer converter circuit 616, which allows the delay of the peak path to be extended to 180 degrees (a portion from the inherent delay of the active elements, and the remainder tuned by tunable elements 618A and 618B). By forcing a delay of 180 degrees and providing an effective negative 180 degrees, the phase is aligned at combination node 620. Note that capacitor 622 is added as AC ground as discussed above.

[0055] like Figure 7 As illustrated, the assignee of this disclosure also has various disclosures related to analog predistortion (APD), and any of those technologies can be added to the front-end module (FEM) 700. Specifically, the baseband circuit 702 can provide information to the transceiver circuit 704 and / or the FEM 700 (and particularly the APD linearization circuit 706). Additionally, the sensor 708 can provide information to the APD linearization circuit 706. The APD linearization circuit 706 can force the peak amplifier 710 to turn on or off, or control the bias used for the peak amplifier 710 or the main amplifier 712. Similarly, other tunable elements that can be adjusted to assist APD linearization may be present in the FEM 700.

[0056] Figure 8 and Figure 9 The Doherty method is provided for full simulation (e.g., gallium arsenide). Figure 8 This option is compared to a hybrid method (where a portion of the Doherty method is implemented in a complementary metal-oxide-semiconductor (CMOS) chip). Therefore, the APD signal can be obtained from... Figure 8 The CMOS controller 800 transmits signals to the GaAs Doherty amplifier 802, whereas the APD signal can be transmitted to the pre-drive amplifiers 900A and 900B in the CMOS controller 902. The remainder of the Doherty amplifier can be located in the GaAs chip 904.

[0057] like Figure 10 As illustrated, process 1000 provides a method for operating a Doherty amplifier according to various aspects of this disclosure. Process 1000 begins by splitting the signal into a main path and a peak path (box 1002). The peak signal is phase-shifted (box 1004), amplified (box 1006), and subsequently impedance-transformed using an impedance transfer transformer circuit (box 1008).

[0058] Simultaneously, the main signal is amplified (box 1010) and phase-shifted (box 1012). After boxes 1008 and 1012, the signals are combined (box 1014). Optionally, and not shown, additional impedance transfer can be applied. Relatedly, the impedance transformation at box 1008 occurs only on the peak signal and only when the peak path is active.

[0059] refer to Figure 11 The concepts described above can be implemented in various types of user element 1100, such as mobile terminals, smartwatches, tablet computers, computers, navigation devices, access points, and similar wireless communication devices supporting wireless communications such as cellular, wireless local area networks (WLAN), Bluetooth, and near-field communication. User element 1100 will generally include a control system 1102, a baseband processor 1104, transmitting circuitry 1106, receiving circuitry 1108, antenna switching circuitry 1110, multiple antennas 1112, and user interface circuitry 1114. In a non-limiting example, as an example, the control system 1102 may be a field-programmable gate array (FPGA) or an application-specific integrated circuit (ASIC). In this regard, the control system 1102 may include at least a microprocessor, embedded memory circuitry, and a communication bus interface. Receiving circuitry 1108 receives radio frequency signals from one or more base stations via antenna 1112 and antenna switching circuitry 1110. Low-noise amplifiers and filters in receiving circuitry 1108 cooperate to amplify and remove broadband interference from the received signals for processing. Then, a down-conversion and digitization circuit (not shown) down-converts the filtered received signal to an intermediate or baseband frequency signal, and then uses an analog-to-digital converter (ADC) to digitize the signal into one or more digital streams.

[0060] The baseband processor 1104 processes the digitized received signal to extract the information or data bits transmitted in the received signal. This processing typically includes demodulation, decoding, and error correction operations. The baseband processor 1104 is typically implemented in one or more digital signal processors (DSPs) and ASICs.

[0061] For transmission, baseband processor 1104 receives digitized data, representing voice, data, or control information, encoded by control system 1102 for transmission. The encoded data is output to transmission circuitry 1106, where a digital-to-analog converter (DAC) converts the digitally encoded data into an analog signal, and a modulator modulates the analog signal onto a carrier signal at the desired transmission frequency or multiple frequencies. A power amplifier amplifies the modulated carrier signal to a level suitable for transmission and transmits the modulated carrier signal to antenna 1112 via antenna switching circuitry 1110. Multiple antennas 1112 and replicated transmit circuitry 1106 and receive circuitry 1108 can provide spatial diversity. Those skilled in the art will understand the modulation and processing details.

[0062] It should also be noted that the operational steps described in any of the exemplary aspects herein are described to provide examples and discussion. The described operations may be performed in several different orders besides the order shown. Furthermore, the operations described in a single operational step may actually be performed in several different steps. Additionally, one or more operational steps discussed in the exemplary aspects may be combined. It should be understood that the operational steps shown in the flowcharts may undergo many different modifications, as will be apparent to those skilled in the art. Those skilled in the art will also understand that information and signals can be represented using any of a variety of different techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips referenced in the above embodiments may be represented by voltage, current, electromagnetic waves, magnetic fields or particles, light fields or particles, or any combination thereof.

[0063] The prior description of this disclosure is provided to enable any person skilled in the art to make or use it. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be given the broadest scope consistent with the principles and novel features disclosed herein. Claims (as amended under Article 19 of the Treaty) 1. A Doherty power amplifier, the Doherty power amplifier comprising: A main power amplifier having a main output terminal; A phase shifter, the phase shifter being coupled to the main output terminal and the combination node; A peak power amplifier having a peak output terminal; An inverter, which is coupled to the input of the peak power amplifier; An impedance transfer converter circuit, wherein the impedance transfer converter circuit is coupled to the peak output at the input side and coupled to the combination node at the output side; and A tuning circuit coupled to the impedance transfer converter circuit adds a delay of up to 180 degrees to the peak path of the peak power amplifier. 2. The Doherty power amplifier of claim 1, wherein the phase shifter includes a transmission line sized to provide a 90-degree phase shift. 3. The Doherty power amplifier of claim 1, wherein the phase shifter includes an LC circuit that provides a 90-degree phase shift. 4. The Doherty power amplifier of claim 1, wherein the phase shifter has an output impedance of approximately fifty ohms (50Ω). 5. The Doherty power amplifier of claim 1, wherein the phase shifter has an output impedance between 20 ohms and 40 ohms (20 Ω to 40 Ω). 6. The Doherty power amplifier of claim 5, further comprising a second impedance transfer circuit coupled to the combined node and configured to step up the impedance to approximately fifty ohms (50 Ω). 7. The Doherty power amplifier of claim 1, wherein the peak power amplifier includes a differential output terminal. 8. The Doherty power amplifier of claim 1, further comprising a DC bias of the primary coil coupled to the impedance transfer converter circuit. 9. A Doherty power amplifier, the Doherty power amplifier comprising: The main path through the main power amplifier includes a 90-degree phase shift after the main power amplifier; The peak path of the peak power amplifier has an inverting input path for the differential signal to form a negative 180-degree phase shift. The peak path includes an initial 90-degree phase shift before the peak power amplifier and at least one tunable element to add a delay to the peak path such that the negative 180-degree phase shift is canceled out. 10. The Doherty power amplifier of claim 9, wherein the at least one tunable element comprises a tunable capacitor. 11. The Doherty power amplifier of claim 10, further comprising an impedance transfer converter circuit, and the tunable capacitor being associated with the impedance transfer converter circuit. 12. The Doherty power amplifier of claim 9, further comprising a combination node, wherein the peak path includes an impedance transfer converter circuit located prior to the combination node. 13. The Doherty power amplifier of claim 12, further comprising a second impedance transfer circuit located after the combination node. 14. A method of operating a Doherty power amplifier, the method comprising: The first signal is provided through the main path, which has a main power amplifier; The first signal is phase-shifted by ninety degrees using a phase shifter located after the main power amplifier; The second signal is provided through a peak path with a peak power amplifier, wherein the second signal is a differential signal; The second signal is shifted by an initial ninety-degree phase shift before the peak power amplifier; The second signal is inverted to create a negative 180-degree phase shift; The second signal is shifted using a tunable element to add a delay to the peak path, such that the negative 180-degree phase shift is canceled out. An impedance transfer converter circuit is used to step up the impedance of the peak path; and After stepping the impedance of the peak path, the main path and the peak path are combined. 15. The method of claim 14, further comprising, after combination, providing an additional impedance step of up to approximately fifty ohms (50 Ω). 16. The method of claim 14, further comprising providing a DC bias in the peak path via the impedance transfer converter circuit. 17. The method of claim 14, further comprising DC biasing in the main path via the impedance transfer converter circuit. 18. A mobile terminal including a transceiver, the transceiver including a power amplifier stage, the power amplifier stage comprising: The Doherty power amplifier as claimed in claim 1.

Claims

1. A Doherty power amplifier, the Doherty power amplifier comprising: A main power amplifier having a main output terminal; A phase shifter, the phase shifter being coupled to the main output terminal and the combination node; A peak power amplifier having a peak output terminal; and An impedance transfer converter circuit, wherein the impedance transfer converter circuit is coupled to the peak output terminal at the input terminal side and coupled to the combined node at the output terminal side.

2. The Doherty power amplifier of claim 1, wherein the phase shifter includes a transmission line sized to provide a 90-degree phase shift.

3. The Doherty power amplifier of claim 1, wherein the phase shifter includes an LC circuit that provides a 90-degree phase shift.

4. The Doherty power amplifier of claim 1, wherein the phase shifter has an output impedance of approximately fifty ohms (50Ω).

5. The Doherty power amplifier of claim 1, wherein the phase shifter has an output impedance between 20 ohms and 40 ohms (20 Ω to 40 Ω).

6. The Doherty power amplifier of claim 5, further comprising a second impedance transfer circuit coupled to the combined node and configured to step up the impedance to approximately fifty ohms (50 Ω).

7. The Doherty power amplifier of claim 1, wherein the peak power amplifier includes a differential output terminal.

8. The Doherty power amplifier of claim 1, further comprising a DC bias of the primary coil coupled to the impedance transfer converter circuit.

9. The Doherty power amplifier of claim 1, wherein the Doherty power amplifier further comprises an inverter circuit coupled to the input terminal of the peak power amplifier.

10. The Doherty power amplifier of claim 9, further comprising a tuning circuit coupled to the impedance transfer converter circuitry, the tuning circuitry adding a delay of up to 180 degrees to the peak path of the peak power amplifier.

11. A Doherty power amplifier, the Doherty power amplifier comprising: The main path through the main power amplifier includes a 90-degree phase shift after the main power amplifier; The peak path of the peak power amplifier has an inverting input path for the differential signal to form a negative 180-degree phase shift. The peak path includes an initial 90-degree phase shift before the peak power amplifier and at least one tunable element to add a delay to the peak path such that the negative 180-degree phase shift is canceled out.

12. The Doherty power amplifier of claim 11, wherein the at least one tunable element comprises a tunable capacitor.

13. The Doherty power amplifier of claim 12, further comprising an impedance transfer converter circuit, and the tunable capacitor being associated with the impedance transfer converter circuit.

14. The Doherty power amplifier of claim 11, further comprising a combination node, wherein the peak path includes impedance transfer converter circuitry positioned prior to the combination node.

15. The Doherty power amplifier of claim 14, further comprising a second impedance transfer circuit located after the combination node.

16. A method of operating a Doherty power amplifier, the method comprising: The first signal is provided through the main path, which has a main power amplifier; The first signal is phase-shifted by ninety degrees using a phase shifter; The second signal is provided through a peak path with a peak power amplifier; An impedance transfer converter circuit is used to step up the impedance of the peak path. as well as After stepping the impedance of the peak path, the main path and the peak path are combined.

17. The method of claim 16, further comprising, after combination, providing an additional impedance step of up to approximately fifty ohms (50 Ω).

18. The method of claim 16, further comprising providing a DC bias in the peak path via the impedance transfer converter circuit.

19. The method of claim 16, further comprising DC biasing in the main path via the impedance transfer converter circuit.

20. A mobile terminal including a transceiver, the transceiver including a power amplifier stage, the power amplifier stage comprising: Doherty power amplifier, the Doherty power amplifier comprising: A main power amplifier having a main output terminal; A phase shifter, the phase shifter being coupled to the main output terminal and the combination node; A peak power amplifier having a peak output terminal; and An impedance transfer converter circuit, wherein the impedance transfer converter circuit is coupled to the peak output terminal at the input terminal side and coupled to the combined node at the output terminal side.

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