A low phase noise variable reference source circuit

Abstract

This invention discloses a low-phase-noise variable reference source circuit, comprising an input power divider circuit, a first phase-locked loop (PLL) circuit, a first filter circuit, a second PLL circuit, a second filter circuit, a harmonic generator circuit, a first filter amplifier circuit, a mixer circuit, a second filter amplifier circuit, a frequency divider circuit, and a third filter circuit. In this invention, a reference signal enters the power divider circuit, one path is sent to the PLL circuit, where it generates a 40-100MHz signal after two PLL circuits; the other path is sent to the spectrum generator circuit to generate a 1700MHz signal. After mixing by the mixer circuit, a broadband radio frequency signal of 1600-1660MHz is generated. Finally, after being divided by 16 by the frequency divider circuit, an adjustable and low-phase-noise signal of 100-110MHz is generated. This circuit is commonly used as a reference input in communication equipment (low-cost instruments, handheld radios, satellite communications), playing a crucial role in various communication devices and having a wide range of applications.

Description

Technical Field

[0001] This invention relates to the field of electronic countermeasures technology, specifically to a low-phase-noise variable reference source circuit. Background Technology

[0002] Currently, general-purpose frequency sources use a single-loop integrated phase-locked loop circuit and an independent phase detector + independent loop filter + independent voltage-controlled oscillator to build the phase-locked loop circuit.

[0003] The phase noise of a single-loop phase-locked loop circuit is limited by the phase noise parameters of the phase-locked loop device itself and the phase noise parameters of the reference signal; the phase noise of a phase-locked loop built with discrete devices is limited by the phase noise parameters of the phase detector itself and the phase noise parameters of the reference signal; both are variable reference sources that are difficult to achieve with small steps, low phase noise, and low spurious emissions.

[0004] Therefore, the purpose of this invention is to provide a low-phase-noise variable reference source circuit that improves efficiency and reduces production costs. Summary of the Invention

[0005] This invention provides a low-phase-noise variable reference source circuit that improves efficiency and reduces production costs.

[0006] The purpose of this invention is to provide a low-phase-noise variable reference source circuit, including a reference input power divider circuit, a phase-locked loop (PLL) circuit, and a comb generation circuit. The output of the reference input power divider circuit is divided into two paths: one path is sent to the PLL circuit, and the other path is sent to the comb generation circuit. The PLL circuit includes a first PLL circuit, a first filter circuit, a second PLL circuit, and a second filter circuit. The input of the first filter circuit is connected to the output of the first PLL circuit, the input of the second PLL circuit is connected to the output of the first filter circuit, and the input of the second filter circuit is connected to the output of the second PLL circuit. The comb generation circuit includes an amplifier circuit, a harmonic generation circuit, a first filter amplifier circuit, a mixer circuit, a second filter amplifier circuit, a frequency divider circuit, and a third filter circuit. The harmonic generation circuit is connected to the output of the amplifier circuit, the input of the first filter amplifier circuit is connected to the output of the harmonic generation circuit, the input of the mixer circuit is connected to the output of the first filter amplifier circuit, the input of the second filter amplifier circuit is connected to the output of the mixer circuit, the input of the frequency divider circuit is connected to the output of the second filter amplifier circuit, and the input of the third filter circuit is connected to the output of the frequency divider circuit.

[0007] Furthermore, the output frequency of the first phase-locked loop circuit is 120MHz.

[0008] Furthermore, the output frequency of the second phase-locked loop circuit is 40~100MHz.

[0009] Furthermore, the second filtering circuit is a 100MHz low-pass filter.

[0010] Furthermore, the harmonic circuit packet is the 17th harmonic of the reference signal.

[0011] Furthermore, the first filtering and amplification circuit includes a 1700MHz surface acoustic wave filter and a low phase noise amplifier, with an operating range of DC to 4GHz.

[0012] Furthermore, the mixing circuit is a double-balanced mixer, with the local oscillator and radio frequency signal operating frequencies of 1.5~4.5GHz and the intermediate frequency operating frequency of DC~1.5GHz.

[0013] Furthermore, the second filtering and amplification circuit includes a 1700MHz surface acoustic wave filter and a low phase noise amplifier, with an operating range of DC to 4GHz.

[0014] Furthermore, the frequency divider circuit is a 16-divider.

[0015] Furthermore, the third filtering circuit is a 110MHz low-pass filter.

[0016] The present invention has the following advantages: The present invention utilizes a phase-locked mixer circuit combined with a frequency divider circuit, which can not only achieve a clean spectrum with small step size, adjustable output frequency, low spurious emissions, and low phase noise, but also has a simple circuit structure. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the input power divider circuit of the present invention;

[0018] Figure 2 This is a schematic diagram of the first phase-locked loop circuit of the present invention;

[0019] Figure 3 This is a schematic diagram of the second phase-locked loop circuit of the present invention;

[0020] Figure 4 This is a schematic diagram of the second filter circuit of the present invention;

[0021] Figure 5 This is a schematic diagram of the harmonic circuit of the present invention;

[0022] Figure 6 This is a schematic diagram of the first filter amplifier circuit of the present invention;

[0023] Figure 7 This is a schematic diagram of the mixer circuit of the present invention;

[0024] Figure 8 This is a schematic diagram of the second filter amplifier circuit of the present invention;

[0025] Figure 9 This is a schematic diagram of the frequency divider circuit of the present invention;

[0026] Figure 10This is a schematic diagram of the third filter circuit of the present invention. Detailed Implementation

[0027] This invention provides a low-phase-noise variable reference source circuit, including a reference input power divider circuit, a phase-locked loop (PLL) circuit, and a comb generation circuit. The output of the reference input power divider circuit is divided into two paths: one path is sent to the PLL circuit, and the other path is sent to the comb generation circuit. The PLL circuit includes a first PLL circuit, a first filter circuit, a second PLL circuit, and a second filter circuit. The input of the first filter circuit is connected to the output of the first PLL circuit, the input of the second PLL circuit is connected to the output of the first filter circuit, and the input of the second filter circuit is connected to the output of the second PLL circuit. The comb generation circuit includes an amplifier circuit, a harmonic generation circuit, a first filter amplifier circuit, a mixer circuit, a second filter amplifier circuit, a frequency divider circuit, and a third filter circuit. The harmonic generation circuit is connected to the output of the amplifier circuit, the input of the first filter amplifier circuit is connected to the output of the harmonic generation circuit, the input of the mixer circuit is connected to the output of the first filter amplifier circuit, the input of the second filter amplifier circuit is connected to the output of the mixer circuit, the input of the frequency divider circuit is connected to the output of the second filter amplifier circuit, and the input of the third filter circuit is connected to the output of the frequency divider circuit.

[0028] In this embodiment, the output frequency of the first phase-locked loop circuit is 120MHz.

[0029] In this embodiment, the output frequency of the second phase-locked loop circuit is 40~100MHz.

[0030] In this embodiment, the second filtering circuit is a 100MHz low-pass filter.

[0031] In this embodiment, the harmonic circuit packet is the 17th harmonic of the reference signal.

[0032] In this embodiment, the first filtering and amplification circuit is a 1700MHz surface acoustic wave filter and a low phase noise amplifier, with an operating range of DC to 4GHz.

[0033] In this embodiment, the mixing circuit is a double-balanced mixer, with the local oscillator and radio frequency signal operating frequencies of 1.5~4.5GHz and the intermediate frequency operating frequency of DC~1.5GHz.

[0034] In this embodiment, the second filtering and amplification circuit includes a 1700MHz surface acoustic wave filter and a low phase noise amplifier, with an operating range of DC to 4GHz.

[0035] In this embodiment, the frequency divider circuit is a 16-divider.

[0036] In this embodiment, the third filtering circuit is a 110MHz low-pass filter.

[0037] Example 1

[0038] The reference output power divider circuit generates two equal-amplitude and equal-phase reference signals. One signal is sent to the first phase-locked loop circuit. After phase-locking, the generated signal is sent to the first filter circuit. After harmonic removal, it is sent to the second phase-locked loop circuit. After phase-locking, the generated signal is sent to the second filter circuit as the intermediate frequency signal for the mixer circuit. The other signal is sent to the amplifier circuit. After low-phase-noise amplification, it is sent to the comb generation circuit. After frequency multiplication by 17, the first filter amplifier circuit, after harmonic removal and low-phase-noise amplification, sends it to the mixer circuit. After mixing, a broadband radio frequency signal is generated. The broadband radio frequency signal is sent to the first filter amplifier circuit. After harmonic removal and low-phase-noise amplification, it is sent to the frequency divider circuit to generate an adjustable, low-spurious, and low-phase-noise output signal.

[0039] In this embodiment, a wideband signal is obtained by frequency mixing, and then the phase noise is optimized by frequency division, so that a low phase noise frequency signal is output.

[0040] Example 2

[0041] The reference output power divider circuit generates two equal-amplitude and equal-phase reference signals. One signal is sent to the first phase-locked loop circuit. After phase-locking, the generated signal is sent to the first filter circuit. After harmonic removal, it is sent to the second phase-locked loop circuit. After phase-locking, the generated signal is sent to the second filter circuit as the intermediate frequency signal for the mixer circuit. The other signal is sent to the amplifier circuit. After low-phase-noise amplification, it is sent to the comb generation circuit. After frequency multiplication by 17, the first filter amplifier circuit, after harmonic removal and low-phase-noise amplification, sends it to the mixer circuit. After mixing, a broadband radio frequency signal is generated. The broadband radio frequency signal is sent to the first filter amplifier circuit. After harmonic removal and low-phase-noise amplification, it is sent to the frequency divider circuit to generate an adjustable, low-spurious, and low-phase-noise output signal.

[0042] In this embodiment, after obtaining a 120MHz signal by integer mode phase-locking with reference to 100MHz, a broadband signal is generated by fractional mode phase-locking, so that the output signal can be switched in small steps.

[0043] Although specific embodiments of the present invention have been described in detail with reference to the accompanying drawings, this should not be construed as limiting the scope of protection of the present invention. Various modifications and variations that can be made by those skilled in the art without inventive effort within the scope described in the claims are still within the scope of protection of the present invention.

Claims

1. A low-phase-noise variable reference source circuit, comprising a reference input power divider circuit, a phase-locked loop circuit, and a comb generation circuit, characterized in that: The output of the reference input power divider circuit is divided into two paths: one path is sent to a phase-locked loop (PLL) circuit, and the other path is sent to a comb generation circuit. The PLL circuit includes a first PLL circuit, a first filter circuit, a second PLL circuit, and a second filter circuit. The input of the first filter circuit is connected to the output of the first PLL circuit, the input of the second PLL circuit is connected to the output of the first filter circuit, and the input of the second filter circuit is connected to the output of the second PLL circuit. The comb generation circuit includes an amplifier circuit, a harmonic generation circuit, a first filter amplifier circuit, a mixer circuit, a second filter amplifier circuit, a frequency divider circuit, and a third filter circuit. The harmonic generation circuit is connected to the output of the amplifier circuit, the input of the first filter amplifier circuit is connected to the output of the harmonic generation circuit, the input of the mixer circuit is connected to the output of the first filter amplifier circuit, the input of the second filter amplifier circuit is connected to the output of the mixer circuit, the input of the frequency divider circuit is connected to the output of the second filter amplifier circuit, and the input of the third filter circuit is connected to the output of the frequency divider circuit.

2. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The output frequency of the first phase-locked loop circuit is 120MHz.

3. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The output frequency of the second phase-locked loop circuit is 40~100MHz.

4. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The second filtering circuit is a 100MHz low-pass filter.

5. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The harmonic circuit package is the 17th harmonic of the reference signal.

6. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The first filtering and amplification circuit is a 1700MHz surface acoustic wave filter and a low phase noise amplifier, with an operating range of DC to 4GHz.

7. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The mixing circuit is a double-balanced mixer with a local oscillator and radio frequency operating frequency of 1.5~4.5GHz and an intermediate frequency operating frequency of DC~1.5GHz.

8. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The second filtering and amplification circuit includes a 1700MHz surface acoustic wave filter and a low phase noise amplifier, with an operating range of DC to 4GHz.

9. The low phase noise variable reference source circuit as described in claim 1, characterized in that: The frequency divider circuit is a 16-divider.

10. A low phase noise variable reference source circuit as described in claim 1, characterized in that: The third filtering circuit is a 110MHz low-pass filter.

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