An industrial computer low-power consumption computing power scheduling method and system for unmanned aerial vehicle avionics

Abstract

The application relates to the technical field of unmanned aerial vehicle avionics systems, and particularly discloses an industrial personal computer low-power consumption computing power scheduling method and system for unmanned aerial vehicle avionics, which comprises the following steps: acquiring an avionics task list of a current unmanned aerial vehicle flight stage and real-time avionics industrial personal computer information; acquiring computing power demand characteristics of multiple avionics tasks according to the avionics task list; acquiring an actual available power consumption budget vector according to the real-time avionics industrial personal computer information; acquiring a power consumption quota of each avionics task according to the computing power demand characteristics and the actual available power consumption budget vector; generating candidate scheduling information according to the power consumption quota, and generating a scheduling instruction according to the candidate scheduling information. The avionics task list of the current unmanned aerial vehicle flight stage and the real-time avionics industrial personal computer information are acquired first, so that the task set to be scheduled at present and the industrial personal computer operation state can be determined.

Description

Technical Field

[0001] This invention relates to the field of unmanned aerial vehicle (UAV) avionics system technology, and in particular to a low-power computing power scheduling method and system for industrial control computers used in UAV avionics. Background Technology

[0002] With the rapid development of UAV technology, avionics systems, as a core component of UAVs, undertake multiple key functions such as flight control, navigation and positioning, communication links, and mission payload management. Avionics systems typically run on embedded industrial computer platforms, with multiple heterogeneous processor cores collaboratively completing the real-time scheduling and execution of various avionics tasks. During UAV missions, the avionics industrial computer needs to operate continuously and stably under limited power supply conditions, which places extremely high demands on the system's power consumption management.

[0003] However, existing UAV avionics industrial control computers still have the following shortcomings in computing power scheduling: First, most existing power management strategies adopt a static allocation method, that is, a fixed power consumption quota is pre-allocated to each task during the system design phase. This cannot be dynamically adjusted according to changes in flight phase and real-time load fluctuations, resulting in insufficient utilization of computing resources when power supply margin is sufficient, and difficulty in ensuring the execution requirements of critical tasks when power supply is tight. Second, existing scheduling methods usually only consider power consumption constraints in a single dimension, ignoring the comprehensive impact of multiple factors such as power quality fluctuations, interference coupling between tasks, and core-level power consumption differences on scheduling effectiveness, making it difficult to achieve fine-grained power consumption control in complex avionics operating environments. At the same time, existing task scheduling and frequency adjustment often operate independently, lacking a collaborative optimization mechanism between power consumption quotas and tasks, and between core frequency levels. This results in large power consumption deviations in actual execution of the scheduling scheme, failing to accurately meet the computing power requirements under low power consumption constraints. Summary of the Invention

[0004] The purpose of this invention is to provide a low-power computing scheduling method and system for industrial control computers used in UAV avionics, so as to solve the technical problems mentioned in the background art.

[0005] To achieve the above objectives, the present invention provides the following technical solution: A low-power computing power scheduling method for industrial control computers used in UAV avionics includes: Obtain the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase; The computing power requirement characteristics of multiple avionics tasks are obtained based on the avionics task list; The actual available power consumption budget vector is obtained based on the real-time avionics and industrial control computer information. The power consumption quota for each avionics mission is obtained based on the computing power demand characteristics and the actual available power consumption budget vector. Candidate scheduling information is generated based on the power consumption quota, and scheduling instructions are generated based on the candidate scheduling information.

[0006] Preferably, the step of obtaining the computing power requirement characteristics of multiple avionics tasks based on the avionics task list includes: Obtain the historical execution records of each avionics task from the avionics task list; Based on the historical execution records, obtain the instruction execution information for each scheduling cycle, and obtain the instruction type distribution ratio sequence based on the instruction execution information; The cache access logs for each scheduling cycle are obtained based on the historical execution records, and the cache access hit rate sequence is obtained based on the cache access logs. Based on the historical execution records, obtain the data transmission logs for each scheduling cycle, and obtain the data throughput peak sequence based on the data transmission logs; The CPU demand vector is obtained based on the instruction type distribution ratio sequence; The memory bandwidth requirement is obtained based on the data throughput peak sequence. The maximum allowable delay for each scheduling cycle is obtained based on the historical execution records. The performance requirement factor for each period is obtained based on the cache access hit rate sequence, and the minimum requirement frequency is obtained based on the performance requirement factor. The computing power demand characteristics are obtained by integrating the CPU demand vector, memory bandwidth demand, maximum allowable latency, and minimum required frequency.

[0007] Preferably, the step of obtaining the actual available power consumption budget vector based on the real-time avionics and industrial control computer information includes: The power supply fluctuation rate is obtained based on the real-time avionics and industrial control computer information, and the power supply stability coefficient is obtained based on the power supply fluctuation rate. The command throughput fluctuation characteristics are obtained based on the real-time avionics and industrial control computer information, and the predicted power consumption upper limit is obtained based on the command throughput fluctuation characteristics. The total predicted power consumption limit is obtained based on the predicted power consumption limit. The upper limit of power supply correction power consumption is obtained based on the power supply stability coefficient and the upper limit of total predicted power consumption. The actual available power budget vector is obtained based on the power supply correction power limit and the stage power budget vector.

[0008] Preferably, the step of obtaining the power supply correction power limit based on the power supply stability coefficient and the total predicted power consumption limit includes: The preset nominal power supply stability value is obtained based on the real-time avionics and industrial control computer information, and the power supply quality evaluation value is obtained based on the ratio of the power supply stability coefficient to the preset nominal power supply stability value. The rated thermal design power of the processor is obtained based on the real-time avionics and industrial control computer information, and the load scaling factor is obtained based on the ratio of the total predicted power consumption limit to the rated thermal design power of the processor. The coupling scaling factor is obtained based on the power quality assessment value and the load scaling factor. The upper limit of power consumption correction is obtained based on the coupling scaling factor.

[0009] Preferably, the step of obtaining the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector includes: The computing power demand fluctuation value of each avionics task is obtained based on the computing power demand characteristics, and the demand discrete gradient is obtained based on the computing power demand fluctuation value. The initial reserved margin share is obtained based on the demand discrete gradient. The available allocation vector is obtained based on the actual available power consumption budget vector and the initial reserved margin share, and the allocation quotas for each type of task are obtained in order of the criticality level of the avionics task. The actual power consumption per unit time of various tasks in the previous scheduling cycle is obtained according to the hierarchical allocation quota, and the quota surplus deviation is obtained according to the difference between the actual power consumption sample value and the hierarchical allocation quota. The feedback correction coefficient is obtained based on the quota surplus deviation, and the feedback replenishment amount is obtained based on the feedback correction coefficient; Based on the hierarchical allocation quota and the feedback supply amount, the power consumption quota for each avionics task under various missions is obtained by allocating the quota according to the weights.

[0010] Preferably, the step of allocating the power consumption quota for each avionics task according to the weighted allocation of the tiered allocation quota and the feedback supply amount to each avionics task under various mission types, and obtaining the power consumption quota for each avionics task, includes: The total amount to be allocated for each type of task is obtained based on the hierarchical allocation quota and feedback supply, and the single task demand intensity is obtained based on the computing power demand characteristics of each avionics task within its category. The demand squeeze ratio among similar tasks is obtained based on the single task demand intensity, and an interference correction factor is obtained based on the demand squeeze ratio. The corrected demand weight is obtained based on the single task demand intensity and interference correction factor, and the initial quota value of each avionics task is obtained based on the proportion of the corrected demand weight in the total amount to be allocated. The remaining power consumption capacity of each avionics mission core is obtained based on the initial quota value, and the margin determination result is obtained based on the remaining power consumption capacity. The power consumption quota for each avionics mission is obtained based on the margin determination result and the initial quota value.

[0011] Preferably, the step of generating candidate scheduling information based on the power consumption quota and generating scheduling instructions based on the candidate scheduling information includes: The time slot capacity of each processor core in the current scheduling cycle is obtained according to the power consumption quota, and the coupling degree evaluation value between the task and the core is obtained according to the time slot capacity and the computing power requirement characteristics of each avionics task. Candidate scheduling schemes are generated by sorting the coupling degree evaluation values ​​from high to low. The migration cost of each avionics task at the candidate core level is obtained according to the candidate scheduling scheme, and the dynamic migration cost threshold is obtained according to the power consumption quota. When the migration cost is lower than the dynamic migration cost threshold, the scheduling pairing of the task at the candidate core level is retained, and the filtered candidate scheduling scheme is obtained. The overlapping set of execution time windows of each core-level bound task is obtained according to the filtered candidate scheduling scheme, and the core-level conflict density is obtained according to the overlapping set of execution time windows. When the conflict density exceeds the preset conflict threshold, the conflicting tasks are migrated to the candidate core with the second best coupling degree in order of the coupling degree evaluation value from low to high, and the scheduling scheme after conflict resolution is obtained. The total power consumption of each core-level bound task set is obtained according to the scheduling scheme after conflict resolution. The core-level quota residual is obtained according to the difference between the total power consumption and the corresponding component of the power consumption quota at each core level. Vector normalization processing is performed on the core-level quota residual to obtain the target DVFS frequency level of each core. Based on the target DVFS frequency level and the scheduling scheme after conflict resolution, obtain the task core binding information and core frequency setting information, and merge them to generate scheduling instructions.

[0012] This invention also discloses a low-power computing scheduling system for industrial control computers used in UAV avionics, comprising: The information acquisition module is used to acquire the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase. The computing power requirement feature acquisition module is used to acquire the computing power requirement features of multiple avionics tasks based on the avionics task list. The actual available power consumption budget vector acquisition module is used to acquire the actual available power consumption budget vector based on the real-time avionics and industrial control computer information. The power consumption quota acquisition module is used to acquire the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector. The instruction generation module is used to generate candidate scheduling information based on the power consumption quota, and to generate scheduling instructions based on the candidate scheduling information.

[0013] The present invention also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps of a low-power computing power scheduling method for industrial control computers used in UAV avionics.

[0014] The present invention also provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program, when executed by a processor, implements the steps of a low-power computing power scheduling method for industrial control computers used in UAV avionics. The beneficial effects of this application are as follows: First, the present invention obtains the avionics task list and real-time avionics industrial control computer information of the current UAV flight phase, thereby clarifying the current task set to be scheduled and the operating status of the industrial control computer; then, it extracts the computing power demand feature vector from dimensions such as instruction type distribution, cache access hit rate, data throughput peak and maximum allowable latency; then, it dynamically determines the total amount of power consumption that the system can actually use within the current scheduling cycle by combining power supply fluctuations, processor load level and stage power consumption budget; on this basis, it allocates power consumption according to the task criticality level and demand characteristics, ensuring the reliability of critical task execution while making full use of the available power margin; finally, it coordinates the power consumption quota with task binding and core frequency adjustment for optimization, and generates the optimal scheduling instruction under power consumption constraints through coupling degree evaluation, migration cost filtering, conflict resolution and DVFS frequency level setting, thereby realizing low-power and high-efficiency computing power scheduling under limited power supply conditions. Attached Figure Description

[0015] Figure 1 This is a schematic diagram of a method flow according to an embodiment of this application.

[0016] Figure 2 This is a schematic diagram of the system structure according to an embodiment of this application.

[0017] Figure 3 This is a schematic diagram of the internal structure of a computer device according to an embodiment of this application.

[0018] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation

[0019] It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0020] like Figure 1 As shown, this application provides a low-power computing power scheduling method for industrial control computers used in UAV avionics, including: S1. Obtain the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase; S2. Obtain the computing power requirement characteristics of multiple avionics tasks based on the avionics task list; S3. Obtain the actual available power consumption budget vector based on the real-time avionics and industrial control computer information; S4. Obtain the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector; S5. Generate candidate scheduling information based on the power consumption quota, and generate scheduling instructions based on the candidate scheduling information.

[0021] As described in steps S1-S5 above, during the UAV's flight mission, the avionics industrial control computer needs to simultaneously run multiple avionics tasks, such as flight control, inertial navigation calculation, communication link management, sensor data fusion, and mission load management. These tasks have significantly different computational resource requirements at different flight phases. For example, during takeoff and landing, flight control tasks have extremely high requirements for latency and reliability, requiring priority to ensure their computational power supply; while during cruise, the load of navigation and communication tasks is relatively stable, allowing the system to allocate more power margin to tasks such as data processing and load management. Existing power scheduling methods typically employ static allocation strategies, which cannot adapt to load fluctuations caused by changes in flight phases. This results in critical tasks not being adequately guaranteed when power supply conditions are limited, or non-critical tasks not being able to fully utilize computational resources when power supply margins are sufficient. Therefore, this invention first obtains the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase. This clarifies the complete set of tasks that need to be scheduled at the current phase, as well as the real-time power supply, temperature, load, and other operating status parameters of the industrial control computer, providing real-time operating status parameters for multi-dimensional computational demand analysis and power budget assessment.

[0022] Next, the computing power requirement characteristics of multiple avionics tasks are obtained based on the avionics task list. The computing power requirement of each avionics task is quantified from multiple dimensions such as instruction execution mode, cache access behavior, data transmission capability and real-time constraints, so as to provide accurate demand input for power consumption quota allocation.

[0023] Then, based on the real-time avionics and industrial control computer information, the actual available power consumption budget vector is obtained. Combining the power supply system's fluctuation characteristics, the predicted power consumption upper limit of each processor core, and the preset stage power consumption budget, among other constraints, the total amount of power actually available to the system in each power consumption dimension within the current scheduling cycle is dynamically determined. During the UAV's flight, the power supply system may experience voltage and current fluctuations due to factors such as battery aging, sudden load changes, or ambient temperature variations. These fluctuations directly affect the actual power supply available to the industrial control computer. This invention generates a power supply correction power consumption upper limit by coupling the power supply stability coefficient with the predicted power consumption upper limit. This upper limit is then compared dimension-by-dimensionally with the stage power consumption budget vector, taking the smaller value. This ensures that the final determined actual available power consumption budget vector does not exceed the actual supply capacity of the power supply system and does not exceed the preset stage power consumption upper limit, thereby guaranteeing that the subsequent power allocation scheme is executable under actual operating conditions.

[0024] Subsequently, based on the computing power demand characteristics and the actual available power consumption budget vector, the power consumption quota for each avionics task is obtained. Within the total system power consumption constraint, the available power consumption is allocated hierarchically, taking into account the computing power demand intensity, critical level priority, demand fluctuation characteristics, and interference coupling effects between similar tasks. Specifically, firstly, a reasonable power consumption reserve is determined through demand discrete gradient analysis to avoid the risk of power overruns due to task load fluctuations; then, power is allocated level by level according to task criticality to ensure that high-priority tasks receive priority in power supply; subsequently, a feedback correction mechanism is used to compensate for the deviation between the actual power consumption and allocated quota of various tasks in the previous scheduling cycle, achieving adaptive optimization of power allocation across cycles; finally, at the task level, by considering the demand squeeze effect between similar tasks and the core-level power margin constraint, the total quota of various tasks is precisely allocated to each avionics task, generating a refined power consumption quota scheme that takes into account both global power consumption constraints and local task requirements.

[0025] Finally, candidate scheduling information is generated based on the power consumption quota, and scheduling instructions are generated based on the candidate scheduling information. The allocation result of the power consumption quota is transformed into a directly executable scheduling action, including the binding relationship between avionics tasks and processor cores and the DVFS frequency setting of each core. This invention quantifies and sorts the compatibility between tasks and cores through coupling degree evaluation values ​​to generate initial candidate scheduling schemes. Then, by comparing migration costs with dynamic migration cost thresholds, scheduling pairs with excessive migration overhead are filtered out to avoid additional power consumption caused by frequent task migrations. Furthermore, by detecting and resolving core-level conflict density, scheduling conflicts caused by overlapping execution time windows of tasks on the same core are eliminated. Finally, by vector normalization processing of core-level quota residuals, the power consumption deviation is accurately mapped to the target DVFS frequency setting of each core to generate a complete scheduling instruction composed of task core binding information and core frequency setting information, realizing the conversion of power consumption quotas into hardware execution actions.

[0026] In one embodiment, step S2, which involves obtaining the computing power requirement characteristics of multiple avionics tasks based on the avionics task list, includes: S201. Obtain the historical execution record of each avionics task according to the avionics task list; S202. Obtain instruction execution information for each scheduling cycle based on the historical execution records, and obtain the instruction type distribution ratio sequence based on the instruction execution information; S203. Obtain the cache access logs for each scheduling cycle based on the historical execution records, and obtain the cache access hit rate sequence based on the cache access logs; S204. Obtain the data transmission logs for each scheduling cycle based on the historical execution records, and obtain the data throughput peak sequence based on the data transmission logs; S205. Obtain the CPU demand vector based on the instruction type distribution ratio sequence; S206. Obtain the memory bandwidth requirement based on the data throughput peak sequence; S207. Obtain the maximum allowable delay for each scheduling cycle based on the historical execution records; S208. Obtain the performance requirement factor for each period based on the cache access hit rate sequence, and obtain the minimum requirement frequency based on the performance requirement factor. S209. The computing power demand characteristics are obtained by integrating the CPU demand vector, memory bandwidth demand, maximum allowable latency and minimum demand frequency.

[0027] As described in steps S201-S209 above, the present invention obtains the historical execution record of each avionics task based on the avionics task list. The historical execution record traces the detailed operating data of each avionics task in past scheduling cycles, providing a data source for extracting computing power demand characteristics. The historical execution record may include instruction execution statistics collected by the processor performance counter within each scheduling cycle, access and hit logs of various levels of cache, data transmission throughput logs recorded by the memory controller, and end-to-end latency measurement data of each task.

[0028] Next, instruction execution information for each scheduling cycle is obtained based on the historical execution records. Then, an instruction type distribution ratio sequence is obtained based on the instruction execution information. The number and distribution ratio of different types of instructions (including arithmetic logic instructions, floating-point operation instructions, memory access instructions, branch jump instructions, etc.) executed within each scheduling cycle are analyzed to quantitatively characterize the utilization pattern of avionics tasks on each functional unit of the processor. That is, the instruction type distribution ratio sequence records the proportion of each type of instruction executed within each scheduling cycle to the total number of instructions. This sequence can reflect the computationally intensive or memory-intensive characteristics of the task, providing a basis for subsequently obtaining the CPU demand vector. For example, floating-point operation instructions typically account for a high proportion in flight control tasks, indicating a strong dependence on floating-point operation units; while memory access instructions account for a high proportion in communication link management tasks, indicating a greater pressure on the memory subsystem.

[0029] Then, based on the historical execution records, cache access logs for each scheduling cycle are obtained, and a cache access hit rate sequence is derived from these logs. The number of accesses and hits at each level of cache within each scheduling cycle is statistically analyzed, and the cache access hit rate sequence is calculated to reflect the cache utilization efficiency of the avionics task during execution. The cache hit rate is a key indicator for measuring the pressure of a task on the processor cache subsystem: a high cache hit rate indicates that the task's working set data can effectively reside in the cache, the processor can obtain the required data from the cache, the dependence on main memory bandwidth is low, and the operating frequency can be appropriately reduced to save power; a low cache hit rate indicates that the task frequently experiences cache misses and requires frequent access to main memory, in which case the processor operating frequency needs to be increased to compensate for the performance loss caused by memory access latency. The cache access hit rate sequence will provide crucial input for subsequently obtaining the performance requirement factor and minimum required frequency.

[0030] Subsequently, data transmission logs for each scheduling cycle are obtained based on the historical execution records. Data throughput peak sequences are then obtained from these logs, and the data transmission rates between the processor and memory, and between the processor and peripherals, are recorded within each scheduling cycle. The peak throughput values ​​within each cycle are extracted to reflect the peak bandwidth requirements of avionics tasks on the data path. In avionics systems, tasks such as sensor data fusion and image processing typically require processing large amounts of data in a short period, generating high data throughput peaks. These peak demands directly affect the power consumption of the memory controller and interconnect bus, and are important criteria for assessing memory bandwidth requirements.

[0031] Next, a CPU demand vector is obtained based on the instruction type distribution ratio sequence. The proportional relationships of various types of instructions in the instruction type distribution ratio sequence are mapped to a demand intensity vector of each functional unit of the processor, quantifying the avionics mission's demand for CPU computing resources in various dimensions. For example, the CPU demand vector may include integer operation demand components, floating-point operation demand components, SIMD vector operation demand components, and branch prediction demand components, etc. The value of each component is determined by the average distribution ratio of the corresponding type of instruction in the historical scheduling cycle. The CPU demand vector can provide accurate demand references for subsequent assessment of the coupling degree between tasks and cores and the setting of core frequency levels.

[0032] Then, the memory bandwidth requirement is obtained based on the data throughput peak sequence. The maximum value or weighted average of the data throughput peak sequence within a preset window is used to determine the upper limit of the bandwidth requirement of the avionics mission on the memory subsystem. The memory bandwidth requirement is an important constraint for evaluating whether a mission can be assigned to a specific processor core. When the available bandwidth of the memory controller of a certain core is lower than the memory bandwidth requirement of the mission, assigning the mission to that core may lead to serious performance degradation and power waste.

[0033] Simultaneously, based on the historical execution records, the maximum permissible delay for each scheduling cycle is obtained. The maximum end-to-end delay value for each avionics task in meeting real-time constraints during historical scheduling cycles is then statistically analyzed to determine the upper limit of delay constraints for each task in subsequent scheduling. In avionics systems, safety-critical tasks such as flight control and inertial navigation have strict real-time requirements. Their maximum permissible delay is typically explicitly defined by flight safety standards or system design specifications, and is a hard constraint that cannot be violated in scheduling decisions. This maximum permissible delay directly affects the calculation of the minimum required frequency and the feasibility determination of scheduling pairing between tasks and core components.

[0034] Furthermore, performance requirement factors are obtained for each period based on the cache access hit rate sequence, and a minimum required frequency is obtained based on these performance requirement factors. The performance requirement factors are obtained by calculating the inverse weighted average of the hit rates for each period in the cache access hit rate sequence, used to quantify the cache pressure's demand on processor frequency. This transforms the cache access hit rate sequence into a performance requirement factor that quantifies the minimum processor frequency required for the avionics mission to maintain its target performance level under current cache pressure conditions. Specifically, the performance requirement factor can be obtained as follows: the inverse weighted average of the hit rates for each period in the cache access hit rate sequence is taken as a cache pressure indicator, and then the cache pressure indicator is mapped to the corresponding performance requirement factor according to a preset performance-frequency mapping model. The minimum required frequency is a lower limit of the processor operating frequency determined jointly by the performance requirement factor and the maximum allowable latency. When the actual processor operating frequency is lower than this minimum required frequency, the avionics mission will not be able to complete execution within the maximum allowable latency, potentially leading to a violation of real-time constraints. The minimum required frequency provides an insurmountable lower limit for the subsequent setting of DVFS frequency levels.

[0035] Specifically, the process of obtaining the performance requirement factor is as follows: The reciprocal of the hit rate in each period of the cache access hit rate sequence is taken (the lower the hit rate, the larger the reciprocal value, indicating greater cache pressure). A weighted average is then calculated using a time-decay method (i.e., recent data is given higher weight) to obtain a comprehensive index characterizing the cache pressure level. This index is then normalized by dividing it by the cache pressure benchmark value determined during the system calibration phase (i.e., the benchmark cache pressure index obtained under known standard load). The larger this factor, the greater the current cache pressure and the higher the demand for processor frequency. Determining the minimum required frequency requires satisfying two constraints simultaneously: firstly, a cache pressure constraint, i.e., determining the minimum operating frequency to meet cache performance requirements based on the performance requirement factor through a preset performance-frequency mapping relationship (this mapping relationship is based on the instruction throughput characteristics of the processor microarchitecture, calibrated through micro-benchmark tests, recording the correspondence between the processor's cache access capability and instruction processing capability at different operating frequencies); secondly, a real-time constraint, i.e., the processor operating frequency needs to be high enough to ensure that the worst execution time of the avionics mission at that frequency does not exceed its maximum allowable latency. The final minimum required frequency is the larger of the frequencies corresponding to the two constraints mentioned above, ensuring that both cache performance requirements and real-time constraints are met.

[0036] Finally, the CPU demand vector, memory bandwidth demand, maximum allowable latency, and minimum required frequency are integrated into a computing power demand feature vector, which serves as the input for power consumption quota allocation and scheduling scheme generation.

[0037] In one embodiment, the step of obtaining the actual available power consumption budget vector based on the real-time avionics and industrial control computer information includes: S301. Obtain the power supply fluctuation rate based on the real-time avionics and industrial control computer information, and obtain the power supply stability coefficient based on the power supply fluctuation rate; S302. Obtain command throughput fluctuation characteristics based on the real-time avionics and industrial control computer information, and obtain the predicted power consumption upper limit based on the command throughput fluctuation characteristics; S303. Obtain the total predicted power consumption limit based on the predicted power consumption limit; S304. Obtain the power supply correction power limit based on the power supply stability coefficient and the total predicted power consumption limit; S305. Obtain the actual available power budget vector based on the power supply correction power consumption upper limit and the stage power consumption budget vector.

[0038] As described in steps S301-S305 above, this invention obtains the power supply volatility based on the real-time avionics and industrial control computer information, and obtains the power supply stability coefficient based on the power supply volatility. It also collects voltage and current fluctuation data of the power supply system in real time and calculates the power supply volatility to quantitatively characterize the stability of the current power supply system. During UAV flight, the power supply system may experience fluctuations in output voltage and current due to factors such as decreased battery state of charge, changes in ambient temperature, and sudden increases or decreases in high-power loads. The power supply volatility can be defined as the ratio of the standard deviation to the mean of the power supply voltage or current within a preset sampling window; a larger volatility indicates a more unstable power supply. When obtaining the power supply stability coefficient based on the power supply volatility, an inverse proportional mapping method can be used, i.e., a larger power supply volatility corresponds to a smaller power supply stability coefficient, indicating a lower tolerance for power consumption by the power supply system, requiring a greater reduction in the power consumption budget. The power supply stability coefficient incorporates the real-time stability status of the power supply system into the power consumption budget calculation process, avoiding system crashes or abnormal restarts caused by allocating power according to the rated power consumption when the power supply is unstable.

[0039] Next, the instruction throughput fluctuation characteristics are obtained based on the real-time avionics and industrial control computer information. Based on these characteristics, a predicted power consumption upper limit is obtained. The instruction throughput fluctuation of each processor core in the nearest scheduling cycle is analyzed to predict the peak load level that each core may experience in the current scheduling cycle, and the predicted power consumption upper limit for each core is determined accordingly. That is, the instruction throughput fluctuation characteristics can be characterized by calculating the mean and standard deviation of the instruction throughput of each core in each cycle over the most recent N scheduling cycles. A larger standard deviation indicates more severe fluctuations in instruction throughput, and the predicted power consumption upper limit should be higher to reserve power margin to cope with sudden load increases. The predicted power consumption upper limit can be obtained by adding a certain number of times the standard deviation to the mean. Specifically, the predicted power consumption upper limit equals the power consumption value corresponding to the mean instruction throughput of the most recent N cycles plus the power compensation value corresponding to K times the standard deviation, where K is a preset margin coefficient that can be configured according to the reliability level requirements of the avionics system. The predicted power consumption upper limit reflects the typical power consumption level of each core and also reserves a reasonable margin for load fluctuations. The value of N for the near N cycles is determined according to the real-time requirements of the avionics mission, and can usually be taken as 5 to 10 scheduling cycles. The margin coefficient K is a parameter that can be configured according to the reliability level of the avionics system. The value range is generally 0 to 3. The higher the reliability level requirement, the larger the value of K is, so as to reserve a larger power consumption margin to cope with the sudden increase in load.

[0040] Then, based on the predicted power consumption limit, the total predicted power consumption limit is obtained. The predicted power consumption limits of each processor core are summed to obtain the total predicted power consumption limit of the entire avionics and industrial control computer within the current scheduling cycle. The total predicted power consumption limit is an important input parameter for subsequent calculation of the power supply correction power consumption limit. It represents the maximum power consumption that the system as a whole may experience after considering the load fluctuations of each core.

[0041] Subsequently, based on the power supply stability coefficient and the total predicted power consumption limit, a power supply correction power consumption limit is obtained. The stability state of the power supply system is coupled with the total predicted power consumption limit to calculate the actual power consumption correction limit that the system can withstand under the current power supply conditions. That is, when the power supply stability coefficient is high (power supply stable), the power supply correction power consumption limit can be close to the total predicted power consumption limit, indicating that the power supply system can support the power consumption of the system under the predicted load level; when the power supply stability coefficient is low (power supply fluctuation is large), the power supply correction power consumption limit needs to be reduced accordingly to prevent system anomalies when power supply fluctuations cause instantaneous power shortages. The method for obtaining the power supply correction power consumption limit is detailed in the subsequent descriptions of embodiments S3041-S3044.

[0042] Finally, the actual available power budget vector is obtained based on the power supply correction power limit and the stage power budget vector. The power supply correction power limit is compared dimension-by-dimensionally with the preset stage power budget vector, and the smaller value among the components of each dimension is taken as the component of the actual available power budget vector. This ensures that the final determined power budget does not exceed the actual supply capacity of the power supply system and does not exceed the stage power budget vector preset according to the flight stage. The stage power budget vector is preset according to the power management strategy of each flight stage of the UAV and includes the budget limit for each power dimension (such as each processor core, memory subsystem, I / O subsystem, etc.). By taking the smaller value dimension by dimension, the truly available power budget for the system in each power dimension within the current scheduling cycle can be determined under the dual constraints of power supply constraints and stage budget constraints, providing a total constraint for power quota allocation.

[0043] It should be noted that the actual available power consumption budget vector is a multi-dimensional vector, whose dimensions correspond to the number of heterogeneous processor cores and the main power consumption domains of the avionics and industrial control computer. Specifically, it may include: power consumption budget components corresponding to each processor core, power consumption budget components of the memory subsystem, and power consumption budget components of the I / O subsystem. Taking an avionics and industrial control computer with N processor cores as an example, this vector is (N+2) dimensional, where the first N dimensions correspond to the power consumption budgets of cores 0 to N-1, the N+1th dimension corresponds to the power consumption budget of the memory controller, and the N+2th dimension corresponds to the power consumption budget of the I / O controller. The "dimensional comparison" means that for each dimension component of this vector, the value of the power supply correction power limit in the corresponding dimension is compared with the value of the stage power consumption budget vector in the corresponding dimension, and the smaller value is taken as the actual available power consumption budget for that dimension.

[0044] In one embodiment, step S304, which involves obtaining the power supply correction power limit based on the power supply stability coefficient and the total predicted power consumption limit, includes: S3041. Obtain a preset nominal power supply stability value based on the real-time avionics and industrial control computer information, and obtain a power supply quality evaluation value based on the ratio of the power supply stability coefficient to the preset nominal power supply stability value. S3042. Obtain the rated thermal design power of the processor based on the real-time avionics and industrial control computer information, and obtain the load scaling factor based on the ratio of the total predicted power consumption limit to the rated thermal design power of the processor. S3043. Obtain the coupling scaling coefficient based on the power quality assessment value and the load scaling factor; S3044. Obtain the upper limit of power supply correction power consumption based on the coupling scaling factor.

[0045] As described in steps S3041-S3044 above, this invention obtains a preset nominal power supply stability value based on the real-time avionics and industrial control computer information, and obtains a power supply quality assessment value based on the ratio of the power supply stability coefficient to the preset nominal power supply stability value. The current power supply stability coefficient is then normalized and compared with the preset nominal power supply stability value during system design to obtain an assessment value reflecting the degree of deviation of the current power supply quality from the design benchmark. The nominal power supply stability value is the nominal stability coefficient of the power supply system under normal operating conditions of the avionics and industrial control computer, usually determined by power supply network simulation or experimental testing during the system design phase. When the ratio of the power supply stability coefficient to the nominal power supply stability value is close to 1, it indicates that the current power supply quality is basically consistent with the design expectation, and the power supply quality assessment value is close to 1; when the ratio is significantly less than 1, it indicates that the current power supply quality is worse than the design expectation, the power supply quality assessment value is correspondingly reduced, and a greater reduction in the power consumption budget is needed subsequently. The power supply quality assessment value quantifies the actual quality state of the power supply system into a scaling factor that can be used for subsequent calculations.

[0046] Specifically, the nominal power supply stability value is the benchmark value of the power supply stability coefficient determined by the avionics and industrial control computer during the system design or factory calibration phase. It is typically obtained through power supply network simulation or experimental testing under standard operating conditions, representing the stability level the power supply system should achieve under normal operating conditions. The power supply quality assessment value is obtained by comparing the current actual power supply stability coefficient with this nominal stability value, and then truncating the result to its upper limit, resulting in a normalized assessment value reflecting the degree of deviation of the current power supply quality from the design benchmark. When the power supply quality assessment value is close to one, it indicates that the current power supply quality is basically consistent with the design expectation, and the power supply system is in good condition. When the value is significantly less than one, it indicates that the power supply quality is worse than the design expectation, and further reduction in the power consumption budget is needed to prevent insufficient power supply from causing system anomalies. The power supply quality assessment value quantifies the actual quality state of the power supply system into a scaling factor that can be used for subsequent calculations.

[0047] Next, the rated thermal design power (TDP) of the processor is obtained based on the real-time avionics and industrial control computer information. Then, the load scaling factor is obtained based on the ratio of the total predicted power consumption limit to the processor's rated TDP. The total predicted power consumption limit of the system is compared with the processor's rated TDP to quantify the current system load level relative to the processor's designed full load level. The processor's rated TDP is the power consumption value corresponding to the maximum heat dissipation required by the cooling system under continuous full load operation conditions, as specified by the processor manufacturer. It represents the upper limit of the processor's sustainable power consumption within the design specifications. When the ratio of the total predicted power consumption limit to the rated TDP is close to 1, it indicates that the current system load is close to the processor's designed full load level, and the load scaling factor is close to 1, indicating limited room for power budget reduction. When the ratio is significantly less than 1, it indicates that the current system load is far below the processor's designed full load level, and the load scaling factor is small, meaning the system has more power margin available to cope with power supply fluctuations. The load scaling factor incorporates the processor's current load state into the calculation process of the power supply correction upper limit.

[0048] Then, a coupling scaling coefficient is obtained based on the power quality assessment value and the load scaling factor. The power quality assessment value and the load scaling factor are coupled to comprehensively reflect the joint constraint effect of power system stability and processor load level on the power budget. Specifically, the coupling scaling coefficient can be obtained in the following ways: by assigning preset weight coefficients to the power quality assessment value and the load scaling factor respectively, and then performing a weighted sum to obtain the coupling scaling coefficient; or by multiplying the two, taking the product of the power quality assessment value and the load scaling factor as the coupling scaling coefficient. When the power quality assessment value is low (unstable power supply) and the load scaling factor is high (system load is close to full load), the coupling scaling coefficient is small, indicating that the system faces significant power supply pressure and requires a substantial reduction in the power budget; conversely, when the power quality assessment value is high (stable power supply) and the load scaling factor is low (light system load), the coupling scaling coefficient is large, indicating that the system has sufficient power margin and the power budget can be appropriately relaxed. The coupling scaling coefficient achieves coordinated optimization of power supply status and load status.

[0049] Finally, the power supply correction power limit is obtained based on the coupling scaling factor. This factor is then multiplied by the total predicted power limit, or applied to each dimension of the stage power budget vector to obtain the power supply correction power limit after considering power quality and processor load level. This power supply correction power limit represents the maximum power consumption that the system can sustainably operate under the current power supply conditions, providing a corrected power limit reference value for subsequent dimension-by-dimensional comparisons with the stage power budget vector.

[0050] In one embodiment, step S4, which involves obtaining the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector, includes: S401. Obtain the computing power demand fluctuation value of each avionics task according to the computing power demand characteristics, obtain the demand discrete gradient according to each computing power demand fluctuation value, and obtain the initial reserved margin share according to the demand discrete gradient. S402. Obtain the available allocation vector based on the actual available power consumption budget vector and the initial reserved margin share, and obtain the hierarchical allocation quotas for each type of task in order of the critical level of the avionics task. S403. Obtain the actual power consumption sampling value per unit time of various tasks in the previous scheduling cycle according to the hierarchical allocation quota, and obtain the quota surplus deviation according to the difference between the actual power consumption sampling value and the hierarchical allocation quota. S404. Obtain a feedback correction coefficient based on the quota surplus deviation, and obtain a feedback replenishment amount based on the feedback correction coefficient; S405. Based on the hierarchical allocation quota and the feedback supply amount, the power consumption quota of each avionics task under various missions is allocated according to the weight, so as to obtain the power consumption quota of each avionics task.

[0051] As described in steps S401-S405 above, the present invention obtains the computing power demand fluctuation value of each avionics task based on the computing power demand characteristics, obtains the demand discrete gradient based on each computing power demand fluctuation value, obtains the initial reserved margin share based on the demand discrete gradient, normalizes the demand discrete gradient to the [0,1] interval, and then analyzes the degree of fluctuation of computing power demand of each avionics task in the historical scheduling cycle according to the preset linear mapping relationship to quantify the overall load uncertainty level of the system. That is, the computing power demand fluctuation value can be obtained by calculating the standard deviation or coefficient of variation of each dimension component of the computing power demand characteristics of each avionics task within the historical scheduling period; the demand discrete gradient is a system-level demand dispersion index obtained by normalizing and aggregating the computing power demand fluctuation values ​​of each avionics task, reflecting the degree of fluctuation of the overall system load. The demand discrete gradient can be calculated as follows: First, the computing power demand fluctuation value of each avionics task is normalized by maximum-minimum, mapping the normalized fluctuation value of each task to the [0,1] interval; then, the normalized fluctuation value of all avionics tasks is weighted and averaged, with the weights allocated according to the criticality level of each task. The higher the criticality level of the task, the greater the weight of its fluctuation value in the aggregation, thus obtaining the demand discrete gradient reflecting the uncertainty level of the overall system load. Specifically, the initial reserved margin share is obtained through a linear mapping function, and the initial reserved margin share calculation formula is: ; in, To reserve an initial surplus share, This is the gradient scaling factor. It is the basic margin coefficient, and ,satisfy When the demand dispersion gradient is high, it indicates that the computing power requirements of each avionics mission fluctuate significantly, and the system load is highly uncertain. In this case, a larger power consumption margin should be reserved to cope with sudden load increases, so the initial reserved margin should be larger. Conversely, when the demand dispersion gradient is low, it indicates that the computing power requirements of each avionics mission are relatively stable, and the system load is highly predictable. In this case, a smaller power consumption margin can be reserved, and more power consumption can be used for actual mission allocation. A reasonable initial reserved margin setting strikes a balance between the determinism and flexibility of power consumption allocation, avoiding the risk of power consumption overruns due to demand fluctuations.

[0052] Specifically, the computing power demand fluctuation value reflects the variation amplitude of each dimension component of the computing power demand characteristics of each avionics task during the historical scheduling cycle. It is obtained by calculating the dispersion index of each dimension separately and then weighting and aggregating them according to the importance of each dimension's impact on power consumption. The demand dispersion gradient is a comprehensive index obtained by aggregating the computing power demand fluctuation values ​​of all avionics tasks at the system level. Its meaning is to reflect the overall load uncertainty level of the system. The larger the value, the more severe the load fluctuation of each task in the system, and the more power consumption margin needs to be reserved to cope with sudden load changes. The initial reserved margin share is converted into a reservation ratio by normalizing the demand dispersion gradient and according to a preset linear mapping relationship. At the same time, an upper limit is set for this reservation ratio to avoid excessive conservatism and waste of power consumption resources.

[0053] Next, based on the actual available power consumption budget vector and the initial reserved margin share, an available allocation vector is obtained. Then, according to the criticality level of the avionics tasks, the allocation quotas for each type of task are obtained sequentially. The power consumption quota corresponding to the initial reserved margin share is deducted from the actual available power consumption budget vector to obtain the truly usable allocation vector for avionics task allocation. Finally, a hierarchical allocation is performed according to the task criticality level, prioritizing the power supply for critical tasks within the limited power consumption budget. That is, the criticality level of the avionics tasks can be divided into multiple levels based on the degree of impact of the task on flight safety, such as: Level 1 critical tasks (core tasks directly related to flight safety, such as flight control and inertial navigation), Level 2 important tasks (tasks that have a significant impact on task execution, such as communication link management and sensor data fusion), and Level 3 general tasks (non-real-time tasks such as data logging and payload management). It should be noted that the criticality level ranking of the avionics tasks is preset static configuration information, determined during the system design phase based on the functional safety integrity level or task criticality analysis results of the avionics tasks, and used as input parameters for the scheduling method. In avionics and industrial control systems, tasks are typically categorized into three levels: Level 1 are safety-critical tasks, including flight control and inertial navigation calculations, the failure of which directly impacts flight safety; Level 2 are mission-critical tasks, including communication link management and sensor data fusion, the failure of which affects mission completion; Level 3 are general tasks, including non-real-time tasks such as data logging and payload management. Each avionics task carries an identifier indicating its critical level in the task list. During the hierarchical allocation process, for example, avionics tasks are categorized by critical level... There are several levels (L≥2), and the set of tasks for level 1 is... The sum of the components of each dimension of the computational power requirement feature vector for all tasks within this set is First, allocate power consumption quotas to Level 1 (the highest critical level, such as core tasks directly related to flight safety, like flight control and inertial navigation): ; in, Allocate power consumption quotas to Level 1, and then allocate the remaining power consumption quotas. As the total allocatable amount for Level 2 tasks (such as communication link management, sensor data fusion, and other tasks that have a significant impact on task execution), the level-by-level allocation quota for Level 2 is as follows: ; And so on, the... The allocation quotas for tasks at each level are as follows: ; The hierarchical allocation mechanism ensures that high-priority tasks are fully guaranteed when power consumption budget is limited, while low-priority tasks (such as data logging, load management and other non-real-time tasks) are flexibly allocated based on the remaining power consumption margin.

[0054] Then, based on the hierarchical allocation quota, the actual power consumption sampling value per unit time for each type of task in the previous scheduling cycle is obtained. The quota surplus deviation is obtained based on the difference between the actual power consumption sampling value and the hierarchical allocation quota. The execution deviation of the power allocation scheme is detected by comparing the difference between the actual power consumption of each type of task in the previous scheduling cycle and the allocated quota. When the actual power consumption sampling value of a certain type of task is lower than its hierarchical allocation quota, the quota surplus deviation is positive, indicating that this type of task has a surplus of power consumption quota, and the excess can be fed back to the system power pool for use by other tasks. When the actual power consumption sampling value of a certain type of task is higher than its hierarchical allocation quota, the quota surplus deviation is negative, indicating that this type of task has a shortage of power consumption quota, and supplementation needs to be obtained from the system power pool. The calculation of the quota surplus deviation establishes a power allocation feedback mechanism across scheduling cycles, realizing adaptive optimization of the power allocation scheme.

[0055] Subsequently, a feedback correction coefficient is obtained based on the quota surplus deviation, and a feedback replenishment amount is obtained based on the feedback correction coefficient. The quota surplus deviation is then converted into a feedback correction coefficient to quantify the contribution or demand of various tasks to the system power consumption pool. That is, the feedback correction coefficient can be obtained by normalizing the quota surplus deviation of various tasks. A positive value indicates that the task contributes a power consumption quota to the system power consumption pool, while a negative value indicates that the task needs to obtain a power consumption quota from the system power consumption pool. Specifically, the power consumption quota calculation formula is: , in, For power consumption, , This refers to the quota surplus deviation for task type l. Quotas are allocated in a tiered manner. This represents the actual power consumption sampled per unit time for task type l during the previous scheduling cycle. The feedback supply amount is calculated based on the feedback correction coefficient and the hierarchical allocation quota for each type of task. Categories with a positive feedback correction coefficient will contribute power consumption based on the product of the feedback correction coefficient and the hierarchical allocation quota, while categories with a negative feedback correction coefficient will receive power consumption replenishment based on the same product. The sum of the feedback supply amounts for each type of task should satisfy the power conservation constraint to ensure that the feedback correction process does not introduce additional power consumption. The calculation of the feedback supply amount achieves dynamic rebalancing of power consumption quotas among different types of tasks, improving power utilization. The specific calculation method for the feedback supply amount is as follows: First, the quota surplus deviations of all types of tasks are accumulated to obtain the total surplus at the system level. If the total surplus is positive, it indicates that there is an overall power surplus, and the surplus is allocated proportionally according to the categories with negative feedback correction coefficients. If the total surplus is negative, the insufficient amount is reduced proportionally according to the positive feedback correction coefficient of each type of task. By first calculating the global deviation and then feeding back or reducing it proportionally, it is naturally ensured that the sum of the feedback and replenishment amounts for various tasks is zero, satisfying the power conservation constraint and not introducing additional consumption.

[0056] Finally, based on the hierarchical allocation quota and the feedback supply amount, the power consumption quota for each avionics task under each type of mission is allocated according to weights, resulting in a power consumption quota for each avionics task. The hierarchical allocation quota and feedback supply amount for each type of mission are then combined to obtain the total amount to be allocated for each type of mission. Then, within each type of mission, the power consumption quota is weighted according to the demand characteristics and interference correction factor of each avionics task to accurately map the category-level power consumption quota to the mission level. The specific method of weighted allocation is detailed in the subsequent descriptions of embodiments S4051-S4055. It should be noted that after the mission-level quota is determined, the remaining power consumption capacity of the processor core where each avionics task is located also needs to be checked and adjusted. Specifically, if the initial quota value... No more than the remaining power consumption capacity of the core Then the power consumption quota for this avionics mission is directly taken as... ;like Exceed Then the power consumption quota will be adjusted as follows: , in, This is a margin compromise factor, which will simultaneously reduce the difference. The power consumption quota for each avionics task is then fed back to other similar tasks with sufficient capacity for secondary allocation. This hierarchical checking and dynamic adjustment of capacity constraints ensures that the power consumption quota for each avionics task meets the fairness of category-level allocation while not exceeding the power consumption capacity limit of its respective processor core.

[0057] Specifically, the computing power demand fluctuation value reflects the variation range of computing power demand characteristics of each avionics task in the historical scheduling cycle. It is obtained by calculating the dispersion index (such as the coefficient of variation, i.e., the ratio of standard deviation to mean) of each dimension component of the computing power demand feature vector, and then weighting and aggregating them according to the importance of each dimension's impact on power consumption. The larger the computing power demand fluctuation value of a task, the more unstable its load, and the more power consumption margin the system needs to reserve for it. The demand dispersion gradient is a comprehensive index obtained by aggregating the computing power demand fluctuation values ​​of all avionics tasks at the system level. It reflects the uncertainty level of the overall system load. The larger this value, the more drastic the load fluctuation of each task in the system, and the more power consumption margin needs to be reserved to cope with sudden load changes. The initial reserve margin share is obtained by normalizing the demand dispersion gradient and converting it into a reserve ratio according to a preset linear mapping relationship. An upper limit for this reserve ratio is set to avoid wasting power consumption resources due to excessive conservatism. In the hierarchical allocation phase, the available allocation vector is first obtained by deducting the initial reserved margin from the actual available power consumption budget. Then, quota allocation is performed hierarchically according to the criticality level of avionics tasks (tasks directly related to flight safety, such as flight control and inertial navigation, are the highest priority; tasks with significant impact on task execution, such as communication link management and sensor data fusion, are the next highest priority; and non-real-time tasks, such as data logging and payload control, are the lowest priority). This ensures that high-priority tasks are fully guaranteed when the power consumption budget is limited, while low-priority tasks are flexibly allocated based on the remaining power consumption margin. The feedback correction mechanism compares the deviation between the actual power consumption of various tasks in the previous scheduling cycle and the allocated quota. The surplus quota is fed back to the system power pool for use by other tasks, and the insufficient part is supplemented from the system power pool. This achieves adaptive optimization of power allocation across scheduling cycles. Subsequently, a feedback correction coefficient is obtained based on the quota surplus deviation, and the feedback replenishment amount is obtained based on the feedback correction coefficient. The quota surplus deviation is converted into a feedback correction coefficient to quantify the contribution or demand of various tasks to the system power pool. That is, the feedback correction coefficient can be obtained by normalizing the quota surplus deviation of various tasks. A positive value indicates that the task contributes a power consumption quota to the system power consumption pool, while a negative value indicates that the task needs to obtain a power consumption quota from the system power consumption pool. Specifically, the power consumption quota calculation formula is as follows: , in, For power consumption, , This refers to the quota surplus deviation for task type l. Quotas are allocated in a tiered manner. This represents the sampled actual power consumption per unit time for task type l in the previous scheduling cycle. The feedback replenishment amount is calculated based on the feedback correction coefficient and the hierarchical allocation quota for each type of task. Categories with a positive feedback correction coefficient will contribute power consumption based on the product of the feedback correction coefficient and the hierarchical allocation quota, while categories with a negative feedback correction coefficient will receive power replenishment based on the same product. The sum of the feedback replenishment amounts for each type of task should satisfy the power conservation constraint to ensure that the feedback correction process does not introduce additional power consumption. The calculation of the feedback replenishment amount achieves dynamic rebalancing of power consumption quotas among different types of tasks, improving power utilization, eliminating the deviation between quotas and actual consumption, and bringing the power consumption deviation during the cycle to near zero, thus achieving adaptive optimization and stable closed-loop control of power allocation across scheduling cycles.

[0058] In one embodiment, step S405, which involves allocating power consumption quotas for each avionics task under various mission categories according to the weighted allocation of the tiered allocation quotas and the feedback supply amount, includes: S4051. Obtain the total amount to be allocated for each type of task based on the hierarchical allocation quota and feedback supply amount, and obtain the single task demand intensity based on the computing power demand characteristics of each avionics task within its category. S4052. Obtain the demand squeeze degree among similar tasks based on the single task demand intensity, and obtain the interference correction factor based on the demand squeeze degree. S4053. Obtain the corrected demand weight based on the single task demand intensity and interference correction factor, and obtain the initial quota value of each avionics task based on the proportion of the corrected demand weight in the total amount to be allocated. S4054. Obtain the remaining power consumption capacity of the core where each avionics mission is located based on the initial quota value, and obtain the margin determination result based on the remaining power consumption capacity. S4055. Based on the margin determination result and the initial quota value, obtain the power consumption quota for each avionics mission.

[0059] As described in steps S4051-S4055 above, the present invention obtains the total amount to be allocated for each type of task based on the hierarchical allocation quota and the feedback supply amount, and obtains the single task demand intensity based on the computing power demand characteristics of each avionics task within its category. In this way, by superimposing the hierarchical allocation quota of each type of task with the feedback supply amount obtained for that type, the total amount to be allocated for each type of task in the current scheduling cycle is obtained. Then, the relative demand intensity of each avionics task within its category is analyzed to provide a basis for weight allocation. The higher the demand intensity, the more urgent the demand for power consumption quota of the task.

[0060] Specifically, the single-task demand intensity reflects the relative urgency of a particular avionics task within its category. This is achieved by ratioing the magnitude of the task's computing power demand feature vector (the square root of the sum of the squares of all its components, representing the overall scale of the task's computing power demand) to the mean magnitude of the computing power demand feature vectors of all tasks in the same category. When this ratio is greater than one, it indicates that the task's computing power demand intensity is higher than the average level of tasks in the same category, and it should be given a higher weight in power consumption allocation. When the ratio is less than one, it indicates that the task's demand intensity is lower than the average level of tasks in the same category, and its power consumption allocation weight can be appropriately reduced.

[0061] Next, the demand squeeze degree among similar tasks is obtained based on the single-task demand intensity, and an interference correction factor is obtained based on the demand squeeze degree. The demand competition relationship among avionics tasks within the same category is analyzed to quantify the impact of interference coupling effects between tasks on power allocation. Specifically, the demand squeeze degree can be obtained by calculating the difference between the single-task demand intensity of each avionics task and the single-task demand intensity of other similar tasks. The larger the difference, the more significant the demand squeeze effect between this task and other tasks. The interference correction factor is calculated based on the demand squeeze degree and a preset interference coefficient. When the demand squeeze degree is high, the interference correction factor increases accordingly, indicating that the additional power consumption caused by interference coupling among similar tasks needs to be considered when allocating power for this task. When the demand squeeze degree is low, the interference correction factor is close to 1, indicating that the impact of interference coupling effects among similar tasks on power allocation is small. The interference correction factor incorporates the coupling interference effect between tasks into the power quota calculation process, improving the accuracy of the power allocation scheme.

[0062] Specifically, the demand squeeze ratio reflects the demand competition relationship among avionics tasks within the same category. It is calculated as the average of the absolute values ​​of the differences between the single-task demand intensity of a particular task and the single-task demand intensity of other tasks in the same category. A larger value indicates a more significant demand difference between the task and other tasks in the same category, meaning the task faces a more pronounced squeeze effect in power allocation. The interference correction factor is obtained by nonlinearly transforming the demand squeeze ratio through a smooth mapping function (such as a bounded monotonically increasing function) and then superimposing it onto a reference value. Specifically, the interference correction factor can be calculated using the following formula: ; in, This represents the interference correction factor corresponding to the i-th task. This represents the demand squeeze level corresponding to this task; The preset demand compression threshold is used to define whether the compression degree is significant; This is a smoothing coefficient used to control the steepness of the mapping curve; This represents the maximum permissible increment of the interference correction factor. The function graph of this formula is a typical Sigmoid curve, with its range smoothly confined within... Between. When demand is squeezed Far below the benchmark threshold hour, A value approaching 1 indicates that there is almost no interference or coupling between similar tasks; as the squeezing intensity increases, It gradually increases and eventually approaches its upper limit. This imposes a limited additional power consumption overhead caused by competition among similar tasks on the power consumption quota calculation. When the demand difference between similar tasks is small, the interference correction factor is close to one, indicating that the interference coupling effect between similar tasks has almost no impact on power allocation; when the demand difference is large, the interference correction factor increases, indicating that the additional power consumption overhead caused by interference coupling between similar tasks needs to be considered when allocating power consumption for this task.

[0063] Then, based on the single-task demand intensity and interference correction factor, the corrected demand weight is obtained. The initial quota value for each avionics task is then obtained based on the proportion of the corrected demand weight in the total to be allocated. The single-task demand intensity is multiplied by the interference correction factor to obtain the corrected demand weight. Considering the interference coupling effect between tasks, the corrected demand weight is then obtained. Next, the corrected demand weight of each avionics task is divided by the sum of the corrected demand weights of all avionics tasks of the same type to obtain the proportion of each avionics task in the total to be allocated. This proportion is then multiplied by the total to be allocated to obtain the initial quota value for each avionics task. The initial quota values ​​obtained in this way reflect both the relative demand intensity of each task and consider the interference coupling effect between tasks of the same type, ensuring the rationality of the allocation.

[0064] Subsequently, the remaining power consumption capacity of the core containing each avionics task is obtained based on the initial quota value. A margin determination result is then obtained based on this remaining power consumption capacity. The difference between the allocated power consumption quota of each processor core in the current scheduling cycle and the core-level power consumption limit is checked to determine the remaining power consumption capacity of each core and whether each core has sufficient power consumption margin to accept new tasks. Specifically, the margin determination result can be obtained as follows: the initial quota value of each avionics task is compared with the remaining power consumption capacity of its core. If the initial quota value is less than or equal to the remaining power consumption capacity of the core, the margin determination result is "sufficient margin," and the initial quota value of the avionics task can be directly used as its final power consumption quota. If the initial quota value is greater than the remaining power consumption capacity of the core, the margin determination result is "insufficient margin," and the power consumption quota of the avionics task needs to be reduced and adjusted to ensure that it does not exceed the core-level power consumption constraint.

[0065] Finally, based on the margin determination results and the initial quota value, the power consumption quota for each avionics task is obtained. Then, depending on the type of margin determination result, the initial quota value is confirmed or adjusted to obtain the final power consumption quota for each avionics task. When the margin determination result is "sufficient margin," the initial quota value is directly used as the power consumption quota for that avionics task. When the margin determination result is "insufficient margin," the power consumption quota for that avionics task is adjusted to a weighted average between the core's remaining power capacity and the initial quota value, or the power consumption quota for that avionics task is reduced to the core's remaining power capacity, and the difference is fed back to other tasks of the same type with sufficient margin for secondary allocation. Through hierarchical checking and dynamic adjustment of margin constraints, this ensures that the power consumption quota for each avionics task satisfies category-level allocation fairness while not exceeding the power capacity limit of its respective processor core.

[0066] In one embodiment, step S5, which generates candidate scheduling information based on the power consumption quota and generates scheduling instructions based on the candidate scheduling information, includes: S501. Obtain the time slot capacity of each processor core in the current scheduling cycle according to the power consumption quota, and obtain the coupling degree evaluation value between the task and the core according to the time slot capacity and the computing power requirement characteristics of each avionics task, and generate candidate scheduling schemes by sorting the coupling degree evaluation values ​​from high to low. S502. Obtain the migration cost of each avionics task at the candidate core level according to the candidate scheduling scheme, and obtain the dynamic migration cost threshold according to the power consumption quota. When the migration cost is lower than the dynamic migration cost threshold, retain the scheduling pairing of the task at the candidate core level to obtain the filtered candidate scheduling scheme. S503. Obtain the execution time window overlap set of each core-level bound task according to the filtered candidate scheduling scheme, and obtain the core-level conflict density according to the execution time window overlap set. When the conflict density exceeds the preset conflict threshold, migrate the conflicting tasks to the candidate core with the second best coupling degree in order of the coupling degree evaluation value from low to high, and obtain the scheduling scheme after conflict resolution. S504. Obtain the total power consumption of each core-level bound task set according to the scheduling scheme after conflict resolution, and obtain the core-level quota residual according to the difference between the total power consumption and the corresponding component of the power consumption quota at each core level. Perform vector normalization processing on the core-level quota residual to obtain the target DVFS frequency level of each core. S505. Obtain the task core binding information and core frequency setting information according to the target DVFS frequency level and the scheduling scheme after conflict resolution, and merge them to generate a scheduling instruction.

[0067] As described in steps S501-S505 above, this invention obtains the time slot capacity of each processor core in the current scheduling cycle based on the power consumption quota, and obtains the coupling degree evaluation value between the task and the core based on the time slot capacity and the computing power requirement characteristics of each avionics task. Candidate scheduling schemes are generated by sorting the coupling degree evaluation values ​​from high to low, thus converting the power consumption quota of each avionics task into the time slot capacity of each processor core in the current scheduling cycle, thereby transforming the power consumption constraint into a time-dimensional scheduling constraint. The time slot capacity refers to the total time length that each core can use to execute avionics tasks within the power consumption quota constraint in the current scheduling cycle. Subsequently, by calculating the coupling degree evaluation value between each avionics task and each processor core, the degree of adaptation between the task and the core can be quantified. That is, the coupling degree evaluation value can be obtained by combining whether the time slot capacity of each core meets the requirements of each dimension of the task's computing power requirements (including whether each component of the CPU demand vector matches the core's functional unit configuration, whether the memory bandwidth requirement is within the available bandwidth range of the core's memory controller, whether the minimum required frequency is within the core's frequency adjustment range, etc.), and then weighting and summing the matching degree of each dimension to obtain the coupling degree evaluation value between the task and the core. The higher the coupling degree evaluation value, the better the adaptability between the task and the core, and the better the performance-power ratio can be obtained by scheduling the task to the core level for execution. The weights of each item in the weighted summation are determined as follows: the weight of the CPU demand vector matching degree is set as the basic weight. The weight of the memory bandwidth requirement matching degree is set to The weights for satisfying the maximum allowable delay constraint are set as follows: The weight of the minimum demand frequency matching degree is set to And satisfy The default values ​​for each weight can be configured differently based on the computationally intensive, memory-intensive, or real-time-sensitive characteristics of avionics tasks. For example, for real-time tasks such as flight control, the default values ​​can be increased. The proportion of [something] can be increased for data processing tasks. and The weight of each task-core pair is determined by its coupling evaluation value, from highest to lowest. Candidate scheduling schemes are then generated to provide initial solutions for subsequent scheduling optimization.

[0068] Next, the migration cost of each avionics task at the candidate core level is obtained according to the candidate scheduling scheme, and a dynamic migration cost threshold is obtained according to the power consumption quota. When the migration cost is lower than the dynamic migration cost threshold, the scheduling pairing of the task at the candidate core level is retained, resulting in a filtered candidate scheduling scheme. The migration cost of each avionics task migrating from its current core to a candidate core is calculated to quantify the negative impact of task migration on system performance and power consumption. The migration cost may include refresh overhead for cache context invalidation and reconstruction, overhead for transferring task state data, and scheduling latency that may occur during the migration process. The dynamic migration cost threshold is dynamically calculated based on the power consumption quota. When the power consumption quota is relatively abundant, the dynamic migration cost threshold can be set higher to allow more task migrations to obtain a better scheduling scheme; when the power consumption quota is relatively tight, the dynamic migration cost threshold should be set lower to limit unnecessary task migrations to avoid additional power consumption overhead. Specifically, the dynamic migration cost threshold can be calculated using the following formula: ; in, This is the threshold for dynamic migration cost. The preset baseline migration cost threshold, This represents the total actual available power consumption budget of the system across all dimensions during the current scheduling period. This represents the nominal total power consumption budget of the system under standard power supply conditions. When the actual available total power consumption budget is higher than the nominal value, the dynamic migration cost threshold increases accordingly, allowing more tasks to participate in migration optimization; conversely, the threshold is lowered to restrict migration behavior and save power consumption. By comparing the migration cost with the dynamic migration cost threshold, scheduling pairs with excessive migration costs are filtered out, while effective scheduling pairs with lower migration costs are retained, resulting in filtered candidate scheduling schemes. This approach balances scheduling optimization effectiveness and migration overhead.

[0069] Then, based on the filtered candidate scheduling schemes, the overlapping set of execution time windows for each core-level bound task is obtained, and the core-level conflict density is obtained based on the overlapping set of execution time windows. When the conflict density exceeds a preset conflict threshold, the conflicting tasks are migrated to the candidate cores with the second-best coupling in order of increasing coupling evaluation value, and a scheduling scheme after conflict resolution is obtained. The overlapping execution time windows of each processor core-level bound task are then detected to identify potential execution conflicts in the scheduling scheme. That is, the overlapping set of execution time windows refers to the set of task pairs whose expected execution time windows overlap among multiple avionics tasks bound to the same core level. The core-level conflict density is the ratio of the number of conflicting task pairs in the overlapping set of execution time windows to the total number of bound tasks at that core level, reflecting the severity of the core-level scheduling conflict. When the core-level conflict density exceeds the preset conflict threshold, it indicates that the scheduling conflict at that core level has exceeded an acceptable range and conflict resolution is required. The preset conflict threshold is a system-configurable parameter, typically ranging from 0 to 1. This threshold can be set according to the avionics system's requirements for scheduling determinism: for safety-critical systems, the conflict threshold can be set to 0, meaning no overlapping execution time windows are allowed, ensuring strict time-division isolation; for non-safety-critical systems, the conflict threshold can be set to a value between 0.2 and 0.3 to achieve a balance between scheduling efficiency and conflict tolerance. This threshold is read from the configuration file during system initialization. The conflict resolution strategy is to migrate the conflicting tasks with the lowest coupling to the current core to the second-best alternative core-level execution in the coupling evaluation ranking, in order of increasing coupling evaluation value. This eliminates core-level execution conflicts while minimizing scheduling adaptability loss. Through successive conflict resolution, a scheduling scheme after conflict resolution is obtained, ensuring that there are no conflicts in the execution time dimension for each core-level task.

[0070] Subsequently, the total power consumption of each core-level bound task set is obtained according to the conflict-resolved scheduling scheme. The core-level quota residual is then obtained based on the difference between the total power consumption and the corresponding component of the power consumption quota at each core level. Vector normalization is performed on the core-level quota residual to obtain the target DVFS frequency level for each core. The total power consumption of all avionics tasks bound to each core level is calculated and compared with the power consumption component corresponding to each core in the power consumption quota to obtain the power consumption deviation for each core. That is, the core-level quota residual is the difference between the total power consumption and the component of the power consumption quota at the corresponding core level. A positive value indicates that the total power consumption requirement of the core-level bound task exceeds the allocated power consumption quota, requiring a reduction in core frequency to decrease power consumption; a negative value indicates that the total power consumption requirement of the core-level bound task is lower than the allocated power consumption quota, indicating a power margin, allowing for an appropriate increase in core frequency to improve task execution performance. By performing vector normalization on the core-level quota residuals of each core, the power consumption deviation of each core is mapped to a standardized adjustment vector. Then, based on this adjustment vector and the set of DVFS frequency levels supported by the processor, the target DVFS frequency level for each core is obtained. That is, when the core-level quota residual is positive, the target DVFS frequency level of the core is adjusted downward to a frequency level that matches the normalized adjustment amount; when the core-level quota residual is negative, the target DVFS frequency level of the core is adjusted upward to a frequency level that matches the normalized adjustment amount, but it must not exceed the frequency level corresponding to the core's highest available frequency level and the minimum required frequency. The DVFS frequency level setting driven by the core-level quota residual achieves precise linkage between power consumption quotas and core frequencies.

[0071] Finally, based on the target DVFS frequency level and the conflict-resolved scheduling scheme, task core binding information and core frequency setting information are obtained and merged to generate scheduling instructions. This process combines the binding relationship between avionics tasks and processor cores with the target DVFS frequency level of each core to generate scheduling instructions. These instructions contain two core pieces of information: first, task core binding information, which is a binding mapping table showing which processor core each avionics task is assigned to for execution in the current scheduling cycle; and second, core frequency setting information, which is the DVFS frequency level that each processor core should be set to in the current scheduling cycle. These scheduling instructions can be directly sent to the avionics industrial control computer's operating system scheduler and hardware frequency adjustment module for execution, thereby realizing the conversion from power consumption quota allocation schemes to hardware execution actions and completing the entire low-power computing scheduling process.

[0072] Specifically, the time slot capacity refers to the total time that each processor core can use to execute avionics tasks within the current scheduling cycle under the current power consumption quota constraint. Its value is determined by multiplying the power consumption quota allocated to the core by the maximum power consumption of the core at the current frequency level by the scheduling cycle length. The scheduling cycle length can be set according to the real-time requirements of the avionics system. The coupling degree evaluation value between the task and the core is obtained by comprehensively considering two aspects: first, the feature matching degree between the computing power demand feature vector of the task and the computing power supply capability vector of the core (including parameters such as core operating frequency, number of vector operation units, cache capacity, and available memory bandwidth); second, the capacity matching degree between the core's time slot capacity and the expected execution time requirement of the task. The two are weighted and fused according to preset weights. The larger the coupling degree evaluation value, the better the adaptability between the task and the core. Regarding migration cost assessment, the cost of migrating a task from the current core to a candidate core includes the overhead of cache context invalidation and reconstruction, address translation buffer refresh, and task state data transfer. The dynamic migration cost threshold is dynamically adjusted based on the sufficiency of the current power quota. When the power quota is relatively abundant, more tasks are allowed to migrate to obtain a better scheduling scheme. In terms of conflict resolution, the system detects whether the execution time windows of tasks bound to the same core overlap. When the conflict density exceeds a preset threshold, tasks with poor compatibility among the conflicting tasks are selected in order of increasing coupling evaluation value, and attempted to migrate to candidate cores with the second-best coupling, until the core-level conflict density drops to an acceptable range. Finally, regarding DVFS (Dynamic Voltage and Frequency Scaling) frequency setting, the system calculates the deviation between the total power demand of the task set bound to each core and its allocated power quota. By normalizing the deviation values ​​of all cores, the power deviation is mapped to the frequency adjustment direction and magnitude of each core. Positive deviations correspond to frequency reduction operations to decrease power consumption, while negative deviations correspond to frequency increase operations to improve task execution performance. The scheduling instructions are ultimately sent to the hardware execution layer through the operating system's processor affinity setting interface and frequency adjustment subsystem, completing the conversion from power consumption quota allocation scheme to hardware execution action.

[0073] like Figure 2 As shown, the present invention also provides a low-power computing power scheduling system for industrial control computers used in UAV avionics, comprising: The information acquisition module is used to acquire the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase. The computing power requirement feature acquisition module is used to acquire the computing power requirement features of multiple avionics tasks based on the avionics task list. The actual available power consumption budget vector acquisition module is used to acquire the actual available power consumption budget vector based on the real-time avionics and industrial control computer information. The power consumption quota acquisition module is used to acquire the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector. The instruction generation module is used to generate candidate scheduling information based on the power consumption quota, and to generate scheduling instructions based on the candidate scheduling information.

[0074] like Figure 3 As shown, this application also provides a computer device, which can be a server, and its internal structure can be as follows: Figure 3 As shown, the computer device includes a processor, memory, network interface, and database connected via a system bus. The processor provides computing and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system, computer programs, and database. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The database stores all data required for the process of a low-power computing scheduling method for UAV avionics. The network interface communicates with external terminals via a network connection. When the computer program is executed by the processor, it implements the low-power computing scheduling method for UAV avionics.

[0075] Those skilled in the art will understand that Figure 3 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer equipment on which the present application is applied.

[0076] An embodiment of this application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements any of the above-described low-power computing scheduling methods for UAV avionics.

[0077] Those skilled in the art will understand that all or part of the processes in the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium. When executed, the computer program can include the processes of the embodiments of the above methods. Any references to memory, storage, databases, or other media used in this application and in the embodiments can include non-volatile and / or volatile memory. Non-volatile memory can include read-only memory (ROM), programmable ROM (PROM), electrically programmable ROM (EPROM), electrically erasable programmable ROM (EEPROM), or flash memory. Volatile memory can include random access memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), dual data rate SDRAM (SSRSDRAM), enhanced SDRAM (ESDRAM), synchronous link DRAM (SLDRAM), RAMbus direct RAM (RDRAM), direct memory bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).

[0078] In this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, apparatus, article, or method that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, apparatus, article, or method. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, apparatus, article, or method that includes that element.

[0079] The above description is only a preferred embodiment of the present invention and does not limit the patent scope of the present invention. Any equivalent results or equivalent process transformations made based on the content of the present invention specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of the present invention.

Claims

1. A low-power computing power scheduling method for industrial control computers used in UAV avionics, characterized in that, include: Obtain the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase; The computing power requirement characteristics of multiple avionics tasks are obtained based on the avionics task list; The actual available power consumption budget vector is obtained based on the real-time avionics and industrial control computer information. The power consumption quota for each avionics mission is obtained based on the computing power demand characteristics and the actual available power consumption budget vector. Candidate scheduling information is generated based on the power consumption quota, and scheduling instructions are generated based on the candidate scheduling information.

2. The low-power computing power scheduling method for industrial control computers used in UAV avionics according to claim 1, characterized in that, The step of obtaining the computing power requirement characteristics of multiple avionics tasks based on the avionics task list includes: Obtain the historical execution records of each avionics task from the avionics task list; Based on the historical execution records, obtain the instruction execution information for each scheduling cycle, and obtain the instruction type distribution ratio sequence based on the instruction execution information; The cache access logs for each scheduling cycle are obtained based on the historical execution records, and the cache access hit rate sequence is obtained based on the cache access logs. Based on the historical execution records, obtain the data transmission logs for each scheduling cycle, and obtain the data throughput peak sequence based on the data transmission logs; The CPU demand vector is obtained based on the instruction type distribution ratio sequence; The memory bandwidth requirement is obtained based on the data throughput peak sequence. The maximum allowable delay for each scheduling cycle is obtained based on the historical execution records. The performance requirement factor for each period is obtained based on the cache access hit rate sequence, and the minimum requirement frequency is obtained based on the performance requirement factor. The computing power demand characteristics are obtained by integrating the CPU demand vector, memory bandwidth demand, maximum allowable latency, and minimum required frequency.

3. The low-power computing power scheduling method for industrial control computers used in UAV avionics according to claim 1, characterized in that, The step of obtaining the actual available power consumption budget vector based on the real-time avionics and industrial control computer information includes: The power supply fluctuation rate is obtained based on the real-time avionics and industrial control computer information, and the power supply stability coefficient is obtained based on the power supply fluctuation rate. The command throughput fluctuation characteristics are obtained based on the real-time avionics and industrial control computer information, and the predicted power consumption upper limit is obtained based on the command throughput fluctuation characteristics. The total predicted power consumption limit is obtained based on the predicted power consumption limit. The upper limit of power supply correction power consumption is obtained based on the power supply stability coefficient and the upper limit of total predicted power consumption. The actual available power budget vector is obtained based on the power supply correction power limit and the stage power budget vector.

4. The low-power computing power scheduling method for industrial control computers used in UAV avionics according to claim 3, characterized in that, The step of obtaining the power supply correction power limit based on the power supply stability coefficient and the total predicted power consumption limit includes: The preset nominal power supply stability value is obtained based on the real-time avionics and industrial control computer information, and the power supply quality evaluation value is obtained based on the ratio of the power supply stability coefficient to the preset nominal power supply stability value. The rated thermal design power of the processor is obtained based on the real-time avionics and industrial control computer information, and the load scaling factor is obtained based on the ratio of the total predicted power consumption limit to the rated thermal design power of the processor. The coupling scaling factor is obtained based on the power quality assessment value and the load scaling factor. The upper limit of power consumption correction is obtained based on the coupling scaling factor.

5. The low-power computing power scheduling method for industrial control computers used in UAV avionics according to claim 2, characterized in that, The step of obtaining the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector includes: The computing power demand fluctuation value of each avionics task is obtained based on the computing power demand characteristics, and the demand discrete gradient is obtained based on the computing power demand fluctuation value. The initial reserved margin share is obtained based on the demand discrete gradient. The available allocation vector is obtained based on the actual available power consumption budget vector and the initial reserved margin share, and the allocation quotas for each type of task are obtained in turn according to the critical level of the avionics task. The actual power consumption per unit time of various tasks in the previous scheduling cycle is obtained according to the hierarchical allocation quota, and the quota surplus deviation is obtained according to the difference between the actual power consumption sample value and the hierarchical allocation quota. The feedback correction coefficient is obtained based on the quota surplus deviation, and the feedback replenishment amount is obtained based on the feedback correction coefficient; Based on the hierarchical allocation quota and the feedback supply amount, the power consumption quota for each avionics task under various missions is obtained by allocating the quota according to the weights.

6. The low-power computing power scheduling method for industrial control computers used in UAV avionics according to claim 5, characterized in that, The step of allocating power consumption quotas for each avionics task according to the weighted allocation of the tiered allocation quotas and the feedback supply amount to each avionics task under various mission types, and obtaining the power consumption quota for each avionics task, includes: The total amount to be allocated for each type of task is obtained based on the hierarchical allocation quota and feedback supply, and the single task demand intensity is obtained based on the computing power demand characteristics of each avionics task within its category. The demand squeeze ratio among similar tasks is obtained based on the single task demand intensity, and an interference correction factor is obtained based on the demand squeeze ratio. The corrected demand weight is obtained based on the single-task demand intensity and interference correction factor, and the initial quota value of each avionics task is obtained based on the proportion of the corrected demand weight in the total amount to be allocated. The remaining power consumption capacity of each avionics mission core is obtained based on the initial quota value, and the margin determination result is obtained based on the remaining power consumption capacity. The power consumption quota for each avionics mission is obtained based on the margin determination result and the initial quota value.

7. The low-power computing power scheduling method for industrial control computers used in UAV avionics according to claim 6, characterized in that, The step of generating candidate scheduling information based on the power consumption quota and generating scheduling instructions based on the candidate scheduling information includes: The time slot capacity of each processor core in the current scheduling cycle is obtained according to the power consumption quota, and the coupling degree evaluation value between the task and the core is obtained according to the time slot capacity and the computing power requirement characteristics of each avionics task. Candidate scheduling schemes are generated by sorting the coupling degree evaluation values ​​from high to low. The migration cost of each avionics task at the candidate core level is obtained according to the candidate scheduling scheme, and the dynamic migration cost threshold is obtained according to the power consumption quota. When the migration cost is lower than the dynamic migration cost threshold, the scheduling pairing of the task at the candidate core level is retained, and the filtered candidate scheduling scheme is obtained. The overlapping set of execution time windows of each core-level bound task is obtained according to the filtered candidate scheduling scheme, and the core-level conflict density is obtained according to the overlapping set of execution time windows. When the conflict density exceeds the preset conflict threshold, the conflicting tasks are migrated to the candidate core with the second best coupling degree in order of the coupling degree evaluation value from low to high, and the scheduling scheme after conflict resolution is obtained. The total power consumption of each core-level bound task set is obtained according to the scheduling scheme after conflict resolution. The core-level quota residual is obtained according to the difference between the total power consumption and the corresponding component of the power consumption quota at each core level. Vector normalization processing is performed on the core-level quota residual to obtain the target DVFS frequency level of each core. Based on the target DVFS frequency level and the scheduling scheme after conflict resolution, obtain the task core binding information and core frequency setting information, and merge them to generate scheduling instructions.

8. A low-power computing scheduling system for industrial control computers used in UAV avionics, characterized in that, include: The information acquisition module is used to acquire the avionics task list and real-time avionics industrial control computer information for the current UAV flight phase. The computing power requirement feature acquisition module is used to acquire the computing power requirement features of multiple avionics tasks based on the avionics task list. The actual available power consumption budget vector acquisition module is used to acquire the actual available power consumption budget vector based on the real-time avionics and industrial control computer information. The power consumption quota acquisition module is used to acquire the power consumption quota for each avionics mission based on the computing power demand characteristics and the actual available power consumption budget vector. The instruction generation module is used to generate candidate scheduling information based on the power consumption quota, and to generate scheduling instructions based on the candidate scheduling information.

9. A computer device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 7.

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