Alternative video data compression method, video specification conversion integrated circuit, and operating method

Abstract

The present application provides a kind of alternative video data compression method, video specification conversion integrated circuit and operating method.Video specification conversion integrated circuit includes input interface, specification conversion engine, internal memory, decompression circuit and output interface.Specification conversion engine receives input video signal from input interface.In specification conversion mode, specification conversion engine converts input video signal meeting first video specification into converted video signal meeting second video specification, and output interface selects converted video signal as output video signal and outputs to display.In standby mode, decompression circuit decompresses the alternative video data of internal memory to generate alternative video signal, and output interface selects alternative video signal as output video signal and outputs to display.

Description

Technical Field

[0001] This invention relates to an integrated circuit, and more particularly to an alternative video data compression method, a video specification conversion integrated circuit, and its operation method. Background Technology

[0002] A video specification conversion integrated circuit (VPC) can convert an input video signal conforming to one video specification into an output video signal conforming to another video specification, and then provide the output video signal to the display. When the video source does not provide an input video signal, or when the video source is not connected to the VPC, the display will remain black. Summary of the Invention

[0003] This invention provides a compression method for alternative video data, a video specification conversion integrated circuit, and its operation method, so as to output an alternative video signal to a display when the input video signal is lost.

[0004] In one embodiment of the present invention, the video specification conversion integrated circuit described above includes an input interface, a specification conversion engine, internal memory, a decompression circuit, and an output interface. The input interface is coupled to a video source to receive an input video signal conforming to a first video specification. The specification conversion engine is coupled to the input interface to receive the input video signal. The specification conversion engine converts the input video signal conforming to the first video specification into a converted video signal conforming to a second video specification, wherein the second video specification is different from the first video specification. The internal memory is used to provide first alternative video data. The decompression circuit is coupled to the internal memory to receive the first alternative video data. The decompression circuit decompresses the first alternative video data to generate a first alternative video signal. The output interface is coupled to a display to provide an output video signal conforming to the second video specification. The output interface is coupled to the specification conversion engine to receive the converted video signal. The output interface is coupled to the decompression circuit to receive the first alternative video signal. In response to the video specification conversion integrated circuit operating in specification conversion mode, the output interface selects to output the converted video signal as the output video signal to the display. In response to the video specification conversion integrated circuit operating in standby mode, the output interface selects to output the first alternative video signal as the output video signal to the display.

[0005] In one embodiment of the present invention, the above-described operation method includes: receiving an input video signal conforming to a first video specification from a video source via an input interface of a video specification conversion integrated circuit; converting the input video signal conforming to the first video specification into a converted video signal conforming to a second video specification by a specification conversion engine, wherein the second video specification is different from the first video specification; providing first alternative video data via the internal memory of the video specification conversion integrated circuit; decompressing the first alternative video data by a decompression circuit to generate a first alternative video signal; in response to the video specification conversion integrated circuit operating in specification conversion mode, selecting via an output interface to output the converted video signal as an output video signal to a display; and in response to the video specification conversion integrated circuit operating in standby mode, selecting via an output interface to output the first alternative video signal as an output video signal to a display.

[0006] In one embodiment of the present invention, the compression method described above includes: registering each color value in a first original video frame in a color palette table; registering the color palette table in the header of alternative video data; counting the number of multiple consecutive pixels with the same color in the first original video frame; representing the multiple consecutive pixels with a data unit, wherein the data unit includes a color palette index and run length data, the color palette index indicating the same color of the multiple consecutive pixels in the color palette table, and the run length data indicating the number of the multiple consecutive pixels with the same color; and adding the data unit to the alternative video data.

[0007] Based on the above, the embodiments of the present invention pre-compress the original video frame into alternative video data. Therefore, the memory space occupied by the alternative video data in the internal memory can be minimized. In standby mode (e.g., when the input video signal is lost), the decompression circuit decompresses the first alternative video data to generate a first alternative video signal, and the output interface outputs the first alternative video signal to the display. Therefore, the display can show the alternative video (e.g., a trademark or other logo) instead of a black screen. In standardization conversion mode (e.g., when the input video signal is restored), the standardization conversion engine converts the input video signal into a converted video signal conforming to different video standards, and the output interface outputs the converted video signal to the display. Therefore, the display can display the video output by the video source.

[0008] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0009] Figure 1 This is a schematic flowchart of an alternative video data compression method according to an embodiment of the present invention.

[0010] Figure 2This is a schematic diagram of a circuit block of a video system according to an embodiment of the present invention.

[0011] Figure 3 This is a circuit block diagram of a video specification conversion integrated circuit according to an embodiment of the present invention.

[0012] Figure 4 This is a flowchart illustrating an operation method of a video specification conversion integrated circuit according to an embodiment of the present invention.

[0013] Figure 5 This is a circuit block diagram of the output interface drawn according to an embodiment of the present invention.

[0014] Figure 6 This is a circuit block diagram of a decompression circuit according to an embodiment of the present invention.

[0015] [Symbol Explanation]

[0016] 200: Video System

[0017] 210: Video source

[0018] 220: Video Specification Conversion Integrated Circuit

[0019] 221: Input Interface

[0020] 222: Standard Conversion Engine

[0021] 223: Output Interface

[0022] 224: Transmission Interface

[0023] 225: Internal Memory

[0024] 226: Decompression circuit

[0025] 230: Monitor

[0026] 240: External memory

[0027] 510: Multiplexer

[0028] 520: Link Layer

[0029] 530: Physical Layer

[0030] 610: Stroke Length Decoder

[0031] 620: Color Mapping Circuit

[0032] S110~S160, S410~S470: Steps

[0033] S31: Converted video signal

[0034] S32: Alternate video signal

[0035] S_in: Input video signal

[0036] S_out: Output video signal Detailed Implementation

[0037] The term "coupled (or connected)" as used throughout this application (including the claims) can refer to any direct or indirect connection means. For example, if it is described that a first device is coupled (or connected) to a second device, it should be interpreted as the first device being directly connected to the second device, or the first device being indirectly connected to the second device through other devices or some connection means. The terms "first," "second," etc., used throughout this application (including the claims) are used to name elements or distinguish different embodiments or scopes, and are not intended to limit the upper or lower limit of the number of elements, nor to limit the order of elements. Furthermore, wherever possible, elements / components / steps using the same reference numerals in the drawings and embodiments represent the same or similar parts. Elements / components / steps using the same reference numerals or the same terms in different embodiments can be referred to mutually in the relevant descriptions. It should be understood that the features of the following embodiments can be combined with each other. For example, the features of the second embodiment can be combined with the features of the first embodiment. Those skilled in the art can select appropriate feature combinations according to actual design requirements.

[0038] Figure 1 This is a schematic flowchart illustrating a method for compressing alternative video data according to an embodiment of the present invention. Depending on the design, in some embodiments, Figure 1 The compression method shown can be implemented using hardware circuitry. In other embodiments, Figure 1 The compression method shown can be implemented as firmware, software (i.e., a program), or a combination of both. In some other embodiments, Figure 1 The compression method shown can be implemented in combination with multiple hardware, firmware, and software components. For example, an electronic device (e.g., a computer, CPU, hardware controller, microcontroller, hardware processor, or microprocessor) can read and execute programming code from a non-transitory machine-readable storage medium (e.g., semiconductor memory or storage device) to achieve... Figure 1 The compression method shown.

[0039] In step S110, each color value in the first original video frame is registered in the corresponding color palette index in the color palette table. In step S120, the color palette table is registered in the header of the replacement video data. For example (but not limited to), the first original video frame may contain a trademark or other logo. Generally, the number of colors in a trademark or logo is limited, for example, 3 to 6 colors. For example, suppose the color value of each pixel in the original video frame is 3*8 bits, and suppose the number of colors in the first original video frame is 2 colors (e.g., black and white). The white color value "255, 255, 255" and the black color value "0, 0, 0" will be registered in the color palette table, where black is assigned one color palette index (e.g., "0") and white is assigned another color palette index (e.g., "1"). Based on this, a small number of color palette indexes can represent 3*8 bits (or even more) of pixel color values. If color palette indexes can be used to replace pixel color values, the amount of data in the video frame can be effectively reduced.

[0040] In some applications, image edges can be faded before compression, with the faded color values ​​represented by a color palette index. The fading process involves converting pixel data in each object edge region of the original video frame into grayscale data with one or more grayscale values. The original color values ​​of these pixels are also recorded in the color palette table with their corresponding color palette indices.

[0041] In some application scenarios, certain regions of the original video frame are not of interest to the user. Therefore, the compression method may further include: extracting a portion of the second original video frame as the first original video frame.

[0042] Step S130 counts the number of consecutive pixels of the same color in the first original video frame. Generally, a video frame has one or more regions of the same color. If multiple consecutive pixels of the same color can be replaced by run length, the data size of the video frame can be effectively reduced.

[0043] Step S140 uses a single data unit to represent multiple consecutive pixels in the first original video frame that share a particular color. The data unit includes a palette index and run-length data. The palette index indicates the same color among the multiple consecutive pixels in the palette table. The run-length data indicates the number of the multiple consecutive pixels that share the same color. In some applications, the run-length data may not be sufficient to represent the number of multiple consecutive pixels that share a particular color. For example, assuming the run-length data is a 4-bit value (representing a "number" of 1 to 16), and assuming the number of consecutive pixels with the same color (e.g., white) is 20, then the first 16 consecutive pixels with white are represented by one data unit, while the remaining 4 consecutive pixels are represented by another data unit.

[0044] Step S150 adds the data unit from step S140 to the alternative video data. Similarly, in response to any unprocessed pixels in the first original video frame (if the result of step S160 is "yes"), steps S130 to S150 are executed again for the unprocessed pixels until all pixels in the first original video frame have been processed. After compression, the alternative video data includes a header and multiple data units. The header includes a color palette table and other information, such as the size, width, and height of the original image (but not limited to these). Each data unit includes a color palette index and run length data. The alternative video data can be written to external memory (e.g., flash memory) outside the video standard conversion integrated circuit for reading by the video standard conversion integrated circuit.

[0045] Figure 2 This is a schematic diagram of a circuit block of a video system 200 according to an embodiment of the present invention. Figure 2The video system 200 includes a video source 210, a video specification conversion integrated circuit 220, and a display 230. The video source 210 provides an input video signal S_in to the video specification conversion integrated circuit 220. The video specification conversion integrated circuit 220 converts the input video signal S_in, conforming to a first video specification, into an output video signal S_out, conforming to a second video specification (different from the first video specification), and provides the output video signal S_out to the display 230. For example (but not limited to), the first video specification includes the DisplayPort (DP) specification or other video specifications, while the second video specification includes the High Definition Multimedia Interface (HDMI) specification or other video specifications. The video specification conversion integrated circuit 220 converts the DP signal S_in from the video source 210 into an HDMI signal S_out for the display 230.

[0046] Figure 3 This is a circuit block diagram of a video specification conversion integrated circuit 220 according to an embodiment of the present invention. Figure 3 The video specification conversion integrated circuit 220 shown can be used as... Figure 2 This is one of many implementation examples of the video specification conversion integrated circuit 220 shown. Figure 3 The video source 210, input video signal S_in, video standard conversion integrated circuit 220, output video signal S_out, and display 230 can be referred to Figure 2 The relevant explanations are omitted here. Figure 3 In the illustrated embodiment, the video system 200 also includes an external memory 240. For example (but not limited to), the external memory 240 may include flash memory or other types of memory. One or more pre-compressed alternative video data may be stored in the external memory 240 for retrieval by the video specification conversion integrated circuit 220.

[0047] exist Figure 3 In the illustrated embodiment, the video standard conversion integrated circuit 220 includes an input interface 221, a standard conversion engine 222, an output interface 223, a transmission interface 224, internal memory 225, and a decompression circuit 226. Depending on the design, in some embodiments, the standard conversion engine 222 and / or the decompression circuit 226 may be implemented as hardware circuits. In other embodiments, the standard conversion engine 222 and / or the decompression circuit 226 may be implemented as a combination of hardware, firmware, and software (i.e., programs).

[0048] In hardware terms, the aforementioned specification conversion engine 222 and / or decompression circuit 226 can be implemented as logic circuits on an integrated circuit. For example, the functions of the specification conversion engine 222 and / or decompression circuit 226 can be implemented as various logic blocks, modules, and circuits in one or more hardware controllers, microcontrollers, hardware processors, microprocessors, application-specific integrated circuits (ASICs), digital signal processors (DSPs), field-programmable gate arrays (FPGAs), central processing units (CPUs), and / or other processing units. The functions of the specification conversion engine 222 and / or decompression circuit 226 can be implemented as hardware circuits, such as various logic blocks, modules, and circuits in an integrated circuit, using hardware description languages ​​(such as Verilog HDL or VHDL) or other suitable programming languages.

[0049] In software and / or firmware form, the functionality of the specification conversion engine 222 and / or decompression circuit 226 can be implemented as programming codes. For example, the specification conversion engine 222 and / or decompression circuit 226 can be implemented using general programming languages ​​(such as C, C++, or assembly languages) or other suitable programming languages. The programming code can be recorded / stored in a non-transitory machine-readable storage medium. In some embodiments, the non-transitory machine-readable storage medium includes, for example, semiconductor memory and / or a storage device. An electronic device (e.g., a CPU, hardware controller, microcontroller, hardware processor, or microprocessor) can read and execute the programming code from the non-transitory machine-readable storage medium to implement the functionality of the specification conversion engine 222 and / or decompression circuit 226.

[0050] Figure 4This is a flowchart illustrating a method of operating a video specification conversion integrated circuit according to an embodiment of the present invention. Each step and combination of steps in the flowchart can be implemented by various means, such as hardware, one or more computer-readable media storing computer-readable program instructions, or a computer program product. For example, one or more steps in the flowchart can be embodied by computer program instructions of a computer program product. The computer program product described herein can be stored in one or more memory devices in a computing device and executed by a processor in the computing device. In some embodiments, the computer program instructions of the computer program product can be stored in memory devices of multiple computing devices. It should be appreciated that the computer program product can be implemented on a computer or other programmable design device to produce a machine that produces functions for implementing the functions specified in steps(s) of the flowchart. The computer program product may include one or more computer-readable memories (on which computer program instructions may be stored), or the computer program instructions of one or more computer program products may also be loaded onto a computer or other programmable design device.

[0051] Please refer to Figure 3 and Figure 4 The video standard conversion integrated circuit 220 can operate in different operating modes. The input interface 221 is used to couple to the video source 210. In response to the video standard conversion integrated circuit 220 operating in standard conversion mode (the determination result of step S410 is "standard conversion mode"), the input interface 221 receives an input video signal S_in from the video source 210 that conforms to the first video standard (step S420). The standard conversion engine 222 is coupled to the input interface 221 to receive the input video signal S_in. In step S430, the standard conversion engine 222 converts the input video signal S_in conforming to the first video standard into a converted video signal S31 conforming to a second video standard (different from the first video standard). For example (but not limited to), the standard conversion engine 222 converts the input video signal S_in conforming to the DP standard into a converted video signal S31 conforming to the HDMI standard for the output interface 223.

[0052] Output interface 223 is coupled to display 230 to provide an output video signal S_out conforming to a second video specification (e.g., HDMI specification). Output interface 223 is coupled to specification conversion engine 222 to receive the converted video signal S31. In response to the video specification conversion integrated circuit 220 operating in specification conversion mode, output interface 223 selects to output the converted video signal S31 as the output video signal S_out to display 230 (step S440).

[0053] Transmission interface 224 is used to couple to an external memory 240 outside of the video specification conversion integrated circuit 220. Transmission interface 224 is coupled to internal memory 225. Transmission interface 224 reads first alternative video data from external memory 240 and writes the first alternative video data to internal memory 225. In response to the video specification conversion integrated circuit 220 operating in standby mode (the determination result of step S410 is "standby mode"), internal memory 225 provides alternative video data to decompression circuit 226 (step S450). Decompression circuit 226 is coupled to internal memory 225 to receive alternative video data. In step S460, decompression circuit 226 decompresses the alternative video data to generate an alternative video signal S32. The alternative video signal S32 is a video signal conforming to a second video specification (e.g., HDMI specification).

[0054] The alternative video data includes a header and multiple data units. In one embodiment, the header includes a color palette table and other information, such as the size, width, height, etc. (but not limited to) of the original image, while each data unit includes a color palette index and run length data. For example (but not limited to), each data unit is 8 bits, where 4 bits represent the color palette index and the remaining 4 bits represent the run length data. The decompression circuit 226 generates at least one current pixel in the alternative video signal S32 corresponding to the current data unit based on the run length data of the current data unit in these data units. The run length data of the current data unit defines the number of said at least one current pixel. For example, assuming the run length data of the current data unit is "2" (indicating that the number of consecutive pixels with the same color is 3), the decompression circuit 226 generates 3 current pixels (3 consecutive pixels) in the alternative video signal S32 corresponding to the current data unit based on the run length data "2" of the current data unit.

[0055] The decompression circuit 226 looks up the color value corresponding to the color palette index of the current data unit from the color palette table of the header. The decompression circuit 226 uses the color value corresponding to this color palette index as the color value of each of at least one current pixel corresponding to the current data unit in the substitute video signal S32. For example, suppose the stroke length data of the current data unit is "2" (indicating that the number of consecutive pixels with the same color in the substitute video signal S32 is 3), and suppose the color palette index of the current data unit is "1". Based on the color palette index "1" of the current data unit, suppose the decompression circuit 226 looks up the corresponding color value "255, 255, 255" for white from the color palette table of the header. The decompression circuit 226 generates three current pixels (three consecutive pixels) corresponding to the current data unit in the alternative video signal S32 based on the stroke length data "2" of the current data unit, and the decompression circuit 226 fills the color value "255, 255, 255" into each current pixel based on the color palette index "1".

[0056] In some applications (but not limited to), the decompression circuit 226 can also use a lookup table to obtain the grayscale data of the corresponding pixel data, which has one or more grayscale values, corresponding to the faded color value in each object edge region of the alternative video signal S32. The output interface 223 is coupled to the decompression circuit 226 to receive the alternative video signal S32. In response to the video standard conversion integrated circuit 220 operating in standby mode, the output interface 223 selects to output the alternative video signal S32 as the output video signal S_out to the display (step S470). For example, in response to the loss of the input video signal, the video standard conversion integrated circuit 220 enters standby mode from standard conversion mode. In response to the input video signal S_in being provided to the video standard conversion integrated circuit 220, the video standard conversion integrated circuit 220 returns from standby mode to standard conversion mode.

[0057] In summary, the original video frames are pre-compressed into alternative video data, and this alternative video data is pre-written into external memory 240 for reading by the video standard conversion integrated circuit 220. After the video standard conversion integrated circuit 220 is powered on, the transmission interface 224 can write the alternative video data from external memory 240 into internal memory 225. Because the alternative video data is pre-compressed video frames, the memory space occupied by the alternative video data in internal memory 225 can be minimized. In standby mode (e.g., when the input video signal S_in is lost), the decompression circuit 226 decompresses the first alternative video data in internal memory 225 to generate an alternative video signal S32, and the output interface 223 outputs the alternative video signal S32 as the output video signal S_out to the display 230. Therefore, the display 230 can display alternative video (e.g., a trademark or other logo) instead of a black screen. The video standard conversion integrated circuit 220 requires only a small amount of internal memory 225 to store the alternative video data, and the size of internal memory 225 significantly affects the cost of the video standard conversion integrated circuit 220. The alternative video image is compressed and stored in internal memory 225, and then decompressed by decompression circuit 226, allowing display 230 to display the complete alternative video image. In standardization conversion mode (e.g., when the input video signal S_in is restored), standardization conversion engine 222 converts the input video signal S_in into a converted video signal S31 conforming to different video standards, and output interface 223 outputs the converted video signal S31 to display 230. Therefore, display 230 can display the video output by video source 210.

[0058] In some application scenarios, multiple alternative video data can be pre-written into external memory 240. In the first moment of standby mode, output interface 223 selects to output the first alternative video signal (alternative video signal S32) corresponding to the first alternative video data as the output video signal S_out to display 230. At this time, transmission interface 224 reads second alternative video data from external memory 240. Transmission interface 224 writes the second alternative video data into internal memory 225 to replace the first alternative video data. Decompression circuit 226 decompresses the second alternative video data in internal memory 225 to generate a second alternative video signal (alternative video signal S32) and sends it to output interface 223. In the second moment of standby mode, output interface 223 selects to output the second alternative video signal (alternative video signal S32) corresponding to the second alternative video data as the output video signal S_out to display 230. Based on this, display 230 can display the effect of animation (multiple alternative video signals).

[0059] Figure 5 This is a circuit block diagram of the output interface 223 according to an embodiment of the present invention. Figure 5 The output interface 223 shown can be used as Figure 3 This is one of many implementation examples of the output interface 223 shown. Figure 5 The specifications for the conversion engine 222, the converted video signal S31, the decompression circuit 226, the replacement video signal S32, the output interface 223, the output video signal S_out, and the display 230 can be referenced. Figure 3 The relevant explanations are omitted here.

[0060] exist Figure 5 In the illustrated embodiment, output interface 223 includes a multiplexer 510, a link layer 520, and a physical layer 530. A first input of the multiplexer 510 is coupled to the specification conversion engine 222 to receive the converted video signal S31. In response to the video specification conversion integrated circuit 220 operating in specification conversion mode, the multiplexer 510 selects to output the converted video signal S31 to the link layer 520. A second input of the multiplexer 510 is coupled to the decompression circuit 226 to receive an alternative video signal S32. In response to the video specification conversion integrated circuit 220 operating in standby mode, the multiplexer 510 selects to output the alternative video signal S32 to the link layer 520. An input of the link layer 520 is coupled to the output of the multiplexer 510. An input of the physical layer 530 is coupled to the output of the link layer 520. The output of the physical layer 530 is used to couple to a display 230 to provide an output video signal S_out conforming to a second video specification.

[0061] Figure 6 This is a circuit block diagram of the decompression circuit 226 according to an embodiment of the present invention. Figure 6 The decompression circuit 226 shown can be used as Figure 3 This is one of many implementation examples of the decompression circuit 226 shown. Figure 6 The internal memory 225, decompression circuit 226, alternative video signal S32, and output interface 223 shown can be referenced. Figure 3 The relevant explanations are omitted here.

[0062] exist Figure 6In the illustrated embodiment, the decompression circuit 226 includes a run-length decoder 610 and a color mapping circuit 620. The run-length decoder 610 is coupled to internal memory 225 to receive alternative video data. The alternative video data includes a header and a plurality of data units, wherein the header includes a color palette table, and each of these data units includes a color palette index and run-length data. The run-length decoder 610 generates one or more current pixels corresponding to the current data unit in the alternative video signal S32 based on the run-length data of a current data unit among these data units. The run-length data of the current data unit defines the number of current pixels.

[0063] Color mapping circuit 620 is coupled to run-length decoder 610 and output interface 223. Color mapping circuit 620 looks up the color value corresponding to the color palette index in the header's color palette table based on the color palette index of the current data unit. Color mapping circuit 620 uses the color value corresponding to the color palette index as the color value of each current pixel in the substitute video signal S32. For example, suppose the run-length data of the current data unit is "2" (indicating that there are 3 consecutive pixels with the same color in the substitute video signal S32), and suppose the color palette index of the current data unit is "1". Based on the color palette index "1" of the current data unit, suppose color mapping circuit 620 looks up the corresponding color value "255, 255, 255" for white from the header's color palette table. The stroke length decoder 610 generates three current pixels (three consecutive pixels) corresponding to the current data unit in the alternative video signal S32 based on the stroke length data "2" of the current data unit, and the color mapping circuit 620 fills the color value "255, 255, 255" into each of these three current pixels based on the color palette index "1".

[0064] In some applications (but not limited to these), the color mapping circuit 620 can also use a lookup table to obtain the corresponding pixel data, which has one or more grayscale values, by referring to the color palette index corresponding to the faded color value in each object edge region of the alternative video signal S32.

[0065] Although the present invention has been disclosed above with reference to embodiments, it is not intended to limit the present invention. Those skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention shall be determined by the scope defined in the appended claims.

Claims

1. A video specification conversion integrated circuit, comprising: An input interface for coupling to a video source to receive an input video signal conforming to a first video specification; A specification conversion engine is coupled to the input interface to receive the input video signal, wherein the specification conversion engine converts the input video signal conforming to the first video specification into a converted video signal conforming to a second video specification, and the second video specification is different from the first video specification; Internal memory, used to provide the first alternative video data; A decompression circuit is coupled to the internal memory to receive the first alternative video data, wherein the decompression circuit decompresses the first alternative video data to generate a first alternative video signal; as well as An output interface is provided for coupling to a display to provide an output video signal conforming to the second video specification, wherein the output interface is coupled to the specification conversion engine to receive the converted video signal, and the output interface is coupled to the decompression circuit to receive the first alternative video signal. In response to the video standard conversion integrated circuit operating in standard conversion mode, the output interface selects to output the converted video signal as the output video signal to the display. as well as In response to the video specification conversion integrated circuit operating in standby mode, the output interface selects to output the first alternative video signal as the output video signal to the display.

2. The video specification conversion integrated circuit as described in claim 1, wherein, In response to the loss of the input video signal by the video standard conversion integrated circuit, the video standard conversion integrated circuit enters the standby mode; and In response to the input video signal being provided to the video standard conversion integrated circuit, the video standard conversion integrated circuit returns to the standard conversion mode.

3. The video specification conversion integrated circuit as claimed in claim 1, wherein the first video specification includes a display port specification, the second video specification includes a high-definition multimedia interface specification, and the specification conversion engine converts the input video signal conforming to the display port specification into the converted video signal conforming to the high-definition multimedia interface specification for the output interface.

4. The video specification conversion integrated circuit as described in claim 1, further comprising: A transmission interface is used to couple to an external memory outside the video specification conversion integrated circuit, wherein the transmission interface is coupled to the internal memory, the transmission interface reads the first alternative video data from the external memory, and the transmission interface writes the first alternative video data to the internal memory.

5. The video standard conversion integrated circuit as claimed in claim 4, wherein the output interface selects to output the first alternative video signal as the output video signal to the display during a first time in the standby mode, the transmission interface further reads second alternative video data from the external memory, the transmission interface writes the second alternative video data into the internal memory to replace the first alternative video data, the decompression circuit decompresses the second alternative video data in the internal memory to generate a second alternative video signal to the output interface, and the output interface selects to output the second alternative video signal as the output video signal to the display during a second time in the standby mode.

6. The video specification conversion integrated circuit of claim 1, wherein the first alternative video data includes a header and a plurality of data units, the header including a color palette table, each of the data units including a color palette index and a run length data, the decompression circuit generating at least one current pixel in the first alternative video signal corresponding to the current data unit based on the run length data of the current data unit, the run length data of the current data unit defining the number of the at least one current pixel, the decompression circuit looking up the color value corresponding to the color palette index from the color palette table based on the color palette index of the current data unit, and the decompression circuit using the color value corresponding to the color palette index as the color value of each of the at least one current pixel in the first alternative video signal.

7. The video standard conversion integrated circuit of claim 6, wherein the decompression circuit uses the color palette index corresponding to the faded color value in each object edge region of the first alternative video signal to look up the color palette table to obtain the corresponding pixel data having at least one grayscale value.

8. The video specification conversion integrated circuit as claimed in claim 1, wherein the decompression circuit comprises: A run-length decoder, coupled to the internal memory, receives the first alternative video data, wherein the first alternative video data includes a header and a plurality of data units, the header including a color palette table, each of the data units including a color palette index and run-length data, the run-length decoder generating at least one current pixel in the first alternative video signal corresponding to the current data unit based on the run-length data of the current data unit, and defining the number of the at least one current pixel based on the run-length data of the current data unit; as well as A color mapping circuit is coupled to the run-length decoder and the output interface, wherein the color mapping circuit looks up the color value corresponding to the color palette index from the color palette table based on the color palette index of the current data unit, and the color mapping circuit uses the color value corresponding to the color palette index as the color value of each of the at least one current pixel in the first alternative video signal.

9. The video standard conversion integrated circuit of claim 8, wherein the color mapping circuit uses the color palette index corresponding to the faded color value in each object edge region of the first alternative video signal to look up the color palette table to obtain the corresponding pixel data having at least one grayscale value.

10. The video specification conversion integrated circuit as claimed in claim 1, wherein the output interface comprises: A multiplexer, wherein a first input of the multiplexer is coupled to the specification conversion engine to receive the converted video signal, and a second input of the multiplexer is coupled to the decompression circuit to receive the first alternative video signal; A link layer, wherein the input of the link layer is coupled to the output of the multiplexer; as well as A physical layer, wherein the input of the physical layer is coupled to the output of the link layer, and the output of the physical layer is used to couple to the display to provide the output video signal conforming to the second video specification.

11. A method for operating a video specification conversion integrated circuit, comprising: The input interface of the video specification conversion integrated circuit receives an input video signal conforming to a first video specification from a video source, wherein the specification conversion engine of the video specification conversion integrated circuit is coupled to the input interface to receive the input video signal; The specification conversion engine converts the input video signal conforming to the first video specification into a converted video signal conforming to the second video specification, wherein the second video specification is different from the first video specification. The output interface of the video specification conversion integrated circuit is coupled to the specification conversion engine to receive the converted video signal, and the output interface is used to couple to a display to provide an output video signal conforming to the second video specification. The video specification conversion integrated circuit provides first alternative video data through its internal memory, wherein the decompression circuit of the video specification conversion integrated circuit is coupled to the internal memory to receive the first alternative video data; The first alternative video signal is generated by the decompression circuit decompressing the first alternative video data, wherein the output interface is coupled to the decompression circuit to receive the first alternative video signal; In response to the video standard conversion integrated circuit operating in standard conversion mode, the output interface selects to output the converted video signal as the output video signal to the display. as well as In response to the video specification conversion integrated circuit operating in standby mode, the output interface selects to output the first alternative video signal as the output video signal to the display.

12. The operating method as described in claim 11, further comprising: In response to the loss of the input video signal by the video standard conversion integrated circuit, the video standard conversion integrated circuit enters the standby mode. as well as In response to the input video signal being provided to the video standard conversion integrated circuit, the video standard conversion integrated circuit returns to the standard conversion mode.

13. The operation method as described in claim 11, wherein the first video specification includes a display port specification, the second video specification includes a high-definition multimedia interface specification, and the operation method further includes: The conversion engine converts the input video signal, which conforms to the display port specification, into a converted video signal that conforms to the high-definition multimedia interface specification and outputs it to the output interface.

14. The operating method as described in claim 11, further comprising: The first alternative video data is read from an external memory outside the video specification conversion integrated circuit by the transmission interface of the video specification conversion integrated circuit, wherein the transmission interface is coupled to the internal memory; as well as The first alternative video data is written to the internal memory via the transmission interface.

15. The operating method as described in claim 14, further comprising: The output interface selects the first alternative video signal as the output video signal and outputs it to the display at the first moment of the standby mode. The second alternative video data is read from the external memory via the transmission interface; The second alternative video data is written into the internal memory via the transmission interface to replace the first alternative video data; The decompression circuit decompresses the second alternative video data in the internal memory to generate a second alternative video signal, which is then sent to the output interface. as well as The output interface selects the second alternative video signal as the output video signal to be output to the display during the second time of the standby mode.

16. The method of operation as claimed in claim 11, wherein the first alternative video data includes a header and a plurality of data units, the header including a palette table, each of the data units including a palette index and a run length data, and the method of operation further includes: The decompression circuit generates at least one current pixel in the first alternative video signal corresponding to the current data unit based on the stroke length data of the current data unit in the data unit, wherein the stroke length data of the current data unit defines the number of the at least one current pixel; The decompression circuit retrieves the color value corresponding to the color palette index from the color palette table based on the color palette index of the current data unit; as well as The decompression circuit uses the color value corresponding to the color palette index as the color value of each of the at least one current pixel in the first alternative video signal.

17. The operating method as described in claim 16, further comprising: The color mapping circuit uses the color palette index corresponding to the faded color value in each object edge region of the first alternative video signal to look up the color palette table to obtain the corresponding pixel data, which has at least one grayscale value.

18. An alternative method for compressing video data, comprising: Record each color value in the first original video frame in the corresponding color palette index in the color palette table; Register the color palette table in the header of the alternative video data; Count the number of consecutive pixels with the same color in the first original video frame; A data unit represents the plurality of consecutive pixels, wherein the data unit includes a palette index and a run-length data, the palette index indicating the common color of the plurality of consecutive pixels in the palette table, and the run-length data indicating the number of the plurality of consecutive pixels having the common color; and Add the data unit to the alternative video data.

19. The compression method as described in claim 18, further comprising: Extract a portion of the second original video frame as the first original video frame.

20. The compression method of claim 18, further comprising: The alternative video data is written to an external memory outside the video specification conversion integrated circuit for the video specification conversion integrated circuit to read.

Images