Quantum time synchronization clock difference regulation method, system and device with multi-element fusion
By acquiring the arrival time and frequency offset of entangled photon pairs and using a PID controller to correct the underlying hardware, the problem of high-precision synchronization of remote independent clocks was solved, achieving efficient synchronization at the hardware level.
Patent Information
- Application Number
- CN202610954441.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-06-30
- Publication Date
- 2026-07-28
AI Technical Summary
Existing quantum time synchronization clock difference control methods cannot achieve high-precision synchronization in scenarios with independent clocks in different locations, and rely on external frequency distribution or software control, which leads to resource consumption and environmental interference issues.
By obtaining the arrival time of entangled photon pairs, the frequency offset is calculated using a three-point parabolic interpolation algorithm, and a PID controller is used to perform frequency compensation and phase adjustment on the underlying hardware, achieving high-precision synchronization of remote independent clocks.
High-precision synchronization of remote independent clocks was achieved without relying on external frequency distribution, reducing computational complexity and improving the system's real-time performance and robustness.
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Figure CN122475801A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of quantum communication technology, specifically to a multi-element integrated quantum time synchronization clock difference control method, system, and device. Background Technology
[0002] With the development of high-precision time synchronization in distributed quantum networks, wide-area sensor arrays, and fundamental physics testing, quantum two-way time transfer (Q-TWTT) technology has gradually become a research hotspot. In wide-area deployment scenarios, due to frequency offsets between independent clocks of geographically distant nodes and non-stationary phase drift caused by clock aging or environmental factors, achieving high-precision synchronization of quantum time difference clocks is the research focus of Q-TWTT technology.
[0003] In existing technologies, the main methods for quantum time synchronization clock difference control include: 1. Control method based on common clock configuration. This method avoids the fundamental problem of clock asynchrony, but it cannot be applied to physical scenarios with independent clocks in different locations.
[0004] 2. Utilizing external classical frequency distribution for control. This method requires additional resources, and the system is susceptible to environmental interference.
[0005] 3. Software control method. This method mainly focuses on tracking frequency offset and cannot adjust the underlying hardware layer physically. Summary of the Invention
[0006] This application aims to provide a multi-element integrated quantum time synchronization clock difference control method, system, and device, which can perform high-precision synchronization of remote independent clocks at the hardware level without relying on external frequency distribution.
[0007] The technical solution of this application is implemented as follows: In a first aspect, embodiments of this application provide a multi-element fusion quantum time synchronization clock difference control method. The method includes: acquiring a first arrival time and a second arrival time; determining a frequency offset between a first clock and a second clock based on the first arrival time and the second arrival time, and using the frequency offset to perform frequency compensation on a second terminal; controlling the second terminal to enter a locked state; initializing a proportional-integral-derivative (PID) controller based on the residual error of the frequency offset; and outputting a phase adjustment command through the PID controller, the phase adjustment command being used to correct the underlying hardware parameters of the second terminal. Wherein, the first arrival time is the arrival time of a first entangled photon pair sent from the first terminal to the second terminal, the second arrival time is the arrival time of a second entangled photon pair sent from the second terminal to the first terminal, the first clock is located at the first terminal, and the second clock is located at the second terminal.
[0008] According to the method described in the first aspect of this application, the first arrival time and the second arrival time are determined based on a three-point parabolic interpolation algorithm. The calculation process of the three-point parabolic interpolation algorithm is as follows: acquiring the first cross-correlation data of the first entangled photon pair; extracting the first peak point of the first cross-correlation data; and determining the first arrival time based on the first peak point, the left point adjacent to the first peak point, and the right point adjacent to the first peak point. Alternatively, the calculation process of the three-point parabolic interpolation algorithm is as follows: acquiring the second cross-correlation data of the second entangled photon pair; extracting the second peak point of the second cross-correlation data; and determining the second arrival time based on the second peak point, the left point adjacent to the second peak point, and the right point adjacent to the second peak point.
[0009] According to the method described in the first aspect of this application, determining the frequency offset between the first clock and the second clock based on the first arrival time and the second arrival time includes: calculating the time deviation between the first clock and the second clock based on the first arrival time and the second arrival time; and determining the frequency offset between the first clock and the second clock based on the time deviation.
[0010] According to the method described in the first aspect of this application, the first clock and the second clock have the same reference frequency, and the determination of the frequency offset between the first clock and the second clock based on the time deviation includes: determining the frequency drift rate between the first clock and the second clock based on the time deviation; and converting the reference frequency into the frequency offset based on the frequency drift rate.
[0011] According to the method described in the first aspect of this application, the method further includes asynchronously sending the phase adjustment instruction to the underlying hardware of the second end via User Datagram Protocol (UDP).
[0012] According to the method described in the first aspect of this application, the method further includes: determining the integral term of the PID controller based on the time deviation quadratic accumulation term caused by the aging of the second clock, and determining the proportional term of the PID controller based on the inherent noise and measurement noise of the second clock.
[0013] According to the method described in the first aspect of this application, the method further includes: monitoring the frequency offset between the first clock and the second clock; determining whether the frequency offset is greater than a preset value; if so, releasing the locking state and performing frequency compensation on the second terminal based on the frequency offset.
[0014] Secondly, embodiments of this application provide a multi-element fusion quantum time synchronization clock difference control system, comprising: an arrival time acquisition module, a frequency compensation module, and a PID control module. The arrival time acquisition module acquires a first arrival time and a second arrival time; the frequency compensation module determines the frequency offset between the first clock and the second clock based on the first and second arrival times acquired by the arrival time acquisition module, and uses the frequency offset to perform frequency compensation on the second terminal; the PID control module controls the second terminal to enter a locked state, initializes the PID control module based on the residual error of the frequency offset obtained by the frequency compensation module, and outputs a phase adjustment command through the PID control module, the phase adjustment command being used to correct the underlying hardware parameters of the second terminal. Wherein, the first arrival time is the arrival time of a first entangled photon pair sent from the first terminal to the second terminal, the second arrival time is the arrival time of a second entangled photon pair sent from the second terminal to the first terminal, the first clock is located at the first terminal, and the second clock is located at the second terminal.
[0015] Thirdly, embodiments of this application provide a multi-element integrated quantum time synchronization clock difference control device, comprising: a processor and a memory; wherein, The memory is used to store computer programs; The processor is configured to call and run the computer program from the memory to perform the method as described in the first aspect.
[0016] Fourthly, embodiments of this application provide a computer-readable storage medium storing executable instructions for causing a processor to perform the method described in the first aspect.
[0017] This application provides a multi-element fusion quantum time synchronization clock difference control method, system, and device. The method includes: acquiring a first arrival time and a second arrival time; determining a frequency offset between a first clock and a second clock based on the first arrival time and the second arrival time, and using the frequency offset to perform frequency compensation on a second terminal; controlling the second terminal to enter a locked state; initializing a PID controller based on the residual error of the frequency offset; and outputting a phase adjustment command through the PID controller. The phase adjustment command is used to correct the underlying hardware parameters of the second terminal. The first arrival time is the arrival time of a first entangled photon pair sent from the first terminal to the second terminal, and the second arrival time is the arrival time of a second entangled photon pair sent from the second terminal to the first terminal. The first clock is located at the first terminal, and the second clock is located at the second terminal. In this scheme, on the one hand, the dependence on external frequency distribution during synchronization is avoided by having the first and second terminals respectively transmit entangled photon pairs to each other; on the other hand, feedforward control based on frequency offset compensation is integrated with PID feedback control that corrects the underlying hardware parameters through a PID controller, thereby achieving closed-loop phase control of the second terminal at the hardware level. Therefore, this application enables high-precision synchronization of remote independent clocks at the hardware level without relying on external frequency distribution. Attached Figure Description
[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the technical solutions of this application. Obviously, the drawings described below are merely some embodiments of this application, and those skilled in the art can obtain other drawings based on these drawings without any inventive effort.
[0019] The flowcharts shown in the accompanying drawings are merely illustrative and do not necessarily include all content and operations / steps, nor do they necessarily have to be performed in the described order. For example, some operations / steps can be broken down, while others can be combined or partially combined; therefore, the actual execution order may change depending on the specific circumstances.
[0020] Figure 1 A schematic diagram of an optional process for a multi-element fusion quantum time synchronization clock difference control method provided in an embodiment of this application; Figure 2 A schematic diagram of a multi-element fusion quantum time synchronization clock difference control system provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a multi-element fusion quantum time synchronization clock difference control device provided in an embodiment of this application. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the specific technical solutions of this application will be further described in detail below with reference to the accompanying drawings of the embodiments of this application. The following embodiments are used to illustrate this application, but are not intended to limit the scope of this application.
[0022] Unless otherwise defined, all technical and scientific terms used in this application have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains. The terminology used in this application is for the purpose of describing embodiments of this application only and is not intended to be limiting of this application.
[0023] In the following description, references to "some embodiments," "this embodiment," "this application embodiment," and examples, etc., describe a subset of all possible embodiments. However, it is understood that "some embodiments" may be the same subset or different subset of all possible embodiments and may be combined with each other without conflict.
[0024] If the application documents contain similar descriptions such as "first / second", the following explanation shall be added: In the following description, the terms "first / second / third" are used only to distinguish similar objects and do not represent a specific order of objects. It is understood that "first / second / third" may be interchanged in a specific order or sequence where permitted, so that the embodiments of this application described herein can be implemented in an order other than that illustrated or described herein.
[0025] This application provides a multi-element fusion quantum time synchronization clock difference control method. Figure 1 This is an optional flowchart illustrating a multi-element fusion quantum time synchronization clock difference control method provided in an embodiment of this application, which will combine... Figure 1 The steps shown are explained.
[0026] S101, Obtain the first arrival time and the second arrival time.
[0027] In some embodiments of this application, the first arrival time is the arrival time of the first entangled photon pair sent from the first end to the second end, and the second arrival time is the arrival time of the second entangled photon pair sent from the second end to the first end.
[0028] In some embodiments of this application, the method provided in this application can be used to regulate the quantum time synchronization clock difference between a first clock and a second clock, wherein the first clock is located at a first end and the second clock is located at a second end.
[0029] In some embodiments of this application, the first entangled photon pair and the second entangled photon pair are transmitted between the first end and the second end via an optical fiber.
[0030] In some embodiments of this application, the optical fiber described above can be a 50-kilometer standard single-mode optical fiber.
[0031] In some embodiments of this application, the first clock and the second clock are independent clocks.
[0032] In some embodiments of this application, the first entangled photon pair is transmitted by an independent frequency-entangled two-photon source located at the first end, and the second entangled photon pair is transmitted by an independent frequency-entangled two-photon source located at the second end.
[0033] In some embodiments of this application, the first entangled photon pair includes a first signal photon and a first idle photon, and the second entangled photon pair includes a second signal photon and a second idle photon.
[0034] In some embodiments of this application, an indium gallium arsenide / indium phosphide semiconductor single-photon detector (InGaAs / InP) is used to detect the first entangled photon pair or the second entangled photon pair.
[0035] In some embodiments of this application, the inherent jitter of the InGaAs / InP semiconductor single-photon detector is 150 ps.
[0036] In some embodiments of this application, the first arrival time is obtained based on the timestamp sequence of the first signal photon and the timestamp sequence of the first idle photon, and the second arrival time is obtained based on the timestamp sequence of the second signal photon and the timestamp sequence of the second idle signal photon.
[0037] In some embodiments of this application, the timestamp sequence of the first signal photon and the timestamp sequence of the first idle photon are recorded by the second event timer at the second end, and the timestamp sequence of the second signal photon and the timestamp sequence of the second idle photon are recorded by the first event timer at the first end.
[0038] In some embodiments of this application, the local clock of the first event timer is the first clock, and the local clock of the second event timer is the second clock.
[0039] In some embodiments of this application, the first clock or the second clock mentioned above can be any of the following: a rubidium clock, a temperature-controlled crystal oscillator, or other local clock frequency reference devices. This application does not limit the specific clock to any of these.
[0040] In some embodiments of this application, the first end is a reference end and the second end is a synchronization end, or the first end is a synchronization end and the second end is a reference end.
[0041] In some embodiments of this application, the first arrival time and the second arrival time are determined based on a three-point parabolic interpolation algorithm, the calculation process of which is as follows: S101a1: Obtain the first cross-correlation data of the first entangled photon pair mentioned above; S101a2: Extract the first peak point of the above first cross-correlation data; S101a3: The first arrival time is determined based on the first peak point, the left point and the right point adjacent to the first peak point.
[0042] Alternatively, the calculation process of this three-point parabolic interpolation algorithm is as follows: S101b1: Obtain the second cross-correlation data of the second entangled photon pair mentioned above; S101b2: Extract the second peak point of the above second cross-correlation data; S101b3: Determine the second arrival time based on the second peak point, the left point adjacent to the second peak point, and the right point adjacent to the second peak point.
[0043] Specifically, steps S101a1-S101a3 are used to calculate the first arrival time, and steps S101b1-S101b3 are used to calculate the second arrival time.
[0044] In some embodiments of this application, the first cross-correlation data is the cross-correlation data between the timestamp sequence of the first signal photon and the timestamp sequence of the first idle photon, and the second cross-correlation data is the cross-correlation data between the timestamp sequence of the second signal photon and the timestamp sequence of the second idle photon.
[0045] In some embodiments of this application, the first peak point is the peak point of the first cross-correlation data, and the second peak point is the peak point of the second cross-correlation data.
[0046] In some embodiments of this application, the leftmost point adjacent to the first peak point is the cross-correlation data of the previous time moment adjacent to the time moment corresponding to the first peak point in the first cross-correlation data; the rightmost point adjacent to the first peak point is the cross-correlation data of the next time moment adjacent to the time moment corresponding to the first peak point in the first cross-correlation data.
[0047] In some embodiments of this application, the leftmost point adjacent to the second peak point is the cross-correlation data of the previous time point adjacent to the time corresponding to the second peak point in the second cross-correlation data, and the rightmost point adjacent to the second peak point is the cross-correlation data of the next time point adjacent to the time corresponding to the second peak point in the second cross-correlation data.
[0048] In some embodiments of this application, the specific steps for determining the first arrival time based on the first peak point, the left point adjacent to the first peak point, and the right point are as follows: A1: Calculate the first offset coefficient; A2: Determine the first arrival time based on the first offset coefficient mentioned above.
[0049] Let the first cross-correlation data be... (M is a positive integer), the first peak point of the first cross-correlation data is (m=1,2,……M), the leftmost point adjacent to the first peak point mentioned above is... The point to the right of the first peak point mentioned above is Then the first offset coefficient It can be obtained through the following formula 1: (Formula 1) Based on this, the first arrival time It can be obtained through the following formula 2: (Formula 2) Among them, the above parameters This represents the interval width of the first cross-correlation data distribution plot.
[0050] In some embodiments of this application, the specific steps for determining the second arrival time based on the second peak point, the left point adjacent to the second peak point, and the right point are as follows: B1: Calculate the second offset coefficient; B2: Determine the second arrival time based on the second offset coefficient mentioned above.
[0051] Let the second cross-correlation data be (N is a positive integer), the second peak point of the second cross-correlation data is (n=1,2,……N), the leftmost point adjacent to the second peak point mentioned above is The point to the right of the aforementioned second peak point is Then the second offset coefficient It can be obtained through the following formula 3: (Formula 3) Based on this, the second arrival time It can be obtained through the following formula 4: (Formula 4) Among them, the above parameters This represents the interval width of the second cross-correlation data distribution plot.
[0052] Understandably, the computational complexity of calculating the first or second arrival time using the conventional Gaussian fitting algorithm is O(N), while the computational complexity of calculating the first or second arrival time using the three-point parabolic interpolation algorithm provided in this application is O(1). In other words, the three-point parabolic interpolation algorithm provided in this application can reduce a single operation to the microsecond level. This low latency can overcome the phase lag phenomenon caused by the use of the Gaussian fitting algorithm in the prior art, enabling the system to operate stably under high data throughput, thereby providing a more sufficient computing power buffer for high-frequency hardware physical layer updates.
[0053] In some embodiments of this application, the first arrival time and the second arrival time are first determined based on the three-point parabola algorithm, and then the second end is frequency compensated and PID feedback corrected using the first arrival time and the second arrival time.
[0054] Thus, since the first and second arrival times are determined based on the three-point parabolic interpolation algorithm, the computational complexity of the remote independent clock synchronization process is reduced and the real-time performance of the system is improved compared to the traditional Gaussian fitting algorithm.
[0055] S102. Based on the first arrival time and the second arrival time, determine the frequency offset between the first clock and the second clock, and use the frequency offset to perform frequency compensation on the second end.
[0056] In some embodiments of this application, the frequency offset is used to perform frequency compensation on the programmable phase tuner at the second end.
[0057] In some embodiments of this application, after determining the frequency offset, a control command can be sent to the programmable phase tuner at the second end based on the frequency offset. After receiving the control command, the programmable phase tuner performs phase fine-tuning based on the control command, thereby achieving frequency compensation for the second end.
[0058] In some embodiments of this application, determining the frequency offset between the first clock and the second clock based on the first arrival time and the second arrival time may include the following steps S102a and S102b: S102a: Based on the first arrival time and the second arrival time, calculate the time deviation between the first clock and the second clock; S102b: Determine the frequency offset between the first clock and the second clock based on the aforementioned time deviation.
[0059] In some embodiments of this application, the time deviation between the first clock and the second clock is obtained by subtracting the first arrival time and the second arrival time.
[0060] It should be noted that the first arrival time and the second arrival time used to calculate the time deviation are the first arrival time and the second arrival time corresponding to the second end in the unlocked state.
[0061] In some embodiments of this application, the aforementioned time deviation includes multiple time deviations, each time deviation corresponding to a collection time. Each time deviation is determined based on the timestamp sequence of all first signal photon events, the timestamp sequence of first idle photon events, the timestamp sequence of second signal photon events, and the timestamp sequence of second idle photon events obtained before the collection time corresponding to the time deviation.
[0062] For example, suppose the acquisition time corresponding to any time deviation is... Then collect first Up to a certain point, the first event timer records the timestamp sequence of the second signal photon and the timestamp sequence of the second idle photon. Based on these timestamp sequences, the second arrival time is determined. Similarly, the timestamp sequences of the second signal photon and the second idle photon are collected first. Up to a certain point, the second event timer records the timestamp sequence of the first signal photon and the timestamp sequence of the first idle photon. Based on these timestamp sequences, the first arrival time is determined, and the first arrival time is subtracted from the second arrival time to obtain the second arrival time. The time deviation corresponding to each moment.
[0063] Understandably, according to the Q-TWTT protocol, the bidirectional path between the first and second ends is reciprocal. Therefore, common-mode link delay can be eliminated by subtracting the first and second arrival times on the bidirectional path.
[0064] In some embodiments of this application, the first clock and the second clock have the same reference frequency. Based on this, step S102b may include steps S102b1 and S102b2: S102b1: Determine the frequency drift rate between the first clock and the second clock based on the aforementioned time deviation; S102b2: Based on the above frequency drift rate, convert the reference frequency into the above frequency offset.
[0065] In some embodiments of this application, the frequency drift rate is determined based on all time deviations calculated within a preset duration up to the current moment.
[0066] In some embodiments of this application, the frequency drift rate is determined by linearly fitting all time deviations calculated within a preset duration up to the current moment.
[0067] In some embodiments of this application, the frequency drift rate is the reciprocal of the slope of the fitted curve obtained by linearly fitting the time deviation.
[0068] In some embodiments of this application, the preset duration may be a pre-set duration or a user-defined duration; this application does not limit this.
[0069] In some embodiments of this application, the reference frequency can be 10 MHz, 20 MHz, or other reference frequencies, and this application does not limit this.
[0070] In some embodiments of this application, after obtaining the time deviation based on the first arrival time and the second arrival time, the frequency drift rate is obtained based on the time deviation, and then the frequency offset is obtained based on the frequency drift rate and the reference frequency. Finally, frequency compensation is performed on the second end based on the frequency offset.
[0071] Thus, since the frequency drift rate can accurately reflect the frequency drift between the first clock and the second clock, the frequency offset obtained based on the frequency drift rate is closer to the actual frequency offset between the first clock and the second clock. Therefore, after frequency compensation at the second end, the accuracy of remote independent clock synchronization is improved.
[0072] S103: Control the second terminal to enter the locked state, initialize the PID controller based on the residual error of the frequency offset, and output a phase adjustment command through the PID controller. This phase adjustment command is used to correct the underlying hardware parameters of the second terminal.
[0073] In some embodiments of this application, the underlying hardware package of the second end is a programmable phase fine-tuner.
[0074] In some embodiments of this application, the PID controller periodically outputs the phase adjustment command.
[0075] In one example, the output period of the phase adjustment command is 2s, 3s, or other periods, and this application embodiment does not limit this.
[0076] It is understandable that by modifying the underlying hardware parameters of the second end, the clock difference between the first and second ends can be adjusted, thereby enabling synchronization of the local clock of the first end and the local clock of the second end.
[0077] In some embodiments of this application, initializing the PID controller based on the residual error of the frequency offset includes: initializing the integrator of the PID controller based on the residual error of the frequency offset.
[0078] In some embodiments of this application, the PID controller described above may be located in a computer at the first end, or the PID controller may be located in the cloud.
[0079] In some embodiments of this application, a computer is also provided at the second end, and the computer at the second end can interact with the first end for data and instructions via a local area network.
[0080] In some embodiments of this application, the computer at the first end and the computer at the second end can be microcomputers or chips.
[0081] It should be noted that when performing frequency compensation based on frequency offset, there will be residual error in frequency offset due to the limited accuracy of frequency compensation. However, after completing frequency compensation and switching the second end to the locked state, this application introduces a PID controller and initializes the PID controller based on the residual error, which can prevent transient oscillation after the second end changes from the unlocked state to the locked state.
[0082] In some embodiments of this application, after frequency compensation is performed on the second terminal, the underlying hardware of the second terminal is corrected by controlling the second terminal to enter a locked state and by using a PID controller.
[0083] In this way, real-time correction of the underlying hardware is achieved during the synchronization of independent clocks in different locations.
[0084] In some embodiments of this application, the multi-element fusion quantum time synchronization clock difference control method provided in this application further includes the following step S104: S104. The phase adjustment command is asynchronously sent to the underlying hardware of the second end via UDP.
[0085] In some embodiments of this application, the phase adjustment command can be sent to the underlying hardware of the second end by the aforementioned computer or cloud.
[0086] In some embodiments of this application, the underlying hardware of the second end may include a programmable phase tuner.
[0087] In some embodiments of this application, after obtaining the phase adjustment instruction, the phase adjustment instruction can be asynchronously sent to the underlying hardware of the second end via UDP.
[0088] In some embodiments of this application, the phase adjustment instruction is used to control the programmable phase fine-tuner to adjust the clock phase or clock frequency of the second terminal.
[0089] In this way, a closed-loop adjustment of the second end through hardware and software coordination is achieved.
[0090] In some embodiments of this application, the multi-element fusion quantum time synchronization clock difference control method provided in this application may further include the following steps S105a and S105b: S105a: Monitor the frequency offset between the first clock and the second clock mentioned above; S105b: Determine whether the frequency offset is greater than a preset value. If so, release the locking state and perform frequency compensation on the second terminal based on the frequency offset.
[0091] In some embodiments of this application, after the above-mentioned locking state is released and frequency compensation is performed on the second end based on the above-mentioned frequency offset, the second end is controlled to restore the locking state and return to continue executing the above-mentioned step S103.
[0092] In some embodiments of this application, if it is determined that the frequency offset is less than or equal to a preset value, the frequency offset of the first clock and the second clock continues to be monitored.
[0093] In some embodiments of this application, after releasing the above-mentioned locked state and performing frequency compensation on the second end based on the above-mentioned frequency offset, the method provided by this application further includes: controlling the second end to restore the locked state and returning to continue executing the above-mentioned step S103.
[0094] It is understandable that when the frequency offset is detected to be greater than the preset value, it indicates that the second end has been subjected to a sudden large-scale phase jump caused by environmental thermal shock and other factors. At this time, the PID feedback mechanism is temporarily suspended (i.e., the locked state is released) and a direct frequency compensation is triggered. After completion, the closed loop is restored, thereby ensuring the robustness of the system in the engineering environment. In some embodiments of this application, the multi-element fusion quantum time synchronization clock difference control method provided in this application further includes the following step S106: S106: Determine the integral term of the PID controller based on the time deviation quadratic accumulation term caused by the aging of the second clock, and determine the proportional term of the PID controller based on the inherent noise and measurement noise of the second clock.
[0095] In some embodiments of this application, the derivative term of the PID controller can be set to 0.
[0096] It is understandable that by setting the integral term of the PID controller, the steady-state error caused by clock aging can be suppressed. However, the random fluctuations caused by the built-in noise and measurement noise of the second clock can be suppressed by setting the proportional term of the PID controller.
[0097] The multi-element fusion quantum time synchronization clock difference control method provided in this application includes: acquiring a first arrival time and a second arrival time; determining the frequency offset between a first clock and a second clock based on the first arrival time and the second arrival time, and using the frequency offset to perform frequency compensation on the second end; controlling the second end to enter a locked state; initializing a PID controller based on the residual error of the frequency offset; and outputting a phase adjustment command through the PID controller. The phase adjustment command is used to correct the underlying hardware parameters of the second end. The first arrival time is the arrival time of a first entangled photon pair sent from the first end to the second end, and the second arrival time is the arrival time of a second entangled photon pair sent from the second end to the first end. The first clock is located at the first end, and the second clock is located at the second end. In this scheme, on the one hand, the dependence on external frequency distribution during synchronization is avoided by having the first end and the second end respectively transmit entangled photon pairs to each other; on the other hand, feedforward control based on frequency offset compensation is integrated with PID feedback control that corrects the underlying hardware parameters through a PID controller, thereby performing closed-loop phase control on the second end at the hardware level. Therefore, this application enables high-precision synchronization of remote independent clocks at the hardware level without relying on external frequency distribution.
[0098] Based on the multi-element fusion quantum time synchronization clock difference control method described in the above embodiments, this application also provides a multi-element fusion quantum time synchronization clock difference control system, such as... Figure 3 As shown, Figure 3 This is a schematic diagram of a multi-element fusion quantum time synchronization clock difference control system provided in an embodiment of this application. The multi-element fusion quantum time synchronization clock difference control system includes: arrival time acquisition module 201, frequency compensation module 202, and PID control module 203.
[0099] The aforementioned arrival time acquisition module 201 is used to acquire the first arrival time and the second arrival time; The frequency compensation module 202 is used to determine the frequency offset between the first clock and the second clock based on the first arrival time and the second arrival time obtained by the arrival time acquisition module 202, and to use the frequency offset to perform frequency compensation on the second end. The aforementioned PID control module 203 is used to control the aforementioned second terminal to enter a locked state. The PID control module 203 is initialized based on the residual error of the frequency offset obtained by the aforementioned frequency compensation module 202, and the PID control module 203 outputs a phase adjustment command, which is used to correct the underlying hardware parameters of the aforementioned second terminal. Wherein, the first arrival time is the arrival time of the first entangled photon pair sent from the first end to the second end, the second arrival time is the arrival time of the second entangled photon pair sent from the second end to the first end, the first clock is located at the first end, and the second clock is located at the second end.
[0100] It should be noted that the PID control module 203 mentioned above is the PID controller provided in the embodiments of this application.
[0101] In some embodiments of this application, the system further includes an arrival time calculation module 204, which is used to determine the first arrival time and the second arrival time based on a three-point parabolic interpolation algorithm. The calculation process of the three-point parabolic interpolation algorithm is as follows: acquiring the first cross-correlation data of the first entangled photon pair; extracting the first peak point of the first cross-correlation data; and determining the first arrival time based on the first peak point, the left point adjacent to the first peak point, and the right point adjacent to the first peak point. Alternatively, the calculation process of the three-point parabolic interpolation algorithm is as follows: acquiring the second cross-correlation data of the second entangled photon pair; extracting the second peak point of the second cross-correlation data; and determining the second arrival time based on the second peak point, the left point adjacent to the second peak point, and the right point adjacent to the second peak point.
[0102] In some embodiments of this application, the arrival time calculation module 204 can be a single module. In this case, the arrival time calculation module can be located locally at the first end, locally at the second end, or in the cloud.
[0103] In some embodiments of this application, the arrival time calculation module 204 may include a first arrival time calculation module 204a and a second arrival time calculation module 204b. The first arrival time calculation module 204a is used to determine the first arrival time based on a three-point parabolic interpolation algorithm, and the second arrival time calculation module 204b is used to determine the second arrival time based on the same algorithm. It should be noted that the relevant process for calculating the first or second arrival time based on the three-point parabolic interpolation algorithm can be found in the above description, and will not be repeated here to avoid repetition.
[0104] In some embodiments of this application, when the arrival time calculation module 204 includes a first arrival time calculation module 204a and a second arrival time calculation module 204b, the first arrival time calculation module 204a can be located locally at the second end or in the cloud, and the second arrival time calculation module 204b can be located locally at the first end or in the cloud.
[0105] In some embodiments of this application, determining the frequency offset between the first clock and the second clock based on the first arrival time and the second arrival time obtained by the arrival time acquisition module 201 includes: calculating the time deviation between the first clock and the second clock based on the first arrival time and the second arrival time obtained by the arrival time acquisition module 201; and determining the frequency offset between the first clock and the second clock based on the time deviation.
[0106] In some embodiments of this application, the first clock and the second clock have the same reference frequency. Determining the frequency offset between the first clock and the second clock based on the time deviation includes: determining the frequency drift rate between the first clock and the second clock based on the time deviation; and converting the reference frequency into the frequency offset based on the frequency drift rate.
[0107] In some embodiments of this application, the PID control module 203 is further configured to asynchronously send the phase adjustment command to the underlying hardware of the second end via UDP.
[0108] In some embodiments of this application, the PID control module 203 is further configured to: determine the integral term of the PID control module 203 based on the time deviation secondary accumulation term caused by the aging of the second clock, and determine the proportional term of the PID control module 203 based on the inherent noise and measurement noise of the second clock.
[0109] In some embodiments of this application, the system further includes a monitoring module 205. The monitoring module 205 is configured to: monitor the frequency offset between the first clock and the second clock; determine whether the frequency offset is greater than a preset value; if so, release the locking state and perform frequency compensation on the second terminal based on the frequency offset.
[0110] Based on the multi-element fusion quantum time synchronization clock difference control method described in the above embodiments, this application also provides a multi-element fusion quantum time synchronization clock difference control device, such as... Figure 3 As shown, Figure 3 This is a schematic diagram of a multi-element fusion quantum time synchronization clock difference control device provided in an embodiment of this application. The multi-element fusion quantum time synchronization clock difference control device 3 includes a processor 301 and a memory 302. The memory 302 is used to store a computer program; the processor 301 is used to call and run the computer program from the memory to execute a multi-element fusion quantum time synchronization clock difference control method as described in the above embodiment.
[0111] In the embodiments of this application, the processor 301 described above can be at least one of the following: Application-Specific Integrated Circuit (ASIC), Digital Signal Processor (DSP), Digital Signal Processing Device (DSPD), Programmable Logic Device (PLD), Field Programmable Gate Array (FPGA), Central Processing Unit (CPU), Controller, Microcontroller, and Microprocessor. It is understood that for different devices, the electronic device used to implement the above processor function can also be other types, and the embodiments of this application do not specifically limit it.
[0112] This application provides a computer-readable storage medium storing a computer program for implementing, when executed by a processor, a multi-element fusion quantum time synchronization clock difference control method as described in any of the above embodiments.
[0113] For example, the program instructions corresponding to a multi-element fusion quantum time synchronization clock difference control method in this embodiment can be stored on storage media such as optical discs, hard disks, and USB flash drives. When the program instructions corresponding to an entangled photon pair time offset measurement method in the storage medium are read or executed by an electronic device, an entangled photon pair time offset measurement method as described in any of the above embodiments can be implemented.
[0114] Furthermore, in the embodiments of this application, the functional modules can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional module.
[0115] If the integrated unit is implemented as a software functional module and is not sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this embodiment, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the method of this embodiment. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0116] It should be understood that the phrases "one embodiment," "an embodiment," or "some embodiments" mentioned throughout the specification mean that a specific feature, structure, or characteristic related to the embodiment is included in at least one embodiment of this application. Therefore, "in one embodiment," "in one embodiment," or "in some embodiments" appearing throughout the specification do not necessarily refer to the same embodiment. Furthermore, these specific features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. It should be understood that in the various embodiments of this application, the sequence numbers of the above-described processes do not imply a sequential order of execution; the execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application. The sequence numbers of the embodiments in this application are merely for descriptive purposes and do not represent the superiority or inferiority of the embodiments. The descriptions of the various embodiments above tend to emphasize the differences between the various embodiments; their similarities or commonalities can be referred to mutually, and for the sake of brevity, these will not be repeated here.
[0117] The modules described above as separate components may or may not be physically separate. The components shown as modules may or may not be physical modules. They may be located in one place or distributed across multiple network units. Some or all of the modules may be selected to achieve the purpose of this embodiment according to actual needs.
[0118] In addition, each functional module in the various embodiments of this application can be integrated into one processing unit, or each module can be a separate unit, or two or more modules can be integrated into one unit; the integrated modules can be implemented in hardware or in the form of hardware plus software functional units.
[0119] Those skilled in the art will understand that all or part of the steps of the above method embodiments can be implemented by hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When the program is executed, it performs the steps of the above method embodiments. The aforementioned storage medium includes various media that can store program code, such as mobile storage devices, ROMs, magnetic disks, or optical disks.
[0120] The methods disclosed in the several method embodiments provided in this application can be arbitrarily combined without conflict to obtain new method embodiments.
[0121] The features disclosed in the several product embodiments provided in this application can be arbitrarily combined without conflict to obtain new product embodiments.
[0122] The features disclosed in the several method or device embodiments provided in this application can be arbitrarily combined without conflict to obtain new method or device embodiments.
[0123] The above description is merely an embodiment of this application, but the protection scope of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the protection scope of this application. Therefore, the protection scope of this application should be determined by the protection scope of the claims.
Claims
1. A multi-element fusion quantum time synchronization clock difference regulation method, characterized in that, The method includes: Obtain the first and second arrival times; The frequency offset between the first clock and the second clock is determined based on the first arrival time and the second arrival time, and the frequency offset is used to perform frequency compensation on the second end. The second terminal is controlled to enter a locked state. The proportional-integral-derivative (PID) controller is initialized based on the residual error of the frequency offset, and the phase adjustment command is output through the PID controller. The phase adjustment command is used to correct the underlying hardware parameters of the second terminal. Wherein, the first arrival time is the arrival time of the first entangled photon pair sent from the first end to the second end, the second arrival time is the arrival time of the second entangled photon pair sent from the second end to the first end, the first clock is located at the first end, and the second clock is located at the second end.
2. The method according to claim 1, characterized in that, Before obtaining the first arrival time and the second arrival time, the method further includes: determining the first arrival time and the second arrival time based on a three-point parabolic interpolation algorithm, the calculation process of which is as follows: Obtain the first cross-correlation data of the first entangled photon pair; Extract the first peak point of the first cross-correlation data; The first arrival time is determined based on the first peak point, the left point adjacent to the first peak point, and the right point adjacent to the first peak point; or Obtain the second cross-correlation data of the second entangled photon pair; Extract the second peak point of the second cross-correlation data; The second arrival time is determined based on the second peak point, the left point adjacent to the second peak point, and the right point adjacent to the second peak point.
3. The method according to any one of claims 1-2, characterized in that, Determining the frequency offset between the first clock and the second clock based on the first arrival time and the second arrival time includes: Based on the first arrival time and the second arrival time, calculate the time deviation between the first clock and the second clock; The frequency offset between the first clock and the second clock is determined based on the time deviation.
4. The method according to claim 3, characterized in that, The first clock and the second clock have the same reference frequency, and determining the frequency offset between the first clock and the second clock based on the time deviation includes: The frequency drift rate between the first clock and the second clock is determined based on the time deviation; Based on the frequency drift rate, the reference frequency is converted into the frequency offset.
5. The method according to any one of claims 1-2, characterized in that, The method further includes: asynchronously sending the phase adjustment command to the underlying hardware of the second end via User Datagram Protocol (UDP).
6. The method according to claim 1 or 4, characterized in that, The method further includes: The integral term of the PID controller is determined based on the time deviation quadratic accumulation term caused by the aging of the second clock, and the proportional term of the PID controller is determined based on the inherent noise and measurement noise of the second clock.
7. The method according to any one of claims 1-5, characterized in that, The method further includes: Monitor the frequency offset between the first clock and the second clock; Determine whether the frequency offset is greater than a preset value. If so, release the locking state and perform frequency compensation on the second end based on the frequency offset.
8. A multi-element integrated quantum time synchronization clock difference control system, characterized in that, The system includes: an arrival time acquisition module, a frequency compensation module, and a PID control module. The arrival time acquisition module is used to acquire the first arrival time and the second arrival time; The frequency compensation module is used to determine the frequency offset between the first clock and the second clock based on the first arrival time and the second arrival time obtained by the arrival time acquisition module, and to use the frequency offset to perform frequency compensation on the second end. The PID control module is used to control the second terminal to enter the locked state, initialize the PID control module based on the residual error of the frequency offset obtained by the frequency compensation module, and output a phase adjustment command through the PID control module. The phase adjustment command is used to correct the underlying hardware parameters of the second terminal. Wherein, the first arrival time is the arrival time of the first entangled photon pair sent from the first end to the second end, the second arrival time is the arrival time of the second entangled photon pair sent from the second end to the first end, the first clock is located at the first end, and the second clock is located at the second end.
9. A multi-element integrated quantum time synchronization clock difference control device, characterized in that, include: Processor and memory, of which, The memory is used to store computer programs; The processor is configured to call and run the computer program from the memory to perform the method as described in any one of claims 1-7.
10. A computer-readable storage medium, characterized in that, It stores executable instructions for causing a processor to execute, thereby implementing the method of any one of claims 1 to 7.