A beidou multi-frequency point receiver time service method for anti-interference antenna

Abstract

This invention discloses a timing method for a BeiDou multi-frequency receiver using an anti-interference antenna, comprising: receiving and processing analog radio frequency signals from the anti-interference antenna, and simultaneously capturing and tracking satellite signals at a first frequency and a second frequency; selecting common satellites that meet the stable tracking conditions from satellites with dual-frequency observations; calculating the difference between the local clock difference of the first and second single-satellite signals of each common satellite to obtain the single-satellite dual-frequency clock difference difference; averaging the single-satellite dual-frequency clock difference differences of all common satellites to obtain the inter-frequency clock difference difference; when the first frequency signal is normal, using the local clock difference of the first frequency to calibrate the local time and output a second pulse; when the first frequency is interfered with but the second frequency is normal, using the local clock difference of the second frequency and the inter-frequency clock difference difference to jointly calibrate the output second pulse. By averaging the inter-frequency compensation difference among multiple dual-frequency common satellites, the stability of the second pulse during multi-frequency switching is improved, and the jump problem caused by the difference in antenna frequency channel delay is solved.

Description

Technical Field

[0001] This invention relates to the field of BeiDou satellite navigation timing technology, and in particular to a BeiDou multi-frequency receiver timing method for anti-interference antennas. Background Technology

[0002] The BeiDou Navigation Satellite System is a global satellite navigation system independently developed by my country. Currently, it broadcasts signals on multiple civilian and military frequencies to users. To improve positioning accuracy and anti-jamming capabilities, BeiDou receivers typically receive satellite signals from multiple frequencies simultaneously. Particularly in the military field, to enhance electronic warfare capabilities, anti-jamming antennas are widely used to ensure the system can maintain its positioning and timing functions even when the enemy uses high-power signals for suppression operations.

[0003] However, when the receiver works in conjunction with the anti-jamming antenna, second pulse jumps occur when using different frequencies for positioning and timing calculations. For example, when multiple frequencies are interfering in the battlefield environment, the receiver will repeatedly switch clock difference sources between frequencies B1 and B3 to output the second pulse, causing repeated jumps in the second pulse timing. This jump severely affects the stability of weapon system time synchronization, thereby weakening combat effectiveness. Further analysis reveals that the root cause of this jump phenomenon lies in the fact that the anti-jamming antenna introduces inconsistent baseband processing delays into the RF channels of different operating frequencies during spatial filtering and adaptive nulling. This results in a fixed hardware channel delay difference between the receiver's local clock difference calculated from the same satellite at different frequencies. If the receiver directly switches between different frequencies without compensating for this difference, the output second pulse will exhibit a corresponding phase jump.

[0004] To address the aforementioned issues, a common approach in existing technologies is to compensate for different frequency points using a pre-calibrated fixed clock difference. This method, during factory or initial system calibration, obtains a fixed delay difference between two frequency points through measurement and writes this fixed value into the receiver firmware. This fixed difference is consistently used for correction during actual time synchronization. However, this approach has significant shortcomings: firstly, the fixed compensation value cannot adapt to the dynamic drift of RF link delay under complex electromagnetic environments and temperature variations; the compensation accuracy decreases significantly as the device's operating status and environmental parameters change. Secondly, existing solutions typically only passively switch to a backup frequency point after the current operating frequency signal completely fails. During the switching process, brief interruptions or phase abrupt changes in the second pulse are prone to occur, lacking proactive prediction of frequency signal quality and real-time detection of the output second pulse's validity.

[0005] In addition, existing technologies also include schemes that calculate receiver clock bias by selecting the single satellite with the highest elevation angle and use this clock bias as a reference for frequency point compensation. Although such methods reduce computational complexity, they rely solely on observations from a single satellite. The clock bias calculation results are greatly affected by ionospheric and tropospheric model residuals and satellite clock bias errors, resulting in significant drift in the compensation values. This makes it difficult to meet the stability requirements of high-precision time synchronization applications.

[0006] In summary, existing BeiDou multi-frequency receiver timing methods using anti-interference antennas generally suffer from low compensation accuracy, poor environmental adaptability, easy jumps during switching, and lack of pulse validity verification. Therefore, there is an urgent need to propose a highly stable timing method that can accurately calibrate the inter-frequency delay difference of anti-interference antennas, dynamically adapt to environmental changes, achieve seamless switching between multiple frequencies, and effectively verify the output second pulse. Summary of the Invention

[0007] The purpose of this invention is to provide a timing method for a BeiDou multi-frequency receiver for anti-interference antennas. By screening dual-frequency common satellites and calculating the inter-frequency clock difference based on the average of multiple satellites for timing compensation, the stability of the second pulse output during multi-frequency switching of the anti-interference antenna is improved, and the problem of second pulse jump caused by the difference in hardware channel delay at different frequencies of the anti-interference antenna is solved.

[0008] To address the aforementioned technical problems, a first aspect of this invention provides a timing method for a BeiDou multi-frequency receiver using an anti-interference antenna, comprising the following steps: Step S100: Receive and process analog radio frequency signals from the anti-interference antenna to simultaneously capture and track satellite signals at at least one first frequency point and one second frequency point; Step S200: Select satellites that meet the preset stable tracking conditions from satellites that simultaneously have observation values ​​at the first frequency point and observation values ​​at the second frequency point as common satellites; Step S300: For each of the aforementioned public satellites, calculate the difference between the local clock difference of the first single satellite corresponding to the first frequency point and the local clock difference of the second single satellite corresponding to the second frequency point to obtain the single-satellite dual-frequency clock difference difference. Step S400: Calculate the average value of the single-satellite dual-frequency clock difference for all the public satellites to obtain the inter-frequency clock difference value. The inter-frequency clock difference value characterizes the hardware channel delay difference of the anti-interference antenna between the first frequency point and the second frequency point. Step S500: When the first frequency signal is normal, the local time is calibrated by the local clock difference obtained based on the first frequency to output a second pulse; when the first frequency signal is interfered with and the second frequency signal is normal, the local time is calibrated by the local clock difference obtained based on the second frequency and the frequency clock difference difference to output a second pulse.

[0009] Further, after calculating the average of the single-satellite dual-frequency clock difference differences corresponding to all the public satellites to obtain the inter-frequency clock difference difference, the method further includes: Step S410: Obtain real-time status parameters that affect the delay difference of the hardware channel of the anti-interference antenna. The real-time status parameters are environmental parameters or operating status parameters that can cause the delay drift of the radio frequency link of the anti-interference antenna. Step S420: Based on the real-time state parameters and the preset correction mapping relationship, determine the delay correction amount corresponding to the current real-time state parameters. The correction mapping relationship represents the correspondence between different real-time state parameter values ​​and the change in the inter-frequency delay difference of the anti-interference antenna. Step S430: Adjust the inter-frequency clock difference value using the delay correction amount to obtain the dynamically corrected inter-frequency clock difference value. The inter-frequency clock difference value used in step S5 is the dynamically corrected inter-frequency clock difference value.

[0010] Furthermore, the real-time status parameters include the operating temperature of the radio frequency link of the anti-interference antenna and the estimated power of the interference signal received by the anti-interference antenna; Before determining the delay correction amount corresponding to the current real-time state parameter based on the real-time state parameter and the preset correction mapping relationship, the method further includes: Step S4201: Obtain the historical time series of the inter-frequency clock difference at multiple epochs, and perform component decomposition on the historical time series to obtain a slowly changing trend component series and a rapidly changing fluctuation component series. The slowly changing trend component series is associated with the long-term change of the operating temperature of the radio frequency link, and the rapidly changing fluctuation component series is associated with the short-term change of the estimated value of the interference signal power. Step S4202: Using the operating temperature of the RF link as the independent variable and the slowly changing trend component sequence as the dependent variable, a first mapping relationship between the operating temperature of the RF link and the slowly changing trend component is established using a first tracking time constant. The first mapping relationship is used to characterize the delay drift trend caused by temperature change. Step S4203: Using the estimated power of the interference signal as the independent variable and the fast-changing fluctuation component sequence as the dependent variable, a second mapping relationship between the estimated power of the interference signal and the fast-changing fluctuation component is established using a second tracking time constant. The second tracking time constant is less than the first tracking time constant. The second mapping relationship is used to characterize the delay jitter caused by the change in interference power. Step S4204: The first mapping relationship and the second mapping relationship are superimposed to form the preset correction mapping relationship. The preset correction mapping relationship is used to determine the corresponding delay correction amount based on the current RF link operating temperature and the current interference signal power estimate.

[0011] Further, the step of establishing a first mapping relationship between the RF link operating temperature and the slowly varying trend component using a first tracking time constant, with the RF link operating temperature as the independent variable and the slowly varying trend component sequence as the dependent variable, includes: Step S42021: Divide the rated operating range of the RF link operating temperature into multiple continuous and non-overlapping temperature ranges. When the operating temperature of the RF link fluctuates near the boundary between the current temperature range and the adjacent temperature range, the current effective temperature range is determined by hysteresis comparison. The hysteresis comparison method is as follows: when the operating temperature of the RF link changes from the current temperature range to an adjacent temperature range and exceeds a preset upper threshold, the adjacent temperature range is determined as the new current effective temperature range; when the operating temperature of the RF link falls back from the adjacent temperature range to the current temperature range and is lower than a preset lower threshold, the current temperature range is redefined as the current effective temperature range, wherein the upper threshold and the lower threshold are located on both sides of the boundary and do not overlap. Step S42022: Determine the output value of the gradually changing trend component in the first mapping relationship based on the current effective temperature range.

[0012] Further, the component decomposition of the historical time series to obtain a slowly changing trend component series and a rapidly changing fluctuation component series includes: Step S42011: Obtain the temperature change rate sequence of the RF link operating temperature and the power fluctuation rate sequence of the interference signal power estimate within the same time period as the historical time series; Step S42012: Using the temperature change rate sequence as the first reference signal, perform a first adaptive filter on the historical time series, and extract the components that have a higher correlation with the temperature change rate sequence than the first correlation threshold as the gradual trend component sequence. Step S42013: Using the power volatility sequence as the second reference signal, perform a second adaptive filter on the residual sequence after the first adaptive filter, and extract the components that have a correlation higher than the second correlation threshold with the power volatility sequence as the fast-changing volatility component sequence.

[0013] Furthermore, before establishing the second mapping relationship between the estimated interference signal power and the rapidly changing fluctuation component using the estimated interference signal power as the independent variable and the rapidly changing fluctuation component sequence as the dependent variable, the method further includes: Step S4203A: Obtain the current gain level information of the automatic gain control circuit inside the anti-interference antenna. The current gain level information represents the current gain attenuation level of the radio frequency link of the anti-interference antenna. Step S4203B: Perform segmented quantization processing on the interference signal power estimate based on the current gain level information, and map the interference signal power estimate within the same gain level range to a unified power level identifier. Step S4203C: Replace the estimated power of the interference signal with the power level identifier as the independent variable, and perform the step of establishing the second mapping relationship.

[0014] Further, adjusting the inter-frequency clock difference using the delay correction amount to obtain the dynamically corrected inter-frequency clock difference includes: Step S431: Obtain the effective inter-frequency clock difference value of the previous epoch, wherein the effective inter-frequency clock difference value is the inter-frequency clock difference value that is determined to be valid in the previous epoch after a rationality check. Step S432: Calculate the absolute value of the difference between the dynamically corrected inter-frequency clock difference and the effective inter-frequency clock difference of the previous epoch. Step S433: Determine whether the absolute value of the difference exceeds a preset reasonable fluctuation threshold; Step S434: When the absolute value of the difference exceeds the preset reasonable fluctuation threshold, the correction result is determined to be invalid, the dynamically corrected inter-frequency clock difference is discarded, and the effective inter-frequency clock difference of the previous epoch is used as the inter-frequency clock difference of the current epoch. Step S435: When the absolute value of the difference does not exceed the preset reasonable fluctuation threshold, the correction result is determined to be valid, and the dynamically corrected inter-frequency clock difference is used as the inter-frequency clock difference of the current epoch.

[0015] Furthermore, before calibrating the local time to output the second pulse, the process also includes: Step S501: Based on the local clock time base, generate the first second pulse corresponding to the first frequency point and the second second pulse corresponding to the second frequency point respectively; Step S502: The PPS phase detector is used to detect the validity of the first second pulse and the second second pulse. The validity detection includes calculating the time interval difference between two adjacent second pulse epochs. When the time interval difference exceeds a preset transition threshold, the corresponding second pulse is determined to be invalid and an invalid flag is set.

[0016] Furthermore, after using a PPS phase detector to detect the validity of the first second pulse and the second second pulse, the method further includes: Step S503: The first second pulse and the second second pulse after the validity detection are sent to the PPS selector; Step S504: The PPS selector selects the second pulse corresponding to the valid frequency point to be output based on the valid flags corresponding to the first second pulse and the second second pulse.

[0017] Furthermore, the calculation process for the local clock error of the first single satellite includes: The local clock error of the first single satellite is calculated based on the pseudorange observation corresponding to the first frequency point, the true geometric distance between the common satellite and the receiver, the satellite clock error of the common satellite, the ionospheric correction, and the tropospheric correction. The calculation process for the second single-satellite local clock bias includes: The local clock error of the second single satellite is calculated based on the pseudorange observation corresponding to the second frequency point, the true geometric distance, the satellite clock error, the ionospheric correction, and the tropospheric correction.

[0018] Accordingly, a second aspect of the present invention provides an electronic device, including: at least one processor; and a memory connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to cause the at least one processor to perform the above-described BeiDou multi-frequency receiver timing method for anti-interference antenna.

[0019] Accordingly, a third aspect of the present invention provides a computer-readable storage medium having computer instructions stored thereon, which, when executed by a processor, implement the above-described BeiDou multi-frequency receiver timing method for anti-interference antennas.

[0020] The above-described technical solutions of the embodiments of the present invention have the following beneficial technical effects: 1. By selecting public satellites that simultaneously possess observations at both the first and second frequency points, the difference between the local clock errors of the two frequencies of each public satellite is calculated and averaged to obtain the inter-frequency clock difference value, which characterizes the delay difference of the hardware channel of the anti-interference antenna. This method utilizes the common-mode nature of the dual-frequency observations of the same satellite in terms of geometric distance, satellite clock error, ephemeris error, and the dual-frequency consistency of atmospheric model errors at the same location. By separating the satellite end and space segment errors through inter-frequency differential analysis, and combining multi-satellite averaging to suppress observation noise and local ionospheric fluctuations, the inter-frequency clock difference value retains only the inherent frequency-specific delay of the antenna. Compared with fixed calibration values ​​or single-satellite elevation angle selection methods, this application achieves accurate extraction of hardware delay differences, provides a high-precision benchmark for timing compensation, and eliminates the second pulse output deviation caused by inaccurate compensation benchmarks. 2. The operating temperature of the anti-interference antenna RF link and the estimated interference signal power are introduced as real-time status parameters. The historical time series of the inter-frequency clock difference is decomposed into a slowly changing trend component related to long-term temperature changes and a rapidly changing fluctuation component related to short-term interference power changes. A mapping relationship is established using the first tracking time constant and the second tracking time constant, and then superimposed to form a preset correction mapping relationship. The delay correction amount is determined according to the real-time temperature and interference power, and the inter-frequency clock difference is dynamically adjusted. At the same time, the rationality of the correction result is checked, and the effective value of the previous epoch is used in case of anomalies. The physical processes of slow temperature drift and rapid interference power jitter are distinguished, and group modeling and fusion compensation are realized. This overcomes the problem of accuracy degradation of fixed compensation under high and low temperature wide operating conditions and dynamic electromagnetic environment. The verification mechanism further suppresses abnormal jumps and improves the long-term reliability of the timing system. 3. Before outputting the second pulse, second pulses for the first and second frequency points are generated in parallel based on the local clock. Validity checks are performed on the second pulses for each frequency point. The validity is determined by comparing the absolute value of the deviation between the time interval of adjacent epoch pulses and the standard interval with the transition threshold, and a flag is set. Then, the PPS selector selects the optimal output based on the validity flag. This architecture transforms the traditional passive switching mode into an active switching mode where second pulses for each frequency point are generated in parallel, independently phase-detected, and dynamically selected. Utilizing the physical difference between continuous drift of the local clock and interference step transitions, the differential phase detection method accurately identifies and eliminates pulse distortion or lost seconds, eliminating interruptions and transitions during frequency switching, achieving seamless and smooth transitions between multiple frequency points, and significantly improving the continuous availability and anti-interference capability of the timing system in complex electromagnetic environments. Attached Figure Description

[0021] Figure 1 This is a flowchart of a BeiDou multi-frequency receiver timing method for anti-interference antennas provided in an embodiment of the present invention; Figure 2 This is a flowchart of single-frequency star selection provided in an embodiment of the present invention; Figure 3This is a flowchart of clock difference calculation provided in an embodiment of the present invention; Figure 4 This is the multi-frequency PPS generation process provided in the embodiments of the present invention. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to specific embodiments and the accompanying drawings. It should be understood that these descriptions are merely exemplary and not intended to limit the scope of the invention. Furthermore, descriptions of well-known structures and techniques are omitted in the following description to avoid unnecessarily obscuring the concept of the invention.

[0023] Please refer to Figure 1 The first aspect of this invention provides a timing method for a BeiDou multi-frequency receiver with an anti-interference antenna, comprising the following steps: Step S100: Receive and process analog radio frequency signals from the anti-interference antenna to simultaneously capture and track satellite signals at at least one first frequency point and one second frequency point.

[0024] In general-purpose platforms such as airborne, vehicle-mounted, or missile-borne systems, BeiDou receivers receive BeiDou satellite navigation signals in space via anti-jamming antennas. The anti-jamming antenna contains multiple antenna elements and corresponding RF channels and baseband processing units, capable of performing spatial filtering and adaptive nulling on the received signal to suppress high-power interference signals from specific directions. The receiver acquires the processed analog RF signal from the anti-jamming antenna and performs conventional RF and baseband processing operations such as down-conversion, analog-to-digital conversion, and demodulation, thereby achieving synchronous acquisition and tracking of satellite signals at at least one first frequency point and one second frequency point. Here, the first and second frequency points refer to two operating frequencies supported by the anti-jamming antenna that have different nominal carrier frequencies, such as the B1 and B3 frequencies in the BeiDou system. In actual battlefield electromagnetic environments, the enemy may target a specific frequency point with jamming, while the signal quality of the other frequency point may remain good due to frequency differences or different spatial filtering strategies of the anti-jamming antenna. Therefore, the receiver's simultaneous tracking of two frequency points is a fundamental prerequisite for subsequent anti-jamming timing handover.

[0025] Step S200: Select satellites that meet the preset stable tracking conditions from among the satellites that simultaneously have observation values ​​at the first frequency point and observation values ​​at the second frequency point as public satellites.

[0026] like Figure 2As shown, after acquiring and tracking satellite signals at the first and second frequencies, the receiver obtains observations of each visible satellite at both frequencies, mainly including carrier-to-noise ratio (CNR), phase-locked loop (PLL) lock-in status indication, and satellite elevation angle. A special class of satellites is selected from all tracked satellites as common satellites. These satellites must simultaneously possess stable observations at both the first and second frequencies, and their signal quality indicators must meet preset stable tracking conditions. These preset stable tracking conditions may specifically include a CNR higher than a preset threshold, a PLL lock-in value meeting the tracking stability criterion, and a satellite elevation angle meeting certain angular requirements. This selection process eliminates satellites that are observable only at one frequency or have poor tracking quality, ensuring that the satellites relied upon for subsequent clock bias calculations have reliable and consistent observations at both frequencies. This satellite selection strategy lays the data quality foundation for subsequent dual-frequency differential calculations in this invention, ensuring that the pseudorange, carrier phase, and other observation information of each common satellite participating in the calculation have sufficient reliability and continuity at both frequencies.

[0027] In the above embodiments of the present invention, the selection of common satellites is mainly based on signal quality indicators such as carrier-to-noise ratio, phase-locked loop locking value, and satellite elevation angle. Considering that anti-interference antennas typically possess spatial filtering and adaptive nulling capabilities, their anti-interference performance varies in different spatial orientations. Therefore, in another preferred embodiment, the spatial azimuth information of the satellite relative to the anti-interference antenna can also be incorporated into the selection criteria for common satellites. Specifically, the interference suppression pattern or null position information corresponding to the current adaptive nulling processing of the anti-interference antenna can be obtained, and combined with the azimuth and elevation angles of each visible satellite, satellites located in the high-gain region of the anti-interference antenna and far from the direction of interference suppression null can be preferentially selected as common satellites. By coupling the satellite geometric distribution with the spatial characteristics of the anti-interference antenna, the satellite selection strategy can further improve the observation quality and anti-interference robustness of the selected common satellites at dual-frequency points, thereby improving the accuracy and stability of subsequent inter-frequency clock difference calculations at the source.

[0028] The carrier-to-noise ratio (C / N0) refers to the ratio of signal power to noise spectral power density, used to characterize the stability of signal tracking. The calculation formula is as follows: In the formula Carrier-to-noise ratio (CNR) Signal power This is called the noise frequency power spectral density. A higher carrier-to-noise ratio indicates more stable signal tracking. In this invention, the preset carrier-to-noise ratio threshold is 40.

[0029] The phase-locked loop (PLL) lock value is used to characterize the carrier PLL tracking stability, and the calculation formula is as follows: In the formula, This indicates the phase-locked loop (PLL) locking value. Indicates carrier ring Branch coherent integral results, Indicates carrier ring Branch coherent integral results, The closer the value is to 1, the more stable the carrier phase-locked loop tracking is. In this invention, the preset phase-locked loop locking value threshold is 0.96.

[0030] Step S300: For each public satellite, calculate the difference between the local clock difference of the first single satellite corresponding to the first frequency point and the local clock difference of the second single satellite corresponding to the second frequency point to obtain the single-satellite dual-frequency clock difference difference.

[0031] like Figure 3 As shown, for each selected public satellite, the local clock bias of the first satellite at the first frequency and the local clock bias of the second satellite at the second frequency are calculated, and the difference between these two local clock biases is obtained, i.e., the single-satellite dual-frequency clock bias difference. The calculation of the single-satellite local clock bias is based on the pseudorange observation at that frequency, combined with the true geometric distance between the receiver and the satellite, the satellite clock bias correction, the ionospheric delay correction, and the tropospheric delay correction, and the deviation of the receiver's local clock relative to the BeiDou system is obtained by solving the pseudorange positioning equation. Since the signals at the first and second frequencies broadcast by the same public satellite have undergone the same spatial propagation path, the effects of the true geometric distance and the satellite clock bias on the two frequencies are completely consistent. Although the ionospheric and tropospheric delays are frequency-dependent, their residuals after model correction are also strongly correlated under the same satellite and the same receiver position. Therefore, subtracting the local clock errors of two single satellites of the same public satellite can effectively cancel out satellite orbit errors, satellite clock errors, and most of the atmospheric delay model residuals, retaining only the inherent deviation components introduced by the inconsistent processing delay of the radio frequency channels of different frequencies by the anti-interference antenna in the receiver link.

[0032] A multi-satellite clock bias averaging strategy is employed. The core principle is that, at the same receiver location, ionospheric and tropospheric model errors have a consistent impact on different frequencies of the same satellite. Specifically, the residuals at frequencies X1 and X2 of the same satellite affected by model errors are identical. Averaging across multiple satellites can further offset this common error, improving clock bias calculation accuracy. The specific implementation is as follows: For each valid satellite, calculate the single-satellite clock bias at frequencies X1 and X2, based on the pseudorange formula including antenna delay: ; In the formula: For the s-th satellite Pseudorange observations at frequency points; Let be the true geometric distance between the receiver and the s-th satellite; Let Xi be the clock bias of the receiver for the s-th satellite at frequency Xi. Let $S$ be the satellite clock bias of the $s$-th satellite. This is the ionospheric correction for the frequency point Xi of the s-th satellite; This is the tropospheric correction (the common tropospheric error across all satellites at the same location); For anti-interference antenna The inherent delay of a frequency point.

[0033] Subtracting the two frequency parameters from the above formula yields: ; In the formula: The difference between dual-frequency pseudorange observations is ; Theoretical inter-frequency difference of ionospheric frequency ; The dual-frequency local clock bias of the receiver is ; Dual-frequency clock difference is ; After substituting and simplifying, we obtain the single-star dual-frequency difference constraint equation: .

[0034] Step S400: Calculate the average value of the single-satellite dual-frequency clock difference for all public satellites to obtain the inter-frequency clock difference value. The inter-frequency clock difference value characterizes the hardware channel delay difference between the anti-interference antenna and the first frequency point and the second frequency point.

[0035] like Figure 3As shown, after obtaining the single-satellite dual-frequency clock difference value for each public satellite, the arithmetic mean of these differences for all public satellites is calculated, and the average value is defined as the inter-frequency clock difference value. This inter-frequency clock difference value physically characterizes the hardware channel delay difference between the first and second frequency radio frequency channels within the anti-interference antenna. Specifically, it represents the difference in group delay generated at different frequency points after the same satellite signal enters from the antenna aperture, passes through the array elements, low-noise amplifiers, phase shifters, attenuators, and combining networks, and is then processed by the baseband anti-interference algorithm. By statistically averaging the single-satellite dual-frequency clock difference values ​​of multiple public satellites, random errors caused by factors such as single-satellite observation noise and local ionospheric inhomogeneities can be further reduced. Utilizing the statistical law of large numbers, the final inter-frequency clock difference value more closely approximates the inherent inter-frequency delay difference of the antenna hardware itself. In practical implementation, the more public satellites there are and the more uniform their geometric distribution, the higher the stability and accuracy of the averaging result. The inter-frequency clock difference is the core compensation parameter of the timing method of this invention, and will be used for clock difference calibration in the subsequent frequency switching process.

[0036] The dual-frequency difference results of all valid satellites ( ) Calculate the arithmetic mean uniformly. Let the total number of valid satellites be N. The mean is calculated as follows: ; The mean of both sides of the corresponding equation is taken simultaneously: ; Under steady-state timing conditions, the fluctuations in the receiver's local clock bias and the residuals of the single-satellite atmospheric model will cancel each other out after averaging across multiple satellites, approaching zero. →0; Finally, the formula for calculating the clock difference between frequency points is obtained. .

[0037] In step S500, when the first frequency signal is normal, the local time is calibrated using the local clock difference obtained based on the first frequency to output a second pulse. When the first frequency signal is interfered with and the second frequency signal is normal, the local time is calibrated using the local clock difference obtained based on the second frequency and the inter-frequency clock difference difference to output a second pulse.

[0038] Different timing calibration strategies are selected based on the real-time signal status of the first and second frequency points. When the receiver detects that the signal at the first frequency point is normal, i.e., the carrier-to-noise ratio, phase-locked loop locking status, and satellite elevation angle of that frequency point all meet the preset usability conditions, the timing system uses the local clock difference calculated based on the first frequency point to calibrate the local time reference and generates a second pulse signal output. At this time, since the first frequency point is working normally, there is no need to use the observations of the second frequency point. When the signal quality of the first frequency point deteriorates to an unusable state due to external interference, while the signal at the second frequency point remains normal after baseband processing by the anti-interference antenna, the timing system switches to the second frequency point, uses the local clock difference calculated based on the second frequency point, and simultaneously superimposes the inter-frequency clock difference value obtained in step S400 to jointly calibrate the local time reference and output a second pulse. Because the inter-frequency clock difference precisely compensates for the hardware channel delay difference of the anti-jamming antenna between the two frequency points, the phase of the second pulse output at the second frequency point can remain continuously consistent with the phase of the second pulse output at the first frequency point under normal conditions at the moment of switching, thereby avoiding the second pulse jump or phase step introduced by the frequency switching. This mechanism enables the receiver to provide a stable and continuous time synchronization signal to the weapon platform even in complex electromagnetic countermeasures environments, significantly improving the timing reliability and combat effectiveness of the equipment under actual combat conditions. It should be noted that the second pulse finally output to the external device in step S500 is the second pulse selected and output by the PPS selector after the process described in steps S501 to S504.

[0039] The BeiDou multi-frequency receiver timing method for anti-interference antennas provided in this invention, based on the receiver simultaneously tracking the first and second frequency points, selects dual-frequency common satellites and uses single-satellite dual-frequency differential and multi-satellite statistical averaging to accurately extract the inter-frequency hardware channel delay difference of the anti-interference antenna itself. Then, when frequency switching occurs, this difference is used to accurately compensate for the local clock difference of the backup frequency point, thereby fundamentally solving the problem of timing second pulse jump caused by inconsistent processing delays of different frequency points by the anti-interference antenna. It realizes a seamless and smooth transition in the multi-frequency timing switching process, and significantly improves the stability and continuous availability of time synchronization systems of airborne, vehicle-mounted, and missile-borne equipment platforms in complex electromagnetic interference environments.

[0040] Further, after calculating the average of the single-satellite dual-frequency clock difference values ​​corresponding to all public satellites in step S400 to obtain the inter-frequency clock difference value, the process also includes: Step S410: Obtain real-time status parameters that affect the delay difference of the anti-interference antenna hardware channel. The real-time status parameters are environmental parameters or operating status parameters that can cause the delay drift of the anti-interference antenna RF link.

[0041] After obtaining the initial inter-frequency clock difference value through step S400, considering that the delay characteristics of the anti-jamming antenna's RF link are not constant during actual operation, but rather subject to slow drift due to changes in environmental conditions and the device's own operating state, real-time state parameters affecting the delay difference of the anti-jamming antenna's hardware channel are obtained. These real-time state parameters refer to various environmental or operating state parameters that can cause the RF link delay of the anti-jamming antenna to drift. In practical application scenarios, weapon platforms operate in environments with extremely wide temperature ranges. For example, airborne equipment may experience alternating periods of high ground temperatures and low altitude cruises; vehicle-mounted equipment may maneuver between frigid regions and hot deserts; and missile-borne equipment experiences severe thermal shocks at launch. These temperature changes directly alter the group delay characteristics of RF devices such as filters and amplifiers within the antenna. Furthermore, when facing external interference of varying intensities, the anti-jamming antenna's internal automatic gain control circuit adjusts the gain level to maintain the linearity of the receiving channel. This switching of the gain level also causes slight changes in the RF link delay. Therefore, by using hardware modules such as temperature sensors and power detection circuits installed inside the antenna or on the receiver's RF board, the aforementioned status parameters can be collected and updated in real time, providing the necessary input basis for subsequent dynamic correction.

[0042] Step S420: Based on the real-time state parameters and the preset correction mapping relationship, determine the delay correction amount corresponding to the current real-time state parameters. The correction mapping relationship characterizes the correspondence between different real-time state parameter values ​​and the change in inter-frequency delay difference of the anti-interference antenna.

[0043] After acquiring the real-time status parameters, the delay correction amount corresponding to the current real-time status parameter value is determined based on the real-time status parameters and the pre-established correction mapping relationship. The correction mapping relationship characterizes the correspondence between different real-time status parameter values ​​and the change in inter-frequency delay difference of the anti-interference antenna. Its establishment process can be completed during the calibration stage before the equipment leaves the factory, or it can be gradually improved through long-term observation and online learning during actual operation. Taking temperature parameters as an example, a full-temperature range scan test can be performed on the anti-interference antenna and receiver as a whole in a temperature control chamber. At each set temperature point, the inter-frequency clock difference value corresponding to that temperature point is calculated using the method described in steps S100 to S400, and the difference is made with the reference value at a certain reference temperature to obtain the delay correction amount at that temperature point, ultimately forming a correspondence table or fitting curve between temperature and delay correction amount. When the equipment is actually working in the field, step S420 quickly retrieves or interpolates the corresponding delay correction amount from the pre-established mapping relationship based on the current working temperature collected in step S410. This delay correction reflects the additional offset of the antenna hardware channel delay difference relative to the initial reference value under the current environment or operating conditions, and is the core parameter for subsequent compensation adjustments.

[0044] In step S430, the inter-frequency clock difference is adjusted using a delay correction amount to obtain a dynamically corrected inter-frequency clock difference. The inter-frequency clock difference used in step S5 is the dynamically corrected inter-frequency clock difference.

[0045] The determined delay correction is applied to the inter-frequency clock difference obtained by statistical averaging in step S400, adjusting the original inter-frequency clock difference to obtain a dynamically corrected inter-frequency clock difference. Specifically, the adjustment method involves algebraically superimposing the delay correction and the original inter-frequency clock difference to compensate for additional delay drift caused by changes in real-time state parameters. Simultaneously, step S430 explicitly specifies that the inter-frequency clock difference used in subsequent step S500 is this dynamically corrected inter-frequency clock difference, rather than a fixed value initially calculated. That is, during actual time synchronization, when switching from the first frequency point to the second frequency point for clock difference calibration, the difference used for compensation is no longer a constant calibrated at the factory, but a dynamic value updated in real-time with ambient temperature and equipment operating status. In this way, even if the anti-interference antenna experiences significant temperature or interference intensity changes during long-term operation, the inter-frequency compensation can always automatically adjust to the changes in actual hardware delay differences, thereby ensuring high-precision continuous alignment of the second pulse phase at the time synchronization switching moment.

[0046] Through the aforementioned dynamic correction mechanism, the timing compensation strategy is upgraded from a single fixed value compensation to an adaptive compensation based on real-time state parameters. This effectively overcomes the problem of inaccurate inter-frequency clock difference caused by RF link delay drift under complex operating conditions such as alternating high and low temperatures and fluctuations in interference power. This enables the receiver to maintain the accuracy and real-time performance of the inter-frequency compensation in a wide temperature range and dynamic electromagnetic environment, further improving the phase continuity and long-term stability of the timing second pulse during frequency switching.

[0047] Furthermore, the real-time status parameters include the operating temperature of the RF link of the anti-interference antenna and the estimated power of the interference signal received by the anti-interference antenna.

[0048] Before using historical time series from multiple epochs for component decomposition and mapping relationship establishment, this invention also includes recording and smoothing preprocessing of the instantaneous calculation results of inter-frequency clock difference, specifically: At each timing epoch, the receiver calculates an instantaneous value for the inter-frequency clock difference and stores it in a pre-set clock difference record table in chronological order. Once the number of accumulated epochs in the record table reaches a pre-set recording threshold, all instantaneous values ​​in the record table are smoothed using a mean filter. The smoothed result is used as the high-precision steady-state inter-frequency clock difference for that stage. If the amount of data in the record table has not yet reached the threshold, the receiver continues to collect instantaneous values ​​from subsequent epochs until the threshold requirement is met. The smoothed inter-frequency clock difference is then written to non-volatile memory for storage. Upon each power-on, the receiver can directly read this value from the non-volatile memory as the initial compensation reference and dynamically correct and update it based on real-time status parameters during subsequent operation.

[0049] Specifically, it records n consecutive epochs. The instantaneous values ​​are smoothed using mean filtering to obtain high-precision steady-state delay differences. For the filtering formula, please refer to: ; For the i-th epoch Instantaneous solution value.

[0050] Accordingly, before determining the delay correction amount corresponding to the current real-time state parameter based on the real-time state parameter and the preset correction mapping relationship in step S420, the following steps are also included: Step S4201: Obtain the historical time series of the inter-frequency clock difference at multiple epochs, and perform component decomposition on the historical time series to obtain the slowly changing trend component series and the rapidly changing fluctuation component series. The slowly changing trend component series is associated with the long-term change of the operating temperature of the RF link, and the rapidly changing fluctuation component series is associated with the short-term change of the estimated value of the interference signal power.

[0051] After determining that the operating temperature of the RF link and the estimated power of the interference signal are used as real-time status parameters, the historical time series of the inter-frequency clock difference over multiple consecutive epochs is first obtained. This historical time series is then decomposed into component sequences to obtain a slowly varying trend component sequence and a rapidly varying fluctuation component sequence. The historical time series of the inter-frequency clock difference refers to a series of instantaneous values ​​of the inter-frequency clock difference recorded by the receiver over a period of time according to a fixed timing calculation cycle. These instantaneous values ​​include both the inherent delay differences of the antenna hardware itself and time-varying components caused by factors such as temperature drift, interference fluctuations, and measurement noise. By decomposing this time series, the slowly changing portion, highly correlated with the long-term temperature drift pattern, can be extracted as the slowly varying trend component sequence, while the rapidly changing portion, closely correlated with short-term fluctuations in the interference signal power, can be extracted as the rapidly varying fluctuation component sequence. In practical implementation, the component decomposition can employ an adaptive filtering method based on a reference signal, using the temperature change rate sequence and power fluctuation rate sequence collected within the same time period as prior guiding signals for the decomposition, thereby ensuring that the decomposition results have a clear physical correspondence.

[0052] Step S4202: Using the operating temperature of the RF link as the independent variable and the sequence of the gradually changing trend components as the dependent variable, a first mapping relationship between the operating temperature of the RF link and the gradually changing trend components is established using a first tracking time constant. The first mapping relationship is used to characterize the delay drift trend caused by temperature changes.

[0053] After obtaining the slowly varying trend component sequence, a first mapping relationship is established between the RF link operating temperature as the independent variable and the slowly varying trend component sequence as the dependent variable, using a first tracking time constant. Since temperature change is a slow process with significant thermal inertia, the temperature change rate of the antenna RF link is typically on the order of a few degrees Celsius per minute or even lower. Therefore, the associated delay drift trend also exhibits a slow and continuous change. Based on this physical characteristic, the first tracking time constant is set to a large value, enabling the tracking filtering algorithm used to establish the first mapping relationship to have a long memory length and strong smoothing ability. This effectively suppresses high-frequency observation noise and short-term random disturbances, retaining only the delay drift trend term caused by temperature changes. The specific form of the first mapping relationship can be a piecewise linear interpolation table, a low-order polynomial fitting curve, or other function models that can describe the monotonic correspondence between temperature and the slowly varying delay component.

[0054] Step S4203: Using the estimated power of the interference signal as the independent variable and the fast-changing fluctuation component sequence as the dependent variable, a second mapping relationship between the estimated power of the interference signal and the fast-changing fluctuation component is established using the second tracking time constant. The second tracking time constant is less than the first tracking time constant. The second mapping relationship is used to characterize the delay jitter caused by the change in interference power.

[0055] Using the estimated interference signal power as the independent variable and the rapidly changing fluctuation component sequence obtained from step S4201 as the dependent variable, a second mapping relationship between the estimated interference signal power and the rapidly changing fluctuation component is established using a second tracking time constant. Changes in interference signal power are typically sudden and rapid; for example, the power-on, power-off, or power adjustment of an enemy interference source can occur within milliseconds to seconds. The automatic gain control circuit inside the anti-interference antenna will also rapidly adjust its gain level to maintain the linear operation of the receiving channel. These rapid changes will cause short-term jitter in the RF link group delay. Therefore, the second tracking time constant is set to a value significantly smaller than the first tracking time constant, enabling the second mapping relationship to respond more quickly to changes in interference power and promptly capture delay jitter caused by changes in interference intensity. The second mapping relationship characterizes the additional offset of the antenna inter-frequency delay difference relative to the reference value under different interference power levels or different automatic gain control levels. Its establishment process can be constructed by combining antenna factory calibration data or online statistical data.

[0056] Step S4204: The first mapping relationship and the second mapping relationship are superimposed to form a preset correction mapping relationship. The preset correction mapping relationship is used to determine the corresponding delay correction amount based on the current RF link operating temperature and the current interference signal power estimate.

[0057] After establishing the first and second mapping relationships respectively, they are superimposed to form a preset correction mapping relationship. This preset correction mapping relationship is a composite mapping model that takes the operating temperature of the RF link and the estimated interference signal power as inputs and the delay correction amount as output. Since the influence mechanism and rate of change of temperature change and interference power change on the inter-frequency delay difference of the antenna are independent, and the two effects have the property of linear superposition in the actual physical process, the total delay correction amount under the current comprehensive operating condition can be obtained by adding the temperature-causing component corresponding to the first mapping relationship and the interference-causing component corresponding to the second mapping relationship. This preset correction mapping relationship is stored in the receiver's non-volatile memory and is called by step S420 during each timing calculation. When the receiver enters the timing working state, the corresponding delay correction amount can be directly determined from this composite mapping relationship based on the currently collected RF link operating temperature and interference signal power estimated value, without the need for complex online decomposition and modeling calculations, thus balancing compensation accuracy and computational efficiency.

[0058] Furthermore, step S4202, which uses the RF link operating temperature as the independent variable and the gradually changing trend component sequence as the dependent variable, and establishes a first mapping relationship between the RF link operating temperature and the gradually changing trend component using a first tracking time constant, includes: Step S42021: Divide the rated operating range of the RF link operating temperature into multiple continuous and non-overlapping temperature intervals. When the RF link operating temperature fluctuates near the boundary between the current temperature interval and the adjacent temperature interval, a hysteresis comparison method is used to determine the current effective temperature interval.

[0059] In one specific embodiment of the present invention, the hysteresis comparison method is as follows: when the operating temperature of the RF link changes from the current temperature range to an adjacent temperature range and exceeds a preset upper threshold, the adjacent temperature range is determined as the new current effective temperature range. When the operating temperature of the RF link falls back from the adjacent temperature range to the current temperature range and is lower than a preset lower threshold, the current temperature range is redefined as the current effective temperature range, with the upper and lower thresholds located on opposite sides of the boundary and not overlapping.

[0060] When establishing the first mapping relationship between the operating temperature of the RF link and the gradually changing trend component, the rated operating range of the anti-jamming antenna RF link is first divided into multiple continuous and non-overlapping temperature intervals. The rated operating range typically covers the entire temperature range that the weapon platform may experience, such as from -40℃ to 70℃. The span of each temperature interval can be set according to the temperature coefficient characteristics of the antenna RF devices and the actual calibration accuracy requirements, such as 10℃ or 20℃ per interval. When the receiver is actually running, the operating temperature of the RF link will continuously change with changes in the external environment and the heat generated by the device itself. When the operating temperature happens to be near the boundary between two adjacent temperature intervals, due to temperature acquisition noise, small fluctuations in the sensor, or slight disturbances in the ambient temperature, the operating temperature may frequently cross the boundary in a short period of time, causing repeated switching of the current effective temperature interval. If the delay correction amount of the corresponding temperature interval in the mapping relationship is switched directly based on this instantaneous temperature value without processing, it will cause unnecessary jitter in the compensation value, thereby affecting the phase smoothness of the timing second pulse.

[0061] To address this, a hysteresis comparison method can be used to determine the current effective temperature range. The specific rules for this method are as follows: when the RF link operating temperature changes from the current temperature range to an adjacent temperature range, and its value exceeds a preset upper threshold, the adjacent temperature range is designated as the new current effective temperature range. Conversely, when the RF link operating temperature drops from an adjacent temperature range back to the original current temperature range, and its value falls below a preset lower threshold, the original current temperature range is redefined as the current effective temperature range. The upper and lower thresholds are located on opposite sides of the boundaries of the two temperature ranges, and they maintain a certain numerical interval without overlapping. For example, the boundary temperature value plus two degrees Celsius is used as the upper threshold, and the boundary temperature value minus two degrees Celsius is used as the lower threshold. This interval switching logic with hysteresis effectively filters out minor temperature fluctuations near the boundaries, preventing frequent jumps in the effective temperature range caused by instantaneous temperature fluctuations.

[0062] Step S42022: Determine the output value of the gradually changing trend component in the first mapping relationship based on the current effective temperature range.

[0063] After determining the current effective temperature range using hysteresis comparison, the output value of the corresponding gradual trend component in the first mapping relationship is determined based on this effective temperature range. The first mapping relationship can be a pre-calibrated lookup table of temperature ranges and delay correction values ​​stored in non-volatile memory. Each temperature range corresponds to a delay correction value determined after multiple measurements and mean filtering. Once the effective temperature range is stably determined, the system directly reads the delay correction value corresponding to that range from the lookup table as the gradual trend component output by the first mapping relationship. Because the hysteresis comparison mechanism ensures that the effective temperature range does not frequently switch due to small temperature fluctuations, the output value of the gradual trend component obtained from the first mapping relationship can also remain stable near the temperature boundary, avoiding compensation value jitter caused by temperature jumps. This output value is then superimposed with the fast-changing fluctuation component output by the second mapping relationship to form the final delay correction value.

[0064] By using a temperature range hysteresis comparison mechanism, the problem of frequent switching of the current effective temperature range caused by the slight jitter of the RF link operating temperature near the temperature range boundary is effectively suppressed. This avoids unnecessary fluctuations in the gradual trend component of the first mapper relationship output, so that the dynamically corrected inter-frequency clock difference can still maintain a smooth and stable output during the temperature transition phase. This further improves the phase continuity and environmental disturbance resistance of the timing second pulse in the entire temperature range.

[0065] Furthermore, step S4201 involves component decomposition of the historical time series to obtain a slowly changing trend component series and a rapidly changing fluctuation component series, including: Step S42011: Obtain the temperature change rate sequence of the RF link operating temperature and the power fluctuation rate sequence of the interference signal power estimate within the same time period as the historical time series.

[0066] After obtaining the historical time series of inter-frequency clock difference values ​​across multiple epochs, the system further obtains the temperature change rate series of the RF link operating temperature and the power fluctuation rate series of the interference signal power estimate within the same time period as the historical time series. The temperature change rate series is the time series composed of the ratio of the change in RF link operating temperature between adjacent epochs to the time interval. This series reflects the speed of temperature evolution over time and can clearly distinguish between different thermodynamic states such as rapid temperature rise, slow temperature drift, or thermal equilibrium stability. The power fluctuation rate series is the time series composed of the ratio of the change in the interference signal power estimate between adjacent epochs to the time interval. This series can characterize the dynamic changes in interference intensity in the electromagnetic environment, such as a sudden power surge caused by the sudden activation of the interference source, a sudden power drop caused by the shutdown of the interference source, or slow fluctuations during the gradual adjustment of the interference source power.

[0067] Step S42012: Using the temperature change rate sequence as the first reference signal, perform the first adaptive filtering on the historical time series, and extract the components with a correlation higher than the first correlation threshold with the temperature change rate sequence as the slow-change trend component sequence.

[0068] After obtaining the temperature change rate sequence, this sequence is used as the first reference signal to perform a first adaptive filter on the historical time series of the inter-frequency clock difference. Components with a correlation higher than the first correlation threshold are extracted as the slowly changing trend component sequence. The first adaptive filter can be an adaptive filter based on the minimum mean square error criterion. The desired response signal of the filter is the temperature change rate sequence, and the input signal is the historical time series. By iteratively adjusting the filter weight coefficients, the correlation between the filtered output and the temperature change rate sequence gradually increases, ultimately separating the signal component that highly matches the temperature change pattern from the historical time series. The first correlation threshold is a preset statistical threshold value used to determine whether the extracted component is indeed dominated by temperature change. Only components with a correlation higher than this threshold are identified as slowly changing trend component sequences. Due to the continuous nature and large thermal inertia of temperature change itself, the extracted slowly changing trend component sequence also exhibits smooth and slowly evolving characteristics. This sequence represents the delay drift caused by temperature change in the inter-frequency clock difference.

[0069] Step S42013: Using the power volatility sequence as the second reference signal, perform a second adaptive filter on the residual sequence after the first adaptive filter, and extract the components with a correlation higher than the second correlation threshold with the power volatility sequence as the fast-change volatility component sequence.

[0070] After completing the first adaptive filtering and extracting the slowly varying trend component sequence from the historical time series, the original historical time series is subtracted from the slowly varying trend component sequence to obtain the residual sequence. Using the power volatility sequence as the second reference signal, the residual sequence is subjected to a second adaptive filtering to extract components with a correlation higher than the second correlation threshold as the fast-changing fluctuation component sequence. The principle of the second adaptive filtering is similar to that of the first adaptive filtering, but the reference signal is changed to the power volatility sequence, and the filtering objective shifts to extracting components in the residual sequence that are highly correlated with short-term fluctuations in interference power. Since changes in interference power are usually sudden and rapid, the extracted fast-changing fluctuation component sequence also exhibits characteristics of a relatively fast rate of change and a relatively small amplitude. This sequence represents the delay jitter caused by changes in interference signal power in the inter-frequency clock difference. After the cascaded processing of the first and second adaptive filters, the historical time series is completely decomposed into two main parts: the slowly varying trend component sequence and the fast-changing fluctuation component sequence. The remaining weak residuals that cannot establish a significant correlation with any reference signal can be regarded as random measurement noise and discarded.

[0071] Furthermore, before establishing the second mapping relationship between the estimated interference signal power and the rapidly changing fluctuation component using the second tracking time constant in step S4203, the following is also included: Step S4203A: Obtain the current gain level information of the automatic gain control circuit inside the anti-interference antenna. The current gain level information represents the current gain attenuation level of the anti-interference antenna RF link.

[0072] Before establishing the second mapping relationship using the estimated interference signal power as the independent variable, the current gain level information of the automatic gain control circuit inside the anti-interference antenna is first obtained. When faced with external interference signals of varying intensities, the anti-interference antenna's internal automatic gain control circuit automatically adjusts the gain attenuation level of the RF link according to the total received power level. This ensures that the dynamic range of the input signal to the subsequent analog-to-digital converter remains within the linear operating range, preventing saturation distortion due to excessively strong signals or a decrease in the quantization signal-to-noise ratio due to excessively weak signals. The automatic gain control circuit typically has multiple discrete gain attenuation levels, each corresponding to a certain attenuation amount. The switching of levels is automatically completed by the analog or digital detection circuit based on the comparison result of the received signal power and a preset threshold. The current gain level information represents the specific gain attenuation level of the anti-interference antenna's RF link at the current moment. This information can be read from the control interface between the antenna and the receiver, or obtained through the analysis of antenna status monitoring data by the receiver's baseband processing unit. By using known hardware gain states, the power values ​​of interference signals estimated at the software level are calibrated and normalized to eliminate the adverse effects of power estimate jumps caused by gain level changes on the subsequent modeling process.

[0073] Step S4203B: Perform segmented quantization processing on the estimated power value of the interference signal based on the current gain level information, and map the estimated power value of the interference signal within the same gain level range to a unified power level identifier.

[0074] After acquiring the current gain level information, the interference signal power estimate is segmented and quantized based on this information, mapping interference signal power estimates within the same gain level range to a unified power level identifier. In practice, when the automatic gain control circuit switches levels, the gain of the RF link undergoes a step change in a very short time. This causes the interference signal power estimate estimated by the baseband processing unit to jump accordingly, even though the absolute power of the external interference signal does not actually change abruptly. Directly using this power estimate, which includes the artifact of the gain level jump, as the independent variable to establish the second mapping relationship would introduce additional data dispersion and modeling errors. Therefore, the power estimate is segmented and quantized based on the current gain level. Specifically, for multiple consecutive epochs belonging to the same gain level range, their corresponding power estimates are uniformly grouped into a single power level identifier, with different gain level ranges corresponding to different power level identifiers. After this processing, the power level label reflects the equivalent interference intensity after gain normalization, rather than the original estimate with the effect of receiver link gain variation superimposed, thus preventing artificial data jumps in the independent variable at the level switching point.

[0075] Step S4203C: Replace the estimated power of the interference signal with the power level identifier as the independent variable, and perform the step of establishing the second mapping relationship.

[0076] After completing the segmented quantization processing of the interference signal power estimate and obtaining the power level identifier, the original interference signal power estimate is replaced by this power level identifier as the independent variable, and the step of establishing the second mapping relationship is executed. At this point, the input independent variable of the second mapping relationship is no longer the continuously changing analog estimate, but the discrete power level identifier. The fast-changing fluctuation component sequence of the dependent variable corresponds to the additional offset of the inter-frequency clock difference relative to the reference value at each power level. Since the power level identifier has eliminated the estimation jump artifacts caused by automatic gain control level switching, the second mapping relationship established based on this independent variable can more accurately reflect the influence of the interference intensity itself on the antenna inter-frequency delay difference, without being affected by changes in the receiver link gain state. In actual implementation, the second mapping relationship can be stored as a lookup table between the power level identifier and the delay correction amount. During timing calculation, after determining the corresponding power level identifier based on the current gain level information and the current power estimate, the corresponding fast-changing fluctuation component delay correction amount is directly obtained by looking up the table.

[0077] By employing a segmented quantization preprocessing mechanism for interference power estimates based on automatic gain control levels, the artifacts of power estimate jumps introduced by gain level switching within the anti-interference antenna are effectively eliminated. This ensures that the independent variables used to establish the second mapping relationship can truly reflect changes in external interference intensity rather than changes in the receiver link gain state, thereby improving the modeling accuracy and stability of the second mapping relationship. It also ensures that the delay jitter component caused by interference power changes can be accurately extracted under different interference intensities and different gain level combinations, further enhancing the adaptability and robustness of the composite dynamic compensation model in complex electromagnetic environments.

[0078] This invention further constructs a dual closed-loop working mechanism combining power-on self-calibration and daily dynamic calibration to ensure that the compensation accuracy of the inter-frequency clock difference remains optimal throughout long-term operation and a wide temperature range. Each time the receiver powers on, if it detects that both the first and second frequency signals are in a normal and usable state, it automatically enters the self-calibration process. It uses multi-epoch observation data at the current operating temperature to verify and, if necessary, correct the inter-frequency clock difference stored in the non-volatile memory, and then writes the correction results back into the memory. During subsequent normal time synchronization operations, the receiver continuously utilizes the dynamic correction mechanism described in steps S410 to S430 to perform daily dynamic calibration of the compensation value based on real-time temperature and interference power changes. Power-on self-calibration solves the initial state deviation problem when the device is powered on for the first time after a long period of power failure, while daily dynamic calibration solves the environmental drift problem during continuous operation. The two work together to form a closed loop, enabling the receiver to maintain high-precision inter-frequency delay compensation throughout its entire lifespan, completely eliminating the risk of compensation value aging and inaccuracy caused by long-term use or environmental changes. The power-on self-calibration process can reuse the clock difference calculation and dynamic correction process from steps S100 to S430, while the daily dynamic calibration corresponds to the real-time correction step from steps S410 to S430.

[0079] Further, step S430 involves adjusting the inter-frequency clock difference using a delay correction amount to obtain a dynamically corrected inter-frequency clock difference, including: Step S431: Obtain the valid inter-frequency clock difference value of the previous epoch. The valid inter-frequency clock difference value is the inter-frequency clock difference value that is determined to be valid after the rationality check in the previous epoch.

[0080] After adjusting the inter-frequency clock difference using delay correction and obtaining the dynamically corrected inter-frequency clock difference, the effective inter-frequency clock difference of the previous epoch is first obtained. The effective inter-frequency clock difference refers to the inter-frequency clock difference that was determined to be valid in the previous timing calculation epoch of the receiver after undergoing the same rationality verification process as in this step. This value serves as a reference for historical valid values ​​and is stored in the receiver's temporary buffer or register for use during the current epoch verification. Since the delay difference of the anti-interference antenna hardware channel is itself a relatively slowly changing physical quantity, even during dynamic processes such as temperature fluctuations or changes in interference intensity, the reasonable variation in the inter-frequency clock difference between adjacent epochs should be limited to a finite range.

[0081] Step S432: Calculate the absolute value of the difference between the dynamically corrected inter-frequency clock difference and the effective inter-frequency clock difference of the previous epoch.

[0082] After obtaining the effective inter-frequency clock difference value of the previous epoch, the absolute value of the difference between the current epoch's dynamically corrected inter-frequency clock difference value and the previous epoch's effective inter-frequency clock difference value is calculated. This absolute value reflects the instantaneous change in the inter-frequency clock difference value between two adjacent timing calculation epochs. Under normal operating conditions, since the effects of temperature changes and interference power changes on hardware delays are continuous and have a finite rate, the absolute value of the difference between adjacent epochs should be maintained within a small range. If the absolute value of this difference increases abnormally, it means that the correction result of the current epoch may have deviated significantly from the actual physical state. The reasons may include instantaneous malfunctions of the temperature sensor, outliers in the interference power estimate, transient disturbances during automatic gain control level switching, or occasional calculation errors in baseband processing.

[0083] Step S433: Determine whether the absolute value of the difference exceeds the preset reasonable fluctuation threshold.

[0084] After calculating the absolute value of the difference, it is determined whether this absolute value exceeds a preset reasonable fluctuation threshold. This preset reasonable fluctuation threshold is a threshold value pre-set based on the delay variation characteristics of the anti-interference antenna's RF link and the receiver's timing accuracy requirements. The setting of this threshold needs to balance the sensitivity to abnormal jumps with the tolerance for normal, minor fluctuations. It must be able to promptly identify erroneous correction results caused by sensor malfunctions or calculation anomalies, while avoiding misjudging reasonable fluctuations caused by normal changes in environmental conditions as abnormal. In practical implementation, the reasonable fluctuation threshold can be comprehensively determined by combining factors such as the time constant of the antenna devices, the physical limit of the temperature change rate, and the noise level of the receiver's clock error calculation; for example, it can be set to a value on the order of tens to hundreds of picoseconds.

[0085] Step S434: When the absolute value of the difference exceeds the preset reasonable fluctuation threshold, the correction result is determined to be invalid, the dynamically corrected inter-frequency clock difference is discarded, and the effective inter-frequency clock difference of the previous epoch is used as the inter-frequency clock difference of the current epoch.

[0086] When step S433 determines that the absolute value of the difference exceeds the preset reasonable fluctuation threshold, the correction result is deemed invalid, the dynamically corrected inter-frequency clock difference calculated for the current epoch is discarded, and the effective inter-frequency clock difference from the previous epoch is used as the actual inter-frequency clock difference used in the current epoch. This is equivalent to using historical effective values ​​to maintain and replace the current output when a significant anomaly occurs in the correction result of the current epoch, preventing abnormal values ​​from entering the timing loop and causing sudden disturbances to the second pulse phase. Since the normal variation of the inter-frequency clock difference between adjacent epochs is extremely small, using the effective value from the previous epoch to temporarily replace the current epoch output has a negligible impact on the final timing accuracy, but it effectively prevents abnormal data from propagating backward.

[0087] Step S435: When the absolute value of the difference does not exceed the preset reasonable fluctuation threshold, the correction result is determined to be valid, and the dynamically corrected inter-frequency clock difference is used as the inter-frequency clock difference of the current epoch.

[0088] When step S433 determines that the absolute value of the difference does not exceed the preset reasonable fluctuation threshold, the correction result is deemed valid, and the dynamically corrected inter-frequency clock difference is used as the actual inter-frequency clock difference in the current epoch. Simultaneously, this valid value is updated to a new historical valid value for the next epoch's rationality verification. In most cases under normal system operation, the dynamically corrected difference is adopted normally, allowing the compensation amount to continuously and smoothly evolve in real time following changes in ambient temperature and interference conditions.

[0089] By employing an adjacent epoch difference verification and anomaly replacement mechanism, a real-time effectiveness check barrier is added to the dynamic correction process. Utilizing the physical characteristic that the frequency difference between adjacent epochs is continuous and finite, the rationality of the correction result for each epoch is evaluated. This promptly identifies and isolates correction value jumps caused by instantaneous sensor anomalies, estimation noise, or calculation disturbances. When an anomaly occurs, the effective value of the previous epoch is automatically used for smooth replacement, thereby effectively suppressing the impact of occasional errors on the timing second pulse phase and further ensuring the stability of the dynamic compensation process under complex operating conditions and the continuous stability of the timing output.

[0090] Specifically, before calibrating the local time to output the second pulse in step S500, the following steps are also included: Step S501: Based on the local clock time base, generate the first second pulse corresponding to the first frequency point and the second second pulse corresponding to the second frequency point.

[0091] Before performing local time calibration and finally outputting the second pulse in step S500, the first second pulse corresponding to the first frequency point and the second second pulse corresponding to the second frequency point are generated based on the local clock base. The local clock base is usually provided by a high-stability crystal oscillator inside the receiver, such as a temperature-compensated crystal oscillator or a temperature-controlled crystal oscillator, whose nominal output frequency is generally ten megahertz. The receiver baseband processing unit uses this local clock base as a reference and generates an electrical signal with a fixed pulse width at the integer moments of each second by counting and dividing the clock cycle, which is the second pulse. For the first and second frequency points, the receiver independently calculates the count value of the second pulse generation time relative to the local clock base based on the local clock difference correction amount calculated for each frequency point, and writes the count value into the corresponding second pulse generation register, thereby generating two physical pulse signals, the first second pulse and the second second pulse, in parallel. This parallel generation method means that regardless of which frequency point's clock difference information is used for the current time synchronization output, the second pulses of both frequencies are generated and updated in real time in the background, providing a complete alternative signal source for subsequent pulse validity detection and optimal switching.

[0092] Step S502: The PPS phase detector is used to detect the validity of the first second pulse and the second second pulse. The validity detection includes calculating the time interval difference between two adjacent second pulse epochs. When the time interval difference exceeds the preset transition threshold, the corresponding second pulse is determined to be invalid and the invalid flag is set.

[0093] like Figure 4As shown, after generating the first and second second pulses in parallel, a PPS phase detector is used to detect the validity of these two second pulses. The PPS phase detector is a hardware or logic module used to detect the periodic stability and phase continuity of a second pulse. Its core working principle is to utilize the high-frequency counting capability of the local clock base to accurately measure the time interval between two adjacent rising edges of the input second pulse. Specifically, the PPS phase detector uses the period of the local clock as the timing unit, records the current clock count value at the rising edge of each second pulse, and calculates the difference between the current epoch count value and the previous epoch count value. This difference is the measured time interval count value between two adjacent second pulse epochs. Ideally, when the second pulse is stable and without jumps, this measured time interval count value should be basically consistent with the preset standard time interval count value. The deviation between the two only comes from the frequency drift and aging of the local crystal oscillator itself. The frequency drift of the crystal oscillator is an extremely small and continuous slow change on adjacent second-level time scales, without any step-like abrupt changes. When a second pulse at a certain frequency experiences a sudden edge transition, period abnormality, or second loss due to sudden interference, brief signal loss, or baseband processing anomaly, the measured time interval count will show a significant instantaneous change deviating from the standard value. This change is numerically manifested as a sudden increase in the absolute value of the time interval difference between adjacent epochs. The PPS phase detector calculates this absolute value in real time and compares it with a preset transition threshold. When the absolute value exceeds the preset threshold, it determines that the second pulse generated in the current epoch at that frequency is abnormal and immediately sets the invalid flag corresponding to that frequency. The preset transition threshold must balance tolerance for normal crystal oscillator drift and sensitivity to abnormal pulse transitions, and is typically set in the tens of nanosecond range. Through this phase detection method based on differential comparison between adjacent epochs, the PPS phase detector successfully eliminates the interference of long-term drift of the local crystal oscillator on the detection results, responding only to discontinuous abnormal steps, thus achieving highly reliable and low-false-judgment detection of the validity of the second pulse.

[0094] In a preferred embodiment of the present invention, the preset transition threshold in the PPS phase detector is specifically set to 50 ns. When the PPS phase detector detects that the absolute value of the time interval difference between two adjacent second pulse epochs exceeds 50 ns, it determines that the second pulse of the current epoch has experienced edge transition, period abnormality, or dropped seconds, and immediately sets the invalid flag corresponding to that frequency point. The setting of the 50 ns threshold takes into account the ability to distinguish between the slow frequency changes caused by normal temperature drift and aging of the local crystal oscillator and the sudden step transitions caused by external electromagnetic interference. The frequency drift of the local high-stability crystal oscillator on adjacent second time scales is usually much less than 50 ns, so this threshold can effectively eliminate the interference of the slow-changing characteristics of the crystal oscillator itself, and only respond sensitively to the pulse distortion caused by electromagnetic interference, thereby achieving accurate identification of invalid second pulses.

[0095] Furthermore, after using a PPS phase detector to detect the validity of the first-second pulse and the second-second pulse in step S502, the process also includes: Step S503: The first-second pulse and the second-second pulse after validity detection are sent to the PPS selector.

[0096] After the PPS phase detector performs validity checks on the first and second second pulses and sets their respective valid or invalid flags, the two physical pulse signals, the first and second second pulses that have passed the validity check, are simultaneously sent to the PPS selector. The PPS selector is a hardware logic module or digital selection circuit used for selective switching among multiple candidate second pulses. Its inputs are connected to the first and second frequency second pulse generation paths, respectively, and its output is connected to the receiver's external time synchronization interface. Each second pulse signal sent to the PPS selector carries its corresponding validity flag status, which is updated in real-time by the aforementioned PPS phase detector at each time synchronization epoch, clearly indicating whether the second pulse generated at the current epoch of the corresponding frequency point has passed the physical layer validity check. The first and second second pulses always operate independently and in parallel before entering the PPS selector. Regardless of whether one is determined to be invalid, the other continues to be generated and undergo phase detection. This redundant parallel architecture provides the hardware foundation for subsequent seamless selective switching.

[0097] In step S504, the PPS selector selects the second pulse corresponding to the valid frequency point of the output based on the valid flags corresponding to the first second pulse and the second second pulse.

[0098] After receiving the first and second second pulses and their corresponding valid flags, the PPS selector selects the final output second pulse based on the valid flag status of the two second pulses. The selection logic of the PPS selector follows a preset priority strategy, that is, it prioritizes the second pulse corresponding to the valid frequency point with anti-interference capability as the output. In specific implementation, if the valid flag corresponding to the first frequency point is valid and the signal quality of the first frequency point meets the preset anti-interference availability conditions, the PPS selector will select the first second pulse to the output terminal as the timing second pulse provided by the receiver. If the valid flag of the first frequency point is set to invalid due to interference, while the valid flag corresponding to the second frequency point is valid, the PPS selector will immediately switch the output path to the second second pulse, which will be output externally. Because the second pulses at the two frequencies are generated in parallel and independently phase-detected in the background, the switching action of the PPS selector only involves the gating control of the output path, without involving the regeneration or relocking of the second pulse. Therefore, the switching delay is minimal, and the phase of the second pulse before and after the switch is precisely controlled by the local clock difference and compensation value of each frequency, maintaining a high degree of phase continuity. When the valid flags of both frequencies are invalid, the PPS selector can output a preset alarm indication or not output a second pulse to indicate that the current timing function of the upper-level system is malfunctioning.

[0099] It should be noted that although the above embodiments mainly use the first and second frequency points as examples to describe the method of the present invention in detail, the method provided by the present invention is also applicable to scenarios where the anti-interference antenna and receiver support three or more operating frequency points. When there are more frequency points, one of the frequency points can be selected as the reference frequency point, and the inter-frequency clock difference between each of the other frequency points and the reference frequency point can be calculated according to the method described in steps S100 to S400 above. The calculated inter-frequency clock difference values ​​are stored in the non-volatile memory of the receiver. In the actual time synchronization process, the signal status of all available frequency points is monitored in real time. When the reference frequency point signal is interfered with and cannot work normally, one of the other backup frequency points with normal signals can be selected for switching according to the preset priority strategy, and the local clock difference corresponding to the backup frequency point and its inter-frequency clock difference with the reference frequency point are used together for time synchronization calibration. When the number of backup frequencies increases, the system can also make a comprehensive judgment by combining the carrier-to-noise ratio, phase-locked loop locking status, and PPS effectiveness detection results of each frequency, and select the current optimal frequency to output the second pulse, thereby further improving the robustness and availability of the timing system in complex electromagnetic environments.

[0100] Specifically, the calculation process of the first single-satellite local clock error in step S300 includes: calculating the first single-satellite local clock error based on the pseudorange observation corresponding to the first frequency point, the true geometric distance between the common satellite and the receiver, the satellite clock error of the common satellite, the ionospheric correction, and the tropospheric correction.

[0101] Accordingly, the calculation process of the second satellite local clock error in step S300 includes: calculating the second satellite local clock error based on the pseudorange observation, geometric true range, satellite clock error, ionospheric correction and tropospheric correction corresponding to the second frequency point.

[0102] When calculating the first local clock bias of each public satellite, the receiver first acquires the pseudorange observation at the first frequency point. The pseudorange observation refers to the distance value corresponding to the time delay between the satellite signal transmission time and the reception time, obtained by the receiver through code phase measurement. This distance value includes the true geometric distance between the satellite and the receiver, the satellite clock bias, the receiver's local clock bias, ionospheric delay, tropospheric delay, and various hardware delays and noise. Simultaneously, the receiver uses the acquired local position and satellite ephemeris data to calculate the true geometric distance between the satellite and the receiver. The true geometric distance is the straight-line distance from the phase center of the satellite antenna to the phase center of the receiver antenna, reflecting the spatial distance of signal propagation in a vacuum. The satellite clock bias is calculated using clock bias correction parameters in the navigation message broadcast by the satellite, used to correct the deviation of the satellite's atomic clock relative to the BeiDou system. The ionospheric correction is calculated based on the ionospheric model or dual-frequency observations, used to compensate for the frequency-related delay generated when the signal crosses the ionosphere. The tropospheric correction is estimated based on the empirical tropospheric model and local meteorological parameters, and is used to compensate for the refraction delay of the signal in the troposphere. Based on the above parameters, after subtracting the geometric true distance, satellite clock error, ionospheric correction, and tropospheric correction from the pseudorange observation, the remaining equivalent distance is the distance value corresponding to the local clock error of the first single satellite at the first frequency point of the common satellite. Dividing this by the speed of light converts it to the local clock error of the first single satellite in the time domain.

[0103] Correspondingly, the calculation process for the local clock bias of the second satellite on the same public satellite is completely symmetrical to that of the first satellite. The receiver acquires the pseudorange observations of the satellite at the second frequency. The true geometric range, satellite clock bias, and tropospheric correction are exactly the same as those calculated for the first frequency, because the geometric position and satellite clock bias are consistent for signals at different frequencies at the same time, while the tropospheric delay is frequency-independent. The ionospheric correction, however, needs to be recalculated for the second frequency. Since the ionospheric delay is inversely proportional to the square of the signal frequency, the ionospheric correction differs for different frequencies. Subtracting the true geometric range, satellite clock bias, ionospheric correction, and tropospheric correction from the pseudorange observations at the second frequency, and then converting the remaining portion to the speed of light, yields the local clock bias of the second satellite.

[0104] The overall process is illustrated using a simplified numerical example. Assume that at a certain moment, a receiver observes a BeiDou satellite with a high elevation angle, which simultaneously broadcasts signals at both a first frequency and a second frequency. The receiver measures the pseudorange at the first frequency as 25,000 km and the pseudorange at the second frequency as 25,000 km plus a difference of approximately tens of meters. Using the receiver's local position and the satellite's ephemeris, the true geometric range of the satellite is calculated to be 24,990 km. The satellite clock bias is calculated as a positive 5-meter equivalent distance based on the navigation message. The ionospheric correction for the first frequency is a positive 8-meter equivalent distance, and for the second frequency, it is a positive 2-meter equivalent distance. The tropospheric correction is uniformly set to a positive 2-meter equivalent distance. For the first frequency, subtracting the true geometric range, satellite clock bias, ionospheric correction, and tropospheric correction from the pseudorange measurement yields an equivalent distance of approximately 5,000 meters. The time value corresponding to this distance is the local clock bias of the first single satellite. For the second frequency point, subtracting the same geometric true distance and satellite clock error from the pseudorange observation, and then subtracting the ionospheric correction and tropospheric correction for the second frequency point, yields an equivalent distance of approximately 5,000 meters plus a difference of several meters. The corresponding time quantity is the local clock error of the second single satellite. Subtracting the local clock error of the first single satellite from the local clock error of the second single satellite, the resulting difference is the single-satellite dual-frequency clock error difference of the common satellite. The satellite orbit error, satellite clock error, geometric distance error, and tropospheric model residual in this difference have been effectively offset. The remaining part mainly reflects the comprehensive difference between the two frequency points caused by the difference in ionospheric correction and the difference in hardware channel delay of the anti-interference antenna. After subsequent multi-satellite averaging, the pure hardware channel delay difference can be extracted.

[0105] Accordingly, a second aspect of the present invention provides an electronic device, including: at least one processor; and a memory connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to cause the at least one processor to perform the above-described BeiDou multi-frequency receiver timing method for anti-interference antenna.

[0106] Accordingly, a third aspect of the present invention provides a computer-readable storage medium having computer instructions stored thereon, which, when executed by a processor, implement the above-described BeiDou multi-frequency receiver timing method for anti-interference antennas.

[0107] The embodiments of the present invention aim to protect a timing method for a BeiDou multi-frequency receiver used with an anti-interference antenna, which has the following effects: 1. By selecting public satellites that simultaneously possess observations at both the first and second frequency points, the difference between the local clock errors of the two frequencies of each public satellite is calculated and averaged to obtain the inter-frequency clock difference value, which characterizes the delay difference of the hardware channel of the anti-interference antenna. This method utilizes the common-mode nature of the dual-frequency observations of the same satellite in terms of geometric distance, satellite clock error, ephemeris error, and the dual-frequency consistency of atmospheric model errors at the same location. By separating the satellite end and space segment errors through inter-frequency differential analysis, and combining multi-satellite averaging to suppress observation noise and local ionospheric fluctuations, the inter-frequency clock difference value retains only the inherent frequency-specific delay of the antenna. Compared with fixed calibration values ​​or single-satellite elevation angle selection methods, this application achieves accurate extraction of hardware delay differences, provides a high-precision benchmark for timing compensation, and eliminates the second pulse output deviation caused by inaccurate compensation benchmarks. 2. The operating temperature of the anti-interference antenna RF link and the estimated interference signal power are introduced as real-time status parameters. The historical time series of the inter-frequency clock difference is decomposed into a slowly changing trend component related to long-term temperature changes and a rapidly changing fluctuation component related to short-term interference power changes. A mapping relationship is established using the first tracking time constant and the second tracking time constant, and then superimposed to form a preset correction mapping relationship. The delay correction amount is determined according to the real-time temperature and interference power, and the inter-frequency clock difference is dynamically adjusted. At the same time, the rationality of the correction result is checked, and the effective value of the previous epoch is used in case of anomalies. The physical processes of slow temperature drift and rapid interference power jitter are distinguished, and group modeling and fusion compensation are realized. This overcomes the problem of accuracy degradation of fixed compensation under high and low temperature wide operating conditions and dynamic electromagnetic environment. The verification mechanism further suppresses abnormal jumps and improves the long-term reliability of the timing system. 3. Before outputting the second pulse, second pulses for the first and second frequency points are generated in parallel based on the local clock. Validity checks are performed on the second pulses for each frequency point. The validity is determined by comparing the absolute value of the deviation between the time interval of adjacent epoch pulses and the standard interval with the transition threshold, and a flag is set. Then, the PPS selector selects the optimal output based on the validity flag. This architecture transforms the traditional passive switching mode into an active switching mode where second pulses for each frequency point are generated in parallel, independently phase-detected, and dynamically selected. Utilizing the physical difference between continuous drift of the local clock and interference step transitions, the differential phase detection method accurately identifies and eliminates pulse distortion or lost seconds, eliminating interruptions and transitions during frequency switching, achieving seamless and smooth transitions between multiple frequency points, and significantly improving the continuous availability and anti-interference capability of the timing system in complex electromagnetic environments.

[0108] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0109] This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0110] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0111] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0112] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the scope of protection of the claims of the present invention.

Claims

1. A timing method for a BeiDou multi-frequency receiver using an anti-interference antenna, characterized in that, Includes the following steps: Step S100: Receive and process analog radio frequency signals from the anti-interference antenna to simultaneously capture and track satellite signals at at least one first frequency point and one second frequency point; Step S200: Select satellites that meet the preset stable tracking conditions from satellites that simultaneously have observation values ​​at the first frequency point and observation values ​​at the second frequency point as common satellites; Step S300: For each of the aforementioned public satellites, calculate the difference between the local clock difference of the first single satellite corresponding to the first frequency point and the local clock difference of the second single satellite corresponding to the second frequency point to obtain the single-satellite dual-frequency clock difference difference. Step S400: Calculate the average value of the single-satellite dual-frequency clock difference for all the public satellites to obtain the inter-frequency clock difference value. The inter-frequency clock difference value characterizes the hardware channel delay difference of the anti-interference antenna between the first frequency point and the second frequency point. Step S500: When the first frequency signal is normal, the local time is calibrated by the local clock difference obtained based on the first frequency to output a second pulse; When the first frequency signal is interfered with and the second frequency signal is normal, the local time is calibrated by combining the local clock difference obtained based on the second frequency with the inter-frequency clock difference to output a second pulse.

2. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 1, characterized in that, After calculating the average of the single-satellite dual-frequency clock difference values ​​corresponding to all the public satellites to obtain the inter-frequency clock difference value, the method further includes: Step S410: Obtain real-time status parameters that affect the delay difference of the hardware channel of the anti-interference antenna. The real-time status parameters are environmental parameters or operating status parameters that can cause the delay drift of the radio frequency link of the anti-interference antenna. Step S420: Based on the real-time state parameters and the preset correction mapping relationship, determine the delay correction amount corresponding to the current real-time state parameters. The correction mapping relationship represents the correspondence between different real-time state parameter values ​​and the change in the inter-frequency delay difference of the anti-interference antenna. Step S430: Adjust the inter-frequency clock difference value using the delay correction amount to obtain the dynamically corrected inter-frequency clock difference value. The inter-frequency clock difference value used in step S5 is the dynamically corrected inter-frequency clock difference value.

3. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 2, characterized in that, The real-time status parameters include the operating temperature of the radio frequency link of the anti-interference antenna and the estimated power of the interference signal received by the anti-interference antenna. Before determining the delay correction amount corresponding to the current real-time state parameter based on the real-time state parameter and the preset correction mapping relationship, the method further includes: Step S4201: Obtain the historical time series of the inter-frequency clock difference at multiple epochs, and perform component decomposition on the historical time series to obtain a slowly changing trend component series and a rapidly changing fluctuation component series. The slowly changing trend component series is associated with the long-term change of the operating temperature of the RF link, and the rapidly changing fluctuation component series is associated with the short-term change of the estimated value of the interference signal power. Step S4202: Using the operating temperature of the RF link as the independent variable and the slowly changing trend component sequence as the dependent variable, a first mapping relationship between the operating temperature of the RF link and the slowly changing trend component is established using a first tracking time constant. The first mapping relationship is used to characterize the delay drift trend caused by temperature changes. Step S4203: Using the estimated power of the interference signal as the independent variable and the fast-changing fluctuation component sequence as the dependent variable, a second mapping relationship between the estimated power of the interference signal and the fast-changing fluctuation component is established using a second tracking time constant. The second tracking time constant is less than the first tracking time constant. The second mapping relationship is used to characterize the delay jitter caused by the change in interference power. Step S4204: Superimpose the first mapping relationship with the second mapping relationship to form the preset correction mapping relationship. The preset correction mapping relationship is used to determine the corresponding delay correction amount based on the current RF link operating temperature and the current interference signal power estimate.

4. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 3, characterized in that, The step of establishing a first mapping relationship between the RF link operating temperature and the slowly varying trend component using a first tracking time constant, with the RF link operating temperature as the independent variable and the slowly varying trend component sequence as the dependent variable, includes: Step S42021: Divide the rated operating range of the RF link operating temperature into multiple continuous and non-overlapping temperature ranges; When the operating temperature of the RF link fluctuates near the boundary between the current temperature range and the adjacent temperature range, the current effective temperature range is determined by hysteresis comparison. The hysteresis comparison method is as follows: when the operating temperature of the RF link changes from the current temperature range to an adjacent temperature range and exceeds a preset upper threshold, the adjacent temperature range is determined as the new current effective temperature range; when the operating temperature of the RF link falls back from the adjacent temperature range to the current temperature range and is lower than a preset lower threshold, the current temperature range is redefined as the current effective temperature range, wherein the upper threshold and the lower threshold are located on both sides of the boundary and do not overlap. Step S42022: Determine the output value of the gradually changing trend component in the first mapping relationship based on the current effective temperature range.

5. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 3, characterized in that, The component decomposition of the historical time series to obtain a slowly changing trend component series and a rapidly changing fluctuation component series includes: Step S42011: Obtain the temperature change rate sequence of the RF link operating temperature and the power fluctuation rate sequence of the interference signal power estimate within the same time period as the historical time series; Step S42012: Using the temperature change rate sequence as the first reference signal, perform a first adaptive filter on the historical time series, and extract the components that have a correlation higher than the first correlation threshold with the temperature change rate sequence as the gradual trend component sequence; Step S42013: Using the power volatility sequence as the second reference signal, perform a second adaptive filter on the residual sequence after the first adaptive filter, and extract the components that have a correlation higher than the second correlation threshold with the power volatility sequence as the fast-change volatility component sequence.

6. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 3, characterized in that, Before establishing the second mapping relationship between the estimated interference signal power and the rapidly changing fluctuation component using the estimated interference signal power as the independent variable and the rapidly changing fluctuation component sequence as the dependent variable, and employing the second tracking time constant, the method further includes: Step S4203A: Obtain the current gain level information of the automatic gain control circuit inside the anti-interference antenna, wherein the current gain level information represents the current gain attenuation level of the radio frequency link of the anti-interference antenna; Step S4203B: Perform segmented quantization processing on the interference signal power estimate based on the current gain level information, and map the interference signal power estimate within the same gain level range to a unified power level identifier; Step S4203C: Replace the estimated power of the interference signal with the power level identifier as the independent variable, and perform the step of establishing the second mapping relationship.

7. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 2, characterized in that, The step of adjusting the inter-frequency clock difference using the delay correction amount to obtain the dynamically corrected inter-frequency clock difference includes: Step S431: Obtain the effective inter-frequency clock difference value of the previous epoch, wherein the effective inter-frequency clock difference value is the inter-frequency clock difference value that is determined to be valid in the previous epoch after a rationality check; Step S432: Calculate the absolute value of the difference between the dynamically corrected inter-frequency clock difference and the effective inter-frequency clock difference of the previous epoch; Step S433: Determine whether the absolute value of the difference exceeds a preset reasonable fluctuation threshold; Step S434: When the absolute value of the difference exceeds the preset reasonable fluctuation threshold, the correction result is determined to be invalid, the dynamically corrected inter-frequency clock difference is discarded, and the effective inter-frequency clock difference of the previous epoch is used as the inter-frequency clock difference of the current epoch. Step S435: When the absolute value of the difference does not exceed the preset reasonable fluctuation threshold, the correction result is determined to be valid, and the dynamically corrected inter-frequency clock difference is used as the inter-frequency clock difference of the current epoch.

8. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 1, characterized in that, Before calibrating the local time to output the second pulse, the following is also included: Step S501: Based on the local clock time base, generate the first second pulse corresponding to the first frequency point and the second second pulse corresponding to the second frequency point respectively; Step S502: Use a PPS phase detector to perform validity detection on the first second pulse and the second second pulse. The validity detection includes calculating the time interval difference between two adjacent second pulse epochs. When the time interval difference exceeds a preset transition threshold, the corresponding second pulse is determined to be invalid and an invalid flag is set.

9. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to claim 8, characterized in that, After using a PPS phase detector to detect the validity of the first second pulse and the second second pulse, the method further includes: Step S503: Send the first second pulse and the second second pulse after the validity detection to the PPS selector; Step S504: The PPS selector selects the second pulse corresponding to the valid frequency point to be output based on the valid flags corresponding to the first second pulse and the second second pulse.

10. The BeiDou multi-frequency receiver timing method for anti-interference antennas according to any one of claims 1-9, characterized in that, The calculation process for the local clock bias of the first single satellite includes: The local clock error of the first single satellite is calculated based on the pseudorange observation corresponding to the first frequency point, the true geometric distance between the common satellite and the receiver, the satellite clock error of the common satellite, the ionospheric correction, and the tropospheric correction. The calculation process for the second single-satellite local clock bias includes: The local clock error of the second single satellite is calculated based on the pseudorange observation corresponding to the second frequency point, the true geometric distance, the satellite clock error, the ionospheric correction, and the tropospheric correction.

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