A layer with many occupancy points in a high-resistance semiconductor layer

A semiconductor structure with high-resistance single-crystal and polycrystalline layers addresses high capacitance and leakage in semiconductor devices, enhancing insulation and linearity.

DE102021102414B4Active Publication Date: 2026-06-03GLOBALFOUNDRIES US INC
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Patent Information

Application Number
DE102021102414
Authority / Receiving Office
DE · DE
Patent Type
Patents
Current Assignee / Owner
Priority Date
2020-03-03
Filing Date
2021-02-03
Publication Date
2026-06-03
Estimated Expiration
2041-02-03

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Abstract

Comprehensive structure: a semiconductor substrate (10); a first semiconductor layer (24) over the semiconductor substrate (10), wherein the first semiconductor layer (24) comprises single-crystal semiconductor material having an electrical resistivity greater than or equal to 1000 Ohm-cm; a plurality of flat trench insulation regions (26) in the first semiconductor layer (24), wherein the plurality of flat trench insulation regions (26) are arranged to surround a first section of the first semiconductor layer (24) to define a first active device region (18); and a polycrystalline layer (36) in the first semiconductor layer (24), wherein the polycrystalline layer (36) extends laterally beneath the first active device area (18) and the plurality of shallow trench isolation areas (26) surrounding the first active device area (18), wherein the structure further comprises a second semiconductor layer (22) positioned between the first semiconductor layer (24) and the semiconductor substrate (10) in the first active device area (18), wherein the second semiconductor layer (22) comprises single-crystal semiconductor material having an electrical resistivity of less than or equal to 50 ohm-cm.
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Citation Information

Patent Citations

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