METHOD FOR MAKING A SOLDER JOINT

Abstract

A process for producing a solder joint includes steps for arranging a wafer in a chamber, first rinsing the chamber with formic acid, first evacuating the chamber, second rinsing the chamber with formic acid, second evacuating the chamber, rinsing the chamber with nitrogen, and producing a solder joint between a component and the wafer.

Description

[0001] The present invention relates to a method for producing a soldered joint.

[0002] Various methods are known for soldering components such as optoelectronic semiconductor chips onto wafers. For example, in the prior art, such solder joints are produced in a vacuum environment.

[0003] One object of the present invention is to provide a method for producing a soldered joint.

[0004] This problem is solved by a method with the features of the independent patent claim. Various further developments are specified in the dependent claims.

[0005] A process for producing a solder joint includes steps for arranging a wafer in a chamber, first rinsing the chamber with formic acid, first evacuating the chamber, second rinsing the chamber with formic acid, second evacuating the chamber, rinsing the chamber with nitrogen, and producing a solder joint between a component and the wafer.

[0006] Rinsing the chamber with formic acid in this process removes tin oxides formed on or in the bonding material, thereby reducing the risk of unwanted component delamination. Two rinses of the chamber with formic acid also advantageously remove intermediate products formed during the removal of the tin oxides. Furthermore, two rinses of the chamber with formic acid can advantageously result in a particularly complete removal of the tin oxides.

[0007] In one variation of the process, the wafer is heated during the procedure. Advantageously, this allows different chemical processes to occur during the first rinsing of the chamber with formic acid and during the second rinsing of the chamber with formic acid.

[0008] In one variation of the process, the wafer reaches a temperature of more than 150 °C during the initial purging of the chamber with formic acid. This advantageously allows for the degradation of tin oxides during this first purging. For example, tin oxides can be converted into tin formates.

[0009] In one variant of the process, the wafer reaches a temperature of more than 200 °C during the second purging of the chamber with formic acid. Advantageously, this enables the decomposition of tin formates during the second purging of the chamber with formic acid.

[0010] In one variation of the process, the first and second rinsing of the chamber with formic acid each involve filling the chamber with formic acid followed by a settling period. This advantageously allows for a sufficiently long contact time with the formic acid.

[0011] In one variant of the procedure, the chamber is evacuated again before the first rinsing with formic acid.

[0012] In one variant of the process, the component is an optoelectronic semiconductor chip. Advantageously, this method enables the production of hybrid components that include optoelectronic semiconductor chips and other semiconductor chips.

[0013] The properties, features, and advantages of this invention described above, as well as the manner in which they are achieved, will become clearer and more readily understandable in connection with the following description of the exemplary embodiments, which are explained in more detail in conjunction with the drawings. These drawings are shown in schematic representations. Fig. 1. A sectional view of a chamber for making a soldered joint; and Fig. Two steps of a process for creating a soldered joint, as well as a temperature profile.

[0014] Fig. Figure 1 shows a cutaway and highly schematic side view of a chamber 100 for producing a solder joint 140 between a wafer 110 and a component 120.

[0015] Wafer 110 comprises a semiconductor material with integrated electronic circuits. These electronic circuits may include, for example, driver circuits for controlling component 120. Wafer 110 is designed as a substantially flat disk with a top surface 111.

[0016] Component 120 can be configured, for example, as an optoelectronic semiconductor chip or as another type of semiconductor chip. In particular, component 120 can be configured, for example, as a light-emitting diode (LED) chip, such as a pixelated LED chip. Component 120 could also be configured as a complete wafer. Component 120 has a bottom surface 122.

[0017] The solder joint 140 is made between the top side 111 of the wafer 110 and the bottom side 122 of the component 120 from a bonding material 130. The bonding material 130 contains tin.

[0018] Fig. Figure 2 shows a schematic flow chart of a process 200 for producing the soldered joint 140. At the same time, it shows Fig. 2 an exemplary temperature profile 300 of a temperature 320 of the wafer 110 as a function of a time 310 during the course of the process 200.

[0019] In a first step 210 of the process 200, the wafer 110 is arranged in the chamber 100. The component 120 is positioned above the top surface 111 of the wafer 110 such that the bottom surface 122 of the component 120 faces the top surface 111 of the wafer 110. The bonding material 130 is positioned between the top surface 111 of the wafer 110 and the bottom surface 122 of the component 120. The bonding material 130 can, for example, be provided on the top surface 111 of the wafer 110 or on the bottom surface 122 of the component 120.

[0020] Tin oxides may form on or in the joining material 130 under the influence of ambient air, which can adversely affect the quality of the solder joint 140 formed from the joining material 130. Therefore, it is desirable to remove such tin oxides as completely as possible before forming the solder joint 140.

[0021] In a second step 220 of the procedure 200, an initial evacuation of chamber 100 takes place.

[0022] In the further course of the process 200, the temperature 320 of the wafer 110 is continuously increased, for example starting from the ambient temperature. The heating of the wafer 110 can also begin during the second step 220 for the initial evacuation of the chamber 100.

[0023] In a third step 230 of the process 200, the chamber 100 is first rinsed with formic acid (HCOOH). The temperature 320 of the wafer 110 can, for example, exceed 150 °C.

[0024] The third step 230 for the initial rinsing of chamber 100 with formic acid comprises a first sub-step 231 and a subsequent second sub-step 232. In the first sub-step 231, chamber 100 is initially filled with formic acid. In the second sub-step 232, the wafer 110 and the component 120 are immersed in the formic acid that has been filled into chamber 100. The second sub-step 232 can, for example, last one minute.

[0025] During the third step 230, tin oxides formed on and in the compound material 130 can be converted into tin formates. The following reactions, for example, can occur: SnO + HCOOH ↔ Sn(HC00)2 + H20 SnO2 + 2 HCOOH ↔ Sn(HCOO)2 + 2 CO2 + H2.

[0026] In a fourth step 240 of the process 200, the chamber 100 is evacuated for the first time. In this step, the gaseous byproducts of the reactions that took place in the third step 230 are removed.

[0027] In a fifth step 250 of the process 200, the chamber 100 is rinsed a second time with formic acid. During this second rinsing of the chamber 100 with formic acid, the temperature 320 of the wafer 110 can, for example, exceed 200 °C.

[0028] The fifth step 250 comprises a first sub-step 251 and a subsequent second sub-step 252. In the first sub-step 251, chamber 100 is filled a second time with formic acid. In the second sub-step 252, the wafer 110 and the component 120 rest in the formic acid that has been filled into chamber 100. The second sub-step 252 can, for example, last one minute.

[0029] In the fifth step, the tin formates formed in the third step can be decomposed. The following reaction, for example, can occur: Sn(HCOO)2 ↔ Sn + 2CO2 + H2.

[0030] Additionally, the following reaction can also occur: SnO x + H2 ↔ Sn + H2O.

[0031] This allows the fifth step 250 to also enable an even further removal of tin oxides present on or in the bonding material 130.

[0032] In a sixth step 260 of the process 200, a second evacuation of chamber 100 takes place. In this step, the gaseous by-products formed in the fifth step 250 are removed.

[0033] In a subsequent seventh step 270 of the procedure 200, the chamber 100 can be rinsed with nitrogen.

[0034] In an eighth step 280 of the process 200, a solder joint 140 is created between the component 120 and the wafer 110. The temperature 320 of the wafer 110 can be further increased during this process. The solder joint 140 can be created, for example, in a vacuum or at low pressure.

[0035] In other variations of the process, this can include more than two steps for rinsing the chamber with formic acid.

[0036] The invention has been illustrated and described in more detail with reference to preferred embodiments. However, the invention is not limited to the disclosed examples. Other variations can be derived by those skilled in the art. REFERENCE MARK LIST 100 chambers 110 wafers 111 Top 120 components 122 Underside 130 connecting materials 140 solder joints 200 procedures 210 first step 220 second step 230 third step 231 first sub-step 232 second sub-step 240 fourth step 250 fifth step 251 first sub-step 252 second sub-step 260 sixth step 270 seventh step 280 eighth step 300 Temperature profile 310 Time 320 temperature

Claims

Method for producing a solder joint, comprising the following steps: - Arranging a wafer (110) in a chamber (100); - First purging of the chamber (100) with formic acid; - First evacuation of the chamber (100); - Second purging of the chamber (100) with formic acid; - Second evacuation of the chamber (100); - Purging of the chamber (100) with nitrogen; - Producing a solder joint (140) between a component (120) and the wafer (110). Method according to claim 1, wherein the wafer (110) is heated during the execution of the method. Method according to one of the preceding claims, wherein the wafer (110) has a temperature (320) of more than 150 °C during the first rinsing of the chamber (100) with formic acid. Method according to one of the preceding claims, wherein the wafer (110) has a temperature (320) of more than 200 °C during the second rinsing of the chamber (100) with formic acid. Method according to one of the preceding claims, wherein the first rinsing of the chamber (100) with formic acid and the second rinsing of the chamber (100) with formic acid each comprise filling the chamber (100) with formic acid and a subsequent resting period. Method according to one of the preceding claims, wherein a further evacuation of the chamber (100) takes place before the first rinsing of the chamber (100) with formic acid. Method according to one of the preceding claims, wherein the component (120) is an optoelectronic semiconductor chip.

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