Acoustic wave device, filter, multiplexer, and electronic component

Abstract

To provide an acoustic wave device capable of suppressing the occurrence of cracks.SOLUTION: An acoustic wave device 100 includes a substrate 10 having an upper surface 11 and a lower surface 12, a via wiring 32 penetrating the substrate 10 from the upper surface 11 to the lower surface 12, a piezoelectric layer 20 provided on the upper surface 11 and having a hole 24 that overlaps the via wiring 32 in a planar view and whose outline is located inside the outline of the via wiring 32 on the upper surface 11, and an acoustic wave element 50 provided on the piezoelectric layer 20 and connected to the via wiring 32.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to acoustic wave devices, filters, multiplexers, and electronic components. [Background technology]

[0002] A configuration is known in which an acoustic wave element provided on a substrate is electrically connected to a via wiring penetrating the substrate (e.g., Patent Documents 1 and 2). Also, a configuration is known in which an acoustic wave element is sealed in a gap (e.g., Patent Documents 1 to 5). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent Publication No. 2020-205500 [Patent Document 2] JP2022-44323 Public Relations [Patent Document 3] JP2016-152612 Public Relations [Patent Document 4] JP 2014-143640 A [Patent Document 5] JP 2013-115664 A Summary of the Invention [Problem to be solved by the invention]

[0004] In a configuration in which an insulating layer is provided on a substrate and an acoustic wave element is provided on the insulating layer, the insulating layer on the via wiring is removed to enable electrical connection between the acoustic wave element and the via wiring penetrating the substrate. In this case, it is preferable to remove a small area of ​​the insulating layer in order to secure a large area for forming the acoustic wave element, etc. However, when the area of ​​the insulating layer to be removed is made small, cracks may occur in the insulating layer due to the difference in the linear expansion coefficient between the substrate and the via wiring.

[0005] The present invention has been made in consideration of the above problems, and has an object to suppress the occurrence of cracks. [Means for solving the problem]

[0006] The present invention is an acoustic wave device comprising a substrate having a first surface and a second surface opposite to the first surface, a via wiring penetrating the substrate from the first surface to the second surface, an insulating layer provided on the first surface and having a hole that overlaps the via wiring in a planar view and whose outline is located inside the outline of the via wiring on the first surface, and an acoustic wave element provided on the insulating layer and connected to the via wiring.

[0007] In the above configuration, the substrate may be made of silicon or sapphire.

[0008] In the above configuration, the via wiring may be made of copper, gold, or silver.

[0009] In the above configuration, the insulating layer may include a piezoelectric layer, and the acoustic wave element may include a comb electrode provided on the piezoelectric layer.

[0010] In the above configuration, the insulating layer may include an intermediate layer provided between the substrate and the piezoelectric layer.

[0011] In the above configuration, the intermediate layer can include at least one layer selected from the group consisting of an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, an aluminum nitride layer, an aluminum oxynitride layer, a silicon layer, a titanium oxide layer, and a polysilicon layer.

[0012] In the above configuration, the configuration can include a frame body arranged on the first surface surrounding the insulating layer, and a lid arranged on the frame body, and a sealing portion that seals the elastic wave element between the insulating layer and the lid, and a terminal arranged on the second surface and connected to the via wiring.

[0013] In the aforementioned configuration, the sealing portion may be configured to seal the acoustic wave element in a gap between the insulating layer and the lid.

[0014] In the above configuration, the diameter of the hole may be 0.9 times or less the diameter of the via wiring on the first surface.

[0015] The present invention is a filter including the above-described acoustic wave device.

[0016] The present invention is a multiplexer comprising the filter described above.

[0017] The present invention is an electronic component comprising a substrate having a first surface and a second surface opposite to the first surface, a via wiring penetrating the substrate from the first surface to the second surface, an insulating layer provided on the first surface and having a hole that overlaps the via wiring in a planar view and whose outline is located inside the outline of the via wiring on the first surface, an element provided on the insulating layer and connected to the via wiring, and a sealing portion that seals the element in a gap on the insulating layer. Effect of the Invention

[0018] According to the present invention, the occurrence of cracks can be suppressed. [Brief description of the drawings]

[0019] [Figure 1] FIG. 1 is a cross-sectional view of an acoustic wave device in accordance with a first embodiment. [Diagram 2] FIG. 2 is a plan view of the acoustic wave device in accordance with the first embodiment. [Diagram 3] FIG. 3(a) is a plan view of the acoustic wave element in the first embodiment, and FIG. 3(b) is a cross-sectional view of another example of the acoustic wave element. [Figure 4] FIG. 4(a) is a circuit diagram of a filter in the first embodiment, and FIG. 4(b) is a circuit diagram of a duplexer. [Diagram 5]FIG. 5(a) is a plan view showing the positional relationship between via wiring and holes in a piezoelectric layer in Example 1, and FIG. 5(b) is a cross-sectional view taken along line AA of FIG. 5(a). [Figure 6] 6(a) to 6(c) are cross-sectional views (part 1) illustrating a method for manufacturing the acoustic wave device in accordance with the first embodiment. [Figure 7] 7(a) to 7(c) are cross-sectional views (part 2) illustrating a method for manufacturing the acoustic wave device in accordance with the first embodiment. [Figure 8] FIG. 8(a) is a cross-sectional view of an acoustic wave device according to comparative example 1, FIG. 8(b) is a plan view showing the positional relationship between the via wiring and the piezoelectric layer in comparative example 1, and FIG. 8(c) is an enlarged view of region A in FIG. 8(b). [Figure 9] FIG. 9(a) is a cross-sectional view of an acoustic wave device according to comparative example 2, FIG. 9(b) is a plan view showing the positional relationship between the via wiring and the piezoelectric layer in comparative example 2, and FIG. 9(c) is an enlarged view of region A in FIG. 9(b). [Figure 10] FIG. 10(a) is a plan view showing the problem in Comparative Example 2, and FIG. 10(b) is a cross-sectional view taken along line AA in FIG. 10(a). [Figure 11] FIG. 11 is a cross-sectional view of an acoustic wave device in accordance with the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0020] Hereinafter, embodiments of the present invention will be described with reference to the drawings. EXAMPLES

[0021] Fig. 1 is a cross-sectional view of the acoustic wave device in accordance with the first embodiment. Fig. 2 is a plan view of the acoustic wave device in accordance with the first embodiment. In Fig. 2, a lid 44 is shown in a see-through manner. For clarity of the drawing, Fig. 1 shows a schematic cross-section of the acoustic wave device in accordance with the first embodiment (the same applies to the following similar drawings), and Fig. 2 shows a frame 42 and wiring 34 with hatching.

[0022] As shown in FIG. 1 and FIG. 2, in the acoustic wave device 100 according to the first embodiment, a piezoelectric layer 20 is bonded to an upper surface 11 of a substrate 10. The substrate 10 is, for example, a sapphire substrate, and has a thickness of 50 μm to 300 μm. The piezoelectric layer 20 is, for example, a single crystal lithium tantalate layer or a single crystal lithium niobate layer, for example, a rotated Y-cut X-propagation lithium tantalate layer or a rotated Y-cut X-propagation lithium niobate layer. The piezoelectric layer 20 has a thickness of, for example, 0.5 μm to 30 μm. The piezoelectric layer 20 may be, for example, a 30° to 50° Y-cut X-propagation lithium tantalate layer. One or more acoustic wave elements 50 are provided on the upper surface of the piezoelectric layer 20.

[0023] FIG. 3(a) is a plan view of the acoustic wave element in the first embodiment, and FIG. 3(b) is a cross-sectional view of another example of the acoustic wave element. As shown in FIG. 3(a), the acoustic wave element 50 is a surface acoustic wave resonator. An IDT (Interdigital Transducer) 51 and a reflector 52 are provided on the upper surface of the piezoelectric layer 20. The IDT 51 has a pair of opposing comb electrodes 53. The comb electrode 53 has a plurality of electrode fingers 54 and a bus bar 55 to which the plurality of electrode fingers 54 are connected. The reflectors 52 are provided on both sides of the IDT 51. The plurality of electrode fingers 54 excite the piezoelectric layer 20 to generate a surface acoustic wave. The pitch of the electrode fingers 54 of one of the pair of comb electrodes 53 is approximately the wavelength λ of the acoustic wave. The pitch D of the plurality of electrode fingers 54 is approximately twice the wavelength λ of the acoustic wave. The IDT 51 and the reflector 52 are formed of a metal film such as aluminum, copper, or molybdenum. A protective film or a temperature compensation film covering the IDT 51 and the reflector 52 may be provided on the upper surface of the piezoelectric layer 20. The comb-shaped electrode 53 may have dummy electrode fingers.

[0024] As shown in FIG. 3(b), the acoustic wave element 50 may be a piezoelectric thin film resonator. A piezoelectric layer 57 (insulating film) is provided on the substrate 10, and a lower electrode 56 and an upper electrode 58 are provided to sandwich the piezoelectric layer 57. A gap 59 is formed between the lower electrode 56 and the substrate 10. A region where the lower electrode 56 and the upper electrode 58 face each other with at least a part of the piezoelectric layer 57 sandwiched therebetween is a resonance region 61. In the resonance region 61, the lower electrode 56 and the upper electrode 58 excite an acoustic wave in the piezoelectric layer 57. The lower electrode 56 and the upper electrode 58 are metal films including, for example, a ruthenium film. The piezoelectric layer 57 is, for example, an aluminum nitride layer, a zinc oxide layer, a single crystal lithium tantalate layer, or a single crystal lithium niobate layer. An acoustic reflection film that reflects the acoustic wave may be provided instead of the gap 59.

[0025] 1 and 2, terminal 30 is provided on bottom surface 12 of substrate 10. Terminal 30 is a foot pad for electrically connecting acoustic wave element 50 to the outside. Terminal 30 is a metal layer containing, for example, copper, aluminum, or gold, and has a thickness of about several μm. For example, terminal 30 is a laminated film in which, from the substrate 10 side, a copper layer with a thickness of about 2 μm, a nickel layer with a thickness of about 5 μm, and a gold layer with a thickness of about 0.5 μm are laminated.

[0026] The via wiring 32 is provided penetrating the substrate 10 from the upper surface 11 to the lower surface 12. The piezoelectric layer 20 has a hole 24 penetrating the piezoelectric layer 20 on the via wiring 32. The hole 24 is provided overlapping the via wiring 32, and is surrounded by the piezoelectric layer 20. The piezoelectric layer 20 has a substantially rectangular shape in a plan view. Therefore, it can be said that the hole 24 is provided in the region overlapping the via wiring 32 in the substantially rectangular piezoelectric layer 20. The wiring 34 enters the hole 24 and contacts the via wiring 32. As a result, the acoustic wave element 50 is electrically connected to the terminal 30 via the wiring 34 and the via wiring 32. The via wiring 32 is formed of, for example, copper. The wiring 34 is a metal layer containing, for example, copper, aluminum, or gold, and has a thickness of about several μm. For example, the wiring 34 is a laminated film in which a titanium layer having a thickness of about 1 μm and a gold layer having a thickness of about 3 μm are laminated.

[0027] The piezoelectric layer 20 is not provided in the peripheral region of the substrate 10. In a plan view, a frame 42 is provided on the substrate 10 so as to surround the piezoelectric layer 20. The frame 42 is provided on the substrate 10 at a distance from the piezoelectric layer 20. The frame 42 is a metal layer containing, for example, copper, kovar, gold, aluminum, or tungsten. The height of the frame 42 is, for example, about 10 μm to 40 μm, and the width is, for example, about 10 μm to 40 μm. For example, the frame 42 is a laminated film of a titanium layer with a thickness of about 1 μm, a gold layer with a thickness of about 3 μm, a copper layer with a thickness of about 20 μm, a nickel layer with a thickness of about 5 μm, and a gold layer with a thickness of about 1 μm.

[0028] Lid 44 is provided on frame 42 such that gap 22 is formed between frame 42 and substrate 10. Lid 44 is joined to frame 42 with solder 46. Acoustic wave element 50 is sealed in gap 22 by sealing portion 40 including frame 42 and lid 44. Lid 44 is formed to include a metal layer such as a Kovar layer or a copper layer, and has a thickness of about 10 μm to 20 μm. From the viewpoint of dissipating heat generated from acoustic wave element 50, lid 44 is preferably formed to include a metal layer exposed to gap 22. Lid 44 may be formed to include an insulating layer or a semiconductor layer, and may be formed to include, for example, a sapphire layer, an alumina layer, a silicon layer, a glass layer, or the like.

[0029] The frame 42 may be electrically connected to the ground terminal 30 through the via wiring 32. This allows a ground potential to be supplied to the frame 42, and a shielding effect can be imparted to the sealing portion 40. In addition, heat generated from the acoustic wave element 50 can be transferred from the sealing portion 40 to the terminal 30 through the via wiring 32, and the heat dissipation effect can be improved. The frame 42 and the lid 44 are not electrically connected to the acoustic wave element 50 on the substrate 10.

[0030] A filter 60 is formed by a plurality of acoustic wave elements 50 formed on the upper surface of the piezoelectric layer 20. That is, series resonators S1 to S4 connected in series between the input terminal 30 and the output terminal 30, and parallel resonators P1 to P3 connected in parallel are formed by the acoustic wave elements 50. FIG. 4(a) is a circuit diagram of a filter in the first embodiment. As shown in FIG. 4(a), the filter 60 has one or more series resonators S1 to S4 connected in series between the input terminal Tin and the output terminal Tout, and one or more parallel resonators P1 to P3 connected in parallel. All of the series resonators S1 to S4 and the parallel resonators P1 to P3 may be acoustic wave elements 50, or at least one of them may be an acoustic wave element 50. The numbers of series resonators and parallel resonators can be set as appropriate. Although a ladder-type filter has been described as an example of the filter, the filter may be a multimode filter.

[0031] A duplexer may be formed by a filter including the acoustic wave element 50. FIG. 4(b) is a circuit diagram of a duplexer. As shown in FIG. 4(b), in the duplexer 70, a transmission filter 72 is connected between a common terminal Ant and a transmission terminal Tx. A reception filter 74 is connected between the common terminal Ant and a reception terminal Rx. The transmission filter 72 passes a signal in a transmission band among high-frequency signals inputted from the transmission terminal Tx to the common terminal Ant as a transmission signal, and suppresses signals of other frequencies. The reception filter 74 passes a signal in a reception band among high-frequency signals inputted from the common terminal Ant to the reception terminal Rx as a reception signal, and suppresses signals of other frequencies. At least one of the transmission filter 72 and the reception filter 74 may be the filter 60. Although a duplexer is shown as an example of a multiplexer, a triplexer or a quadplexer may be used.

[0032] 5(a) is a plan view showing the positional relationship between the via wiring and the hole of the piezoelectric layer in Example 1, and FIG. 5(b) is a cross-sectional view taken along the line AA of FIG. 5(a). As shown in FIGS. 5(a) and 5(b), the hole 24 provided in the piezoelectric layer 20 is provided so as to overlap the via wiring 32 in a plan view, and the outline 25 is located inside the outline 33 of the via wiring 32 on the upper surface 11 of the substrate 10. Therefore, the outline 25 of the hole 24 is located only on the via wiring 32. The diameter D1 of the via wiring 32 on the upper surface 11 of the substrate 10 is, for example, about 30 μm to 60 μm. The diameter D2 of the hole 24 is, for example, 20 μm to 50 μm. The distance L between the outline 33 of the via wiring 32 and the outline 25 of the hole 24 is, for example, 3 μm to 10 μm.

[0033] [Manufacturing method] 6(a) to 7(c) are cross-sectional views showing a method for manufacturing an acoustic wave device according to the first embodiment. As shown in FIG. 6(a), a via hole is formed on the upper surface 11 of the substrate 10 by irradiating the upper surface 11 with, for example, a laser beam, and a metal layer such as copper is formed in the via hole by, for example, electrolytic plating. Then, the metal layer is planarized by, for example, CMP (Chemical Mechanical Polishing) so that the upper surface 11 of the substrate 10 is exposed. As a result, a via wiring 32 is formed in the substrate 10. For example, when the via wiring 32 is a copper layer, a laminated film in which a titanium layer and a copper layer are laminated from the substrate 10 side is used as a seed layer for the electrolytic plating. Here, the via wiring 32 does not penetrate the substrate 10 from the upper surface 11 to the lower surface 12.

[0034] As shown in FIG. 6(b), the piezoelectric substrate is bonded to the upper surface 11 of the substrate 10 at room temperature using, for example, a surface activation method. The substrate 10 and the piezoelectric substrate may be directly bonded via an amorphous layer of several nm, or may be indirectly bonded via an insulating layer. The upper surface of the piezoelectric substrate is then polished using, for example, a CMP method to form a piezoelectric layer 20 of a desired thickness. An acoustic wave element 50 is formed on the piezoelectric layer 20. The acoustic wave element 50 is formed by a commonly known method. The reason that the via wiring 32 is formed only on the substrate 10 and not on the piezoelectric layer 20 is that cracks may occur in the piezoelectric layer 20 if the via wiring 32 is formed to penetrate the piezoelectric layer 20 as well.

[0035] 6(c), a resist film (not shown) that covers the acoustic wave element 50 is formed on the piezoelectric layer 20, and then the piezoelectric layer 20 is etched using the resist film as a mask. The piezoelectric layer 20 is etched by dry etching, for example, but wet etching may also be used. As a result, holes 24 located above the via wiring 32 are formed in the piezoelectric layer 20. Furthermore, the piezoelectric layer 20 is removed from a region where the frame 42 is to be formed.

[0036] 7(a), wiring 34 electrically connecting acoustic wave element 50 and via wiring 32 is formed on piezoelectric layer 20 by, for example, deposition and lift-off. Metal layer 48 is formed in the region where frame 42 is to be formed simultaneously with wiring 34. Wiring 34 is electrically connected to via wiring 32 by contacting via wiring 32 in hole 24 provided in piezoelectric layer 20. Wiring 34 and metal layer 48 are, for example, a laminated film in which a titanium layer and a gold layer are laminated from the substrate 10 side.

[0037] 7(b), a current is supplied to the metal layer 48, and a metal layer (e.g., a copper layer, a nickel layer, and a gold layer from the substrate 10 side) is deposited on the metal layer 48 using an electrolytic plating method to form the frame body 42. After solder 46 is formed on the frame body 42, the lid 44 is bonded onto the frame body 42 by the solder 46. The acoustic wave element 50 is sealed in the gap 22 formed between the piezoelectric layer 20 and the lid 44 by the sealing part 40 including the frame body 42 and the lid 44.

[0038] As shown in FIG. 7(c), the lower surface 12 of the substrate 10 is polished or ground. As a result, the via wiring 32 is exposed on the lower surface 12 of the substrate 10. A terminal 30 is formed on the lower surface 12 of the substrate 10 so as to contact the via wiring 32. For example, a seed layer is formed on the lower surface 12 of the substrate 10. A resist film having an opening is formed on the seed layer. A current is supplied to the seed layer to form a plating layer in the opening using an electrolytic plating method. Then, the seed layer other than the plating layer is removed. The seed layer can be, for example, a laminated film in which a titanium layer and a gold layer are laminated from the substrate 10 side. The plating layer can be, for example, a copper layer, a nickel layer, and a gold layer from the substrate 10 side. In this manner, the acoustic wave device of Example 1 is formed.

[0039] [Comparative Example] 8(a) is a cross-sectional view of an acoustic wave device according to Comparative Example 1, FIG. 8(b) is a plan view showing the positional relationship between the via wiring and the piezoelectric layer in Comparative Example 1, and FIG. 8(c) is an enlarged view of region A in FIG. 8(b). As shown in FIGS. 8(a) to 8(c), in an acoustic wave device 500 according to Comparative Example 1, a cutout 26 is provided in the piezoelectric layer 20 so that the via wiring 32 is not covered by the piezoelectric layer 20 and the wiring 34 can contact the via wiring 32. The cutout 26 is provided on the periphery of the piezoelectric layer 20. An end 28 of the piezoelectric layer 20 at the cutout 26 is separated from the via wiring 32. The other configurations are the same as those in Example 1, and therefore will not be described.

[0040] In Comparative Example 1, a notch 26 is provided in the piezoelectric layer 20. The notch 26 is provided to have a size such that an end 28 of the piezoelectric layer 20 is located away from the via wiring 32. In such a case, the area of ​​the upper surface of the piezoelectric layer 20 is reduced, and the region for forming the acoustic wave element 50 and the like is reduced.

[0041] 9(a) is a cross-sectional view of an acoustic wave device according to Comparative Example 2, FIG. 9(b) is a plan view showing the positional relationship between the via wiring and the piezoelectric layer in Comparative Example 2, and FIG. 9(c) is an enlarged view of region A in FIG. 9(b). As shown in FIGS. 9(a) to 9(c), in an acoustic wave device 600 according to Comparative Example 2, a cutout 26a is provided in the piezoelectric layer 20 such that an end 28 of the piezoelectric layer 20 in the cutout 26a is located on the via wiring 32. Therefore, the cutout 26a in Comparative Example 2 is smaller than the cutout 26 in Comparative Example 1. The other configurations are the same as those in Example 1, and therefore will not be described.

[0042] In Comparative Example 2, notch 26a provided in piezoelectric layer 20 is smaller than notch 26 in Comparative Example 1. Therefore, the area of ​​the upper surface of piezoelectric layer 20 is larger than that in Comparative Example 1, and a larger region for forming acoustic wave element 50 and the like can be secured. However, Comparative Example 2 has the following problems.

[0043] Fig. 10(a) is a plan view showing the problem in Comparative Example 2, and Fig. 10(b) is a cross-sectional view taken along line AA of Fig. 10(a). As shown in Figs. 10(a) and 10(b), in Comparative Example 2, end 28 of piezoelectric layer 20 in cutout 26a is provided from via wiring 32 to substrate 10. Since substrate 10 and via wiring 32 are made of different materials, they have different linear expansion coefficients. For example, when substrate 10 is made of sapphire and via wiring 32 is made of copper, the linear expansion coefficient of sapphire is 7 × 10 -6 / ℃, and the linear expansion coefficient of copper is 17×10 -6 / ℃.

[0044] Since the linear expansion coefficients of the substrate 10 and the via wiring 32 are different, the substrate 10 and the via wiring 32 expand to different degrees as indicated by the arrows due to, for example, a temperature rise during etching of the piezoelectric layer 20 and / or when mounting the acoustic wave device on a circuit board or the like. As a result, a crack 90 may occur at a location located at the boundary between the via wiring 32 and the substrate 10 at the end 28 of the piezoelectric layer 20 due to stress caused by the difference in the linear expansion coefficients of the substrate 10 and the via wiring 32.

[0045] On the other hand, according to the first embodiment, as shown in Fig. 5(a) and Fig. 5(b), holes 24 are provided in the piezoelectric layer 20 (insulating layer) so as to overlap with the via wiring 32 in a plan view and have contours 25 located inside contours 33 of the via wiring 32 on the upper surface 11 of the substrate 10. As a result, the ends of the piezoelectric layer 20 at the holes 24 are located only on the via wiring 32, so that even if the linear expansion coefficients of the substrate 10 and the via wiring 32 are different, it is possible to suppress the application of stress to the ends of the piezoelectric layer 20 at the holes 24. Therefore, it is possible to suppress the occurrence of cracks. In addition, since the holes 24 are provided inside the via wiring 32, the area of ​​the upper surface of the piezoelectric layer 20 is increased, and a large area for forming the acoustic wave element 50 and the like can be secured.

[0046] In the first embodiment, the substrate 10 is made of sapphire, and the via wiring 32 is made of copper. The linear expansion coefficient of sapphire is 7×10 -6 / ℃, the linear expansion coefficient of copper is 17×10 -6 / °C, the difference in linear expansion coefficient between the substrate 10 and the via wiring 32 is large. In this case, if the end 28 of the piezoelectric layer 20 is provided from the via wiring 32 to the substrate 10 as in Comparative Example 2, cracks are likely to occur due to the stress applied to the piezoelectric layer 20 caused by the difference in linear expansion coefficient. Therefore, when the substrate 10 is made of sapphire and the via wiring 32 is made of copper, it is preferable to provide holes 24 in the piezoelectric layer 20 as in Example 1.

[0047] The substrate 10 may be made of silicon instead of sapphire. The via wiring 32 may be made of gold or silver instead of copper. The linear expansion coefficient of silicon is 4×10 -6 / ℃. The linear expansion coefficient of gold is 14×10 -6 / ℃, the linear expansion coefficient of silver is 19×10 -6 / °C. Even when the substrate 10 and the via wiring 32 are made of these materials, the difference in linear expansion coefficient between the substrate 10 and the via wiring 32 becomes large. Therefore, it is preferable to provide the holes 24 in the piezoelectric layer 20. For example, from the viewpoint of suppressing the occurrence of cracks, the holes 24 are provided in the piezoelectric layer 20 when the difference in linear expansion coefficient between the substrate 10 and the via wiring 32 is preferably 7 or more, more preferably 9 or more, and even more preferably 12 or more. Furthermore, cracks are more likely to occur when the piezoelectric layer 20 is thin. Therefore, it is preferable to provide the holes 24 when the piezoelectric layer 20 is 15 μm or less, more preferably when the piezoelectric layer 20 is 10 μm or less, and even more preferably when the piezoelectric layer 20 is 5 μm or less.

[0048] From the viewpoint of suppressing the occurrence of cracks in the piezoelectric layer 20, the distance L (see FIG. 5(a)) between the contour 33 of the via wiring 32 and the contour 25 of the hole 24 is, for example, preferably 3 μm or more, more preferably 4 μm or more, and even more preferably 5 μm or more. The diameter D2 (see FIG. 5(a)) of the hole 24 is preferably 0.9 times or less, more preferably 0.8 times or less, and even more preferably 0.7 times or less, of the diameter D1 (see FIG. 5(a)) of the via wiring 32 on the upper surface 11 of the substrate 10. On the other hand, from the viewpoint of the contact area between the wiring 34 and the via wiring 32, the distance L is, for example, preferably 10 μm or less, more preferably 9 μm or less, and even more preferably 8 μm or less. The diameter D2 of the hole 24 is preferably 0.4 times or more, more preferably 0.5 times or more, and even more preferably 0.6 times or more, of the diameter D1 of the via wiring 32.

[0049] Moreover, in the first embodiment, a frame 42 is provided on the upper surface 11 of the substrate 10 to surround the piezoelectric layer 20, and a lid 44 is provided on the frame 42, and a sealing portion 40 is provided to seal the acoustic wave element 50 in the gap 22 between the piezoelectric layer 20 and the lid 44. In this case, in order to ensure the airtightness of the acoustic wave element 50, a terminal 30 provided on the lower surface 12 of the substrate 10 is connected to a via wiring 32. In such a configuration, it is preferable to provide a hole 24 in the piezoelectric layer 20 in order to suppress the occurrence of cracks and to ensure a region for forming the acoustic wave element 50, etc.

[0050] In Example 1, the contours 25 of the holes 24 in the piezoelectric layer 20 are formed by curves. This prevents stress from concentrating on a portion of the edge of the piezoelectric layer 20 at the hole 24, and further prevents cracks from occurring. In Example 1, the contours 25 of the holes 24 are circular, but may be other shapes such as oval, and are preferably convex outward. EXAMPLES

[0051] FIG. 11 is a cross-sectional view of an acoustic wave device according to a second embodiment. As shown in FIG. 11, an acoustic wave device 200 according to a second embodiment has an intermediate layer 80, which is an insulating layer, between a substrate 10 and a piezoelectric layer 20. The intermediate layer 80 may be a single layer, or a multi-layer laminate. The intermediate layer 80 may include at least one layer selected from the group consisting of an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, an aluminum nitride layer, an aluminum oxynitride layer, a silicon layer, a titanium oxide layer, and a polysilicon layer. A hole 24 is provided penetrating the piezoelectric layer 20 and the intermediate layer 80. The other configurations are the same as those of the first embodiment, and therefore will not be described.

[0052] 6B, the acoustic wave device 200 in accordance with the second embodiment is formed by forming an intermediate layer 80 on the substrate 10 and then bonding a piezoelectric substrate thereto. The intermediate layer 80 is formed by, for example, a CVD method or a sputtering method.

[0053] According to the second embodiment, an intermediate layer 80 is provided between the piezoelectric layer 20 and the substrate 10. In other words, the insulating layer provided on the substrate 10 includes the piezoelectric layer 20 and the intermediate layer 80 between the piezoelectric layer 20 and the substrate 10. In this case, as in the second comparative example, if the end of the intermediate layer 80 is provided from the via wiring 32 to the substrate 10, cracks are likely to occur in the intermediate layer 80. Therefore, it is preferable to provide holes 24 in the piezoelectric layer 20 and the intermediate layer 80.

[0054] From the viewpoint of suppressing the occurrence of cracks, it is preferable to provide holes 24 when the thickness of the insulating layer including the piezoelectric layer 20 and the intermediate layer 80 is 15 μm or less, it is more preferable to provide holes 24 when the thickness is 10 μm or less, and it is even more preferable to provide holes 24 when the thickness is 5 μm or less.

[0055] In the first and second embodiments, the acoustic wave device including the acoustic wave element 50 is described as an example, but the present invention is not limited to this example. An electronic component including an element other than the acoustic wave element 50 (e.g., a passive element such as an inductor or a capacitor, an active element including a transistor, or a MEMS (Micro Electro Mechanical Systems) element) provided on an insulating layer may also be used.

[0056] Although the embodiment of the present invention has been described in detail above, the present invention is not limited to such specific embodiment, and various modifications and variations are possible within the scope of the gist of the present invention described in the claims. [Explanation of symbols]

[0057] 10...substrate, 11...upper surface (first surface), 12...lower surface (second surface), 20...piezoelectric layer, 22...gap, 24...hole, 25...contour, 26, 26a...notch, 28...edge, 30...terminal, 32...via wiring, 33...contour, 34...wiring, 40...sealing portion, 42...frame, 44...lid, 46...solder, 48...metal layer, 50...acoustic wave element, 51...IDT, 52...reflector, 53...comb-shaped electrode, 54...electrode finger, 55...bus bar, 56...lower electrode, 57...piezoelectric layer, 58...upper electrode, 59...gap, 60...filter, 61...resonance region, 70...duplexer, 72...transmitting filter, 74...receiving filter, 80...intermediate layer, 90...crack, 100, 200, 500, 600...acoustic wave device

Claims

1. a substrate having a first surface and a second surface opposite the first surface; a via wiring penetrating the substrate from the first surface to the second surface; an insulating layer provided on the first surface, the insulating layer overlapping the via wiring in a plan view and having a hole whose outline is located inside the outline of the via wiring on the first surface; an acoustic wave element provided on the insulating layer and connected to the via wiring.

2. The acoustic wave device of claim 1 , wherein the substrate is made of silicon or sapphire.

3. The acoustic wave device according to claim 1 , wherein the via wiring is made of copper, gold, or silver.

4. the insulating layer includes a piezoelectric layer; The acoustic wave device according to claim 1 , wherein the acoustic wave element includes a comb-shaped electrode provided on the piezoelectric layer.

5. The acoustic wave device according to claim 4 , wherein the insulating layer includes an intermediate layer provided between the substrate and the piezoelectric layer.

6. The acoustic wave device of claim 5 , wherein the intermediate layer includes at least one of an aluminum oxide layer, a silicon oxide layer, a silicon nitride layer, an aluminum nitride layer, an aluminum oxynitride layer, a silicon layer, a titanium oxide layer, and a polysilicon layer.

7. a sealing portion including a frame provided on the first surface to surround the insulating layer and a lid provided on the frame, the sealing portion sealing the acoustic wave element between the insulating layer and the lid; The acoustic wave device according to claim 1 , further comprising: a terminal provided on the second surface and connected to the via wiring.

8. The acoustic wave device according to claim 7 , wherein the sealing portion seals the acoustic wave element in a gap between the insulating layer and the lid.

9. The acoustic wave device according to claim 1 , wherein the hole has a diameter that is 0.9 times or less a diameter of the via wiring on the first surface.

10. A filter comprising the acoustic wave device according to claim 1 or 2.

11. A multiplexer comprising the filter of claim 10.

12. a substrate having a first surface and a second surface opposite the first surface; a via wiring penetrating the substrate from the first surface to the second surface; an insulating layer provided on the first surface, the insulating layer overlapping the via wiring in a plan view and having a hole whose outline is located inside the outline of the via wiring on the first surface; An element provided on the insulating layer and connected to the via wiring; and a sealing portion that seals the element in the gap on the insulating layer.

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