Imaging device for acquiring visible image and infrared image

Abstract

To provide an imaging device for reconstructing depth information in the same scene, in addition to a visible image of a scene and to provide a method for manufacturing the imaging device.SOLUTION: An imaging device 1 includes a visible matrix sensor 10, an infrared matrix sensor 20, and readout integrated circuits 40 and 50 which are placed on the visible matrix sensor and the infrared matrix sensor and formed with a readout stack 40 including an electronic element 42 and an interconnection stack 50 and acquires the visible image and an infrared image. The readout stack is positioned between the high sensitivity layers 12 and 22 of the respective matrix sensors and the interconnection stack is positioned on the rear surface of the infrared matrix sensor. Conductive vias 32, 33, and 34 electrically connect the interconnection stack to the electronic element 14 of the visible matrix sensor, the electronic element 42 of the readout stack, and the electronic element 23 of the infrared matrix sensor, respectively.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The field of the invention is that of imaging devices adapted to obtain visible and infrared images of the same scene. This kind of imaging device in particular makes it possible to reconstruct, in addition to the visible image of a scene (in grey levels or colour), depth information in this same scene. [Background technology]

[0002] There are imaging devices that allow simultaneous or successive acquisition of visible and infrared images of one and the same scene. The visible image corresponds to a two-dimensional image of the situation, which may be in gray levels or RGB (Red Green Blue) colors, and the infrared image may allow to reconstruct a depth map of the scene. For this purpose, the imaging device comprises a visible matrix sensor and an infrared matrix sensor that may be superimposed one on the other, such that they have substantially the same optical alignment, allowing the overall dimensions to be reduced. The visible matrix sensor and the infrared matrix sensor may therefore be integrated together in a readout substrate that comprises a CMOS-type readout integrated circuit.

[0003] Document EP 3503192 A1 and US patent application No. 2021 / 305206 (A1) describe examples of such imaging devices in which a visible matrix sensor and an infrared matrix sensor are superimposed one on top of the other when assembled on a readout substrate.

[0004] In these examples, the visible matrix sensor comprises a sensitive layer in which are formed not only the visible detection pixels but also the interconnect stacks electrically connected to the electronic elements (transistors, diodes, etc.) of the visible detection pixels. Similarly, the infrared matrix sensor comprises a sensitive layer in which are formed not only the infrared detection pixels but also the interconnect stacks electrically connected to the photodiodes of the infrared detection pixels. The entire infrared matrix sensor is located on the rear side of the visible matrix sensor. Finally, a readout substrate comprises a CMOS-type readout integrated circuit assembled on the rear side of the infrared matrix sensor. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] EP3503192A1 [Patent Document 2] U.S. Patent Application No. 2021 / 305206(A1) [Patent Document 3] FR3130450A1 Summary of the Invention [Problem to be solved by the invention]

[0006] However, there is a need to improve certain aspects of such imaging devices, whether in terms of structural configuration and / or manufacturing method.

[0007] The object of the present invention is to at least partially remedy the drawbacks of the prior art, and for this purpose, to provide an imaging device adapted to obtain visible and infrared images, comprising: a visible matrix sensor comprising a first sensitive layer in which visible detection pixels are defined, each comprising at least one electronic element; an infrared matrix sensor comprising a second sensitive layer superimposed on the first sensitive layer and in which infrared-detecting pixels comprising at least one electronic element are defined; a readout stack comprising electronic elements and an interconnect stack overlaid on the visible matrix sensor and on the infrared matrix sensor, and a readout integrated circuit formed by the readout stack and the interconnect stack; The present invention aims to propose an imaging device comprising: [Means for solving the problem]

[0008] According to the invention, the readout stack is positioned between the first and second sensitive layers, and the interconnect stack is positioned on the rear surface of the infrared matrix sensor.

[0009] Additionally, conductive vias electrically connect the interconnect stack to the electronic elements of the visible matrix sensor, the electronic elements of the readout stack, and the electronic elements of the infrared matrix sensor, respectively.

[0010] Certain preferred but non-limiting aspects of this imaging device are as follows:

[0011] The visible matrix sensor may include a first insulating layer positioned below the first sensitive layer, and the readout stack may include a second insulating layer positioned above the electronic elements of the readout stack, the first insulating layer and the second insulating layer being in contact with each other.

[0012] The readout stack may include a third insulating layer positioned below the electronic elements of the readout stack, and the infrared matrix sensor may include a fourth insulating layer positioned above the second sensitive layer, the third insulating layer and the fourth insulating layer being in contact with each other.

[0013] Conductive vias can extend directly from the electronic elements of the infrared matrix sensor to the conductive portions of the interconnect stack.

[0014] Conductive vias can extend directly from the electronic elements of the readout stack to the conductive portions of the interconnect stack.

[0015] Conductive vias can extend directly from the electronic elements of the visual matrix sensor to the conductive portions of the interconnect stack.

[0016] Conductive vias may extend directly from the conductive portions of the readout stack that are in electrical contact with the electronic elements of the visual matrix sensor to the conductive portions of the interconnect stack.

[0017] The second sensitive layer can be a structured layer forming, in a plane parallel to the plane of the infrared matrix sensor, multiple portions of the second sensitive layer that differ from each other in the parallel plane, such that conductive vias that electrically connect the interconnect stack firstly to the electronic elements of the visible matrix sensor and secondly to the electronic elements of the readout stack do not pass through the second sensitive layer.

[0018] The second sensitive layer can be a structured layer in a plane parallel to the plane of the infrared matrix sensor, forming a plurality of portions of the second sensitive layer connected in pairs by connecting portions such that conductive vias electrically connecting the interconnect stack firstly to the electronic elements of the visible matrix sensor and secondly to the electronic elements of the readout stack pass through the connecting portions of smaller thickness.

[0019] The readout stack and the interconnect stack can be a first readout stack and a first interconnect stack of a first readout integrated circuit, and a second readout integrated circuit formed by a second readout stack and a second interconnect stack can be assembled in the first readout integrated circuit, and the second interconnect stack is assembled and connected to a rear surface of the first interconnect stack.

[0020] The imaging device may comprise a reflective layer positioned between the infrared matrix sensor and the interconnect stack and adapted to reflect incident infrared radiation intended to be detected by the infrared matrix sensor.

[0021] The reflective layer, together with the infrared matrix sensor, the readout stack, and an insulating layer positioned between the first sensitive layer and the readout stack, can form an optical cavity resonant at the wavelength of infrared radiation.

[0022] The present invention relates to a method for manufacturing an imaging device according to any one of the preceding features, comprising the following steps: - fabricating a visual matrix sensor, in which a first insulating layer covers a first sensitive layer with electronic elements located in the same plane; - producing a first structure intended to form a readout stack, comprising a second insulating layer, by molecular bonding of the second insulating layer to the first insulating layer, thereby producing a readout stack; - producing a second structure intended to form an infrared matrix sensor, comprising a fourth insulating layer, by molecular bonding of the fourth insulating layer to the third insulating layer of the readout stack, thereby producing an infrared matrix sensor; - fabricating an interconnect stack from a rear surface of the infrared matrix sensor; The present invention also relates to a method comprising the steps of:

[0023] During the step of fabricating the electronic elements of the readout stack, a temperature increase to a temperature of at least 1000° C. may be performed.

[0024] The step of fabricating the electronic elements of the infrared matrix sensor may be carried out after the step of fabricating the electronic elements of the readout stack.

[0025] Other aspects, objects, advantages and features of the present invention will become more apparent on reading the following detailed description of preferred embodiments of the invention, given as non-limiting examples and made with reference to the accompanying drawings, in which: [Brief description of the drawings]

[0026] [Figure 1]1 is a schematic partial view in cross section of an imaging device according to an embodiment; [Figure 2A] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2B] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2C] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2D] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2E] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2F] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2G] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 2H] 2A-2C are diagrams of method steps for manufacturing an imaging device the same as or similar to that in FIG. 1. [Figure 3A] 11 is a schematic partial view in cross section of an imaging device according to a modified embodiment; [Figure 3B] 3B is a schematic partial view in cross section of an imaging device according to a variant embodiment similar to that in FIG. 3A. [Figure 4] 11 is a schematic partial view in cross section of an imaging device according to a modified embodiment; [Diagram 5] 11 is a schematic partial view in cross section of an imaging device according to a modified embodiment; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0027] In the figures, and in the remainder of this description, the same reference numerals represent the same or similar elements. Also, various elements are not drawn to scale to enhance the clarity of the figures. Moreover, different embodiments and variations are not mutually exclusive and can be combined together. Unless otherwise indicated, "substantially," "about," and "to the extent of" mean within a margin of 10%, and preferably within a margin of 5%. Furthermore, terms such as "included between" mean that the boundaries are included, unless otherwise stated.

[0028] 1 is a schematic partial view in cross section of an imaging device 1 according to an embodiment. The imaging device 1 is adapted to simultaneously or successively acquire visible and infrared images of one and the same scene. In this example, one and the same infrared detection pixel extends towards a number of adjacent visible detection pixels. In a variant, one and the same infrared detection pixel may extend towards only one visible detection pixel.

[0029] Here, an orthogonal three-dimensional direct reference frame XYZ is defined for the remainder of the description, with the plane XY substantially parallel to the main plane of the support substrate 31 and the axis Z oriented in the direction of the sensor matrix 10, 20. In the remainder of the description, the terms "lower" and "upper" should be understood as relating to an increased position when moving away from the support substrate 31 in the direction +Z. Furthermore, the terms "front" and "rear" of an element or layer designate, respectively, the face oriented towards the scene to be imaged (from where the light rays of the visible and infrared images to be acquired come from) and the face facing away from the scene.

[0030] In general terms, the imaging device 1 comprises a vertical overlap (along the Z axis) of a visible matrix sensor 10 for acquiring visible images, an infrared matrix sensor 20 for acquiring infrared images, and CMOS-based readout integrated circuits 40, 50 electrically connected to the visible matrix sensor 10 and the infrared matrix sensor 20. These three elements are assembled integrally with each other.

[0031] As will be described in detail later, the readout integrated circuit 40, 50 is formed by the readout stack 40 and the interconnect stack 50. The readout stack 40 is located between the sensitive layer 12 of the visible matrix sensor 10 and the sensitive layer 22 of the infrared matrix sensor 20. The interconnect stack 50, on the other hand, is located on the rear side of the infrared matrix sensor 20, here between the infrared matrix sensor 20 and the support substrate 31. The conductive vias 32 provide, directly or indirectly, an electrical connection between the electronic elements 14 of the visible matrix sensor 10 and the interconnect stack 50, the conductive vias 34 provide an electrical connection between the electronic elements 23 of the infrared matrix sensor 20 and the interconnect stack 50, and the conductive vias 33 provide an electrical connection between the electronic elements 42 of the readout stack 40 and the interconnect stack 50.

[0032] The electronic elements of the visible matrix sensor 10 and the infrared matrix sensor 20 here mean doped parts of semiconductor layers having or participating in the function of collecting or storing the photo-generated charge. The doped parts can therefore be, among others, doped parts for connecting the minority charge carriers of a photodetector such as a photodiode, doped parts for temporary storage of the photo-generated charge coming from the photodiode such as a readout node (sensor node or floating diffusion node), or doped parts of a transfer transistor (transfer gate) which transfers the photo-generated charge from the photodiode to the readout node.

[0033] The electronic elements of the readout stack 40 here mean the doped parts of the semiconductor layers involved in processing the electrical information coming from the visible matrix sensor 10 and the infrared matrix sensor 20. The doped parts can therefore be, among other things, doped parts of diodes or transistors.

[0034] The visible matrix sensor 10 is adapted to acquire a visible image of a scene and for this purpose comprises a number of detector pixels, each adapted to receive and detect visible light radiation, formed in a sensitive layer 12 adapted to absorb the visible light radiation to be detected.

[0035] The sensitive layer 12 is made of a semiconductor material that is selected and preferably doped to absorb the visible light radiation of interest. By way of example, the sensitive layer 12 can be made of monocrystalline silicon. The sensitive layer 12 can have a thickness between 2 μm and 10 μm, for example of the order of 4 μm. Here, the sensitive layer 12 is formed by layers made of the same material in the sense of chemical elements, but may also be formed by a stack of sublayers made of different materials.

[0036] Each visible detection pixel corresponds to a part of the sensitive layer 12 in the plane XY and includes not only a photodiode 13 but also at least one electronic element 14, for example a readout node (sensing node or floating diffusion node) that receives the photogenerated charges transferred by a transfer transistor (transfer gate not shown in the figure). Such a readout node 14 acts as a temporary charge store. The transfer transistor makes it possible to enable the transfer of the photogenerated charge carriers from the photodiode 13 to the readout node 14. The photodiode 13 and the readout node 14 are located in the sensitive layer 12 and lie flush with the rear face of the sensitive layer 12. The transfer transistor can be located in the lower insulating layer 16, also lying flush with the rear face of the sensitive layer 12. The transfer transistor is in electrical contact with the photodiode 13 and the readout node 14.

[0037] The detector pixels are separated from each other in the XY plane by isolation structures 15 that extend vertically through the sensitive layer 12, preferably over the entire thickness of the sensitive layer 12. These isolation structures 15 can be deep isolation trenches of the DTI type (standing for Deep Trench Isolation) made entirely from an electrically insulating material. The isolation structures 15 can also be capacitive deep isolation trenches (CDTI, standing for Capacitive Deep Trench Isolation) and can be formed from a core made of a conductive material such as doped polycrystalline silicon, surrounded by a sheath made of an electrically insulating material such as silicon oxide. These structures 15 of the CDTI type can thus be electrically connected to a readout circuit and can provide an optical isolation of the visible detector pixels from each other, making it possible to prevent the diffusion of photogenerated charge carriers from one visible detector pixel to another.

[0038] An upper isolation layer 11 extends over and in contact with the front surface of the sensitive layer 12. This isolation layer is made of an electrically insulating material, for example silicon oxide or silicon nitride. The isolation layer may entirely cover the sensitive layer 12. One or more layers may be present that perform an optical function, such as an anti-reflection function.

[0039] The imaging device 1 may comprise an optical structure having one or more optical functions, for example filtering and focusing. Thus, in this example, each visible detection pixel is provided with a color filter 61, which differs from one pixel to the other, so that the visible image acquired by the visible matrix sensor 10 is a color image, for example of the RGB type. The color filter 61 can be a colored resin filter and is positioned above the corresponding part of the sensitive layer 12. The color filter 61 is adapted to transmit infrared wavelengths here while filtering out wavelengths outside the visible spectrum range of interest. Of course, the color filter 61 may be absent, in which case the visible image is a monochromatic image with gray levels. Furthermore, each visible detection pixel is provided with a microlens 62, which is positioned above the color filter 61 if applicable. The microlens 62 is adapted to adjust the focus of the incoming radiation in the direction of the photodiode 13.

[0040] The infrared matrix sensor 20 is adapted to acquire an infrared image of a scene and for this purpose comprises a plurality of detector pixels each adapted to receive and detect infrared light radiation, which detector pixels are formed in a continuous or discontinuous sensitive layer 22 in the plane XY and which are adapted to absorb infrared light radiation.

[0041] The sensitive layer 22 is made, for example, from a semiconductor material, preferably doped, that allows it to absorb the infrared light radiation of interest. The sensitive layer 22 can of course be formed from a stack of sublayers. By way of example, the sensitive layer 22 is made from an element or a semiconductor compound in group IV (column IV of the periodic table), for example from germanium or from a compound of silicon and germanium (SiGe), or from a III-V compound, for example from InGaAs, from InGaAsP or others. The sensitive layer 22 can also be a semiconductor material based on quantum boxes (also called quantum thin films or quantum dots) or from quantum multiwell (QWIP) materials, or of the superlattice type. The sensitive layer 22 can have a thickness that depends on the central wavelength of the infrared spectral range, such as a thickness between 50 nm and 10 μm.

[0042] Each infrared detection pixel corresponds to a part of the sensitive layer 22 in the plane XY and comprises at least one photodetector 23 for photo-generation of charge carriers, such as a photodiode (as shown in FIG. 1). In this example, each photodetector 23 is directly connected to a readout integrated circuit 40, 50. However, electronic elements such as transistors may be present between the photodetector 23 and the readout circuit 40, 50. The photodetector 23 is located in the sensitive layer 22 and is flush with the rear face of the sensitive layer 22. In this example, the electronic element 23 of an infrared detection pixel corresponds to a photodiode, but it could also be an electronic charge extraction element (transfer transistor, readout node, etc.).

[0043] In this example, the infrared detection pixels are positioned facing (perpendicularly) towards the visible detection pixels. The dimensions of the infrared detection pixels in the plane XY are here larger than the dimensions of the visible detection pixels, but in variants they can be of the same order of magnitude. Here, each infrared detection pixel is aligned at the center of the surface formed by the 2x2 visible detection pixels, while extending towards the 2x2 visible detection pixels.

[0044] Furthermore, at least one upper insulating layer 21 made of an electrically insulating material covers the sensitive layer 22 and has a planar front surface. This is the case for the bonding layer used to provide the molecular bonding of the infrared matrix sensor to the rear surface of the readout stack 40. Furthermore, at least one lower insulating layer 24 made of an electrically insulating material extends below the sensitive layer 22 and preferentially has a planar rear surface.

[0045] Furthermore, the imaging device 1 preferably comprises a reflective layer 63 extending in the plane XY under the visible and infrared detection pixels to provide reflection of the incident optical radiation to be detected. The reflective layer 63 may be made of a metallic material such as Ti, Al, Cu and their alloys or may be made of a material such as 10 20 cm -3 The reflective layer 63 may be fabricated from highly doped silicon, on the order of 400 nm. If fabricated from silicon, the reflective layer 63 may have a thickness on the order of 400 nm. The reflective layer 63 may also be a multi-layer dielectric stack of the Bragg mirror type.

[0046] It should be noted that the infrared matrix sensor 20 can be of the resonant cavity type, as described in particular in patent application FR3130450A1. The sensitive layer 22 can therefore be a layer of small thickness, such as of the order of 500 nm or even less. The sensitive layer 22 is positioned in a resonant optical cavity defined in the vertical direction by the reflective layer 63 and the assembly formed by the lower junction insulating layer 16, the readout stack 40 and the upper junction insulating layer 21. This assembly preferably has a thickness of the order of several hundred nanometers. The insulating layer of this assembly is preferably made of silicon oxide. Such a configuration makes it possible to obtain an infrared radiation absorption of more than 80% in the sensitive layer 22.

[0047] The readout integrated circuits (ROICs) 40, 50 comprise a readout stack 40 and an interconnect stack 50, here stacked and spaced apart from each other along the Z axis.

[0048] The readout stack 40 is a FEOL type (standing for Front End Of Line) stack. It is formed by layers based on semiconductors in which electronic elements 42 (diodes, transistors, etc.) and optionally passive elements (capacitors, resistors, etc.) are implemented. The electronic elements are connected on the one hand to the electronic elements of the detection pixels of the visible matrix sensor 10 and the infrared matrix sensor 20 and on the other hand to at least one external connection pad (not shown) intended to connect the detection device to an external electronic device.

[0049] According to the invention, the readout stack 40 is positioned vertically (along the Z axis) between the sensitive layer 12 of the visible matrix sensor 10 and the sensitive layer 22 of the infrared matrix sensor 20. The readout stack 40 is also connected to the rear side of the visible matrix sensor 10 by a molecular bond.

[0050] The readout stack 40 therefore comprises an upper insulating layer 41 made of an electrically insulating material, for example here made of silicon oxide, which forms a molecular bonding layer, by which the readout stack 40 is connected to the insulating layer 16 of the visible matrix sensor 10 by molecular bonding. The readout stack 40 comprises an electronic element 42 covered by at least one main insulating layer 43 having a planar lower surface. This insulating layer 43 is made of an electrically insulating material, for example here made of silicon oxide, which forms a molecular bonding layer for assembling the infrared matrix sensor 20 at the rear surface.

[0051] Moreover, the interconnect stack 50 is a BEOL type (standing for Back End Of Line) stack: the interconnect stack 50 is formed by layers defining metallization levels, which are vertically separated by intermetallic electrical layers 55 (standing for Inter Metal Dielectric) and connected together by conductive vias 54.

[0052] The interconnect levels are each formed by coplanar conductive portions 51, 52, 53 which are connected to those of the adjacent interconnect level by conductive vias 54. The interconnect structure thus comprises several parallel interconnect levels arranged above one another in the vertical direction. The interconnect structure thus comprises a first so-called upper interconnect level 51, which is located on the same side as the infrared sensor 20, an intermediate interconnect level 52 and a last so-called lower interconnect level 53, which is located on the same side as the support substrate 31.

[0053] The interconnect stack 50 is positioned below the infrared matrix sensor 20, between the infrared matrix sensor 20 and the support substrate 31, and is therefore spaced apart from the readout stack 40 by the infrared matrix sensor 20. Furthermore, as indicated above, the conductive vias 32, 34, 33 provide direct or indirect electrical connections between the electronic elements 14 of the visible matrix sensor 10, the electronic elements 23 of the infrared matrix 20, and the electronic elements 42 of the readout stack 40, respectively, and also the interconnect stack 50.

[0054] More precisely, at least one conductive via 34 provides a direct electrical connection, here between the photodetector 23 of each infrared-detecting pixel and a conductive part 51 of the upper metallization level. A direct electrical connection here means that one and the same conductor extends between the two elements in question, here between the photodiode and the conductive part. This conductive via 34 thus passes through the lower insulating layer 24, the reflective layer 63 (through an electrically isolated through-opening in layer 63) and the lower insulating layer 64.

[0055] The conductive vias 33 also provide a direct electrical connection between the electronic elements 42 of the readout stack 40 and the conductive parts 51 of the upper metallization level. These conductive vias 33 therefore pass through the main insulating layer 43, the adjoining insulating layer 21, in this example the sensitive layer 22 (but the sensitive layer 22 can be structured as described in FIG. 3B), the lower insulating layer 24, the reflective layer 63 (through an electrically insulated through opening in layer 63) and the lower insulating layer 64. It should be noted that the conductive vias 33 pass through the sensitive layer 22 without electrical contact, since the conductive material of the vias 33 is surrounded by a sheath made of an electrically insulating material.

[0056] Finally, the conductive vias 32 again provide a direct electrical connection between the electronic elements 14 of the visible detection pixels and the conductive parts 51 of the upper metallization level. These conductive vias 32 therefore pass through the two adjoining layers 16, 21, the main insulating layer 43, the adjoining insulating layer 21, in this example the sensitive layer 22, the lower insulating layer 24, the reflective layer 63 (through an electrically insulated through opening in layer 63) and the lower insulating layer 64. It should also be noted that the conductive vias 32 pass through the sensitive layer 22 without electrical contact, since the conductive material of the vias 32 is surrounded by a sheath made of an electrically insulating material.

[0057] The imaging device 1 thus has a structural configuration with four superimposed stages formed successively from the visible matrix sensor 10, the readout stack 40, the infrared matrix sensor 20 and finally the interconnection stack 50 of the readout integrated circuit. This structural configuration is carried out by two molecular bonding steps, namely the bonding of the readout stack 40 on the rear face of the visible matrix sensor 10 and the subsequent bonding of the infrared matrix sensor 20 on the rear face of the readout stack 40. This therefore allows the integration and implementation of the method to be less constrained, in particular in terms of the thermal budget. This is because, by fabricating the readout stack 40 independently of and before the fabrication of the infrared matrix sensor 20, the thermal budget associated with the fabrication of the electronic elements 42 (in particular the control transistors) and in particular the high temperatures used (around 1000° C.) do not affect the quality of the sensitive layer 22 of the infrared matrix sensor 20 (for example made from Ge, SiGe, InGaAs, etc.).

[0058] A method for manufacturing such an imaging device 1 will now be described with reference to Figures 2A to 2H. In this example, the imaging device is identical to the imaging device of Figure 1.

[0059] With reference to FIG. 2A, a structure is fabricated formed by a continuous layer (sensitive layer 12) made of monocrystalline silicon and on top of an oxide layer 11 and thus on top of a handle layer 71 (here a thick silicon layer). The structure is fabricated from a first silicon-on-insulator (SOI) substrate. An isolation structure 15 is fabricated and, at the rear face of the sensitive layer 12, a photodiode 13 and an electronic element 14 are fabricated by local doping. An insulating layer 16, here made of silicon oxide, is deposited so as to passivate the rear face of the sensitive layer 12 and to form a molecular junction layer. This layer 16 can be a multilayer formed of sublayers providing passivation, sublayers providing molecular junctions, etc. This structure thus forms a visible matrix sensor 10.

[0060] 2B, an SOI substrate is fabricated, formed of a thick support layer of silicon 71, a buried oxide layer 72, and a thin layer of monocrystalline silicon 73. The SOI substrate comprises an insulating bonding layer 41 made of silicon oxide covering the thin layer of silicon 73. The SOI substrate is assembled at the rear side of the visible matrix sensor 10 by bringing the bonding layers 41, 16 into contact with each other, here by oxide / oxide molecular bonding.

[0061] With reference to Fig. 2C, the readout stack 40 is fabricated. For this purpose, the thick layer 71 is removed. Then, the electronic elements 42 are fabricated, in particular using thin layers of silicon and oxide. Finally, the main insulating layer 43 is fabricated so as to cover the electronic elements and so as to have a planar rear surface.

[0062] 2D, a structure is fabricated formed by a support layer 74, a sensitive layer 22 and an insulating layer 21, here made of silicon oxide, which provides passivation of the sensitive layer 22 and a molecular bond, here of oxide / oxide type, with the main insulating layer 43. The insulating layer 21 can of course be multi-layered, formed of sub-layers providing passivation and sub-layers providing molecular bonding, etc. This structure is assembled at the rear of the readout stack 40 by bringing the insulating layer 21 into contact with the main insulating layer 43, here by an oxide / oxide molecular bond.

[0063] 2E, the infrared matrix sensor 20 is finished. For this purpose, the thick layer 74 is removed so as to free the rear face of the sensitive layer 22. The photodetector 23 is then fabricated, for example by local doping, such as ion implantation and local diffusion, at the rear face. Finally, at least one passivating insulating layer 24 is deposited on the sensitive layer 22 so as to cover it continuously.

[0064] With reference to FIG. 2F, a reflector 63 (which is advantageous) is then fabricated, followed by the fabrication of the interconnect stack 50. For this purpose, a reflective layer 63 is deposited so as to cover successively the insulating layer 24. This reflective layer 63 is made from a material adapted to reflect the incident radiation to be detected, such as a metal, such as Ti, Al, Cu and their alloys, or from highly doped silicon. The thickness of the reflective layer is adapted depending on the material used and can be of the order of 400 nm in the case of highly doped silicon. The reflective layer 63 is then structured so as to form through openings through which conductive vias are intended to pass. An insulating layer 64 is then deposited so as to cover the reflective layer 63 and to have a preferentially planar rear surface.

[0065] Next, the conductive vias 32, 33, 34 are fabricated, preferably made from the same material. Thus, the conductive vias 32, 33, 34 extend here continuously, i.e. with a continuity of the material that constitutes them, from the rear surface of the lower insulating layer 64 to the photodetector 23 of the infrared detection pixel, to the electronic elements 42 of the readout stack 40, and to the electronic elements 14 of the visible detection pixel.

[0066] 2G, an interconnect stack 50 is then fabricated, starting with an upper metallization level 51, then an intermediate metallization level 52, and finally a lower metallization level 53. In particular, certain conductive portions 51 of the upper metallization level are in contact with the conductive vias 32, 33, 34. Finally, the support substrate 31 is assembled in the interconnect stack 50. It should be noted that certain portions 51 of the upper metallization level (at the periphery of the detection matrix) can be in electrical contact with external connection pads that will be fabricated at the end of the method.

[0067] With reference to FIG. 2H, the resulting structure is then turned over and the handle layer 71 is removed to free the surface of the upper isolation layer 11. The color filters 61 and the microlenses 62 are then fabricated. In this way, an imaging device 1 is obtained with a structure configuration in four stages: the visible matrix sensor 10, the readout stack 40 (assembled by molecular bonding to the visible matrix sensor 10), the infrared matrix sensor 20 (assembled by molecular bonding to the readout stack 40) and the interconnect stack 50. As indicated above, this fabrication method allows the fabrication of efficient electronic elements of the readout stack 40, in particular by carrying out steps at high temperatures (around 1000° C.) that are not likely to degrade the photodetectors 23 of the infrared detection pixels. External connection pads can also be fabricated.

[0068] 3A is a schematic partial view in cross section of an imaging device 1 according to a variant embodiment. In this example, the imaging device 1 is essentially different from that in FIG. 1 in that the sensitive layer 22 of the infrared matrix sensor 20 is not a continuous layer in the XY plane, but is formed by several sensitive layer portions common to all detector pixels but distinct from each other in the XY plane. One and the same sensitive layer portion 22 can extend towards a single visible detector pixel or towards several adjacent pixels, as is the case here. In this example, a passivation layer 25 made of an electrically insulating material covers the sides and the rear of the sensitive layer 22. This passivation layer 25 is optional. Therefore, the conductive vias 32, 33 (connecting the electronic elements 14 of the visible detector pixels and the electronic elements 42 of the readout stack 40) do not pass through the sensitive layer 22 of the infrared detector pixels.

[0069] Fig. 3B is a schematic partial view in cross section of an imaging device 1 according to a variant embodiment similar to that in Fig. 3A. In this example, the imaging device 1 is essentially differentiated from that in Fig. 3 in that adjacent sensitive layer portions 22 are connected together in pairs by connecting portions 22r of a smaller thickness corresponding to the entirely unetched portions of the first sensitive layer 22 presented in Fig. 2D. These connecting portions 22r are located on the same side as the upper insulating layer 21. Conductive vias 32 and 34 pass through these connecting portions 22r. This configuration is generally referred to as a "shallow mesa".

[0070] 4 is a schematic partial view in cross section of an imaging device 1 according to another variant embodiment. In this example, the imaging device 1 is essentially different from that in FIG. 1 in that the electronic elements 14 of the visible detection pixels are not directly connected to the interconnect stack 50 by one and the same conductive via each. This is because the readout stack 40 includes at least one electrical path level formed by conductive portions 45.

[0071] More precisely, the conductive portions 45 are located in the lower insulating layer 16 and extend in a planar manner. Certain areas of these conductive portions 45 are in electrical contact with the electronic elements 14 of the visible detection pixels, and other areas are in electrical contact with the conductive vias 32. There is therefore an indirect electrical connection between the electronic elements 14 and the interconnect stack 50 via the conductive portions 45. Here, a single path level (formed by the conductive portions 45) is shown, although it goes without saying that several path levels are possible. These conductive portions 45 can be fabricated before the bonding step shown in FIG. 2B, for example based on doped silicon.

[0072] 5 is a schematic partial view in cross section of an imaging device 1 according to another variant embodiment. In this example, the imaging device 1 is essentially different from that in FIG. 1 in that it comprises an additional readout substrate 80 assembled in an interconnect stack 50 at the rear side and electrically connected to the interconnect stack 50. The readout substrate 80 comprises an interconnect stack 82 assembled in the interconnect stack 50 by molecular bonding, such as a copper / oxide hybrid molecular bonding, and a readout stack 81. Thus, the imaging device 1 now comprises two readout integrated circuits, one of which 40, 50, the readout stack 40 is positioned between the visible matrix sensor 10 and the infrared matrix sensor 20, the interconnect stack 50 is positioned at the rear side of the infrared matrix sensor 20, and the other readout integrated circuit 80 is assembled in the interconnect stack 50. This allows the imaging device 1 to distribute the electronic control functions of the visible matrix sensor 10 and the infrared matrix sensor 20 in the two readout integrated circuits 40, 50, 80.

[0073] While specific embodiments have been described, various modifications and improvements will become apparent to those skilled in the art. [Explanation of symbols]

[0074] 1. Imaging device 10 Visible matrix sensor 11 Upper isolation layer, oxide layer 12 High sensitivity layer 13 Photodiode 14 Electronic elements, readout nodes 15 Isolation structure 16 Lower insulation layer 20 Infrared matrix sensor 21 Upper insulating layer 22 High-sensitivity layer, high-sensitivity layer part 22r Connection part 23 Electronic elements, photodetectors 24 Lower insulating layer, passivation insulating layer 25 Passivation layer 31 Support substrate 32, 33, 34 Conductive vias 40 Readout integrated circuit, readout stack 41 Upper insulating layer, insulating bonding layer 42 Electronic elements 43 Main insulation layer 45 Conductive Parts 50 Readout integrated circuit, interconnect stack 51 Conductive part, upper interconnect level, upper metallization level 52 Conductive parts, intermediate interconnect levels, intermediate metallization levels 53 Conductive parts, lower interconnect level, lower metallization level 61 Color Filters 62 Micro Lens 63 Reflective layer, reflector 64 Lower insulation layer 71 Handle layer, support layer 72 Oxide layer 73 Thin layer of single crystal silicon 74 Support layer 80 Readout board, readout integrated circuit 81 Read Stack 82 Interconnect Stack

Claims

1. An imaging device (1) adapted to acquire visible and infrared images, comprising: a visible matrix sensor (10) comprising a first sensitive layer (12) in which visible detection pixels are defined, each comprising at least one electronic element (14); an infrared matrix sensor (20) comprising a second sensitive layer (22) superimposed on said first sensitive layer (12) and defining infrared-detecting pixels each comprising at least one electronic element (23); a readout stack (40) comprising electronic elements (42) and a readout integrated circuit (40, 50) formed by an interconnect stack (50) and superimposed on said visible matrix sensor (10) and said infrared matrix sensor (20); Equipped with the readout stack (40) is positioned between the first sensitive layer (12) and the second sensitive layer (22), and the interconnect stack (50) is positioned on a rear surface of the infrared matrix sensor (20); Conductive vias (32, 33, 34) electrically connect the interconnect stack (50) to the electronic elements (14) of the visible matrix sensor (10), the electronic elements (42) of the readout stack (40), and the electronic elements (23) of the infrared matrix sensor (20), respectively. An imaging device (1).

2. 2. The imaging device (1) of claim 1, wherein the visible matrix sensor (10) comprises a first insulating layer (16) positioned below the first sensitive layer (12), and the readout stack (40) comprises a second insulating layer (41) positioned above the electronic elements (42) of the readout stack (40), the first insulating layer (16) and the second insulating layer (41) being in contact with each other.

3. 2. The imaging device (1) of claim 1, wherein the readout stack (40) comprises a third insulating layer (43) positioned below the electronic elements (42) of the readout stack (40), and the infrared matrix sensor (20) comprises a fourth insulating layer (21) positioned above the second sensitive layer (22), the third insulating layer (43) and the fourth insulating layer (21) being in contact with each other.

4. 2. The imaging device (1) of claim 1, wherein conductive vias (34) extend directly from the electronic elements (23) of the infrared matrix sensor (20) to the conductive portions (51) of the interconnect stack (50).

5. 2. The imaging device (1) of claim 1, wherein a conductive via (33) extends directly from the electronic element (42) of the readout stack (40) to a conductive portion (51) of the interconnect stack (50).

6. 2. The imaging device (1) of claim 1, wherein conductive vias (32) extend directly from the electronic elements (14) of the visible matrix sensor (10) to the conductive portions (51) of the interconnect stack (50).

7. 2. The imaging device (1) of claim 1, wherein a conductive via (32) extends directly from a conductive portion (45) of the readout stack (40) that is in electrical contact with the electronic elements (14) of the visible matrix sensor (10) to a conductive portion (51) of the interconnect stack (50).

8. 2. The imaging device (1) of claim 1, wherein the second sensitive layer (22) is a structured layer forming, in a plane parallel to the plane of the infrared matrix sensor (20), a plurality of portions of the second sensitive layer (22) that differ from each other in the parallel plane, such that the conductive vias (32, 33) that electrically connect the interconnect stack (50) firstly to the electronic elements (14) of the visible matrix sensor (10) and secondly to the electronic elements (42) of the readout stack (40) do not pass through the second sensitive layer (22).

9. 2. The imaging device (1) of claim 1, wherein the second sensitive layer (22) is a structured layer in a plane parallel to the plane of the infrared matrix sensor (20), forming a plurality of portions of the second sensitive layer (22) connected in pairs by connecting portions (22r) of smaller thickness such that the conductive vias (32, 33) electrically connecting the interconnect stack (50) firstly to the electronic elements (14) of the visible matrix sensor (10) and secondly to the electronic elements (42) of the readout stack (40) pass through the connecting portions (22r) of smaller thickness.

10. 2. The imaging device (1) of claim 1, wherein the readout stack (40) and the interconnect stack (50) are a first readout stack (40) and a first interconnect stack of a first readout integrated circuit (40, 80), a second readout integrated circuit (80) formed by a second readout stack (81) and a second interconnect stack (82) is assembled in the first readout integrated circuit (40, 50), and the second interconnect stack (82) is assembled and connected to a rear surface of the first interconnect stack (50).

11. 2. The imaging device (1) of claim 1, comprising a reflective layer (63) positioned between the infrared matrix sensor (20) and the interconnect stack (50) and adapted to reflect incident infrared radiation intended to be detected by the infrared matrix sensor (20).

12. 12. The imaging device (1) of claim 11, wherein the reflective layer (63), together with the infrared matrix sensor (20), the readout stack (40), and an insulating layer (16) positioned between the first sensitive layer (12) and the readout stack (40), forms an optical cavity resonance at the wavelength of the infrared radiation.

13. A method for manufacturing an imaging device (1) according to any one of claims 1 to 12, comprising the steps of: The steps of fabricating a visible matrix sensor (10) include a first insulating layer (16) covering the first sensitive layer (12) with which the electronic elements (14) are located in the same plane; - producing a first structure intended to form said readout stack (40), comprising a second insulating layer (41), by molecular bonding of said second insulating layer (41) to said first insulating layer (16), thereby producing said readout stack (40); - producing a second structure intended to form said infrared matrix sensor (20), comprising a fourth insulating layer (21), by molecular bonding of said fourth insulating layer (21) to a third insulating layer (43) of said readout stack (40), thereby producing said infrared matrix sensor (20); fabricating the interconnect stack (50) from a rear surface of the infrared matrix sensor (20); The method includes:

14. The method of claim 13, wherein during the step of fabricating the electronic elements (42) of the readout stack (40), a temperature increase to a temperature of at least 1000° C. is performed.

15. The method according to claim 13, wherein the step of fabricating the electronic elements (23) of the infrared matrix sensor (20) is carried out after the step of fabricating the electronic elements (42) of the readout stack (40).

Images