Method and apparatus for mapping a single static assignment instruction onto a data flow graph in a data flow architecture

Abstract

Methods and apparatus for mapping a single static assignment instruction onto a data flow graph in a data flow architecture are described. Methods, apparatus, systems, and articles of manufacture for mapping an instruction set onto a data flow graph are disclosed herein. An example apparatus includes a variable processor for modifying variables in an instruction set. The variables are used multiple times in the instruction set, and the instruction set is in static single assignment form. The apparatus also includes a PHI processor for replacing PHI instructions included in the instruction set with a data flow control instruction set; and a data flow graph generator for mapping the instruction set modified by the variable processor and the PHI processor onto a data flow graph without transforming the instructions out of static single assignment form.

Description

Technical Field

[0001] This disclosure generally relates to data flow architectures and, more particularly, to methods and apparatuses for mapping a single static assignment instruction onto a data flow graph in a data flow architecture. Background Art

[0002] In recent years, the drive for increased processing speed in the computing field has led to increased interest in hardware accelerators. Hardware accelerators include hardware units configured to perform specific computing functions. The hardware units are linked together in a manner that allows a desired set of computations to be performed on a data set. In many instances, the hardware units are linked in a manner that allows computationally intensive processing to be performed in parallel on multiple data sets. The resulting concurrency can produce impressive parallel processing speeds and, in some instances, exceed the processing speeds achievable using general-purpose processors that execute software instructions. Brief Description of the Drawings

[0003] Figure 1 is a block diagram of an example processing system that includes an example compiler.

[0004] Figure 2 is Figure 1 a block diagram of an example implementation of an example mapping manager of an example compiler of.

[0005] Figure 3 is to be Figure 2 the first example instruction set and the second example instruction set of an example loop processor modification of an example mapping manager of.

[0006] Figure 4 is an example control dependence graph that includes a full control dependence tree.

[0007] Figure 5 is a flow chart of example machine-readable instructions that may be executed to implement Figure 1 and / or 2 of an example mapping manager.

[0008] Figure 6 is a flow chart of example machine-readable instructions that may be executed to implement Figure 2 of an example variable processor.

[0009] Figure 7 is a flow chart of example machine-readable instructions that may be executed to implement Figure 2 of an example PHI processor.

[0010] Figure 8 is constructed to execute Figure 5 , 6 and 7 of the instructions to implement Figure 1 and / or Figure 2Block diagram of an example processing platform of an example mapping manager.

[0011] The drawings are not to scale. Wherever possible, the same reference numerals will be used throughout the drawings and the accompanying written description to refer to the same or like parts. Detailed Description

[0012] Hardware accelerators are frequently used to achieve parallel high processing speeds and can even exceed the processing speeds achievable using general-purpose processors that execute software instructions. Unlike general-purpose processors, hardware processors employ a dataflow architecture rather than a control-flow architecture. As a result, dataflow graphs are used to program hardware accelerators (also referred to herein as dataflow engines) rather than conventional software instructions. Thus, conventional software instructions are converted into dataflow graphs before they can be executed on a dataflow engine.

[0013] A dataflow graph includes a set of functional units and channels that connect the functional units. Each variable (in an equivalent software program) maps to a channel. Dataflow graphs are not used to represent software code that assigns more than a single value to a variable. As a result, a compiler configured to convert conventional software instructions into dataflow graphs will first convert the software instructions into a form called static single assignment (SSA). However, software in SSA form cannot be directly converted into a dataflow graph. Thus, after converting the software into SSA form, a conventional compiler transforms the SSA-formatted software out of SSA form before the compiler generates a dataflow graph for execution by a dataflow engine. Unfortunately, the methods that compilers use to transform software out of SSA form are error-prone and impossible for some specific architectures.

[0014] Figure 1 is a block diagram of an example processing system 100 that includes an example compiler 102. The compiler 102 compiles a set of software instructions stored in an example software instruction store 104 for execution by an example dataflow engine 106. In some examples, the compiler 102 includes an example static single assignment (SSA) code converter 108. The SSA code converter 108 converts the instructions stored in the software instruction store 104 into SSA format and stores the SSA-formatted instructions in an example SSA store 110. An example mapping manager 112 maps the SSA-formatted instructions to a dataflow graph. In some examples, the mapping manager 112 stores the dataflow graph in an example dataflow graph store 114 and / or supplies the dataflow graph to the dataflow engine for execution.

[0015] Figure 2 is Figure 1Block diagram of an example implementation of an example mapping manager. In some examples, the mapping manager 112 includes an example instruction analyzer 202, an example variable processor 204, and an example PHI processor 206. In some examples, the example instruction analyzer 202 includes an example variable identifier 208, an example variable instruction identifier 210, an example loop identifier 212, and an example PHI identifier 214. The instruction analyzer 202 examines the SSA-formatted instructions stored in the SSA code store 110 to identify: 1) first information for use by the variable processor 204, and 2) second information for use by the PHI processor 206.

[0016] The example variable processor 204 includes an example earliest occurrence identifier 216, an example variable renamer 218, an example variable duplicator 220, and an example loop processor 222. The example loop processor 222 includes an example instruction generator 226 and an example instruction inserter 228. As described in more detail below, the variable processor 204 uses the first information to ensure that each variable in the code is used only once, and further to ensure that values are generated for loop variables during each iteration of a loop. The PHI processor uses the second information to map PHI instructions to nodes / functions in the data flow graph.

[0017] The PHI processor 206 includes an example control dependence graph generator 230, an example tree traverser 232, an example pick generator 234, and an example predicate generator 236.

[0018] Still referring to Figure 2 , the static single assignment (SSA) formatting requirement includes that each variable in the software instruction set is defined only once. This requirement is referred to as the "single definition" property. Variables ultimately become channels in the data flow graph to be created by the mapping manager 112, and each use of a variable in an instruction will represent a separate consumption channel in the data flow graph. Thus, in addition to the "single definition" property, the data flow graph also requires a property referred to as "single use". So, an example software program with a set of the following three instructions: 1) x = a + b; 2) y = x + c; and 3) z = x + d does not satisfy the single use property because "x" is used three times (e.g., the variable "x" appears in each of the three instructions). Thus, the mapping manager 112 modifies the instructions to eliminate the multiple uses of the variable "x". Similarly, any variable used in a loop but defined outside of this loop is explicitly repeated by the instruction (e.g., the instruction generates a value for the variable for each loop iteration) so that the instruction can be successfully used to generate the data flow graph.

[0019] Still referring to Figure 2, the example variable identifier 208 of the example instruction analyzer 202 analyzes the software instructions stored in the SSA code store 104 to identify variables that are used multiple times in the software instructions. As an example, when analyzing three instructions: 1) x = a + b; 2) y = x + c; and 3) z = x + d, the variable identifier 208 identifies the variable "x" as being used more than once. Additionally, the example variable instruction identifier 210 identifies the instructions stored in the SSA code store 104 that use the identified variable (e.g., the variable "x"). Thus, when analyzing a set of three instructions: 1) x = a + b; 2) y = x + c; and 3) z = x + d, the variable instruction identifier 210 identifies all three instructions as instructions that use the variable "x". In some examples, the variable identifier 208 and the variable instruction identifier 210 supply information identifying the identified variables and the identified instructions to the variable processor 204.

[0020] As described above, in some examples, the example variable processor 204 uses the first information (e.g., the identified variables and the identified instructions) supplied by the instruction analyzer 202 to ensure that each variable in the SSA code is used only once. To this end, the example earliest occurrence identifier 218 identifies the earliest instruction (the first to be executed) in the identified instruction set that contains the variable. In the example set of three instructions, the earliest occurring instruction is the first instruction (e.g., x = a + b). Additionally, the example variable renamer 218 renames the variable "x" that appears in the identified instructions other than the earliest occurring identified instruction supplied by the example variable instruction identifier 210. As applied to the three example instructions, the variable renamer 218 leaves the first instruction alone (e.g., does not rename the identified variable), while renaming the variable "x" in the second instruction to the variable "x1" and renaming the variable "x" in the third instruction to "x2". After the renaming operation, the example three instructions take the following form: 1) x = a + b; 2) y = x1 + c; and 3) z = x2 + d.

[0021] In addition, an example variable duplicator 220 of the example variable processor 204 causes the value of an identified variable generated in an earliest-occurring instruction to be copied to a later-occurring instruction that uses variable “x”. In some examples, the variable duplicator 220 causes the value of an identified variable generated in an earliest-occurring instruction to be copied to a later-occurring instruction by inserting a “copy instruction” after the earliest-occurring instruction and before the later-occurring instruction. In some examples, the “copy instruction” includes two or more arguments. The first argument represents the source of the value to be copied, and one or more other arguments represent the destinations to which the value is to be copied. As applied to three example instructions, the variable duplicator 220 inserts the instruction “copy x,x1,x2” to cause the value of variable “x” to be copied to variables “x1” and “x2” and to be used as the value of variables “x1” and “x2”. As a result of the copy instruction, the value of variable “x” is used as the value of variables “x1” and “x2”. Thus, the value of an identified variable generated in an earliest-occurring instruction is copied to a later-occurring instruction that uses the renamed variables “x1” and “x2”.

[0022] After the example variable duplicator 220 copies the value of variable “x” to a renamed version of variable “x” (e.g., to variables “x1” and “x2”), an example loop processor 222 operates to modify the SSA instructions. In some examples, the example loop processor 222 includes an example instruction generator 226 and an example instruction inserter 228. The modification performed by the example loop processor 222 causes values corresponding to variables that are used within a loop but defined outside the loop to be repeatedly generated for each loop iteration. Such variables' values are to be repeatedly generated because once the values corresponding to a loop iteration are generated and consumed by the hardware, another value is to be generated for consumption during the next loop iteration (or at the exit of the loop, depending on how the variable operates within the loop).

[0023] In some examples, an example loop identifier 212 of an example instruction analyzer 202 examines the SSA instructions and identifies loops that contain variable references. In some examples, the loop identifier 212 also identifies the loop headers and loop locks of each identified loop. The loop identifier 212 supplies information about the identified loops to an instruction generator 226 in the loop processor 222.

[0024] The instruction generator 226 uses this information to generate data flow instructions to be inserted into the identified loop. In some examples, the instruction generator 226 generates a PICK (select) instruction for each in the loop. The PICK instruction - which can be expressed as "x = PICK b, x1, x2" - is equivalent to the C code instruction: "x = b? x1: x2". The PICK instruction causes the value of variable "x" to be sent to "x1" if the value of variable "b" is false. If the value of variable "b" is not false, the value of variable "x" is sent to "x2". The instruction inserter 222 inserts the PICK instruction at the loop head and causes the value of variable "x" to be selected from outside the loop (in the case of the first iteration) or from the value generated by the loop body.

[0025] In some examples, the instruction generator 226 also generates a SWITCH (switch) instruction for each in the loop. The SWITCH instruction generated for the loop is placed at the loop lock, obtains the value of a variable, and based on the loop exit condition, either switches (sends) the value to the loop head for consumption by the newly inserted PICK instruction or ignores the value. In some examples, the SWITCH instruction is expressed as "x1, x2 = SWITCH b, x".

[0026] Figure 3 Illustrates two example instruction sets 300 representing loops operating on variable "V0". The first instruction set 302A includes a first (unmodified) loop instruction 304A, and the second instruction set 302B includes a second (modified) loop instruction 304B. The first instruction set 302A includes a first non-loop (outside the loop) instruction 308A, where the value of "V0" is defined to be equal to "f(a)". The first loop instruction 304A includes an example first loop instruction 310A corresponding to the loop entry, an example second loop instruction 312A where variable "x" is defined to be equal to the value of "V0", and an example third loop instruction 314A corresponding to the loop exit. An example second non-loop instruction 316A follows the exit of the first loop instruction 304A.

[0027] The second instruction set 302B is a version of the first instruction set 302A that has been modified by the loop processor 222. The second instruction set 302B includes a first non-loop (out-of-loop) instruction 308B in which the value of "V0" is defined to be equal to "f(a)". The second loop instruction 304B includes an exemplary first loop instruction 310B corresponding to the loop entry, an exemplary second loop instruction 312B generated and inserted by the loop processor 222, an exemplary third loop instruction 314B in which the variable "X" is defined to be equal to the value of "V0", an exemplary fourth loop instruction 316B generated and inserted by the loop processor 222, and an exemplary fifth loop instruction 318B corresponding to the loop exit. An exemplary second non-loop instruction 320B follows the second loop instruction 304B.

[0028] This document uses the first and second instruction sets 302A, 302B to illustrate the results of operations performed by the exemplary loop processor 222. As shown, the second instruction set 302B includes loop instructions that have been generated and inserted by the loop processor 222. For example, the second loop instruction 312B is a PICK instruction, "V = PICK b1, V0, V1", and the fourth loop instruction 316b is a SWITCH instruction, "V1, %ign = SWITCH b2, V". As described above, the PICK instruction causes the value of "V" generated outside the loop to be used for the first loop iteration and causes the value of "V" generated within the loop to be used for subsequent iterations. At the same time, the SWITCH instruction causes the value of the variable "V1" to be defined as the value of the variable "V" at the start of the next loop iteration.

[0029] Refer here to Figure 3, in addition to the example variable processor 204 operating on the SSA code, the example PHI processor 206 also operates on the SSA code. In some examples, the PHI processor 206 is configured to replace all PHI instructions included in the SSA code. When more than one variable definition reaches a single node, PHI instructions are used in the SSA-formatted code. In such cases, the value of the variable to be assigned to this node depends on, for example, the flow control of the encoded instructions indicated by the branch instructions leading to this node. An example PHI instruction may take the following form, "x = PHI(x3,B3,x4,B4,x5,B5,x6,B6)". In the example PHI instruction, the variable "x3" refers to the value assigned to the variable "x3" at the PHI input box B3, the variable "x4" refers to the value assigned to the variable "x4" at the PHI input box B4, the variable "x5" refers to the value assigned to the variable "x5" at the PHI input box B5, and the variable "x6" refers to the value assigned to the variable "x6" at the PHI input box B6. Thus, based on the PHI instruction, depending on the PHI input box pointing to the PHI instruction, "x" can be assigned any one of the values of "x3", "x4", "x5", and "x6".

[0030] See also Figure 4 , the example control dependence graph 400 illustrates a control dependence tree representing SSA instructions including PHI instructions. The control dependence graph 400 includes example nodes B0, example node B1, example node B2, example node B3, example node B4, example node B5, example node B6, and example node B7. As illustrated, node B0 branches to node B1 or B2, node B1 branches to node B3 or B4, node B2 branches to node B5 or B6, and node B7 assigns a value to the variable "x" based on any one of nodes B3, B4, B5, or B6. Thus, the nodes executed before node B7 (which may include any one of nodes B3, B4, B5, or B6) will indicate the value to be assigned to the variable "x" at node B7. Conventional methods for converting SSA code into a data flow graph for execution by a data flow engine do not include any means for directly lowering PHI nodes onto the data flow graph. Instead, before the instructions can be mapped to the data flow graph, conventional methods require transforming the SSA code out of the SSA format to eliminate the PHI nodes. In contrast, Figure 2 the PHI processor 206 of the mapping manager 112 in

[0031] In some examples, example PHI processor 206 maps PHI instructions in SSA code to a data flow graph by mapping PHI instructions to a tree of PICK instructions. In some such examples, PHI identifier 214 in example instruction analyzer 202 analyzes the SSA code to identify all instances of PHI instructions included in the SSA code. When a PHI instruction is identified, PHI identifier 214 provides information about the PHI instruction to example control dependency graph generator 230. Control dependency graph generator 230 uses the information from PHI identifier 214 and the SSA code to generate a control dependency graph corresponding to the PHI node. The control dependency graph illustrates the nodes on which the PHI node depends on its inputs (e.g., see Figure 4 for example control dependency tree 400). Next, example tree traverser 232 traverses the control dependency tree to identify the control dependency parent of the PHI node. Assuming the control dependency graph forms a complete tree, tree traverser 232 starts at the basic input nodes of the PHI node and traverses the control dependency tree until reaching the corresponding root node.

[0032] In some examples, for each control dependency parent encountered during the traversal to the root node, a PICK instruction will be generated. For example, tree traverser 232 may start at basic input box B3 and then traverse up to node B1. In Figure 4 the example control dependency graph, node B1 is the control dependency parent of node B3. Upon encountering node B1, tree traverser 232 notifies PICK generator 234, which responds by generating a first PICK instruction. The first PICK instruction uses the branch condition "b1" associated with node B1 to control which of two values is assigned to variable "y1". As described below, the two possible operands of the PICK instruction include the value corresponding to variable "x3" associated with node B3, or the value of an as-yet unknown variable "?" to be filled in when tree traverser 232 reaches node B4. In an example such as this, the first PICK instruction is represented as "y1 = PICK b1,x3,?". As described, when tree traverser 232 continues to traverse control dependency graph 400, "?" will be identified.

[0033] For example, the tree traverser 232 then begins with the basic input box B4 and traverses up to the node B1. Upon encountering the control dependence parent B1, the tree traverser 232 notifies the PICK generator 234, which responds by inserting the variable "x4" into the first PICK instruction, such that the first PICK instruction becomes "y1 = PICK b1,x3,x4". As soon as the control dependence tree 400 is traversed from the basic input nodes B5 and B6, the tree traverser 232 identifies the control dependence parent B2, and the PICK generator 234 generates a second PICK instruction that picks either one of two values corresponding to the inputs "x5" and "x6" associated with the AND nodes B5 and B6, respectively, based on the branch condition "b2". The second PICK instruction is represented as "y2 = PICK b2,x5,x6". As soon as the control dependence tree 400 is further traversed, the tree traverser 232 encounters the node B0, and the PICK generator 234 generates a third PICK instruction represented as "x = PICK b0,y1,y2". In addition to generating the PICK instructions, the PICK generator 234 also inserts the PICK instructions as a PICK tree into the SSA code to replace the PHI instructions. Since the PICK tree can be directly lowered onto the data flow graph, the resulting code can now be directly lowered onto the data flow graph without transforming the SSA code out of the SSA format.

[0034] In some examples, the control dependence graph does not form a complete tree. In some such examples, the example control dependence graph generator 230 notifies the example predicate generator 236 when the control dependence tree is not complete. The predicate generator 236 responds to the notification by generating a predicate for each input node of the PHI instruction corresponding to the incomplete control dependence tree. If the corresponding input node is not executed, the value 0 is assigned to the predicate, and if the corresponding input node is executed, the value 1 is assigned to the predicate. The predicate generator 236 also adds a hardware instruction that combines all the generated predicates and assigns a value to the variable of the PHI instruction based on the predicates.

[0035] When the example PHI processor 206 has completed its operation (e.g., has processed all the PHI instructions), the instructions modified by the example variable processor 204 and the PHI processor 206 are supplied to the example data flow graph generator 238. The data flow graph generator 238 uses the modified instructions to generate a data flow graph and causes the data flow graph to be stored in the data flow graph store 114 for execution by the data flow engine 106. The process of generating the data flow graph is also referred to herein as mapping the modified instructions to the data flow graph and / or lowering the modified instructions onto the data flow graph.

[0036] Although Figure 2 shows an example manner of implementing Figure 1 the mapping manager 112,Figure 2 One or more of the components, processes, and / or devices shown may be combined, split, rearranged, omitted, eliminated, and / or implemented in any way. Additionally, example instruction analyzer 202, example variable processor 204, example PHI processor 206, example variable identifier 208, example variable instruction identifier 210, example loop identifier 212, example PHI identifier 214, example earliest occurrence identifier 216, example variable renamer 218, example variable duplicator 220, example loop processor, example instruction generator 226, example instruction inserter 228, control dependence graph generator 230, example tree traverser 232, example PICK generator 234, example predicate generator 236, example data flow graph generator 238, and / or more generally, Figure 1 the example mapping manager 112 in may be implemented by hardware, software, firmware, and / or any combination of hardware, software, and / or firmware. Thus, for example, any one of example instruction analyzer 202, example variable processor 204, example PHI processor 206, example variable identifier 208, example variable instruction identifier 210, example loop identifier 212, example PHI identifier 214, example earliest occurrence identifier 216, example variable renamer 218, example variable duplicator 220, example loop processor, example instruction generator 226, example instruction inserter 228, control dependence graph generator 230, example tree traverser 232, example PICK generator 234, example predicate generator 236, example data flow graph generator 238, and / or more generally, Figure 1 the example mapping manager 112 in may be implemented by one or more analog or digital circuits, logic circuits, programmable processors, application specific integrated circuits (ASICs), programmable logic devices (PLDs), and / or field programmable logic devices (FPLDs). When reading any one of the apparatus or system claims of this patent that cover a pure software and / or firmware implementation, at least one of example instruction analyzer 202, example variable processor 204, example PHI processor 206, example variable identifier 208, example variable instruction identifier 210, example loop identifier 212, example PHI identifier 214, example earliest occurrence identifier 216, example variable renamer 218, example variable duplicator 220, example loop processor, example instruction generator 226, example instruction inserter 228, control dependence graph generator 230, example tree traverser 232, example PICK generator 234, example predicate generator 236, example data flow graph generator 238, and / or example mapping manager 112 is hereby expressly defined to include a non-transitory computer-readable storage device or storage disk (such as, a memory, a digital versatile disc (DVD), a compact disc (CD), a Blu-ray disc, etc.) that contains software and / or firmware. Additionally,Figure 1 An example mapping manager 112 can include one or more elements, processes, and / or devices in addition to those shown in Figure 2 or as an alternative to those shown in Figure 2 and / or can include more than one of all the shown elements, processes, and / or devices.

[0037] Figure 5 , 6 and 7 illustrate flowcharts representing example machine-readable instructions for implementing Figure 1 the mapping manager 112 in Figure 8 and / or 2. In this example, the machine-readable instructions represent a program for execution by a processor (such as the processor 812 shown in the example processor platform 800 discussed below). The program can be embodied in software stored on a non-transitory computer-readable storage medium such as a CD-ROM, floppy disk, hard drive, digital versatile disk (DVD), Blu-ray disk, or memory associated with the processor 812, but all and / or part of the program can alternatively be executed by a device other than the processor 812, and / or can be embodied in firmware or dedicated hardware. Additionally, although the example program is described with reference to the flowcharts illustrated in Figure 5 , 6 and 7, many other methods for implementing the example mapping manager 112 can alternatively be used. For example, the order of execution of the various blocks can be changed, and / or some of the blocks described can be changed, eliminated, or combined. Additionally or alternatively, any or all of the blocks can be implemented by one or more hardware circuits (e.g., discrete and / or integrated analog and / or digital circuits, field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), comparators, operational amplifiers (op-amps), logic circuits, etc.) structured to perform the corresponding operations without executing software or firmware.

[0038] As mentioned above, the Figure 5 , 6Example processes for 7, the non-transitory computer and / or machine-readable medium such as: hard disk drive, flash memory, read-only memory, compact disc, digital versatile disc, cache, random access memory, and / or any other storage device or storage disc in which information is stored for any duration (e.g., for an extended period of time, permanently, for a short instance, for temporary buffering, and / or for caching of information). As used herein, the term non-transitory computer-readable medium is expressly defined to include any type of computer-readable storage device and / or storage disc, and to exclude propagated signals and to exclude transmission media. "Comprising" and "including" (and all their forms and tenses) are used herein as open-ended terms. Thus, whenever a claim lists any content following any form of "comprising" or "including" (e.g., including, comprising, etc.), it is to be understood that additional elements, items, etc. may exist without exceeding the scope of the corresponding claim. As used herein, when the phrase "at least" is used as a transitional term in conjunction with a claim, it is as open-ended as the terms "comprising" and "including".

[0039] Figure 5 The program 500 begins at block 502, where an example instruction analyzer 202 (see Figure 2 )'s example variable identifier 208 (see Figure 2 ) analyzes the SSA-formatted instructions / codes stored in the example SSA store 110 (see Figure 2 ) to identify variables that are used more than once in the code. Additionally, an example variable instruction identifier 210 (see Figure 2 ) identifies the instructions that contain the identified variables (block 504). An example loop identifier 212 of the instruction analyzer 202 (see Figure 2 ) identifies the loops that operate on the variables (block 508). In some examples, the loop identifier 212 also determines the head of each identified loop and the latch of each identified loop. An example PHI identifier 214 (see Figure 2 ) identifies the PHI instructions included in the SSA-formatted instructions / codes (block 510).

[0040] In some examples, an example variable processor 204 uses the information collected and supplied by the instruction analyzer 202 (e.g., the identified variables and the identified instructions that contain the variables) to modify the SSA-formatted code such that each of the identified variables is used only once in the program represented by the instructions (block 512). The variable processor 204 also uses the information collected and supplied by the instruction analyzer (the identified loops) to modify the identified loops (block 514). In some examples, the loop modification is configured such that, for each loop iteration, values corresponding to the variables used in the loop are generated. Additionally, an example PHI processor 206 (seeFigure 2 ) Modify the SSA formatted code to remove and replace any PHI instructions identified and supplied by the example PHI identifier 214. The resulting instructions / codes after removing and replacing the PHI instructions can now be directly lowered onto the data flow graph. The resulting instructions are supplied to the example data graph generator 238 (see Figure 2 ), and this example data graph generator 238 uses these instructions to generate a data flow graph that can be executed by the data flow engine 106 (see Figure 1 ). Thereafter, the program 500 ends.

[0041] Figure 6 The program 600 of Figure 5 represents example instructions that can be used to implement one or more of the boxes in Figure 2 The example earliest occurrence identifier 216 of the example variable processor 204 (see Figure 2 ) uses the (variables) identified by the variable identifier and the instructions identified by the variable instruction identifier to identify the earliest instance in which the identified variable appears in the instruction. In some examples, the earliest occurrence identifier 216 identifies the earliest occurrence instruction to the example variable renamer 218 (see Figure 2 ). The variable renamer 218 then renames all instances of the variables that appear in the code other than the earliest occurrence instruction (box 604). The variable renamer 218 repeats this operation for all identified variables and identified instructions. As a result of the renaming operation, each variable is used only once. The example variable duplicator 220 (see Figure 2 ) then causes the value of each variable to be copied to each renamed instance of the variable (box 606). In some examples, the value is copied by inserting a copy instruction. Boxes 602, 604, and 606 represent an example way to implement the example box 512 in Figure 5 .

[0042] Still referring to Figure 6 , the example loop processor 222 (see Figure 2)A pair of data flow instructions (box 608) is generated for each loop that operates on a variable. In some examples, the loop processor receives information identifying the loop that operates on the variable from the example loop identifier 212. In some examples, the instructions generated by the loop processor include a PICK instruction and a SWITCH instruction. The PICK instruction picks the value generated for the loop variable outside the loop during the first loop iteration. For the remaining loop iterations, the PICK instruction picks the value generated within the loop body. The SWITCH instruction switches (sends) the value generated for the variable during the loop iteration back to the loop header for use in the next loop iteration. The loop processor 222 causes the PICK instruction to be inserted at the head of the loop, and the loop processor 222 causes the SWITCH instruction to be inserted at the loop lock (box 610). In some examples, the variable processor 204 then stops operating. In some examples, when the variable processor 204 stops operating, the PHI processor 206 operates to process the PHI instructions included in the code. In some such examples, after box 608 and box 610 (which represent an example manner of implementing example box 514 in FIG. 5), the program 600 continues at Figure 5 the box example box 516 of the example program 500 in

[0043] Figure 7 . The program 700 represents an example manner of implementing Figure 5 the box 516 in Figure 2 . The program 700 begins at box 702, where the example control dependence graph generator 230 (see Figure 2 ) selects one of the PHI instructions identified by the example PHI identifier 214 (see Figure 2 ). The control dependence graph generator 230 uses the PHI instruction and the associated portion of the SSA-formatted instruction / code to generate a control dependence graph based on the PHI instruction. When the control dependence tree in the control dependence graph forms a complete tree (determined at box 706), the example tree traverser 232 of the example PHI processor 206 (see Figure 2 ) traverses the control dependence tree to identify the control dependence parents of the PHI input boxes used in the corresponding PHI instruction (box 708). Additionally, the example PICK generator 234 (see ) generates a PICK instruction that is used to pick between two PHI input boxes based on the control dependence parents (box 710). The PICK generator 234 generates a PICK instruction for each control dependence parent, resulting in a PICK instruction tree. The PICK generator 234 causes the PICK instruction tree to be inserted into the SSA-formatted code in place of the corresponding PHI instruction (also at box 710). When there are more PHI instructions to process (determined at box 716), the program 700 returns to box 702 and its subsequent boxes.

[0044] When the control dependence tree in the control dependence graph does not form a complete tree (determined at block 706), the example control dependence graph generator 704 notifies the example predicate generator 236 (see Figure 2 ), and the predicate generator 236 responds by generating a set of predicates (block 712). Each of the predicates corresponds to one of the inputs of the corresponding PHI instruction. In addition, each predicate has a value of "0" when the corresponding input is not executed / inactive, and a value of "1" when the corresponding input is executed. Additionally, the predicate generator 236 generates and inserts a hardware instruction that combines the predicates and selects the value to be used as the input to the PHI instruction based on the predicate corresponding to the active (executed) one of the inputs (block 714). If there are additional PHI instructions to be processed, control returns to block 702. Otherwise, program 700 continues to Figure 5 block 518 of program 500.

[0045] Figure 8 is constructed to execute Figure 5 、 6 and the instructions in 7 to implement Figure 1 and / or Figure 2 The block diagram of the example processor platform 800 of the mapping manager 112 in. The processor platform 800 can be, for example, a server, a personal computer, or any other type of computing device.

[0046] The illustrated example of the processor platform 800 includes a processor 812. The processor 812 in the illustrated example is hardware. For example, the processor 812 can be implemented by one or more integrated circuits, logic circuits, microprocessors, or controllers from any desired family or manufacturer. The hardware processor can be a semiconductor-based (e.g., silicon-based) device. In this example, the processor 812 implements the example instruction analyzer 202, the example variable processor 204, the example PHI processor 206, the example variable identifier 208, the example variable instruction identifier 210, the example loop identifier 212, the example PHI identifier 214, the example earliest occurrence identifier 216, the example variable renamer 218, the example variable duplicator 220, the example loop processor, the example instruction generator 226, the example instruction inserter 228, the control dependence graph generator 230, the example tree traverser 232, the example PICK generator 234, the example predicate generator 236, the example data flow graph generator 238, and / or more generally, the example mapping manager 112.

[0047] The processor 812 of the illustrated example includes a local memory 813 (e.g., cache). The processor 812 in the illustrated example communicates with a main memory including a volatile memory 816 and a non-volatile memory 818 via a bus 814. The volatile memory 814 can be implemented by a synchronous dynamic random access memory (SDRAM), a dynamic random access memory (DRAM), a RAMBUS dynamic random access memory (RDRAM), and / or any other type of random access memory device. The non-volatile memory 816 can be implemented by a flash memory and / or any other desired type of memory device. A memory controller controls access to the main memories 814, 816.

[0048] The processor platform 800 in the illustrated example further includes an interface circuit 820. The interface circuit 820 can be implemented by any type of interface standard, such as an Ethernet interface, a universal serial bus (USB), and / or a PCI Express interface.

[0049] In the illustrated example, one or more input devices 822 are connected to the interface circuit 820. The input device(s) 822 allow a user to input data and / or commands into the processor 812. The input device(s) can be implemented by, such as, a keyboard, a button, a mouse, a touch screen, a trackpad, a trackball, an isopoint, and / or a voice recognition system.

[0050] One or more output devices 824 are also connected to the interface circuit 820 in the illustrated example. The output device 824 can be implemented, for example, by a display device (e.g., a light emitting diode (LED), an organic light emitting diode (OLED), a liquid crystal display, a cathode ray tube display (CRT), a touch screen, and / or a printer). Thus, the interface circuit 820 in the illustrated example typically includes a graphics driver card, a graphics driver chip, and / or a graphics driver processor.

[0051] The interface circuit 820 in the illustrated example further includes communication devices, such as a transmitter, a receiver, a transceiver, a modem, and / or a network interface card, to facilitate data exchange with an external machine (e.g., any kind of computing device) via a network 826 (e.g., an Ethernet connection, a digital subscriber line (DSL), a telephone line, a coaxial cable, a cellular telephone system, etc.).

[0052] The processor platform 800 of the illustrated example further includes one or more mass storage devices 828 for storing software and / or data. Examples of such mass storage devices 828 include a floppy disk drive, a hard disk drive, a compact disk drive, a Blu-ray disk drive, a RAID system, and a digital versatile disk (DVD) drive.

[0053] Figure 5 、6 The encoded instructions 832 in FIGS. 6 and 7 can be stored in the mass storage device 828, stored in the volatile memory 814, stored in the non-volatile memory 816, and / or stored on a removable tangible computer-readable storage medium such as a CD or DVD.

[0054] From the foregoing, it will be appreciated that example methods, apparatuses, and articles have been disclosed that allow a computer program represented in a static single assignment (SSA) formatted instruction set to be modified and then directly lowered onto a data flow graph without transforming the instructions out of the SSA format. Known methods for transforming instructions out of the SSA format are often error-prone, and sometimes the known transformation methods do not work. Thus, eliminating the transformation of instructions from the SSA format results in higher accuracy and fewer errors. Additionally, since hardware instructions (e.g., PICK and SWITCH instructions), which are basic elements of a data flow architecture, are used to modify the SSA formatted instructions, there is no additional cost associated with executing the resulting data flow graph on a data flow engine.

[0055] The following further examples are disclosed herein.

[0056] Example 1 is an apparatus for mapping an instruction set onto a data flow graph for execution by a data flow engine. The apparatus of Example 1 is a variable processor that is configured to modify variables in the instruction set. The variables are used multiple times in the instruction set, and the instruction set is in static single assignment form. The apparatus of Example 1 further includes a PHI processor that is configured to replace PHI instructions included in the instruction set with a data flow control instruction set; and a data flow graph generator that is configured to map the instruction set modified by the variable processor and the PHI processor onto a data flow graph without transforming the instructions out of the static single assignment form.

[0057] Example 2 includes the apparatus of Example 1 and further includes an instruction analyzer that is configured to analyze the instruction set by: identifying variables used multiple times in the instruction set for the variable processor; and identifying a subset of the instruction set for the variable processor. In Example 2, the subset represents multiple instances where the variables are used.

[0058] Example 3 includes the apparatus of claim 2. In Example 3, the variable processor modifies the variables by identifying an earliest occurrence instance of the variable and one or more later occurrence instances of the variable. Additionally, the variable processor modifies the variables by replacing the one or more later occurrence instances of the variable with a unique new variable. The variable processor modifies the variables by copying the value of the variable from the earliest occurrence instance to the new variable.

[0059] Example 4 includes the apparatus of Example 2. In Example 4, the instruction analyzer analyzes the instruction set by identifying to the variable processor that a variable is defined outside a loop and used within the loop.

[0060] Example 5 includes the apparatus of Example 4. In Example 5, the variable processor modifies the variable by inserting data flow control instructions into the instruction set. The data flow control instructions include a first data flow control instruction for selecting between: 1) a first value of the variable and a second value of the variable generated outside the loop, and 2) a second value of the variable generated within the loop. The data flow control instructions further include a second data flow control instruction for causing a third value of the variable to be used in a next iteration of the loop based on a loop exit condition.

[0061] Example 6 includes the apparatus of any one of Examples 1-5. The apparatus of Example 6 further includes an instruction analyzer that analyzes the instruction set to identify PHI instructions included in the instruction set to a PHI processor.

[0062] Example 7 includes the apparatus of Example 6. In Example 7, the PHI processor replaces the PHI instruction with a data flow control instruction by determining whether a control dependence graph of a set of PHI input boxes forms a complete tree. When the control dependence graph of the set of PHI input boxes forms a complete tree, the apparatus of Example 7 maps the PHI instruction to a data flow control instruction tree. The data flow control instruction assigns a corresponding value to a corresponding variable by selecting the corresponding value based on a corresponding branch condition associated with the PHI input box. When the control dependence graph of the set of PHI input boxes does not form a complete tree, the apparatus of Example 7 determines a predicate of a corresponding PHI input box and inserts a hardware instruction. The hardware instruction selects a third value to be assigned to the variable. The third value corresponds to one PHI input box in the PHI input boxes that satisfies the predicate.

[0063] Example 8 includes the apparatus of Example 7. In the apparatus of Example 8, the PHI processor maps the PHI instruction to a data flow control instruction tree by traversing a control dependence tree of the control dependence graph upward from each PHI input box in the PHI input boxes until reaching a root node; and generating one data flow control instruction in the data flow control instructions for each control dependence parent box encountered during the traversal.

[0064] Example 9 includes the apparatus of Example 8. In the apparatus of Example 9, a first data flow control statement corresponding to a first branch condition associated with a first PHI input selects between a first value corresponding to a first input variable of the PHI instruction and a second value corresponding to a second input variable of the PHI instruction. Additionally, the first branch condition corresponds to a control dependence parent of the first PHI input box and the second PHI input box.

[0065] Example 10 includes one or more non-transitory machine-readable storage media including instructions that, when executed, cause one or more processors to at least modify a variable in an instruction set. The variable is used multiple times in the instruction set. Additionally, the instruction set is in static single assignment form. The instructions further cause one or more processors to use a data flow control instruction set to replace PHI instructions included in the instruction set; and generate a data flow graph based on the instruction set after the variable has been modified and the PHI instructions have been replaced. In Example 10, the data flow graph can be executed by a data flow engine.

[0066] Example 11 includes the one or more non-transitory machine-readable storage media of Example 10. In Example 11, the instructions further cause one or more processors to identify variables used multiple times in the instruction set; and identify a subset of the instruction set. The subset represents multiple instances in which the variables are used.

[0067] Example 12 includes the one or more non-transitory machine-readable storage media of Example 11. In Example 11, the instructions further cause one or more processors to identify an earliest occurrence instance of a variable, identify a later occurrence instance of the variable, and replace the corresponding later occurrence instances of the variable with corresponding new variables. Additionally, the instructions further cause one or more processors to copy the value of the variable that originated from the earliest occurrence instance to the new variables of the later occurrence instances.

[0068] Example 13 includes the one or more non-transitory machine-readable storage media of Example 12. In Example 13, the instructions further cause one or more processors to determine that a variable defined outside a loop is used within the loop.

[0069] Example 14 includes the one or more non-transitory machine-readable storage media of Example 13. In Example 14, the instructions further cause one or more processors to insert data flow control instructions into the instruction set. The data flow control instructions cause corresponding values to be generated for the variable in corresponding iterations of the loop.

[0070] Example 15 includes the one or more non-transitory machine-readable storage media of Example 13. In Example 14, the instructions further cause one or more processors to insert a first data flow control instruction into the instruction set, the first data flow control instruction selects between a first value to be used for the variable and a second value to be used for the variable. The first value is generated outside the loop and the second value is generated inside the loop. The instructions further cause one or more processors to insert a second data flow control instruction. The second data flow control instruction causes a third value to be used for the variable in the next iteration of the loop based on a loop exit condition.

[0071] Example 16 includes one or more non-transitory machine-readable storage media of any one of Examples 10-15. In Example 16, the instructions further cause one or more processors to replace a PHI instruction by: determining whether a control dependence graph of a set of PHI input boxes forms a complete tree; and mapping the PHI instruction to a data flow control instruction tree when the control dependence graph of the set of PHI input boxes forms a complete tree. In Example 16, the data flow control instruction assigns a corresponding value to a corresponding variable by selecting the corresponding value based on a corresponding branch condition associated with the PHI input box. The instructions further cause one or more processors to replace a PHI instruction by: when the control dependence graph of the set of PHI input boxes does not form a complete tree, determining a predicate of a corresponding PHI input box and inserting a hardware instruction. The hardware instruction selects a third value to assign to the variable. The third value corresponds to one PHI input box in the PHI input boxes that satisfies the predicate.

[0072] Example 17 includes one or more non-transitory machine-readable storage media of Example 16. In Example 16, the instructions cause one or more processors to map a PHI instruction to a data flow control instruction tree by: traversing a control dependence tree of the control dependence graph upward from each PHI input box in the PHI input boxes until reaching a root node; and generating one data flow control instruction in the data flow control instructions for each control dependence parent box encountered during the traversal.

[0073] Example 18 includes one or more non-transitory machine-readable storage media of Example 16. In Example 18, a first data flow control statement in the data flow control instruction tree corresponding to a first branch condition associated with a first PHI input selects between a first value corresponding to a first input variable of the PHI instruction and a second value corresponding to a second input variable of the PHI instruction. The first branch condition corresponds to a control dependence parent of the first PHI input box and the second PHI input box.

[0074] Example 19 is a method for generating a data flow graph for execution on a data flow engine. The method of Example 19 includes modifying variables in an instruction set by executing instructions using at least one processor. The variables are used multiple times in the instruction set. The instruction set is in static single assignment form. The method further includes replacing a PHI instruction included in the instruction set with a data flow control instruction set by executing instructions using at least one processor; and generating a data flow graph based on the instruction set by executing instructions using at least one processor after the variables have been modified and the PHI instruction has been replaced.

[0075] Example 20 includes the method of Example 19 and further includes identifying variables in the instruction set and identifying a subset of the instruction set. The subset represents multiple instances in which the variables are used.

[0076] Example 21 includes the method of Example 20. In Example 21, modifying a variable includes identifying an earliest occurrence instance of the variable and one or more later occurrence instances of the variable; replacing the one or more later occurrence instances of the variable with a unique new variable; and copying a value of the variable originating from the earliest occurrence instance to the new variable.

[0077] Example 22 includes the method of Example 21. Example 22 further includes determining that the variable is defined outside a loop and is used within the loop; and inserting a data flow control instruction into the instruction set. The data flow control instruction causes a corresponding value for the variable to be generated for a corresponding iteration of the loop.

[0078] Example 23 includes the method of Example 22. The method of Example 23 further includes inserting a first data flow control instruction into the instruction set. The first data flow control instruction selects between a first value to be used for the variable and a second value to be used for the variable. The first value is generated outside the loop while the second value is generated within the loop. The method of Example 23 also includes inserting a second data flow control instruction that causes a third value to be used for the variable in a next iteration of the loop based on a loop exit condition.

[0079] Example 24 includes the method of any one of Examples 19 to 23. In the method of Example 24, replacing a PHI instruction includes determining whether a control dependence graph of a set of PHI input boxes forms a complete tree; and when the control dependence graph of the set of PHI input boxes forms a complete tree, mapping the PHI instruction to a data flow control instruction tree. The data flow control instruction selects a corresponding value based on a corresponding branch condition associated with the PHI input box to assign to a corresponding variable. In the method of Example 24, replacing the PHI instruction further includes: when the control dependence graph of the set of PHI input boxes does not form a complete tree, determining a predicate of a corresponding PHI input box and inserting a hardware instruction for selecting a third value to assign to the variable. The third value corresponds to one of the PHI input boxes in the set of PHI input boxes that satisfies the predicate.

[0080] Example 25 includes the method of Example 24. In the method of Example 25, mapping the PHI instruction to the data flow control instruction tree includes: traversing a control dependence tree of the control dependence graph upward from each of the PHI input boxes in the set of PHI input boxes until reaching a root node; and for each control dependence parent box encountered during the traversal, generating one of the data flow control instructions included in the data flow control instruction tree.

[0081] Example 26 includes the method of Example 25. In the method of Example 26, the first data flow control instruction in the data flow control instruction tree corresponding to the first branch condition associated with the first PHI input selects between a first value corresponding to the first input variable of the PHI instruction and a second value corresponding to the second input variable of the PHI instruction. In Example 26, the first branch condition corresponds to the control dependence parent of the first PHI input box and the second PHI input box.

[0082] Example 27 is a device that includes means for performing the method claimed in any one of claims 19 - 26.

[0083] Example 28 is a machine-readable storage including machine-readable instructions. When executed, the instructions implement the method and apparatus described in any of the foregoing examples.

[0084] Example 29 is a device for mapping an instruction set onto a data flow graph for execution by a data flow engine. The device of Example 29 includes means for modifying variables in the instruction set. The variables are used multiple times in the instruction set, and the instruction set is in static single assignment form. The device of Example 29 further includes means for replacing PHI instructions included in the instruction set with a data flow control instruction set; and means for mapping the instruction set modified by a variable processor and a PHI processor onto the data flow graph without transforming the instructions out of the static single assignment form.

[0085] Example 30 includes the device of Example 29 and further includes means for analyzing the instruction set by: identifying variables used multiple times in the instruction set; and identifying a subset of the instruction set. The subset represents multiple instances where the variables are used.

[0086] Example 31 includes the device of Example 30. In Example 31, the means for modifying variables identifies the earliest occurrence instance of the variable and one or more later occurrence instances of the variable; and replaces the one or more later occurrence instances of the variable with a unique new variable. Additionally, the means for modifying variables copies the value of the variable originating from the earliest occurrence instance to the new variable.

[0087] Example 32 includes the device of Example 30. In Example 32, the means for analyzing the instruction set analyzes the instruction set by identifying that the variable is defined outside the loop and used within the loop.

[0088] Example 33 includes the apparatus of Example 32. In Example 33, the apparatus for modifying a variable inserts a data flow control instruction into an instruction set, and the data flow control instruction includes a first data flow control instruction that selects between: 1) a first value of the variable and a second value of the variable generated outside the loop, and 2) a second value of the variable generated inside the loop. Additionally, the data flow control instruction includes a second data flow control instruction that causes a third value of the variable to be used in the next iteration of the loop based on a loop exit condition.

[0089] Example 34 encompasses the apparatus of any one of Examples 29 - 33 and further includes an apparatus for analyzing the instruction set to identify PHI instructions included in the instruction set.

[0090] Example 35 includes the apparatus of Example 34. In Example 35, the PHI processor replaces a PHI instruction with a data flow control instruction by: determining whether a control dependence graph of a set of PHI input boxes forms a complete tree; and when the control dependence graph of the set of PHI input boxes forms a complete tree, mapping the PHI instruction to a data flow control instruction tree. The data flow control instruction assigns a corresponding value to a corresponding variable by selecting the corresponding value based on a corresponding branch condition associated with the PHI input box. The PHI processor also replaces a PHI instruction with a data flow control instruction by: when the control dependence graph of the set of PHI input boxes does not form a complete tree, determining a predicate of a corresponding PHI input box and inserting a hardware instruction. The hardware instruction selects a third value to assign to the variable. The third value corresponds to one of the PHI input boxes in the PHI input box set that satisfies the predicate.

[0091] Example 36 includes the apparatus of Example 35. In Example 36, the PHI processor maps a PHI instruction to a data flow control instruction tree by: traversing a control dependence tree of a control dependence graph upward from each of the PHI input boxes in the PHI input box set until reaching a root node; and for each control dependence parent box encountered during the traversal, generating one of the data flow control instructions in the data flow control instruction.

[0092] Example 37 includes the apparatus of Example 36. In Example 37, a first data flow control statement corresponding to a first branch condition associated with a first PHI input selects between a first value corresponding to a first input variable of the PHI instruction and a second value corresponding to a second input variable of the PHI instruction. Additionally, the first branch condition corresponds to a control dependence parent of the first PHI input box and a second PHI input box.

[0093] Example 38 is a machine-readable medium including code that, when executed, causes a machine to perform the method of any one of Examples 19 - 26.

[0094] Although certain example methods, devices, and articles are disclosed herein, the scope covered by this patent is not limited thereto. Instead, this patent covers all methods, devices, and articles that fall within the scope of the claims of this patent.

Claims

1. A device for mapping an instruction set onto a data flow graph for execution by a data flow engine: a variable handler for modifying a variable in the instruction set, the variable being used multiple times in the instruction set, the instruction set being in a static single assignment form; A PHI handler configured to replace a PHI instruction included in the instruction set with one or more PICK instructions, the one or more PICK instructions being based on a control dependency graph of the PHI instruction; and A data flow graph generator is configured to map the instruction set modified by the variable handler and the PHI handler onto a data flow graph without transforming the instructions out of the static single dispatch form.

2. The device according to claim 1, wherein Further including: An instruction analyzer is configured to analyze the instruction set by: identifying to the variable handler the variables that are used multiple times in the instruction set; and A subset of the instruction set is identified to the variable handler, the subset representing a plurality of instances in which the variable is used.

3. The device according to claim 2, wherein The variable processing machine is used to modify the variable by the following operations: identifying an earliest occurrence of the variable and one or more later occurrences of the variable; replacing the one or more later occurring instances of the variable with a new variable, the new variable being unique; as well as The value of the variable from the earliest occurring instance is copied to the new variable.

4. The device according to claim 2, wherein The instruction analyzer is configured to analyze the instruction set by identifying to the variable handler that the variable is defined outside a loop and used in the loop.

5. The device according to claim 4, characterized in that The variable handler is used to modify the variable by inserting a data flow control instruction into the instruction set, wherein the data flow control instruction includes: a first data flow control instruction for selecting between: 1) a first value of the variable and a second value of the variable generated outside the loop, and 2) a second value of the variable generated within the loop; and A second data flow control instruction is provided for causing a third value of the variable to be used in a next iteration of the loop based on a loop exit condition.

6. The device according to any one of claims 1 to 5, characterized in that Further including: An instruction analyzer is used to analyze the instruction set, and the analysis of the instruction set is used to identify the PHI instructions included in the instruction set to the PHI processor.

7. The device according to claim 6, characterized in that The PHI handler is configured to replace the PHI instruction with the one or more PICK instructions by performing the following operations: Determine whether the control dependency graph of the PHI input box set forms a complete tree; When the control dependency graph of the PHI input frame set forms a complete tree, mapping the PHI instruction to a PICK instruction tree, the one or more PICK instructions being used to select a corresponding value to assign to a corresponding variable based on a corresponding branch condition associated with the PHI input frame; as well as When the control dependency graph of the PHI input box set does not form a complete tree, a predicate of a corresponding PHI input box is determined and a hardware instruction is inserted, wherein the hardware instruction is used to select a third value to assign to the variable, the third value corresponding to a PHI input box among the PHI input boxes having a satisfied predicate.

8. The device according to claim 7, wherein The PHI handler is configured to map the PHI instruction to the PICK instruction tree by performing the following operations: Traversing the control dependency tree of the control dependency graph upward from each PHI input box in the PHI input box until reaching a root node; as well as For each control-dependent parent box encountered during the traversal, one of the PICK instructions is generated.

9. The device according to claim 8, wherein A first data flow control statement corresponding to a first branch condition associated with a first PHI input selects between a first value corresponding to a first input variable of the PHI instruction and a second value corresponding to a second input variable of the PHI instruction, and the first branch condition corresponds to a control dependency parent of the first PHI input box and the second PHI input box.

10. A method for generating a data flow graph for execution on a data flow engine, the method comprising: modifying a variable in an instruction set by executing instructions using at least one processor, the variable being used multiple times in the instruction set, the instruction set being in a static single assignment form; replacing, by using at least one processor to execute instructions, a PHI instruction contained in the instruction set with one or more PICK instructions, the one or more PICK instructions being based on a control dependency graph of the PHI instruction; as well as The data flow graph is generated based on the instruction set by executing instructions using at least one processor after the variables have been modified and the PHI instructions have been replaced.

11. The method according to claim 10, wherein Further including: identifying the variable in the instruction set; as well as A subset of the set of instructions is identified, the subset representing a plurality of instances in which the variable is used.

12. The method according to claim 11, wherein The modification of the variable comprises: identifying an earliest occurrence of the variable and one or more later occurrences of the variable; replacing the one or more later occurring instances of the variable with a new variable, the new variable being unique; and The value of the variable from the earliest occurring instance is copied to the new variable.

13. The method according to claim 12, wherein: Further including: determining that the variable is defined outside a loop and used in the loop; as well as The one or more PICK instructions are inserted into the instruction set, the one or more PICK instructions being operable to cause corresponding values to be generated for the variables in corresponding iterations of the loop.

14. The method according to claim 13, wherein Further including: inserting a first PICK instruction into the instruction set, the first PICK instruction for selecting between a first value to be used for the variable and a second value to be used for the variable, the first value being generated outside the loop and the second value being generated within the loop; as well as A second PICK instruction is inserted for causing a third value to be used for the variable in a next iteration of the loop based on a loop exit condition.

15. The method according to any one of claims 10 to 14, wherein The instruction to replace the PHI includes: Determine whether the control dependency graph of the PHI input box set forms a complete tree; When the control dependency graph of the PHI input frame set forms a complete tree, mapping the PHI instruction to a PICK instruction tree, the PICK instruction being used to select a corresponding value to assign to a corresponding variable based on a corresponding branch condition associated with the PHI input frame; and When the control dependency graph of the PHI input frame set does not form a complete tree: Determining the predicate of the corresponding PHI input box; and A hardware instruction is inserted, the hardware instruction being configured to select a third value to assign to the variable, the third value corresponding to one of the PHI input boxes having a satisfied predicate.

16. The method according to claim 15, wherein The mapping of the PHI instruction to the PICK instruction tree includes: Traversing the control dependency tree of the control dependency graph from each PHI input box in the PHI input box until reaching a root node; and For each control-dependent parent box encountered during the traversal, one of the PICK instructions included in the PICK instruction tree is generated.

17. The method according to claim 16, wherein A first PICK instruction in the PICK instruction tree corresponding to a first branch condition associated with a first PHI input selects between a first value corresponding to a first input variable of the PHI instruction and a second value corresponding to a second input variable of the PHI instruction, wherein the first branch condition corresponds to a control dependency parent of the first PHI input box and the second PHI input box.

18. A device for mapping an instruction set onto a data flow graph for execution by a data flow engine: means for modifying a variable in said instruction set, said variable being used multiple times in said instruction set, said instruction set being in a static single assignment form; means for replacing a PHI instruction contained in the instruction set with one or more PICK instructions, the one or more PICK instructions being based on a control dependency graph of the PHI instruction; and Means for mapping the set of instructions having modified variables and the set of instructions having the one or more PICK instructions onto a dataflow graph without transforming the instructions out of the static single dispatch form.

19. The device according to claim 18, characterized in that Further including: Means for analyzing the instruction set by: identifying said variables that are used multiple times in said instruction set; as well as A subset of the set of instructions is identified, the subset representing a plurality of instances in which the variable is used.

20. The device according to claim 19, wherein The means for modifying the variable is used to modify the variable by: identifying an earliest occurrence of the variable and one or more later occurrences of the variable; replacing the one or more later occurring instances of the variable with a new variable, the new variable being unique; as well as The value of the variable from the earliest occurring instance is copied to the new variable.

21. The apparatus of claim 19, wherein The means for analyzing the instruction set is configured to analyze the instruction set by identifying that the variable is defined outside a loop and is used in the loop.

22. The device according to claim 21, wherein The means for modifying the variable is used to insert a data flow control instruction into the instruction set, wherein the data flow control instruction comprises: a first data flow control instruction for selecting between: 1) a first value of the variable and a second value of the variable generated outside the loop, and 2) a second value of the variable generated within the loop; and A second data flow control instruction is provided for causing a third value of the variable to be used in a next iteration of the loop based on a loop exit condition.

23. The device according to any one of claims 18 to 22, characterized in that Further including: means for analyzing the instruction set to identify the PHI instructions included in the instruction set.

24. The device according to claim 23, wherein The means for replacing the PHI instruction contained in the instruction set with the one or more PICK instructions is configured to: Determine whether the control dependency graph of the PHI input box set forms a complete tree; When the control dependency graph of the PHI input frame set forms a complete tree, mapping the PHI instruction to a PICK instruction tree, the PICK instruction being used to select a corresponding value to assign to a corresponding variable based on a corresponding branch condition associated with the PHI input frame; as well as When the control dependency graph of the PHI input box set does not form a complete tree, a predicate of a corresponding PHI input box is determined and a hardware instruction is inserted, wherein the hardware instruction is used to select a third value to assign to the variable, the third value corresponding to a PHI input box among the PHI input boxes having a satisfied predicate.

25. A machine-readable medium comprising code which, when executed, causes a machine to perform the method of any one of claims 10-17.

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