Display Devices

Abstract

The present disclosure relates to a display device, the display device comprising: a substrate, the substrate comprising a display area and a peripheral area arranged outside the display area; a plurality of wirings, the plurality of wirings being arranged in the peripheral area; and an interlayer insulating layer, the interlayer insulating layer covering the plurality of wirings. The interlayer insulating layer comprises an upper surface having a first concave-convex surface corresponding to the plurality of wirings. The display device further comprises: a first conductive layer, the first conductive layer being arranged on the interlayer insulating layer and comprising a second upper surface having a second concave-convex surface corresponding to the first concave-convex surface; a planarizing layer, the planarizing layer being arranged on the first conductive layer and having a flat upper surface; a second conductive layer, the second conductive layer being arranged on the planarizing layer and having a flat upper surface; and a polarizing plate, the polarizing plate being arranged on the second conductive layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority benefit of Korean Patent Application No. 10-2018-0040599 filed on April 6, 2018 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein in its entirety by reference. Technical Field

[0003] Exemplary embodiments relate to a display apparatus, and more particularly, to a display apparatus capable of preventing or reducing image quality degradation caused by external light. Background Art

[0004] The display device has a display area in which pixels are arranged. Components such as wiring or circuit units for transmitting electrical signals to be applied to pixels located in the display area are located in a peripheral area outside the display area. External light may be reflected by the wiring, and such reflection may cause the quality of an image seen by a user to deteriorate. Summary of the invention

[0005] Exemplary embodiments include a display device capable of preventing image quality degradation caused by external light.

[0006] According to an exemplary embodiment, a display device includes: a substrate including a display area and a peripheral area arranged outside the display area; a plurality of wirings arranged in the peripheral area; and an interlayer insulating layer covering the plurality of wirings. The interlayer insulating layer includes an upper surface having a first concave-convex surface corresponding to the plurality of wirings. The display device also includes: a first conductive layer, the first conductive layer is arranged on the interlayer insulating layer and includes a second upper surface having a second concave-convex surface corresponding to the first concave-convex surface; a planarization layer, the planarization layer is arranged on the first conductive layer and has a flat upper surface; a second conductive layer, the second conductive layer is arranged on the planarization layer and has a flat upper surface; and a polarizing plate, the polarizing plate is arranged on the second conductive layer.

[0007] In an exemplary embodiment, the plurality of wirings include a plurality of first wirings and a plurality of second wirings.

[0008] In an exemplary embodiment, the plurality of first wirings and the plurality of second wirings are alternately arranged.

[0009] In an exemplary embodiment, the display device further includes: a first gate insulating layer, the first gate insulating layer being disposed under the plurality of first wirings; and a second gate insulating layer, the second gate insulating layer being disposed under the interlayer insulating layer and covering the plurality of first wirings. The plurality of second wirings are disposed on the second gate insulating layer and correspond to spaces between the plurality of first wirings.

[0010] In an exemplary embodiment, the second conductive layer includes a via disposed above the plurality of wirings.

[0011] In an exemplary embodiment, the display device further includes an additional insulating layer filling the through hole.

[0012] In an exemplary embodiment, the additional insulating layer is disposed between the second conductive layer and the polarizing plate.

[0013] In exemplary embodiments, the additional insulating layer exposes at least a portion of the upper surface of the second conductive layer.

[0014] In an exemplary embodiment, the display device further includes: a light emitting device, the light emitting device is disposed in the display area, and the light emitting device includes: a pixel electrode; an intermediate layer, the intermediate layer including an emission layer; and a counter electrode. The pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, and the counter electrode extends to the peripheral area and contacts the upper surface of the second conductive layer.

[0015] In an exemplary embodiment, the second conductive layer is electrically connected to the first conductive layer.

[0016] In exemplary embodiments, the second conductive layer includes a first portion and a second portion spaced apart from each other.

[0017] In an exemplary embodiment, a space between the first portion and the second portion is aligned with one of the plurality of wirings.

[0018] In an exemplary embodiment, the display device further includes an additional insulating layer filling a space between the first portion and the second portion.

[0019] In an exemplary embodiment, the additional insulating layer is disposed between the second conductive layer and the polarizing plate.

[0020] In exemplary embodiments, the additional insulating layer exposes at least a portion of an upper surface of the first portion.

[0021] In an exemplary embodiment, the display device further includes: a light emitting device, the light emitting device is disposed in the display area, and the light emitting device includes: a pixel electrode; an intermediate layer, the intermediate layer including an emission layer; and a counter electrode. The pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, and the counter electrode extends to the peripheral area and contacts the upper surface of the first portion.

[0022] In an exemplary embodiment, the first portion is electrically connected to the first conductive layer.

[0023] In an exemplary embodiment, the second portion is electrically connected to the pixel electrode.

[0024] In an exemplary embodiment, the second conductive layer includes a plurality of interconnect lines.

[0025] In an exemplary embodiment, the display device further includes an additional insulating layer filling spaces between the plurality of interconnection lines.

[0026] In an exemplary embodiment, the additional insulating layer is disposed between the second conductive layer and the polarizing plate.

[0027] In an exemplary embodiment, the display device further includes a driving circuit disposed in the peripheral area. The driving circuit generates an electrical signal to be applied to a plurality of display devices disposed in the display area, and the plurality of interconnection lines are electrically connected to the driving circuit.

[0028] In an exemplary embodiment, the display device further includes: an additional insulating layer, which is disposed between the second conductive layer and the polarizing plate and has a flat upper surface; and a third conductive layer, which is disposed between the additional insulating layer and the polarizing plate and has a flat upper surface.

[0029] In an exemplary embodiment, the third conductive layer includes a plurality of additional wirings, and a plurality of spaces disposed between the plurality of additional wirings are disposed above the plurality of interconnection lines.

[0030] In exemplary embodiments, the third conductive layer includes a first portion and a second portion that are spaced apart from each other.

[0031] In an exemplary embodiment, a space between the first portion and the second portion is disposed above the plurality of interconnection lines.

[0032] In an exemplary embodiment, the display device further includes: a light emitting device, the light emitting device is disposed in the display area, and the light emitting device includes: a pixel electrode; an intermediate layer, the intermediate layer including an emission layer; and a counter electrode. The pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, and the counter electrode extends to the peripheral area and contacts an upper surface of the first portion.

[0033] In an exemplary embodiment, the first portion is electrically connected to the first conductive layer.

[0034] In an exemplary embodiment, the second portion is electrically connected to the pixel electrode.

[0035] In an exemplary embodiment, the display device further includes: a light emitting device, the light emitting device is disposed in the display area, and the light emitting device includes: a pixel electrode; an intermediate layer, the intermediate layer includes an emission layer; and a counter electrode. The pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, and the second conductive layer is disposed on the same layer as the pixel electrode.

[0036] In an exemplary embodiment, the display device further includes: a light emitting device, the light emitting device is arranged in the display area, and the light emitting device includes: a pixel electrode; an intermediate layer, the intermediate layer includes an emission layer; and a counter electrode. The pixel electrode, the intermediate layer and the counter electrode are stacked in sequence. The display device further includes: a first thin film transistor, the first thin film transistor is arranged below the light emitting device, and includes a first gate electrode and a first source electrode arranged above the first gate electrode. The display device further includes: an intermediate conductive layer, the intermediate conductive layer is arranged between the first source electrode and the light emitting device. The first conductive layer and the first source electrode are arranged on the same layer, and the second conductive layer and the intermediate conductive layer are arranged on the same layer.

[0037] In an exemplary embodiment, the intermediate conductive layer is a second source electrode.

[0038] According to an exemplary embodiment, a display device includes: a substrate, the substrate including a display area and a peripheral area arranged outside the display area; an interlayer insulating layer, the interlayer insulating layer is arranged in the peripheral area and includes an upper surface having a first concave-convex surface; a first conductive layer, the first conductive layer is arranged on the interlayer insulating layer and includes an upper surface having a second concave-convex surface corresponding to the first concave-convex surface; a planarization layer, the planarization layer is arranged on the first conductive layer and has a flat upper surface; a second conductive layer, the second conductive layer is arranged on the planarization layer and has a flat upper surface; and a polarizing plate, the polarizing plate is arranged on the second conductive layer.

[0039] According to the exemplary embodiments as described above, a display device capable of preventing image quality degradation caused by external light may be realized. However, the scope of the present disclosure is not limited thereto. BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The above and other aspects of the present disclosure will become more apparent by describing in detail exemplary embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0041] Figure 1 is a schematic conceptual diagram of a portion of a display device according to an exemplary embodiment;

[0042] Figure 2 yes Figure 1 A schematic conceptual diagram of a portion A of a display device;

[0043] Figure 3 It is along Figure 2 A schematic cross-sectional view taken along line III-III of ;

[0044] Figure 4 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0045] Figure 5 yes Figure 4 A schematic plan view of a portion of a display device;

[0046] Figure 6 is a schematic plan view of a portion of a display device according to an exemplary embodiment;

[0047] Figure 7 is a schematic plan view of a portion of a display device according to an exemplary embodiment;

[0048] Figure 8 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0049] Fig. 9 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0050] Fig.10 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0051] Fig.11 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0052] Fig.12 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0053] Fig.13is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0054] Fig.14 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0055] Fig.15 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment;

[0056] Fig.16 is a schematic plan view of a portion of a display device according to an exemplary embodiment;

[0057] Fig.17 is a schematic plan view of a portion of a display device according to an exemplary embodiment;

[0058] Fig.18 is a schematic plan view of a portion of a display device according to an exemplary embodiment;

[0059] Fig.19 is a schematic circuit diagram of a pixel of a display device according to an exemplary embodiment. DETAILED DESCRIPTION

[0060] Hereinafter, exemplary embodiments will be described more fully with reference to the accompanying drawings. The same reference numerals may indicate the same elements in all drawings. In the drawings, regardless of the figure number, the same or corresponding elements are represented by the same reference numerals, and redundant descriptions are omitted.

[0061] It will be understood that, unless explicitly stated otherwise, when an element such as a layer, film, region, or substrate is described as being “on” another element, the element can be “directly on” the other element or intervening elements may also be present.

[0062] In the present disclosure, the x-axis, y-axis and z-axis are not limited to the three axes of the rectangular coordinate system and can be interpreted in a broader sense. In an exemplary embodiment, the x-axis, y-axis and z-axis may be perpendicular to each other or may represent different directions that are not perpendicular to each other.

[0063] It will be understood that the terms "first", "second" or "third" etc. are used herein to distinguish one element from another element, and the elements are not limited by these terms. Therefore, a "first" element in an exemplary embodiment may be described as a "second" element in another exemplary embodiment.

[0064] Figure 1 is a schematic conceptual diagram of a portion of a display device according to an exemplary embodiment. Figure 2 yes Figure 1 Schematic conceptual diagram of portion A of a display device.

[0065] like Figure 1 As shown in , a display device according to an exemplary embodiment includes a substrate including a display area DA in which a plurality of pixels are arranged and a peripheral area PA arranged around the display area DA. The peripheral area PA includes a pad area PADA to which various electronic devices such as an integrated circuit (IC) or a printed circuit board (PCB) can be electrically connected.

[0066] Can Figure 1 It is understood to be a plan view showing a substrate during the manufacture of a display device. In an electronic device such as a fully manufactured display device or a smart phone including a display device, in order to minimize or reduce the area of ​​the peripheral area PA recognized by a user, a portion of the substrate or the like may be bent. For example, Figure 1 and Figure 2 As shown in , the substrate may have portions having different widths in the x-axis direction, and the substrate may be bent at the narrow portion (relative to the bending axis parallel to the x-axis). In this case, at least a portion of the pad area PADA may overlap the display area DA. The bending direction is set so that the pad area PADA does not cover the display area DA but is located behind the display area DA. Therefore, the user recognizes that the display area DA occupies most of the display device.

[0067] The substrate may include various materials with flexible or bendable properties. For example, the substrate may include a polymeric resin, such as polyethersulfone (PES), polyacrylate, polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyacrylate (PAR), polyimide (PI), polycarbonate (PC) or cellulose acetate propionate (CAP). The substrate may have a multilayer structure including two layers including a polymeric resin and a barrier layer including an inorganic material (e.g., silicon oxide, silicon nitride and / or silicon oxynitride, etc.) between the two layers. In this way, various modifications may be made. In the case where the display device is not required to be bent, the substrate may include glass.

[0068] The edge of the display area DA may have a shape similar to a rectangle or a square. For example, the display area DA may include a first edge E1 and a second edge E2 opposite to each other, and a third edge E3 and a fourth edge E4 opposite to each other and located between the first edge E1 and the second edge E2. The pad area PADA is adjacent to the fourth edge E4. In this case, the first portion connecting the first edge E1 to the fourth edge E4 may have an arc shape. In addition, the second portion connecting the second edge E2 to the fourth edge E4 may also have an arc shape. In addition, the display area DA may have an arc shape at a portion other than the first portion and the second portion.

[0069] Figure 3 It is along Figure 2 A schematic cross-sectional view taken along line III-III. Figure 3 It is shown Figure 2 sectional views of portions of a device that are spaced apart from one another, so adjacent components are not shown. For example, Figure 3 Pixel PX1 and pixel PX2 are shown. Figure 3 , the pixel PX1 and the pixel PX2 are not close to each other (eg, not directly adjacent to each other). Figure 3 It is shown Figure 2 Therefore, the cross-sections of the separated portions may not be in the same direction. For example, the cross-section of the pixel PX1 may not be in the same plane as the planes of the cross-sections of the plurality of wirings PL. Figure 2 The line III-III in is shown as a straight line, however, in reality, Figure 2 The line III-III in the figure can be a curve or a line that is bent several times. Figure 3 Understood as showing Figure 2 The pixels PX1 and PX2 in the display area DA and Figure 2 sectional view of some of the plurality of wirings PL in the peripheral area PA.

[0070] like Figure 3 As shown in , in an exemplary embodiment, the first display device 310 and the second display device 320 and the first thin film transistor 210 and the second thin film transistor 220 electrically connected to the first display device 310 and the second display device 320 may be located in the display area DA of the substrate 100. The first display device 310 and the second display device 320 may be, for example, an organic light emitting device. The organic light emitting device electrically connected to the first thin film transistor 210 and the second thin film transistor 220 may be understood as a first pixel electrode 311 and a second pixel electrode 321 electrically connected to the first thin film transistor 210 and the second thin film transistor 220, respectively.

[0071] According to an exemplary embodiment, Figure 3An example is shown in which the first thin film transistor 210 is located in the first pixel PX1, the second thin film transistor 220 is located in the second pixel PX2, the first display device 310 is electrically connected to the first thin film transistor 210, and the second display device 320 is electrically connected to the second thin film transistor 220. Hereinafter, for ease of explanation, the first thin film transistor 210 and the first display device 310 will be described. The description is also applicable to the second thin film transistor 220 and the second display device 320. For example, the description of the second semiconductor layer 221, the second gate electrode 223, the second source electrode 225a and the second drain electrode 225b of the second thin film transistor 220 and the description of the second pixel electrode 321, the counter electrode 325, and the intermediate layer 323 of the second display device 320 will be omitted. In an exemplary embodiment, the counter electrode 325 of the second display device 320 may be formed integrally with the counter electrode 315 of the first display device 310.

[0072] The first thin film transistor 210 may include a first semiconductor layer 211, a first gate electrode 213, a first source electrode 215a, and a first drain electrode 215b. The first semiconductor layer 211 may include, for example, amorphous silicon, crystalline silicon, or an organic semiconductor material. To ensure insulation between the first semiconductor layer 211 and the first gate electrode 213, a first gate insulating layer 121 may be provided between the first semiconductor layer 211 and the first gate electrode 213. The first gate insulating layer 121 may include, for example, an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride. The first interlayer insulating layer 131 may be provided above the first gate electrode 213 and may include, for example, an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride. The first source electrode 215a and the first drain electrode 215b may be provided on the first interlayer insulating layer 131. Such an insulating layer including an inorganic material may be formed, for example, via chemical vapor deposition (CVD) or atomic layer deposition (ALD). The same may apply to exemplary embodiments and modifications thereof to be described later.

[0073] The first gate electrode 213, the first source electrode 215a, and the first drain electrode 215b may include various conductive materials. For example, the first gate electrode 213 may include molybdenum (Mo) or aluminum (Al), and in an exemplary embodiment, may have a multilayer structure. In an exemplary embodiment, the first gate electrode 213 may be a three-layer structure including a Mo layer, an Al layer, and a Mo layer. The first source electrode 215a and the first drain electrode 215b may, for example, include titanium (Ti) or Al. According to an exemplary embodiment, each of the first source electrode 215a and the first drain electrode 215b may have a multilayer structure. In an exemplary embodiment, each of the first source electrode 215a and the first drain electrode 215b may be, for example, a three-layer structure including a Ti layer, an Al layer, and a Ti layer. However, it will be understood that the exemplary embodiments are not limited thereto.

[0074] The buffer layer 110 may be disposed between the first thin film transistor 210 and the substrate 100, and may include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride. The buffer layer 110 may improve the smoothness of the upper surface of the substrate 100, and may prevent or reduce impurities from penetrating from the substrate 100 into the first semiconductor layer 211 of the first thin film transistor 210.

[0075] The planarization layer 140 may be disposed on the first thin film transistor 210. In an exemplary embodiment, Figure 3 As shown in FIG, when the organic light emitting device is disposed above the first thin film transistor 210, the planarization layer 140 may planarize the upper portion of the protective layer covering the first thin film transistor 210. The planarization layer 140 may include an organic material such as benzocyclobutene (BCB) or hexamethyldisiloxane (HMDSO). Figure 3 2 and 3. The planarization layer 140 is shown as a single layer in FIG. 3, but various modifications may be made to the planarization layer 140. For example, in an exemplary embodiment, the planarization layer 140 may be a stack of a plurality of layers.

[0076] The first display device 310 may be located on the planarization layer 140 in the display area DA of the substrate 100. In an exemplary embodiment, the first display device 310 may be an organic light emitting device having a first pixel electrode 311, an opposing electrode 315, and an intermediate layer 313 disposed between the first pixel electrode 311 and the opposing electrode 315. The intermediate layer 313 may include an emission layer. Figure 3 As shown in FIG. 1 , the first pixel electrode 311 may contact one of the first source electrode 215a and the first drain electrode 215b via an opening formed in the planarization layer 140 and be electrically connected to the first thin film transistor 210. The first pixel electrode 311 may include, for example, ITO, IZO, or In 2 O 3 If necessary, the first pixel electrode 311 may include a material different from the aforementioned materials. In an exemplary embodiment, the first pixel electrode 311 may include a metal such as Al or copper (Cu).

[0077] The pixel defining layer 150 may be disposed above the planarization layer 140. The pixel defining layer 150 defines pixels by including respective openings corresponding to sub-pixels. For example, the pixel defining layer 150 may include an opening through which at least a central portion of the first pixel electrode 311 is exposed. Figure 3 In this case shown in , the pixel defining layer 150 prevents arcing etc. from occurring on the edge of the first pixel electrode 311 by increasing the distance between the edge of the first pixel electrode 311 and the counter electrode 315 disposed above the first pixel electrode 311. The pixel defining layer 150 may include an organic material such as PI or HMDSO.

[0078] The intermediate layer 313 of the organic light-emitting device may include a low molecular weight material or a high molecular weight material. When the intermediate layer 313 includes a low molecular weight material, the intermediate layer 313 may have a structure in which a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), and an electron injection layer (EIL) are stacked in a single structure or a composite structure. The intermediate layer 313 may be formed, for example, by vacuum deposition. When the intermediate layer 313 includes a high molecular weight material, the intermediate layer 313 may have a structure including an HTL and an EML. In this case, the HTL may include poly (3,4-ethylenedioxythiophene) (PEDOT), and the EML may include a high molecular weight material such as a material based on poly (p-phenylene vinylene) (PPV) or a material based on polyfluorene. The intermediate layer 313 may be formed, for example, by screen printing, inkjet printing, or laser induced thermal imaging (LITI). The intermediate layer 313 is not limited to the above structure, and may have any of a variety of other structures. The intermediate layer 313 may include a single layer covering the plurality of first pixel electrodes 311 and second pixel electrodes 321 , or may include patterned layers corresponding to the plurality of first pixel electrodes 311 and second pixel electrodes 321 , respectively.

[0079] The counter electrode 315 may be disposed above the display area DA and may cover the display area DA. For example, the counter electrode 315 may be formed as a single body constituting a plurality of organic light emitting devices, and thus, may correspond to a plurality of first pixel electrodes 311 and second pixel electrodes 321 .

[0080] A plurality of wirings PL may be disposed on the first gate insulating layer 121 in the peripheral area PA. In this case, during manufacture of the display device, the plurality of wirings PL may be formed simultaneously with the first gate electrode 213 of the first thin film transistor 210 by using the same material as the material of the first gate electrode 213. The plurality of wirings PL may transmit an electrical signal to be applied to the first pixel PX1 or the second pixel PX2 located in the display area DA, or may transmit an electrical signal to be applied to a circuit unit in the peripheral area PA located outside the display area DA. The circuit unit located in the peripheral area PA may be, for example, a shift register that generates a signal to be applied to a first pixel PX1 or a second pixel PX2 as will be described later. Fig.19 The scanning signals of the scanning lines SL located in the display area DA are described.

[0081] Just as the first interlayer insulating layer 131 covers the first gate electrode 213 and the second gate electrode 223 in the display area DA, the first interlayer insulating layer 131 covers the plurality of wirings PL in the peripheral area PA. For example, the first interlayer insulating layer 131 may extend from the display area DA to the peripheral area PA. As described above, since the first interlayer insulating layer 131 includes an inorganic material such as silicon oxide, silicon nitride and / or silicon oxynitride, the upper surface of the first interlayer insulating layer 131 has a shape corresponding to a component located below the first interlayer insulating layer 131. For example, since the plurality of wirings PL are disposed below the first interlayer insulating layer 131, the upper surface of the first interlayer insulating layer 131 has a concave-convex surface corresponding to the plurality of wirings PL. Here, the concave-convex surface of the upper surface of the first interlayer insulating layer 131 may be referred to as a first concave-convex surface. In addition, here, the terms "concave-convex surface" and "concave-convex pattern" may be used interchangeably.

[0082] The first concavo-convex surface does not only mean that there are convex and concave portions arbitrarily included in random areas on the surface. As the resolution of the display device increases, the number of wirings PL that transmit electrical signals to be applied to the display area DA or the driving circuit unit disposed outside the display area DA also increases. The increase in the proportion of the area occupied by the display area DA in the display device can be achieved by reducing the area of ​​the peripheral area PA. Therefore, the intervals between the plurality of wirings PL that transmit electrical signals are reduced. Therefore, referring to Figure 3 , the concavoconvex surface of the upper surface of the first interlayer insulating layer 131 has a "V"-shaped valley at a position corresponding to the space between the plurality of wirings PL. Therefore, according to the exemplary embodiment, the concavoconvex surface means a surface having a "V"-shaped valley at a position corresponding to the space between the plurality of wirings PL as described above. This is the same in the exemplary embodiment to be described later and its modifications. For example, Figure 3 As shown in , in an exemplary embodiment, the upper surface of the first interlayer insulating layer 131 includes a "V"-shaped valley in each region located between adjacent wirings PL. In an exemplary embodiment, the "V"-shaped valley forming the concavo-convex surface is provided only in the region located between adjacent wirings PL, and is not provided in the region overlapping with the wirings PL. Therefore, in an exemplary embodiment, the "V"-shaped valley forming the concavo-convex surface of the upper surface of the first interlayer insulating layer 131 does not overlap with any wiring PL among the wirings PL provided below the first interlayer insulating layer 131.

[0083] In the peripheral area PA, the first conductive layer 1CL is located on the first interlayer insulating layer 131. As described above, since the first source electrode 215a, the first drain electrode 215b, the second source electrode 225a, and the second drain electrode 225b are located on the first interlayer insulating layer 131 in the display area DA, during the manufacture of the display device, the first conductive layer 1CL can be formed simultaneously with the first source electrode 215a, the first drain electrode 215b, the second source electrode 225a, and the second drain electrode 225b by using the same material as that used for the first source electrode 215a, the first drain electrode 215b, the second source electrode 225a, and the second drain electrode 225b. As described above, the upper surface of the first interlayer insulating layer 131 has a concave-convex surface corresponding to the plurality of wirings PL. That is, the upper surface of the first interlayer insulating layer 131 includes a "V"-shaped valley disposed in a position between adjacent wirings PL. Therefore, the upper surface of the first conductive layer 1CL formed on the first interlayer insulating layer 131 has a concavoconvex surface (referred to herein as a second concavoconvex surface) corresponding to the concavoconvex surface (referred to herein as a first concavoconvex surface) of the upper surface of the first interlayer insulating layer 131. Figure 3 As shown in, in an exemplary embodiment, the "V"-shaped valley of the second concave-convex surface is aligned with the "V"-shaped valley of the first concave-convex surface. Therefore, in an exemplary embodiment, both the "V"-shaped valley of the second concave-convex surface and the "V"-shaped valley of the first concave-convex surface are arranged in a position between (and above) adjacent wirings PL.

[0084] The planarization layer 140 is located on the first conductive layer 1CL including the upper surface having the second concavo-convex surface. In the display area DA, the planarization layer 140 is disposed on the first thin film transistor 210 and the second thin film transistor 220. Therefore, even when the first thin film transistor 210 and the second thin film transistor 220 are disposed below the planarization layer 140, the planarization layer 140 including the organic material still has a substantially flat upper surface. In addition, in the peripheral area PA, the planarization layer 140 is located on the first conductive layer 1CL including the upper surface having the second concavo-convex surface, and the upper surface of the planarization layer 140 has a substantially flat shape. During the manufacture of the display device, the planarization layer 140 in the peripheral area PA may be formed simultaneously with the planarization layer 140 in the display area DA by using the same material. Therefore, the planarization layer 140 in the peripheral area PA may have the same structure as that of the planarization layer 140 in the display area DA. The planarization layer 140 may have a single body structure extending from the display area DA to the peripheral area PA, or may have a discontinuous portion within the peripheral area PA.

[0085] Here, as will be understood by one of ordinary skill in the art, when a surface or a portion of a surface is described as being substantially flat, it will be understood that the surface or a portion of a surface is completely flat or nearly flat (e.g., within measurement error). In addition, in an exemplary embodiment, when a concave-convex surface is described as including a "V"-shaped valley, the portion of the surface that does not include the "V"-shaped valley is the substantially flat portion of the surface. Therefore, in an exemplary embodiment, the substantially flat portion of the concave-convex surface refers to the portion of the concave-convex surface that does not include any "V"-shaped valley.

[0086] In the peripheral area PA, the second conductive layer 2CL is located on the planarization layer 140. Since the upper surface of the planarization layer 140 is substantially flat, the upper surface of the second conductive layer 2CL also has a substantially flat shape. Since the first pixel electrode 311 and the second pixel electrode 321 are located on the planarization layer 140 in the display area DA, during the manufacture of the display device, the second conductive layer 2CL can be formed simultaneously with the first pixel electrode 311 and the second pixel electrode 321 in the same layer as the first pixel electrode 311 and the second pixel electrode 321 by using the same material as the first pixel electrode 311 and the second pixel electrode 321.

[0087] The polarizing plate 400 is located above the second conductive layer 2CL. The polarizing plate 400 reduces the degree of reflection of external light incident on the display device. Therefore, when the user sees the image, the visibility of the image displayed in the display area DA can be prevented or reduced from being degraded. For example, the first light, which is a part of the light incident on the polarizing plate 400, enters the polarizing plate 400, is reflected by the upper surface of the second conductive layer 2CL, and is emitted back to the outside of the display device via the polarizing plate 400. In addition, the second light, which is another part of the light incident on the polarizing plate 400, is reflected by the upper surface of the polarizing plate 400. At this time, when the first light passes through the polarizing plate 400 twice, the phase of the first light changes, and therefore, it can be opposite to the phase of the second light. Therefore, the first light and the second light destructively interfere with each other, and therefore, when the user sees the image displayed in the display area DA, the visibility of the image displayed in the display area DA can be effectively prevented or reduced from being degraded by external light. In the display area DA, the counter electrodes 315 and 325 can be used as the second conductive layer 2CL.

[0088] If the second conductive layer 2CL having a flat upper surface does not exist in the peripheral area PA, the first light transmitted through the polarizing plate 400 is reflected by the upper surface of the first conductive layer 1CL below the polarizing plate 400. However, as described above, the upper surface of the first conductive layer 1CL includes a second concave-convex surface. Therefore, a portion of the first light incident on the second concave-convex surface is diffusely reflected, and thus, destructive interference with the second light reflected by the polarizing plate 400 may not be promoted. For example, Figure 3As shown in , when the first light is reflected by the “V”-shaped valley of the second concave-convex surface but not by the relatively flat upper surface (e.g., a substantially flat surface not including the “V”-shaped valley) of the second concave-convex surface, the first light is diffusely reflected, and thus, destructive interference may not occur between the first light and the second light reflected by the polarizing plate 400. When the user sees the external light reflected in the peripheral area PA, even if the image is not displayed in the peripheral area PA, when the user sees the image displayed in the display area DA, the visibility of the image displayed in the display area DA may be degraded due to the external light.

[0089] In addition, since the second concavo-convex surface is formed by a plurality of wirings PL disposed below the second concavo-convex surface, the portion of the second concavo-convex surface that diffusely reflects light is therefore a portion corresponding to the plurality of wirings PL disposed below the second concavo-convex surface. Therefore, when the user recognizes the diffusely reflected light, this leads to the same consequence as the user recognizing the shape of the plurality of wirings PL disposed below the second concavo-convex surface. Of course, this deteriorates the overall image visibility of the display device.

[0090] However, as mentioned above, under Figure 3 In the display device of the exemplary embodiment of the present invention, the planarization layer 140 having a substantially flat upper surface covers the first conductive layer 1CL, and the second conductive layer 2CL having a substantially flat upper surface is located on the planarization layer 140. Therefore, the image visibility degradation as described above can be effectively prevented or reduced.

[0091] exist Figure 3 In the figure, no element is shown as being located between the second conductive layer 2CL and the polarizing plate 400. However, it will be understood that this is only for ease of illustration, and various components may be disposed between the pixel defining layer 150 covering the second conductive layer 2CL and the polarizing plate 400. Since the organic light-emitting devices may be damaged by external moisture or oxygen, etc., the encapsulation layer may cover and protect these organic light-emitting devices. Since the encapsulation layer may cover the display area DA and extend over at least a portion of the peripheral area PA, the encapsulation layer may also be located between the second conductive layer 2CL and the polarizing plate 400. The encapsulation layer may, for example, include a first inorganic encapsulation layer, an organic encapsulation layer, and a second inorganic encapsulation layer. In an exemplary embodiment, various components other than the encapsulation layer may also be located between the second conductive layer 2CL and the polarizing plate 400.

[0092] Figure 4 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Figure 4 The display device of the exemplary embodiment is similar to the above reference Figure 3 The display device described is different in that the second conductive layer 2CL has a through hole TH.

[0093] As described above, the planarization layer 140 is located on the first conductive layer 1CL including the upper surface having the second concavo-convex surface. In addition, since the planarization layer 140 includes an organic material, even when the first conductive layer 1CL having the second concavo-convex surface is disposed below the planarization layer 140, the upper surface of the planarization layer 140 has a substantially flat shape. Since the planarization layer 140 includes an organic material, gas may be generated by the planarization layer 140 during the manufacturing process after the planarization layer 140 is formed or during use after the manufacturing process is completed. When the gas is not discharged to the outside, the planarization layer 140 may subsequently expand. This may cause defects to occur in the conductive layer or wiring disposed above or below the planarization layer 140. Allowing the generated gas to be discharged to the outside can prevent these defects from occurring.

[0094] In accordance with Figure 4 In the display device of the exemplary embodiment of the present invention, the second conductive layer 2CL includes the through hole TH. Therefore, the gas generated by the planarization layer 140 having the organic material may be discharged to the outside through the through hole TH, and thus, the occurrence of the defects as described above may be effectively prevented or reduced.

[0095] The through hole TH of the second conductive layer 2CL may be located above the plurality of wirings PL. As described above, the second conductive layer 2CL reflects the light transmitted through the polarizing plate 400 and transmits the light again through the polarizing plate 400. However, since the second conductive layer 2CL includes the through hole TH, when the light transmitted through the polarizing plate 400 passes through the through hole TH, the light is not reflected by the second conductive layer 2CL, but is reflected by the conductive layer located below the second conductive layer 2CL. As described above, the upper surface of the first conductive layer 1CL has a second concave-convex surface. When the light is reflected by the relatively flat portion of the second concave-convex surface of the first conductive layer 1CL, image visibility degradation may not occur. However, as described above, when the light is reflected by the "V"-shaped valley instead of the relatively flat portion of the second concave-convex surface, the light is diffusely reflected, which may degrade image visibility. Therefore, in an exemplary embodiment, the through hole TH is located above the plurality of wirings PL, so that even if the light passing through the through hole TH is reflected by the upper surface of the first conductive layer 1CL, the light is reflected by the relatively flat upper surface. Therefore, light passing through the through hole TH may be reflected by a relatively flat portion of the upper surface of the first conductive layer 1CL rather than by a “V”-shaped valley of the upper surface of the first conductive layer 1CL, thereby preventing or reducing image visibility degradation.

[0096] The through hole TH in the second conductive layer 2CL may have various shapes. For example, as shown in FIG. Figure 5As shown in , the second conductive layer 2CL may have a through hole TH having a substantially circular shape. Alternatively, as shown in FIG. Figure 6 As shown in FIG. 1 , the through hole TH may have various shapes such as a square or a triangle in a plan view, and the size of the through hole TH may also be changed according to the position of the through hole TH. Figure 7 As shown in FIG. 1 , the second conductive layer 2CL does not include the through hole TH in the exemplary embodiment, but includes a plurality of wirings spaced apart from each other.

[0097] Figure 8 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Figure 8 The display device of the exemplary embodiment is similar to the above reference Figure 4 The display devices described differ in that, according to Figure 8 The display device of the exemplary embodiment further includes an additional insulating layer AIL filling the through holes TH of the second conductive layer 2CL. Figure 8 As shown in , an additional insulating layer AIL may be disposed between the second conductive layer 2CL and the polarizing plate 400 .

[0098] As described above, the second conductive layer 2CL may be formed on the planarization layer 140 simultaneously with the first pixel electrode 311 and the second pixel electrode 321 in the display area DA by using the same material as the first pixel electrode 311 and the second pixel electrode 321. As described above, the pixel defining layer 150 covering the edges of the first pixel electrode 311 and the second pixel electrode 321 is located in the display area DA. Therefore, when the pixel defining layer 150 is formed, the additional insulating layer AIL may be formed simultaneously with the pixel defining layer 150 by using the same material as the pixel defining layer 150. In addition, the additional insulating layer AIL may be formed integrally with the pixel defining layer 150. In this case, the additional insulating layer AIL may be understood as a portion of the pixel defining layer 150 extending outside the display area DA.

[0099] Figure 8 The exemplary embodiments are not limited thereto. For example, in an exemplary embodiment, the additional insulating layer AIL does not include the same material as the pixel defining layer 150, and may include an inorganic material. In the figures of the exemplary embodiments to be described later, for convenience, it is shown that the additional insulating layer AIL does not include the same material as the pixel defining layer 150. However, in the exemplary embodiments to be described later, the additional insulating layer AIL may include the same material as the pixel defining layer 150, and the height of the additional insulating layer AIL may be the same as the height of the pixel defining layer 150.

[0100] Fig. 9 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Fig. 9 As shown in FIG. 1 , in an exemplary embodiment, the additional insulating layer AIL fills the through hole TH of the second conductive layer 2CL and exposes at least a portion of the upper surface of the second conductive layer 2CL. The counter electrodes 315 and 325 in the display area DA extend to the outside of the display area DA and contact the upper surface of the second conductive layer 2CL.

[0101] As described above, the first display device 310 as an organic light emitting device includes a first pixel electrode 311, a counter electrode 315, and an intermediate layer 313 including an emission layer disposed between the first pixel electrode 311 and the counter electrode 315. The structure of the second display device 320 is the same as that of the first display device 310. In an exemplary embodiment, the counter electrode 315 of the first display device 310 and the counter electrode 325 of the second display device 320, which are organic light emitting devices formed integrally, are maintained at a constant potential. For this purpose, the counter electrodes 315 and 325 may be in contact with the second conductive layer 2CL in an area outside the display area DA, and may be maintained at a constant potential through the second conductive layer 2CL. The second conductive layer 2CL may be connected to the first conductive layer 1CL disposed below the second conductive layer 2CL through a contact hole formed in the planarization layer 140, and may have the same potential as the first conductive layer 1CL. For example, when the first conductive layer 1CL is electrically connected to an electronic device such as an integrated circuit or a printed circuit board, the first conductive layer 1CL and the second conductive layer 2CL are connected to each other, and the counter electrodes 315 and 325 are in contact with the second conductive layer 2CL. Therefore, when the display device is driven, the counter electrodes 315 and 325 can be maintained at a constant potential.

[0102] Fig.10 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Fig.10 As shown in FIG. 1 , in an exemplary embodiment, the second conductive layer 2CL may include a first portion 2CLP1 and a second portion 2CLP2 spaced apart from the first portion 2CLP1 .

[0103] In this case, the space between the first portion 2CLP1 and the second portion 2CLP2 may be located above any one of the plurality of wirings PL. For example, in an exemplary embodiment, the space between the first portion 2CLP1 and the second portion 2CLP2 is aligned with any one of the plurality of wirings PL. As described above, the second conductive layer 2CL reflects the light transmitted through the polarizing plate 400 and transmits the light again through the polarizing plate 400. However, since the second conductive layer 2CL has the first portion 2CLP1 and the second portion 2CLP2 spaced apart from each other, when the light transmitted through the polarizing plate 400 passes through the space between the first portion 2CLP1 and the second portion 2CLP2, the light is reflected by the conductive layer located below the second conductive layer 2CL and not by the second conductive layer 2CL. As described above, the upper surface of the first conductive layer 1CL has a second concave-convex surface. When light is reflected by a relatively flat portion of the second concave-convex surface of the first conductive layer 1CL, image visibility degradation may not occur. However, as described above, when light is reflected by the "V"-shaped valley rather than by the relatively flat portion of the second concave-convex surface, the light is diffusely reflected, which may cause degradation in image visibility. Therefore, the space between the first portion 2CLP1 and the second portion 2CLP2 of the second conductive layer 2CL may be located above one of the plurality of wirings PL, so that even if light passing through the space between the first portion 2CLP1 and the second portion 2CLP2 of the second conductive layer 2CL is reflected by the upper surface of the first conductive layer 1CL, the light is reflected by the relatively flat upper surface. Therefore, light passing through the space between the first portion 2CLP1 and the second portion 2CLP2 of the second conductive layer 2CL may be reflected by the relatively flat portion of the upper surface of the first conductive layer 1CL rather than by the "V"-shaped valley of the upper surface of the first conductive layer 1CL, thereby preventing or reducing degradation in image visibility.

[0104] Fig.11 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Fig.11 An exemplary embodiment of a display device according to Fig.10 The display device of the exemplary embodiment of Fig.11 The display device of the exemplary embodiment further includes an additional insulating layer AIL filling a space between the first portion 2CLP1 and the second portion 2CLP2 of the second conductive layer 2CL. Fig.11 As shown in , an additional insulating layer AIL may be disposed between the second conductive layer 2CL and the polarizing plate 400 .

[0105] exist Fig.11 In the embodiment, the material of the additional insulating layer AIL is different from the material of the pixel defining layer 150 in the display area DA, and the thickness of the additional insulating layer AIL is different from the thickness of the pixel defining layer 150. However, Fig.11 The exemplary embodiments are not limited thereto. For example, in an exemplary embodiment, when the pixel defining layer 150 is formed, the additional insulating layer AIL may be formed simultaneously with the pixel defining layer 150 by using the same material as the pixel defining layer 150. In addition, the additional insulating layer AIL may be formed integrally with the pixel defining layer 150. In this case, the additional insulating layer AIL may be understood as a portion of the pixel defining layer 150 extending outside the display area DA.

[0106] Fig.12 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Fig.12 As shown in FIG. 1 , in an exemplary embodiment, the additional insulating layer AIL fills the space between the first portion 2CLP1 and the second portion 2CLP2 of the second conductive layer 2CL and exposes at least a portion of the upper surface of the first portion 2CLP1. The counter electrodes 315 and 325 of the display area DA extend outside the display area DA and contact the upper surface of the first portion 2CLP1.

[0107] By adopting such a structure, the counter electrodes 315 and 325 may be in contact with the first portion 2CLP1 of the second conductive layer 2CL in the area outside the display area DA, and maintained at a constant potential through the first portion 2CLP1. The first portion 2CLP1 of the second conductive layer 2CL may be connected to the first conductive layer 1CL below the second conductive layer 2CL through a contact hole formed in the planarization layer 140, and may have the same potential as the first conductive layer 1CL. For example, when the first conductive layer 1CL is electrically connected to an electronic device such as an integrated circuit or a printed circuit board, the first conductive layer 1CL and the first portion 2CLP1 of the second conductive layer 2CL are connected to each other, and the counter electrodes 315 and 325 are in contact with the first portion 2CLP1 of the second conductive layer 2CL. Therefore, when the display device is driven, the counter electrodes 315 and 325 may be maintained at a constant potential.

[0108] The second portion 2CLP2 of the second conductive layer 2CL may be electrically connected to the first pixel electrode 311 in the display area DA. Fig.19As described, a power line VDD is provided in the display area DA, and the power line VDD is electrically connected to the source electrode or the drain electrode of the first thin film transistor 210. As a result, the power line VDD is electrically connected to the first pixel electrode 311 of the first display device 310. The power line VDD may be arranged to cross the display area DA and may be electrically connected to the second portion 2CLP2 of the second conductive layer 2CL in an area outside the display area DA. For example, when the second portion 2CLP2 of the second conductive layer 2CL is electrically connected to an electronic device such as an integrated circuit or a printed circuit board, the second portion 2CLP2 of the second conductive layer 2CL is electrically connected to the power line VDD, and the power line VDD is electrically connected to the first pixel electrode 311 of the first display device 310 through the first thin film transistor 210. Therefore, power required for driving the first display device 310 may be supplied to the first display device 310.

[0109] The case where the first gate electrode 213 of the first thin film transistor 210 and the second gate electrode 223 of the second thin film transistor 220 are located on the same layer has been described above. However, the exemplary embodiment is not limited thereto. For example, as shown in FIG. 1 , which is a cross-sectional view of a portion of a display device according to an exemplary embodiment Fig.13 As shown in , in addition to the first gate insulating layer 121, a second gate insulating layer 122 covering the first gate electrode 213 of the first thin film transistor 210 may be provided, and the second gate electrode 223 of the second thin film transistor 220 may be located on the second gate insulating layer 122. For example, the first gate electrode 213 and the second gate electrode 223 may be located on different layers. The first source electrode 215a, the first drain electrode 215b, the second source electrode 225a, and the second drain electrode 225b are located on the first interlayer insulating layer 131 covering the second gate electrode 223. The second gate insulating layer 122 may include an inorganic material such as silicon oxide, silicon nitride, and / or silicon oxynitride.

[0110] In this case, the plurality of wirings PL may include a plurality of first wirings PL1 and a plurality of second wirings PL2. The plurality of first wirings PL1 may be located on the same layer on which the first gate electrode 213 of the first thin film transistor 210 is disposed, and the plurality of second wirings PL2 may be located on the same layer on which the second gate electrode 223 of the second thin film transistor 220 is disposed. For example, during manufacture of the display device, the plurality of first wirings PL1 may be formed simultaneously with the first gate electrode 213 of the first thin film transistor 210 by using the same material as the material used to form the first gate electrode 213 of the first thin film transistor 210, and the plurality of second wirings PL2 may be formed simultaneously with the second gate electrode 223 of the second thin film transistor 220 by using the same material as the material used to form the second gate electrode 223 of the second thin film transistor 220.

[0111] In addition, the positions of the plurality of first wirings PL1 and the plurality of second wirings PL2 may alternate with each other. The plurality of second wirings PL2 may be positioned to correspond to the spaces between the plurality of first wirings PL1. When the number of wirings PL increases in the peripheral area PA and all the plurality of wirings PL are located on the same layer, the intervals between the wirings PL decrease, and a short circuit may occur between the wirings PL. However, the plurality of first wirings PL1 and the plurality of second wirings PL2 alternate with each other, so that the second gate insulating layer 122 is disposed between the plurality of first wirings PL1 and the plurality of second wirings PL2, thereby effectively preventing the occurrence of a short circuit.

[0112] Even in this case, since the plurality of first wirings PL1 are disposed below the second gate insulating layer 122, the upper surface of the second gate insulating layer 122 is not flat. Similarly, the upper surface of the first interlayer insulating layer 131 covering the second gate insulating layer 122 and the plurality of second wirings PL2 is not flat. Figure 3 The upper surface of the first interlayer insulating layer 131 of the display device of the exemplary embodiment, etc., Fig.13 The upper surface of the first interlayer insulating layer 131 has a first concavo-convex surface having a “V”-shaped valley at a position corresponding to the space between the plurality of wirings PL. Fig.13 In the embodiment, the first conductive layer 1CL provided above the first interlayer insulating layer 131 further has an upper surface having a second concavo-convex surface corresponding to the first concavo-convex surface.

[0113] In accordance with Fig.13 In the display device of the exemplary embodiment, similar to Figure 3 In the display device of the exemplary embodiment, the planarization layer 140 having a substantially flat upper surface covers the first conductive layer 1CL, and the second conductive layer 2CL having a substantially flat upper surface is located on the planarization layer 140. Therefore, problems due to diffuse reflection and the like can be effectively prevented or reduced.

[0114] Can be modified in various ways according to Fig.13 For example, except that the plurality of wirings PL include a plurality of first wirings PL1 and a plurality of second wirings PL2 and the plurality of first wirings PL1 and the plurality of second wirings PL2 are located on different layers, according to the above reference Figures 4 to 12 All features of the described exemplary embodiments are equally applicable to Fig.13 display device.

[0115] The case where the first source electrode 215a and the first drain electrode 215b of the first thin film transistor 210 and the second source electrode 225a and the second drain electrode 225b of the second thin film transistor 220 are located on the same layer has been described above. However, the exemplary embodiments are not limited thereto. For example, Fig.14 A cross-sectional view of a portion of a display device according to an exemplary embodiment is shown, in which, in addition to the first interlayer insulating layer 131 covering the first gate electrode 213 or the second gate electrode 223, a second interlayer insulating layer 132 covering the first source electrode 215a and the first drain electrode 215b of the first thin film transistor 210 may be included, and the second source electrode 225a and the second drain electrode 225b of the second thin film transistor 220 may be located on the second interlayer insulating layer 132. The first source electrode 215a and the first drain electrode 215b may be disposed on a layer different from the layer on which the second source electrode 225a and the second drain electrode 225b are disposed. The second interlayer insulating layer 132 may be formed of an organic material such as PI or HMDSO. In an exemplary embodiment, the first source electrode 215a and the first drain electrode 215b may include the same material as the second source electrode 225a and the second drain electrode 225b, and may have the same structure as the second source electrode 225a and the second drain electrode 225b.

[0116] In this case, in the peripheral area PA, the first conductive layer 1CL located above the first interlayer insulating layer 131 covering the plurality of wirings PL may be covered by the second interlayer insulating layer 132. The second interlayer insulating layer 132 may be formed to have a substantially flat upper surface by including an organic material. Therefore, the second conductive layer 2CL is formed on the second interlayer insulating layer 132 so that the upper surface of the second conductive layer 2CL is also substantially flat. Therefore, external light may be reflected by the second conductive layer 2CL having a substantially flat upper surface before reaching the first conductive layer 1CL having an uneven upper surface. For example, Fig.14 The second interlayer insulating layer 132 of the display device of the exemplary embodiment is understood to function as the planarization layer 140 of the display device according to the above-described exemplary embodiment.

[0117] Since the second conductive layer 2CL is located on the second interlayer insulating layer 132, the first conductive layer 1CL can be formed simultaneously with the first source electrode 215a and the first drain electrode 215b by using the same material as the first source electrode 215a and the first drain electrode 215b of the first thin film transistor 210 in the same layer as the first source electrode 215a and the first drain electrode 215b. In addition, the second conductive layer 2CL can be formed simultaneously with the second source electrode 225a and the second drain electrode 225b by using the same material as the second source electrode 225a and the second drain electrode 225b of the second thin film transistor 220 in the same layer as the second source electrode 225a and the second drain electrode 225b. Fig.14 As shown in FIG. 1 , the second conductive layer 2CL is covered by the planarization layer 140 .

[0118] exist Fig.14In the embodiment, the second conductive layer 2CL is located on the same layer as the second source electrode 225a and the second drain electrode 225b of the second thin film transistor 220. However, the exemplary embodiment is not limited thereto. For example, in the exemplary embodiment, different from Fig.14 , there is no second thin film transistor 220, and the second display device 320 can be electrically connected to a thin film transistor 210 (such as Fig.13 In this case, the intermediate conductive layer may be located between the source electrode of the thin film transistor and the second display device 320. The position of the intermediate conductive layer may be the same as that of the thin film transistor. Fig.14 The position of the second source electrode 225a in the display device 310 is the same. For example, the source electrode of the thin film transistor disposed under the first display device 310 and the second display device 320 may be covered by the second interlayer insulating layer 132, and the intermediate conductive layer may be located on the second interlayer insulating layer 132. In this case, during the manufacture of the display device, the second conductive layer 2CL may be formed simultaneously with the intermediate conductive layer in the same layer as the intermediate conductive layer by using the same material as the material of the intermediate conductive layer. For reference, Figure 4 A case where the intermediate conductive layer is the second source electrode 225a is shown. This may also apply to exemplary embodiments and modifications thereof to be described later.

[0119] The second conductive layer 2CL located on the second interlayer insulating layer 132 may have a through hole or may have a first portion and a second portion spaced apart from each other. Figures 4 to 12 The description provided may be applicable to the structure of the second conductive layer 2CL. When the second conductive layer 2CL has a through hole or has a first portion and a second portion spaced apart from each other, the through hole or the space between the first portion and the second portion is filled with a planarization layer 140. Therefore, the planarization layer 140 may be understood as an additional insulating layer that fills the through hole in the second conductive layer 2CL or fills the space between the first portion and the second portion in the second conductive layer 2CL. For example, the additional insulating layer may be understood as a portion formed by extending the planarization layer 140 in the display area DA to the outside of the display area DA. The planarization layer 140 may have a discontinuous portion outside the display area DA.

[0120] exist Fig.14, the first source electrode 215a and the first drain electrode 215b are located on a layer different from the layer on which the second source electrode 225a and the second drain electrode 225b are disposed. However, exemplary embodiments are not limited thereto. For example, in exemplary embodiments, similar to the first source electrode 215a and the first drain electrode 215b, the second source electrode 225a and the second drain electrode 225b may be located on the first interlayer insulating layer 131, and a conductive layer may be located on the second interlayer insulating layer 132 to serve as a wiring or connection layer. In this case, similar to the first source electrode 215a, the first drain electrode 215b, the second source electrode 225a, and the second drain electrode 225b, the first conductive layer 1CL may be located on the first interlayer insulating layer 131, and similar to the conductive layer used for serving as a wiring or connection layer in the display area DA, the second conductive layer 2CL may be located on the second interlayer insulating layer 132. Therefore, even in this case, a display device such as the one shown in FIG. 1 may be used in the peripheral area PA. Fig.14 The same structure as shown in .

[0121] Fig.15 is a schematic cross-sectional view of a portion of a display device according to an exemplary embodiment. Fig.14 The display device described, according to Fig.15 The display device of the exemplary embodiment further includes a third conductive layer 3CL located on the planarization layer 140 covering the second conductive layer 2CL. In this case, since the third conductive layer 3CL is located on the same layer as the first pixel electrode 311 in the display area DA, the third conductive layer 3CL can be formed simultaneously with the first pixel electrode 311 by using the same material as the first pixel electrode 311 during the manufacture of the display device.

[0122] When the second conductive layer 2CL is Fig.14 When the second conductive layer 2CL is located on the second interlayer insulating layer 132 as shown in , the second conductive layer 2CL may include a plurality of interconnections spaced apart from each other. When the second conductive layer 2CL includes a plurality of interconnections spaced apart from each other, if a portion of the light transmitted through the polarizing plate 400 passes through the space between the interconnections, the portion of the light is reflected by the upper surface of the first conductive layer 1CL located below the second conductive layer 2CL and is not reflected by the second conductive layer 2CL. As described above, since the upper surface of the first conductive layer 1CL has the second concave-convex surface, the portion of the light may be diffusely reflected by the upper surface of the first conductive layer 1CL, thereby causing image visibility degradation as described above.

[0123] However, according to Fig.15In the display device of the exemplary embodiment of the present invention, since the third conductive layer 3CL is located above the second conductive layer 2CL, the light transmitted through the polarizing plate 400 is reflected by the third conductive layer 3CL. Therefore, even if the second conductive layer 2CL includes a plurality of interconnections spaced apart from each other, degradation of image visibility can be avoided. The third conductive layer 3CL may have a through hole. In this case, the through hole in the third conductive layer 3CL may be located on a plurality of interconnections in the second conductive layer 2CL.

[0124] like Fig.15 As shown in FIG. 1 , the planarization layer 140 is located between the second conductive layer 2CL and the third conductive layer 3CL having a plurality of interconnection lines. Therefore, the planarization layer 140 can be understood as an additional insulating layer filling the space between the plurality of interconnection lines. For example, the additional insulating layer can be understood as a portion of the planarization layer 140 in the display area DA that extends outside the display area DA. The planarization layer 140 may have a discontinuous portion outside the display area DA.

[0125] When the second conductive layer 2CL includes a plurality of interconnection lines spaced apart from each other, the third conductive layer 3CL may further include a plurality of additional wirings spaced apart from each other. Fig.16 2 is a plan view showing a case where the second conductive layer 2CL includes a plurality of interconnection lines spaced apart from each other and the third conductive layer 3CL includes a plurality of additional wiring lines spaced apart from each other. Fig.16 As shown in , the spaces between the plurality of additional wirings are located above the plurality of interconnect lines.

[0126] When the second conductive layer 2CL includes a plurality of interconnection lines spaced apart from each other, if a portion of light transmitted through the polarizing plate 400 passes through the space between the interconnection lines, the portion of light is reflected by the upper surface of the first conductive layer 1CL located below the second conductive layer 2CL rather than by the second conductive layer 2CL. As described above, since the upper surface of the first conductive layer 1CL has the second concavo-convex surface, the portion of light may be diffusely reflected by the upper surface of the first conductive layer 1CL, resulting in deterioration of image visibility.

[0127] However, according to Fig.16 In the display device of the exemplary embodiment of the present invention, since the space between the plurality of additional wirings in the third conductive layer 3CL located above the second conductive layer 2CL is located above the interconnection line in the second conductive layer 2CL, the light transmitted through the polarizing plate 400 is reflected by the substantially flat upper surface of the plurality of additional wirings in the third conductive layer 3CL or by the substantially flat upper surface of the plurality of interconnection lines in the second conductive layer 2CL without reaching the first conductive layer 1CL below the second conductive layer 2CL. Therefore, the occurrence of image visibility degradation due to diffuse reflection can be effectively prevented or reduced.

[0128] In an exemplary embodiment, the plurality of additional wirings provided in the third conductive layer 3CL do not correspond to the plurality of interconnection lines in the second conductive layer 2CL. Fig.17 As shown in , the third conductive layer 3CL may include a first portion 3CLP1 and a second portion 3CLP2 spaced apart from each other. In this case, the first portion 3CLP1 may be located above a first group including two or more interconnects among a plurality of interconnects in the second conductive layer 2CL, and the second portion 3CLP2 may be located above a second group including another two or more interconnects among a plurality of interconnects in the second conductive layer 2CL. The space between the first portion 3CLP1 and the second portion 3CLP2 may be located above a plurality of interconnects in the second conductive layer 2CL. Therefore, diffuse reflection by the first conductive layer 1CL may be prevented.

[0129] As a schematic plan view of a portion of a display device according to an exemplary embodiment Fig.18 As shown in , when the third conductive layer 3CL includes the first portion 3CLP1 and the second portion 3CLP2, the additional auxiliary insulating layer AIL' including an inorganic material or an organic material may fill the space between the first portion 3CLP1 and the second portion 3CLP2 of the third conductive layer 3CL, but may expose at least a portion of the upper surface of the first portion 3CLP1. The counter electrodes 315 and 325 in the display area DA may extend outside the display area DA and contact the upper surface of the first portion 3CLP1.

[0130] By adopting such a structure, the counter electrodes 315 and 325 may be in contact with the first portion 3CLP1 of the third conductive layer 3CL in the area outside the display area DA, and may be maintained at a constant potential through the first portion 3CLP1. The first portion 3CLP1 of the third conductive layer 3CL may be connected to the first conductive layer 1CL and / or the second conductive layer 2CL below the third conductive layer 3CL through a contact hole formed in the planarization layer 140. For example, when the first conductive layer 1CL and / or the second conductive layer 2CL are electrically connected to an electronic device such as an integrated circuit or a printed circuit board, the first conductive layer 1CL and / or the second conductive layer 2CL and the first portion 3CLP1 of the third conductive layer 3CL are connected to each other, and the counter electrodes 315 and 325 are in contact with the first portion 3CLP1 of the third conductive layer 3CL. Therefore, when the display device is driven, the counter electrodes 315 and 325 may be maintained at a constant potential.

[0131] The second portion 3CLP2 of the third conductive layer 3CL may be electrically connected to the first pixel electrode 311 in the display area DA. Fig.19As shown in , the power line VDD exists in the display area DA, and the power line VDD is electrically connected to the source electrode or the drain electrode of the first thin film transistor 210 in the first pixel PX1. As a result, the power line VDD is electrically connected to the first pixel electrode 311 of the first display device 310. The power line VDD may be arranged to cross the display area DA and may be electrically connected to the second portion 3CLP2 of the third conductive layer 3CL in the area outside the display area DA. For example, when the second portion 3CLP2 of the third conductive layer 3CL is electrically connected to an electronic device such as an integrated circuit or a printed circuit board, the second portion 3CLP2 of the third conductive layer 3CL is electrically connected to the power line VDD, and the power line VDD is electrically connected to the first pixel electrode 311 of the first display device 310 through the first thin film transistor 210. Therefore, power required for driving the first display device 310 may be supplied to the first display device 310.

[0132] Fig.19 A power line VDD, a data line DL substantially parallel to the power line VDD, and a scan line SL extending in a direction intersecting the data line DL are shown. Such a data line DL transmits a data signal to the first display device 310, etc. The data signal is transmitted to the data line DL from an integrated circuit or a printed circuit board located in the peripheral area PA via a plurality of wirings PL. The data line DL may be formed integrally with the plurality of wirings PL. Alternatively, the data line DL may be located on a layer different from the layer on which the plurality of wirings PL are disposed, but may be electrically connected to the plurality of wirings PL via a contact hole, etc.

[0133] The scan line SL applies a scan signal to a plurality of display devices located on the same row at the same time. The scan signal may be generated in a drive circuit unit located in a peripheral area PA disposed around the display area DA. The drive circuit unit may include, for example, a shift register. Figures 15 to 17 In the exemplary embodiment described, the plurality of interconnection lines in the second conductive layer 2CL may be electrically connected to the driving circuit unit. For example, the plurality of interconnection lines may transmit electrical signals from an integrated circuit or a printed circuit board located in the peripheral area PA to the driving circuit unit, and the driving circuit unit may generate electrical signals to be applied to the display area DA.

[0134] Although various exemplary embodiments have been described above, the exemplary embodiments are not limited thereto. For example, a display device in which a substrate has a display area and a peripheral area disposed outside the display area includes: an interlayer insulating layer in the peripheral area, the interlayer insulating layer including a first upper surface having a first concave-convex surface; a first conductive layer, the first conductive layer being located on the interlayer insulating layer in the peripheral area, the first conductive layer including an upper surface having a second concave-convex surface corresponding to the first concave-convex surface; a planarization layer, the planarization layer being located on the first conductive layer and having a substantially flat upper surface; a second conductive layer, the second conductive layer being located on the planarization layer and having a substantially flat upper surface; and a polarizing plate, the polarizing plate being located on the second conductive layer. This configuration can effectively prevent image visibility degradation due to the first concave-convex surface of the first conductive layer by means of a second conductive layer having a substantially flat upper surface.

[0135] Descriptions of features or aspects within each exemplary embodiment should typically be considered as available for other similar features or aspects in other exemplary embodiments, unless the context clearly dictates otherwise.

[0136] Although one or more exemplary embodiments have been described with reference to the drawings, a person skilled in the art will understand that various changes in form and details may be made therein without departing from the spirit and scope of the present disclosure.

Claims

1. A display device, in, The display device comprises: a substrate, the substrate comprising a display area and a peripheral area disposed outside the display area; a plurality of wirings disposed in the peripheral region; an interlayer insulating layer covering the plurality of wirings, wherein the interlayer insulating layer includes an upper surface having a first concavo-convex surface corresponding to the plurality of wirings; a first conductive layer disposed on the interlayer insulating layer and including a second upper surface having a second concavo-convex surface corresponding to the first concavo-convex surface; a planarization layer, the planarization layer being disposed on the first conductive layer and having a flat upper surface; a second conductive layer disposed on the planarization layer and having a flat upper surface, wherein the second conductive layer includes a through hole, and when viewed in a direction perpendicular to the substrate, the through hole overlaps with a corresponding wiring of the plurality of wirings; a polarizing plate disposed on the second conductive layer; and An additional insulating layer is disposed between the second conductive layer and the polarizing plate, and the additional insulating layer fills the through hole.

2. The display device according to claim 1, in, The additional insulating layer is a portion of the pixel defining layer extending outside the display area, or the additional insulating layer exposes at least a portion of the upper surface of the second conductive layer.

3. The display device according to claim 1, in, The display device further includes: A light emitting device is provided in the display area, and the light emitting device comprises: a pixel electrode; an intermediate layer, the intermediate layer comprising an emission layer; and a counter electrode, wherein the pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, The counter electrode extends to the peripheral region and contacts the upper surface of the second conductive layer.

4. The display device according to claim 3, in, The second conductive layer and the pixel electrode are arranged on the same layer.

5. The display device according to claim 3, in, The second conductive layer is electrically connected to the first conductive layer.

6. A display device, in, The display device comprises: a substrate, the substrate comprising a display area and a peripheral area disposed outside the display area; a plurality of wirings disposed in the peripheral region; an interlayer insulating layer covering the plurality of wirings, wherein the interlayer insulating layer includes an upper surface having a first concavo-convex surface corresponding to the plurality of wirings; a first conductive layer disposed on the interlayer insulating layer and including a second upper surface having a second concavo-convex surface corresponding to the first concavo-convex surface; a planarization layer, the planarization layer being disposed on the first conductive layer and having a flat upper surface; a second conductive layer, the second conductive layer being disposed on the planarization layer and having a flat upper surface, wherein the second conductive layer includes a first portion and a second portion spaced apart from each other; a polarizing plate disposed on the second conductive layer; and An additional insulating layer fills a space between the first portion and the second portion, wherein the additional insulating layer exposes at least a portion of an upper surface of the first portion.

7. The display device according to claim 6, in, A space between the first portion and the second portion is aligned with one of the plurality of wirings.

8. The display device according to claim 6, in, The additional insulating layer is disposed between the second conductive layer and the polarizing plate.

9. The display device according to claim 8, in, The display device further includes: A light emitting device is provided in the display area, and the light emitting device comprises: a pixel electrode; an intermediate layer, the intermediate layer comprising an emission layer; and a counter electrode, wherein the pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, Wherein, the counter electrode extends to the peripheral region and contacts the upper surface of the first portion.

10. The display device according to claim 9, in, The second conductive layer and the pixel electrode are arranged on the same layer.

11. The display device according to claim 9, in, The first portion is electrically connected to the first conductive layer.

12. The display device according to claim 9, in, The second portion is electrically connected to the pixel electrode.

13. The display device according to any one of claims 1 to 12, in, The plurality of wirings include a plurality of first wirings and a plurality of second wirings.

14. The display device according to claim 13, in, The plurality of first wirings and the plurality of second wirings are alternately arranged.

15. The display device according to claim 13, in, The display device further includes: a first gate insulating layer disposed under the plurality of first wirings; and a second gate insulating layer, the second gate insulating layer being provided under the interlayer insulating layer and covering the plurality of first wirings, The plurality of second wirings are disposed on the second gate insulating layer and correspond to spaces between the plurality of first wirings.

16. A display device, in, The display device comprises: a substrate, the substrate comprising a display area and a peripheral area disposed outside the display area; a plurality of wirings disposed in the peripheral region; an interlayer insulating layer covering the plurality of wirings, wherein the interlayer insulating layer includes an upper surface having a first concavo-convex surface corresponding to the plurality of wirings; a first conductive layer disposed on the interlayer insulating layer and including a second upper surface having a second concavo-convex surface corresponding to the first concavo-convex surface; a planarization layer, the planarization layer being disposed on the first conductive layer and having a flat upper surface; a second conductive layer, the second conductive layer being disposed on the planarization layer and having a flat upper surface, wherein the second conductive layer comprises a plurality of interconnection lines; a polarizing plate disposed on the second conductive layer; and a driving circuit disposed in the peripheral region, wherein the driving circuit generates an electrical signal to be applied to a plurality of display devices disposed in the display region, Wherein, the plurality of interconnection lines are electrically connected to the driving circuit.

17. The display device according to claim 16, in, The display device further includes: An additional insulating layer fills the spaces between the plurality of interconnection lines.

18. The display device according to claim 17, in, The additional insulating layer is disposed between the second conductive layer and the polarizing plate.

19. A display device, in, The display device comprises: a substrate, the substrate comprising a display area and a peripheral area disposed outside the display area; a plurality of wirings disposed in the peripheral region; an interlayer insulating layer covering the plurality of wirings, wherein the interlayer insulating layer includes an upper surface having a first concavo-convex surface corresponding to the plurality of wirings; a first conductive layer disposed on the interlayer insulating layer and including a second upper surface having a second concavo-convex surface corresponding to the first concavo-convex surface; a planarization layer, the planarization layer being disposed on the first conductive layer and having a flat upper surface; a second conductive layer, the second conductive layer being disposed on the planarization layer and having a flat upper surface, wherein the second conductive layer comprises a plurality of interconnection lines; a polarizing plate, wherein the polarizing plate is disposed on the second conductive layer; an additional insulating layer disposed between the second conductive layer and the polarizing plate and having a flat upper surface; and A third conductive layer is disposed between the additional insulating layer and the polarizing plate and has a flat upper surface.

20. The display device according to claim 19, in, The third conductive layer includes a plurality of additional wirings, and a plurality of spaces disposed between the plurality of additional wirings are disposed above the plurality of interconnection lines.

21. The display device according to claim 19, in, The third conductive layer includes a first portion and a second portion spaced apart from each other.

22. The display device according to claim 21, in, A space between the first portion and the second portion is disposed above the plurality of interconnection lines.

23. The display device according to claim 21, in, The display device further includes: A light emitting device is provided in the display area, and the light emitting device comprises: a pixel electrode; an intermediate layer, the intermediate layer comprising an emission layer; and a counter electrode, wherein the pixel electrode, the intermediate layer and the counter electrode are stacked in sequence, The counter electrode extends to the peripheral region and contacts an upper surface of the first portion.

24. The display device according to claim 23, in, The first portion is electrically connected to the first conductive layer.

25. The display device according to claim 23, in, The second portion is electrically connected to the pixel electrode.

26. The display device according to claim 23, in, The display device further includes: a first thin film transistor disposed below the light emitting device and including a first gate electrode and a first source electrode disposed above the first gate electrode; and an intermediate conductive layer, the intermediate conductive layer being disposed between the first source electrode and the light emitting device, The first conductive layer and the first source electrode are arranged on the same layer, and the second conductive layer and the intermediate conductive layer are arranged on the same layer.

27. The display device according to claim 26, in, The intermediate conductive layer is a second source electrode.

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