Display substrate and display device thereof

Abstract

The present disclosure provides a display substrate and a display device thereof. The display substrate includes: a substrate substrate including a display area and a peripheral area; a plurality of sub-pixels located in the display area, the sub-pixel including: a light-emitting element including a first electrode, a light-emitting layer, and a second electrode; a plurality of first power supply lines located in the display area; a first power supply bus located in the peripheral area, the first power supply bus being electrically connected to the plurality of first power supply lines; and a second power supply line located in the peripheral area and electrically connected to the second electrode, the second power supply line including a first portion and a second portion, the first portion surrounding a second boundary, a third boundary, and a fourth boundary of the display area, and the second portion being located on a side of the first power supply bus away from the display area. There is a gap between the first power supply bus and the second portion of the second power supply line. A positive projection of the gap on the substrate substrate at least partially overlaps a positive projection of the second electrode on the substrate substrate. The present disclosure can reduce interference between different signal lines.

Description

Technical Field

[0001] The present disclosure relates to the field of display technologies, and particularly to a display substrate and a display device thereof. Background Art

[0002] With the rapid development of AMOLED (Active Matrix Organic Light Emitting Diode), the development of smart terminals such as mobile phones has entered the era of full-screen and narrow bezels. In order to bring a better user experience, features such as full-screen, narrow bezels, high resolution, curling and wearable and / or folding will surely become important development directions for future AMOLEDs.

[0003] In related technologies, in order to make the display panel lighter and thinner to adapt to future folding and curling products, touch technologies have been developed. For example, the touch technology can be FMLOC (Flexible Multi Layer On Cell) technology. Summary of the Invention

[0004] The inventors of the present disclosure have found that in related technologies, signal interference may occur between touch electrode lines and data lines or GOA signal lines, resulting in poor display.

[0005] In view of this, embodiments of the present disclosure provide a display substrate to reduce signal interference.

[0006] According to one aspect of the embodiments of the present disclosure, there is provided a display substrate, including: a substrate substrate including a display area and a peripheral area surrounding the display area, the display area including a first boundary, a second boundary, a third boundary, and a fourth boundary; a plurality of sub-pixels located in the display area, at least one of the plurality of sub-pixels including: a light-emitting element including a first electrode located on the substrate substrate, a light-emitting layer located on a side of the first electrode away from the substrate substrate, and a second electrode located on a side of the light-emitting layer away from the substrate substrate; a plurality of first power supply lines located in the display area and electrically connected to the first electrodes of the plurality of sub-pixels; a first power supply bus located in the peripheral area on a side of the first boundary away from the display area, the first power supply bus being electrically connected to the plurality of first power supply lines; and a second power supply line located in the peripheral area and electrically connected to the second electrode, the second power supply line including a first portion and a second portion, the first portion surrounding the second boundary, the third boundary, and the fourth boundary of the display area, the second portion being located on a side of the first power supply bus away from the display area; wherein, there is a gap between the first power supply bus and the second portion of the second power supply line, and a positive projection of the gap on the substrate substrate at least partially overlaps a positive projection of the second electrode on the substrate substrate.

[0007] In some embodiments, the second part includes a first sub - part and a second sub - part, the first sub - part and the second sub - part are spaced apart and oppositely arranged; there is a first gap between the first sub - part and the first power bus, there is a second gap between the second sub - part and the first power bus, and at least one of the first gap and the second gap at least partially overlaps with the positive projection of the second electrode on the substrate.

[0008] In some embodiments, the first sub - part is close to the second boundary, and the second sub - part is close to the fourth boundary.

[0009] In some embodiments, the positive projections of the first gap and the second gap on the substrate are located inside the positive projection of the second electrode on the substrate.

[0010] In some embodiments, the display substrate further includes: a plurality of touch electrode lines located in the peripheral area, and the positive projections of the plurality of touch electrode lines on the substrate at least partially overlap with the positive projection of the gap on the substrate.

[0011] In some embodiments, the plurality of touch electrode lines include a plurality of first touch electrode lines and a plurality of second touch electrode lines. The first touch electrode lines surround a part of the first boundary, the second boundary, and the third boundary of the display area; the second touch electrode lines surround another part of the first boundary and the fourth boundary of the display area.

[0012] In some embodiments, the first touch electrode lines are transmission signal lines, and the second touch electrode lines are reception signal lines.

[0013] In some embodiments, the display substrate further includes: a flexible circuit board electrically connected to the plurality of touch electrode lines, the first power bus, and the second power line, and the flexible circuit board is configured to provide electrical signals to the plurality of touch electrode lines, the first power bus, and the second power line.

[0014] In some embodiments, the first power bus is used to receive a first voltage signal; the second power line is used to receive a second voltage signal; wherein, the first voltage signal is higher than the second voltage signal.

[0015] In some embodiments, at least one of the plurality of sub-pixels further includes a thin-film transistor and a connection electrode; the thin-film transistor includes: an active layer located on the substrate, a gate located on a side of the active layer away from the substrate, and a source and a drain located on a side of the gate away from the substrate; the connection electrode is located on a side of the thin-film transistor away from the substrate; wherein, the source or the drain is electrically connected to the connection electrode, and the connection electrode is electrically connected to the first electrode.

[0016] In some embodiments, the first power supply bus includes a first sub-electrode and a second sub-electrode, and at least a part of a positive projection of the first sub-electrode and the second sub-electrode on the substrate overlaps; the first sub-electrode and the source or the drain are located in the same layer; the second sub-electrode and the connection electrode are located in the same layer.

[0017] In some embodiments, the first part includes a first conductive part, a second conductive part, and a third conductive part; the second conductive part is located on a side of the first conductive part away from the substrate, the third conductive part is located on a side of the second conductive part away from the substrate, and the first conductive part, the second conductive part, and the third conductive part are electrically connected; the first conductive part and the source or the drain are located in the same layer. The second conductive part and the connection electrode are located in the same layer; the third conductive part and the first electrode are located in the same layer.

[0018] In some embodiments, the second part includes a fourth conductive part, the fourth conductive part and the source or the drain are located in the same layer, and are a structural layer integrally formed with the first conductive part.

[0019] In some embodiments, the display substrate further includes: an inorganic protection layer covering the second power supply line, wherein at least a part of the inorganic protection layer is between the second power supply line and the second electrode.

[0020] According to another aspect of the embodiments of the present disclosure, a display device is provided, including: the display substrate as described above.

[0021] In the above display substrate, the substrate substrate includes a display area and a peripheral area surrounding the display area. A plurality of sub-pixels are located in the display area. At least one of the plurality of sub-pixels includes a light-emitting element. The light-emitting element includes a first electrode located on the substrate substrate, a light-emitting layer located on a side of the first electrode away from the substrate substrate, and a second electrode located on a side of the light-emitting layer away from the substrate substrate. A plurality of first power supply lines are located in the display area and are electrically connected to the first electrodes of the plurality of sub-pixels. A first power supply bus is located in the peripheral area on a side of the first boundary away from the display area. The first power supply bus is electrically connected to the plurality of first power supply lines. A second power supply line is located in the peripheral area and is electrically connected to the second electrode. The second power supply line includes a first portion and a second portion. The first portion surrounds a second boundary, a third boundary, and a fourth boundary of the display area. The second portion is located on a side of the first power supply bus away from the display area. There is a gap between the first power supply bus and the second portion of the second power supply line. A positive projection of the gap on the substrate substrate at least partially overlaps a positive projection of the second electrode of the light-emitting element on the substrate substrate. That is, the second electrode of the light-emitting element covers above the gap. In this way, the second electrode of the light-emitting element can function as a signal shield, thereby reducing signal interference between the signal line above the gap and the signal line below the gap, and further improving the display effect of the display substrate.

[0022] Other features and advantages of the present disclosure will become clear from the following detailed description of exemplary embodiments of the present disclosure with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The drawings forming a part of the specification depict embodiments of the present disclosure and, together with the description, are used to explain the principles of the present disclosure.

[0024] With reference to the accompanying drawings, the present disclosure can be more clearly understood from the following detailed description, wherein:

[0025] Figure 1 is a top view showing a display substrate according to an embodiment of the present disclosure;

[0026] Figure 2 is shown in Figure 1 a magnified schematic view of a partial structure within the first dashed box 141 in;

[0027] Figure 3 is shown in Figure 1 a magnified schematic view of a partial structure within the second dashed box 142 in;

[0028] Figure 4 is shown Figure 3 a top view of the structure in after omitting the touch electrode line 410 and the second electrode 222;

[0029] Figure 5 is shownFigure 4 Top view of the structure in after adding the second electrode 222;

[0030] Figure 6 It is a schematic cross-sectional view showing the structure taken along line C-C' in ; Figure 3 It is a schematic cross-sectional view showing the structure taken along line C-C' in ;

[0031] Figure 7 It is a schematic cross-sectional view showing the structure taken along line B-B' in ; Figure 2 It is a schematic cross-sectional view showing the structure taken along line B-B' in ;

[0032] Figure 8 It is a schematic cross-sectional view showing the structure taken along line A-A' in ; Figure 1 It is a schematic cross-sectional view showing the structure taken along line A-A' in .

[0033] It should be understood that the dimensions of the various parts shown in the drawings are not drawn to actual scale. In addition, the same or similar reference numerals represent the same or similar components. Detailed Description of the Embodiments

[0034] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. The description of the exemplary embodiments is merely illustrative and in no way limits the present disclosure and its application or use. The present disclosure can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to make the present disclosure thorough and complete and to fully convey the scope of the present disclosure to those skilled in the art. It should be noted that: unless otherwise specifically stated, the relative arrangements of components and steps, the compositions of materials, numerical expressions and values set forth in these embodiments should be construed as merely exemplary and not as limitations.

[0035] The terms "first", "second" and similar terms used in the present disclosure do not denote any order, quantity or importance, but are merely used to distinguish different parts. Words such as "comprising" or "including" mean that the elements before the word cover the elements listed after the word and do not exclude the possibility of also covering other elements. Terms such as "upper", "lower", "left", "right" are only used to indicate relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0036] In the present disclosure, when it is described that a specific device is located between a first device and a second device, there may or may not be an intermediate device between the specific device and the first device or the second device. When it is described that a specific device is connected to other devices, the specific device may be directly connected to the other devices without an intermediate device, or may not be directly connected to the other devices and have an intermediate device.

[0037] All terms used in this disclosure (including technical or scientific terms) have the same meaning as understood by those of ordinary skill in the art to which this disclosure pertains, unless otherwise specifically defined. It should also be understood that terms defined in a general dictionary, for example, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense, unless specifically defined as such herein.

[0038] Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, such technologies, methods, and devices should be regarded as part of the specification.

[0039] The FMLOC (Flexible Multi Layer On Cell) technology is a touch technology. In the FMLOC technology, touch electrodes are fabricated on the encapsulation layer. In the FMLOC technology, in order to prevent signal crosstalk between the touch electrode lines and other traces on the backplane, the touch electrode lines can be signal-shielded through a common ground wire. However, the inventors of the present disclosure have found that in the related art, there is a gap between the power voltage line and the common ground wire at the corner region of the display substrate. A part of the touch electrode line is located above this gap, and there are other signal lines (such as data lines and / or GOA circuits (Gate Driver on Array, that is, the gate driving circuit)) below this gap. Since the signals in the touch electrode line, the data line, and the GOA signal line can all be AC signals. There is a parasitic capacitance between the touch electrode line and the data line or the GOA signal line. A signal change in one of these signal lines will affect the signal in another signal line. Therefore, signal interference may occur between the touch electrode line and the data line or the GOA signal line, resulting in poor display or poor touch.

[0040] In view of this, embodiments of the present disclosure provide a display substrate to reduce signal interference. The structure of the display substrate according to an embodiment of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0041] Figure 1 is a top view showing a display substrate according to an embodiment of the present disclosure. Figure 2 is shown in Figure 1 an enlarged schematic diagram of the local structure within the first dashed box 141. Figure 7 is shown along Figure 2 a cross-sectional schematic diagram of the structure taken along line B - B' in Figure 1 , Figure 2 and Figure 7 The display substrate will be described in detail below with reference to

[0042] As shown in Figure 1 ,Figure 2 and Figure 7 As shown in and

[0043] , the display substrate includes a substrate 100, a plurality of sub-pixels 200, a plurality of first power lines 311, a first power bus 310, and a second power line 320.

[0043] The substrate 100 may include a display area 110 and a peripheral area 120 surrounding the display area 110. The display area 110 includes a first boundary 111, a second boundary 112, a third boundary 113, and a fourth boundary 114. Here, the first boundary 111 is opposite to the third boundary 113, and the second boundary 112 is opposite to the fourth boundary 114.

[0044] The plurality of sub-pixels 200 are located in the display area 110. At least one of the plurality of sub-pixels 200 includes a light-emitting element 220, as Figure 7 shown. The light-emitting element 220 may include a first electrode 221 located on the substrate 100, a light-emitting layer 223 located on a side of the first electrode 221 away from the substrate 100, and a second electrode 222 located on a side of the light-emitting layer 223 away from the substrate 100. For example, the first electrode 221 is an anode, and the second electrode 222 is a cathode. For example, the second electrode 222 may receive a common ground voltage signal Vss.

[0045] It should be noted that in the embodiments of the present disclosure, when describing one structure on another structure, the one structure may be in direct contact with the other structure or may not be in direct contact with the other structure. For example, when describing that the first electrode 221 is located on the substrate 100, the first electrode 221 may be above the substrate 100 without being in direct contact with the substrate.

[0046] As Figure 1 shown, a plurality of first power lines 311 are located in the display area 110. The plurality of first power lines 311 are electrically connected to the first electrodes 221 of the plurality of sub-pixels. It should be noted that when describing that a specific device is electrically connected to other devices, the specific device may be directly electrically connected to the other devices without an intermediate device, or may not be directly electrically connected to the other devices but have an intermediate device. For example, the first power line 311 may be electrically connected to the first electrode 221 of the sub-pixel through a plurality of thin film transistors.

[0047] As Figure 1 shown, the first power bus 310 is located in the peripheral area 120 on a side of the first boundary 111 away from the display area 110. The first power bus 310 is closer to the first boundary 111 than the boundaries of other display areas. The first power bus 310 is electrically connected to the plurality of first power lines 311.

[0048] The second power supply line 320 is located in the peripheral area 120 and is electrically connected to the second electrode 222. The second power supply line 320 may include a first portion 321 and a second portion 322. The first portion 321 surrounds the second boundary 112, the third boundary 113, and the fourth boundary 114 of the display area 110. The second portion 322 is located on a side of the first power supply bus 310 away from the display area 110.

[0049] In some embodiments, the first power supply bus 310 is configured to receive a first voltage signal, and the second power supply line 320 is configured to receive a second voltage signal. The first voltage signal is higher than the second voltage signal. For example, the first power supply bus is configured to receive a power supply voltage signal Vdd, and the second power supply line is configured to receive a common ground voltage signal Vss.

[0050] There is a gap 331 or 332 between the first power supply bus 310 and the second portion 322 of the second power supply line 320. The positive projection of the gap 331 or 332 on the substrate 100 at least partially overlaps with the positive projection of the second electrode 222 on the substrate 100.

[0051] So far, a display substrate according to some embodiments of the present disclosure has been provided. In this display substrate, the substrate includes a display area and a peripheral area surrounding the display area. A plurality of sub-pixels are located in the display area. At least one of the plurality of sub-pixels includes a light-emitting element. The light-emitting element includes a first electrode located on the substrate, a light-emitting layer located on a side of the first electrode away from the substrate, and a second electrode located on a side of the light-emitting layer away from the substrate. A plurality of first power supply lines are located in the display area and are electrically connected to the first electrodes of the plurality of sub-pixels. The first power supply bus is located in the peripheral area on a side of the first boundary away from the display area. The first power supply bus is electrically connected to the plurality of first power supply lines. The second power supply line is located in the peripheral area and is electrically connected to the second electrode. The second power supply line includes a first portion and a second portion. The first portion surrounds the second boundary, the third boundary, and the fourth boundary of the display area. The second portion is located on a side of the first power supply bus away from the display area. There is a gap between the first power supply bus and the second portion of the second power supply line. The positive projection of the gap on the substrate at least partially overlaps with the positive projection of the second electrode of the light-emitting element on the substrate. That is, the second electrode of the light-emitting element covers above the gap. In this way, the second electrode of the light-emitting element can function as a signal shield, thereby reducing signal interference between the signal lines above the gap and the signal lines below the gap, and further improving the display effect of the display substrate.

[0052] In some embodiments, such as Figure 1As shown, the second part 322 of the second power supply line 320 may include a first sub - part 3221 and a second sub - part 3222. The first sub - part 3221 and the second sub - part 3222 are spaced apart and oppositely arranged. For example, the first sub - part 3221 is close to the second boundary 112, and the second sub - part 3222 is close to the fourth boundary 114. There is a first gap 331 between the first sub - part 3221 and the first power supply bus 310. There is a second gap 332 between the second sub - part 3222 and the first power supply bus 310. At least one of the first gap 331 and the second gap 332 overlaps at least partially with the orthographic projection of the second electrode 222 on the substrate 100.

[0053] In some embodiments, the orthographic projections of the first gap 331 and the second gap 332 on the substrate 100 are located inside the orthographic projection of the second electrode 222 on the substrate 100. This can enable the second electrode to completely cover these two gaps, thereby further reducing signal interference between different signal lines and improving the display effect of the display substrate.

[0054] In some embodiments, as Figure 1 shown, the display substrate may further include a plurality of touch - control electrode lines 410 located in the peripheral region 120. The orthographic projections of the plurality of touch - control electrode lines 410 on the substrate 100 overlap at least partially with the orthographic projection of the gap 331 or 332 on the substrate 100. Therefore, in the case where the second electrode 222 of the light - emitting element does not cover the gap 331 or 332, the touch - control electrode lines 410 may interfere with other signal lines. From this, it can be seen that the above - mentioned second electrode can play a good signal shielding role.

[0055] In some embodiments, as Figure 1 shown, the plurality of touch - control electrode lines 410 may include a plurality of first touch - control electrode lines 411 and a plurality of second touch - control electrode lines 412. The first touch - control electrode lines 411 surround a part of the first boundary 111, the second boundary 112, and the third boundary 113 of the display region 110. The second touch - control electrode lines 412 surround another part of the first boundary 111 and the fourth boundary 114 of the display region 110. For example, the first touch - control electrode lines 411 may be transmission signal lines, and the second touch - control electrode lines 412 may be reception signal lines; or the first touch - control electrode lines 411 may be reception signal lines, and the second touch - control electrode lines 412 may be transmission signal lines.

[0056] In some embodiments, as Figure 1As shown, the display substrate may further include a flexible circuit board 421 electrically connected to a plurality of touch electrode lines 410, a first power bus 310, and a second power line 320. The flexible circuit board 421 is configured to provide electrical signals to the plurality of touch electrode lines 410, the first power bus 310, and the second power line 320.

[0057] In some embodiments, as Figure 1 shown, the display substrate may further include a signal connection region 422 and an integrated circuit region 423. The integrated circuit region 423 is electrically connected to the display region 110 through the signal connection region 422. A plurality of data line leads are located in the signal connection region 422.

[0058] In some embodiments, as Figure 1 and Figure 2 shown, the display substrate may further include a first touch electrode 341 and a second touch electrode 342 located in the display region. The first touch electrode 341 is electrically connected to a first touch electrode line 411, and the second touch electrode 342 is electrically connected to a second touch electrode line 412. As Figure 2 shown, the touch signals between the first touch electrode 341 and the second touch electrode 342 are different. Additionally, Figure 2 the opening 211 of the sub-pixel is also shown in

[0059] Figure 3 is an enlarged schematic diagram showing the local structure within the second dashed box 142 in Figure 1 Figure 4 is a top view showing the structure in Figure 3 with the touch electrode lines 410 and the second electrode 222 omitted. Figure 4 The structure of Figure 4 omits the touch electrode lines 410 and the second electrode 222 to more clearly show the gap 331 (as shown by the dashed box in Figure 5 is a top view showing the structure in Figure 4 with the second electrode 222 added.

[0060] As Figure 3 , Figure 4 and Figure 5 shown, there is a gap (e.g., a first gap) 331 between the second part 322 of the first power bus 310 and the second power line 320. The orthographic projection of the first gap 331 on the substrate 100 at least partially overlaps with the orthographic projection of the second electrode 222 on the substrate 100. This can reduce signal interference between the touch electrode lines 410 and other signal lines ( Figures 3 to 5 not shown in

[0061] ​In some embodiments, it is possible to ensure that the second electrode is located above the gap while considering the alignment accuracy of the second electrode and the shadow effect. For example, considering the alignment accuracy and the size range of the shadow structure can be from -80 μm to -60 μm, or from 60 μm to 80 μm. Therefore, the second electrode can exceed the gap by 60 μm to 80 μm after covering the gap. Of course, those skilled in the art should understand that the design size range of the second electrode here is only exemplary, and the scope of the embodiments of the present disclosure is not limited thereto.

[0062] In some embodiments, the above-mentioned second electrode may be a whole-layer structure. In other embodiments, the above-mentioned second electrode may be a layer structure provided in blocks. For example, cathode signals can be supplied to these blocks of the second electrode respectively.

[0063] Figure 6 is a schematic cross-sectional view of the structure taken along line C-C' in Figure 3 . Here, a partial structure of the display substrate is described from the perspective of the cross-sectional view.

[0064] As Figure 6 shown, the display substrate may include a substrate 100, a buffer layer 151 on the substrate 100, and a first insulating layer 231 on the side of the buffer layer 151 away from the substrate 100. For example, the material of the first insulating layer 231 may include silicon dioxide, silicon nitride, etc.

[0065] As Figure 6 shown, the display substrate may further include a plurality of first signal lines 501 and a plurality of second signal lines 502 on the side of the first insulating layer 231 away from the substrate 100. For example, the first signal lines 501 and the second signal lines 502 may be data signal lines. The orthographic projections of the plurality of first signal lines 501 on the substrate 100 and the orthographic projections of the plurality of second signal lines 502 on the substrate 100 are alternately arranged, and the plurality of first signal lines 501 and the plurality of second signal lines 502 are provided in different layers. Such an arrangement of the signal lines 501 and 502 can save space.

[0066] Since a part of the plurality of first signal lines 501 and a part of the plurality of second signal lines 502 overlap at least partially with the orthographic projections of the gaps 331 or 332 on the substrate, the above-mentioned second electrode 222 can reduce the signal interference between the signal lines 501 or 502 and the touch electrode lines 410.

[0067] As Figure 6As shown, the display substrate may further include a second insulating layer 242 located between the plurality of first signal lines 501 and the plurality of second signal lines 502. For example, the material of the second insulating layer 242 may include silicon dioxide, silicon nitride, etc.

[0068] As Figure 6 shown, the display substrate may further include an interlayer dielectric layer 243 covering the plurality of second signal lines 502. The first power bus 310 and the second power supply line 320 are located on a side of the interlayer dielectric layer 243 away from the substrate 100.

[0069] In some embodiments, as Figure 6 shown, the first power bus 310 may include a first sub-electrode 3101 and a second sub-electrode 3102. The positive projection of the first sub-electrode 3101 and the second sub-electrode 3102 on the substrate 100 at least partially overlaps. For example, the first sub-electrode 3101 and the source or drain of the thin film transistor of the sub-pixel (to be described later) are located on the same layer, and the second sub-electrode 3102 and the connection electrode (to be described later) are located on the same layer.

[0070] It should be noted that "the same layer" refers to a layer structure formed by using the same film-forming process to form a film layer for forming a specific pattern, and then patterning the film layer by using the same mask through a single lithography process. According to the different specific patterns, a single lithography process may include multiple exposure, development or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous. These specific patterns may also be at different heights or have different thicknesses.

[0071] In some embodiments, as Figure 6 shown, the second part 322 of the second power supply line 320 includes a fourth conductive part. The fourth conductive part is located on the same layer as the source or drain of the thin film transistor. The fourth conductive part and the first conductive part of the first part (to be described later) are an integrally formed structural layer. That is, Figure 6 the second part 322 of the second power supply line 320 shown can be used as the fourth conductive part, and the fourth conductive part is on the same layer as the source or drain of the thin film transistor. As Figure 6 shown, there is a gap 331 (or gap 332) between the second power supply line 320 and the first power bus 310.

[0072] In some embodiments, as Figure 6 shown, the display substrate may further include an inorganic protection layer 511 covering the second power supply line 320. At least a part of the inorganic protection layer 511 is between the second power supply line 320 and the second electrode 222. For example, the material of the inorganic protection layer 511 may include an insulating material (such as silicon nitride, etc.).

[0073] By disposing the inorganic protection layer between the second power supply line 320 and the second electrode 222, the second power supply line 320 at the position of the peripheral region can be prevented from directly contacting the second electrode 222. Since the hydrophilicity of the inorganic protection layer is less than that of the second power supply line, it is possible to prevent moisture from invading the second power supply line due to the fragmentation of the shadow structure of the second electrode (for example, the cathode) (here, a shadow structure will appear in the edge region shielded by the mask during evaporation of the second electrode), and further prevent moisture from invading the display region through the water and oxygen channels formed on the side of the second power supply line. In this way, the failure of the organic material in the display region caused by moisture can be prevented, and further the problem of display failure of the display substrate can be prevented.

[0074] In some embodiments, as Figure 6 shown, the display substrate may further include a first planarization layer 521 covering the inorganic protection layer 511; and a second planarization layer 522 covering the first power supply bus 310 and the first planarization layer 521. For example, the materials of the first planarization layer 521 and the second planarization layer 522 may respectively include insulating materials (for example, organic insulating materials such as polyimide). The display substrate may further include a pixel defining layer 523 on the side of the second planarization layer 522 away from the substrate 100. As Figure 6 shown, the above-mentioned second electrode 222 covers the pixel defining layer 523, the second planarization layer 522, the first planarization layer 521, and the inorganic protection layer 511.

[0075] In some embodiments, as Figure 6 shown, the display substrate may further include a packaging layer 530 on the side of the second electrode 222 away from the substrate 100. For example, the packaging layer 530 may include: a first inorganic packaging layer 531 on the side of the second electrode 222 away from the substrate 100; an organic packaging layer 532 on the side of the first inorganic packaging layer 531 away from the substrate 100; and a second inorganic packaging layer 533 on the side of the organic packaging layer 532 away from the substrate 100. For example, the material of the first inorganic packaging layer 531 may include silicon nitride, etc., the material of the organic packaging layer 532 may include PMMA (poly(methylmethacrylate)), etc., and the material of the second inorganic packaging layer 533 may include silicon nitride, etc.

[0076] For example, the first inorganic packaging layer 531 can be formed on the second electrode 222 by a CVD (Chemical Vapor Deposition) process, then the organic packaging layer 532 can be formed on the first inorganic packaging layer 531 by an inkjet printing process, and then the second inorganic packaging layer 533 can be formed on the organic packaging layer 532 by a CVD process.

[0077] In some embodiments, as Figure 6 shown, the display substrate may further include a barrier layer 535 on a side of the encapsulation layer 530 away from the substrate 100. For example, the material of the barrier layer 535 may include an inorganic insulating material.

[0078] As Figure 6 shown, a plurality of touch electrode lines 410 are on a side of the barrier layer 535 away from the substrate 100. In some embodiments, as Figure 6 shown, each touch electrode line 410 may include a first wire 541 on the barrier layer 535 and a second wire 542 on a side of the first wire 541 away from the barrier layer 535. For example, the first wire 541 may include a Ti / Al / Ti (titanium / aluminum / titanium) three-layer structure, and the second wire 542 may include a Ti / Al / Ti (titanium / aluminum / titanium) three-layer structure.

[0079] As Figure 6 shown, the display substrate may further include: a third insulating layer 536 between the first wire 541 and the second wire 542. For example, the material of the third insulating layer 536 may include silicon nitride, silicon oxide, silicon oxynitride, etc. In each touch electrode line 410, the first wire 541 may be electrically connected to the second wire 542 through a first conductive via ( Figure 6 not shown in Figure 8 but can be seen in

[0080] In some embodiments, as Figure 6 shown, the display substrate may further include a covering layer 550 covering the plurality of touch electrode lines 410. For example, the material of the covering layer 550 may include an organic insulating material or an inorganic insulating material.

[0081] Figure 7 is a cross-sectional schematic view showing the structure taken along the line B-B' in Figure 2 .

[0082] As Figure 7 shown, at least one of the plurality of sub-pixels 200 may further include a thin film transistor 230 and a connection electrode 260 in addition to including a light-emitting element 220.

[0083] The thin film transistor 230 may include an active layer 232 located on the substrate 100, a gate 233 located on the side of the active layer 232 away from the substrate 100, and a source 234 and a drain 235 located on the side of the gate 233 away from the substrate 100. For example, the active layer 232 may be located on the buffer layer 151. A first insulating layer 231 is located between the active layer 232 and the gate 233. A second insulating layer 242 and an interlayer dielectric layer 243 are located between the gate and the source 234 / drain 235. The source 234 is electrically connected to the active layer 232 through a second conductive via. The second conductive via passes through the interlayer dielectric layer 243, the second insulating layer 242, and the first insulating layer 231. The drain 235 is electrically connected to the active layer 232 through a third conductive via. The third conductive via passes through the interlayer dielectric layer 243, the second insulating layer 242, and the first insulating layer 231.

[0084] As Figure 7 shown, the connection electrode 260 is located on the side of the thin film transistor 230 away from the substrate 100. The source 234 or the drain 235 is electrically connected to the connection electrode 260. The connection electrode 260 is electrically connected to the first electrode 221. For example, the connection electrode is electrically connected to the drain 235 through a fourth conductive via. The fourth conductive via passes through the first planarization layer 521 and the inorganic protection layer 511. The first electrode 221 is electrically connected to the connection electrode 260 through a fifth conductive via. The fifth conductive via passes through the second planarization layer 522.

[0085] In some embodiments, as Figure 7 shown, the display substrate may further include a capacitor between the interlayer dielectric layer 243 and the substrate 100. The capacitor includes a first capacitive electrode 611 on the side of the first insulating layer 231 away from the substrate 100 and a second capacitive electrode 612 on the side of the second insulating layer 242 away from the first capacitive electrode 611. The first capacitive electrode 611 may be in the same layer as the gate 233 and isolated from the gate 233. The second capacitive electrode 612 may be in the same layer as the second signal line 502 and is fabricated through the same patterning process as the second signal line. The second insulating layer 242 covers the first capacitive electrode 611, and the interlayer dielectric layer 243 covers the second capacitive electrode 612.

[0086] Here, the same patterning process means using the same film-forming process to form a film layer for forming a specific pattern, and then using the same mask to form a layer structure through a single patterning process. It should be noted that according to the different specific patterns, a single patterning process may include multiple exposure, development, or etching processes, and the specific patterns in the formed layer structure may be continuous or discontinuous, and these specific patterns may also be at different heights or have different thicknesses.

[0087] In some embodiments, as Figure 7 shown, the display substrate may further include a spacer layer 630 on a side of the pixel defining layer 523 away from the substrate 100. The second electrode 222 covers the spacer layer 630. For example, the material of the spacer layer 630 may include an inorganic insulating material, an organic insulating material, or the like.

[0088] In some embodiments, as Figure 7 shown, the first touch electrode 341 and the second touch electrode 342 are located on a side of the third insulating layer 536 away from the substrate 100. The cover layer 550 covers the first touch electrode 341 and the second touch electrode 342.

[0089] Figure 8 is a cross-sectional schematic view showing the structure taken along line A-A' in Figure 1 .

[0090] In some embodiments, as Figure 8 shown, the first portion 321 of the second power line 320 includes a first conductive portion 711, a second conductive portion 712, and a third conductive portion 713. The second conductive portion 712 is located on a side of the first conductive portion 711 away from the substrate 100. The third conductive portion 713 is located on a side of the second conductive portion 712 away from the substrate 100. The first conductive portion 711, the second conductive portion 712, and the third conductive portion 713 are electrically connected. The first conductive portion 711 and the source 234 or the drain 235 are located in the same layer. The second conductive portion 712 and the connection electrode 260 are located in the same layer. The third conductive portion 713 and the first electrode 221 are located in the same layer. The first conductive portion 711 of the first portion 321 and the fourth conductive portion of the second portion 322 of the second power line 320 are integrally formed structural layers. The material of the first conductive portion 711 is the same as that of the source 234 or the drain 235, and is formed by the same patterning process as the source and the drain. The material of the second conductive portion 712 is the same as that of the connection electrode 260, and is formed by the same patterning process as the connection electrode. The material of the third conductive portion 713 is the same as that of the first electrode 221, and is formed by the same patterning process as the first electrode 221. As Figure 8 shown, the third conductive portion 713 may be electrically connected to the second electrode 222.

[0091] In some embodiments, as Figure 8As shown, the display substrate may further include a first dam 810. The first dam 810 may include a portion 811 that is in the same layer as the second planarization layer 522 and a portion 812 that is in the same layer as the pixel defining layer 523. The display substrate may further include a second dam 820. The second dam 820 may include a portion 821 that is in the same layer as the second planarization layer 522, a portion 822 that is in the same layer as the pixel defining layer 523, and a portion 823 that is in the same layer as the spacer layer 630.

[0092] In addition, as Figure 8 shown, the first wire 541 may be electrically connected to the second wire 542 through a first conductive via.

[0093] Thus far, the display substrate according to some embodiments of the present disclosure has been described in detail.

[0094] In some embodiments of the present disclosure, a display device is further provided. The display device may include the display substrate as described above (e.g., Figure 1 the display substrate shown). For example, the display device may be: a display panel, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, or any other product or component having a display function.

[0095] Thus far, the embodiments of the present disclosure have been described in detail. To avoid obscuring the concept of the present disclosure, some details well known in the art are not described. Those skilled in the art can clearly understand how to implement the technical solutions disclosed herein based on the above description.

[0096] Although some specific embodiments of the present disclosure have been described in detail by way of examples, those skilled in the art should understand that the above examples are for illustrative purposes only and are not intended to limit the scope of the present disclosure. Those skilled in the art should understand that the above embodiments can be modified or some technical features can be equivalently replaced without departing from the scope and spirit of the present disclosure. The scope of the present disclosure is defined by the appended claims.

Claims

1. A display substrate, comprising: A substrate, including a display area and a peripheral area surrounding the display area, the display area including a first boundary, a second boundary, a third boundary, and a fourth boundary; A plurality of sub-pixels located in the display area, at least one of the plurality of sub-pixels including: a light-emitting element, including a first electrode located on the substrate, a light-emitting layer located on a side of the first electrode away from the substrate, and a second electrode located on a side of the light-emitting layer away from the substrate; A plurality of first power supply lines located in the display area and electrically connected to the first electrodes of the plurality of sub-pixels; A first power supply bus located in the peripheral area on a side of the first boundary away from the display area, the first power supply bus being electrically connected to the plurality of first power supply lines; and A second power supply line located in the peripheral area and electrically connected to the second electrode, the second power supply line including a first portion and a second portion, the first portion surrounding the second boundary, the third boundary, and the fourth boundary of the display area, the second portion being located on a side of the first power supply bus away from the display area; Wherein, there is a gap between the first power supply bus and the second portion of the second power supply line, and a positive projection of the gap on the substrate at least partially overlaps a positive projection of the second electrode on the substrate; The display substrate further includes: An inorganic protective layer covering the second power supply line, wherein at least a part of the inorganic protective layer is between the second power supply line and the second electrode, at least a part of the inorganic protective layer is directly covered by a part of the second electrode located in the peripheral area, and the hydrophilicity of the inorganic protective layer is less than the hydrophilicity of the second power supply line, and the material of the inorganic protective layer includes an insulating material.

2. The display substrate according to claim 1, wherein, The second portion includes a first sub-portion and a second sub-portion, the first sub-portion and the second sub-portion being spaced apart and oppositely arranged; There is a first gap between the first sub-portion and the first power supply bus, and a second gap between the second sub-portion and the first power supply bus, and at least one of the first gap and the second gap has a positive projection on the substrate that at least partially overlaps a positive projection of the second electrode on the substrate.

3. The display substrate according to claim 2, wherein, The first sub-portion is close to the second boundary, and the second sub-portion is close to the fourth boundary.

4. The display substrate according to claim 2, wherein, Positive projections of the first gap and the second gap on the substrate are located inside a positive projection of the second electrode on the substrate.

5. The display substrate according to claim 1, further comprising: A plurality of touch electrode lines located in the peripheral area, and a positive projection of the plurality of touch electrode lines on the substrate at least partially overlaps a positive projection of the gap on the substrate.

6. The display substrate according to claim 5, wherein The plurality of touch electrode lines include a plurality of first touch electrode lines and a plurality of second touch electrode lines, the first touch electrode lines surrounding a part of the first boundary, the second boundary, and the third boundary of the display area; The second touch electrode line surrounds the other part of the first boundary and the fourth boundary of the display area.

7. The display substrate according to claim 6, wherein, The first touch electrode line is a transmission signal line, and the second touch electrode line is a reception signal line.

8. The display substrate according to claim 5, further comprising: A flexible circuit board electrically connected to the plurality of touch electrode lines, the first power bus, and the second power line, the flexible circuit board being configured to provide electrical signals to the plurality of touch electrode lines, the first power bus, and the second power line.

9. The display substrate according to any one of claims 1 to 8, wherein, The first power bus is used to receive a first voltage signal; The second power line is used to receive a second voltage signal; Wherein, the first voltage signal is higher than the second voltage signal.

10. The display substrate according to claim 9, wherein, At least one of the plurality of sub-pixels further includes a thin film transistor and a connection electrode; The thin film transistor includes: an active layer located on the substrate, a gate located on a side of the active layer away from the substrate, and a source and a drain located on a side of the gate away from the substrate; The connection electrode is located on a side of the thin film transistor away from the substrate; Wherein, the source or the drain is electrically connected to the connection electrode, and the connection electrode is electrically connected to the first electrode.

11. The display substrate according to claim 10, wherein, The first power bus includes a first sub-electrode and a second sub-electrode, and at least a part of the orthographic projection of the first sub-electrode and the second sub-electrode on the substrate overlaps; The first sub-electrode and the source or the drain are located on the same layer; The second sub-electrode and the connection electrode are located on the same layer.

12. The display substrate according to claim 10, wherein, The first part includes a first conductive part, a second conductive part, and a third conductive part; The second conductive part is located on a side of the first conductive part away from the substrate, the third conductive part is located on a side of the second conductive part away from the substrate, and the first conductive part, the second conductive part, and the third conductive part are electrically connected; The first conductive part and the source or the drain are located on the same layer; The second conductive part and the connection electrode are located on the same layer; The third conductive part and the first electrode are located on the same layer.

13. The display substrate according to claim 12, wherein, The second part includes a fourth conductive part, the fourth conductive part and the source or the drain are located on the same layer, and are a structural layer integrally formed with the first conductive part.

14. A display device, comprising: The display substrate according to any one of claims 1 to 13.

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