Display device and method of manufacturing the same

Abstract

The present disclosure relates to a display device and a manufacturing method thereof. The display device includes a display panel, a first connection circuit board, a second connection circuit board and a sealing member. The display panel includes a first pad row and a second pad row. The first connection circuit board is connected to the first pad row, and the second connection circuit board is connected to the second pad row. The second pad row is spaced farther from the edge of the display panel than the first pad row. The sealing member is disposed between the first connection circuit board and the second connection circuit board to seal a gap between the first connection circuit board and the display panel.

Description

Technical Field

[0001] Exemplary embodiments / implementations of the invention relate generally to a display device and a method of manufacturing the same, and more particularly, to a display device including a narrow bezel area and a method of manufacturing the same. Background Art

[0002] Generally, a display panel is manufactured and then a circuit board is connected to the display panel. For example, a tape automated bonding (TAB) mounting method allows a circuit board to be bonded to a display panel by using an anisotropic conductive film ACF.

[0003] In recent years, various designs of display panels for reducing a bezel area (or non-display area) have been studied.

[0004] The above information disclosed in this Background section is only for understanding the background of the inventive concept and therefore it may contain information that does not constitute prior art. Summary of the invention

[0005] The device constructed according to the exemplary embodiment of the invention and the method according to the exemplary embodiment of the invention can prevent or reduce oxidation caused by moisture penetration of the connection between the circuit board and the display panel through the sealing member, and can also increase the bonding force between the circuit board and the display panel to prevent or reduce delamination of the anisotropic conductive film.

[0006] Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts.

[0007] An exemplary embodiment of the inventive concept provides a display device, the display device comprising a display panel, a main circuit board, a first connection circuit board, a second connection circuit board, a first sealing member and a second sealing member. The display panel comprises an insulating layer, a first pad and a second pad, the first pad being arranged in a first direction and exposed from the insulating layer, the second pad being spaced apart from the first pad in a second direction intersecting the first direction, the second pad being arranged in the first direction and exposed from the insulating layer. The second pad is spaced farther from an edge of the display panel in the second direction than the first pad.

[0008] The first connection circuit board is electrically connected to the first pad and the main circuit board. The second connection circuit board is electrically connected to the main circuit board and the second pad and is disposed above the first connection circuit board.

[0009] The first sealing member may seal a first gap defined between the first connection circuit board and the insulating layer. A portion of the first sealing member is disposed between the first connection circuit board and the second connection circuit board. The second sealing member seals a second gap defined between the second connection circuit board and the insulating layer.

[0010] In an exemplary embodiment, the second sealing member may include silicone.

[0011] In an exemplary embodiment, the first sealing member may include a first adhesive layer attached to the first connection circuit board, a base layer disposed on the first adhesive layer, and a second adhesive layer disposed on the base layer and attached to the second connection circuit board.

[0012] In an exemplary embodiment, the base layer may include silicone.

[0013] In an exemplary embodiment, the first sealing member and the second sealing member may include the same material as each other.

[0014] In an exemplary embodiment, the second sealing member may have a thickness greater than that of the first sealing member.

[0015] In an exemplary embodiment, the first sealing member may cover a region of an edge of the first connection circuit board overlapping the display panel.

[0016] In an exemplary embodiment, the display device may further include: a first driving chip mounted to the first connection circuit board; and a second driving chip mounted to the second connection circuit board.

[0017] In an exemplary embodiment, a width of a portion of the first connection circuit board overlapping the first driving chip in the first direction may be smaller than a width of a portion of the first connection circuit board overlapping the first pad in the first direction.

[0018] In an exemplary embodiment, the display device may further include a third sealing member disposed between the first connection circuit board and the insulating layer to bond the first connection circuit board to the insulating layer and disposed closer to the edge of the display panel than the first pad.

[0019] In an exemplary embodiment of the inventive concept, a display device includes a display substrate, a main circuit board, first, second, third, fourth connection circuit boards, a first outer sealing member, and a second outer sealing member.

[0020] The display substrate includes a first pad area and a second pad area, wherein a first pad row and a second pad row forming different pad rows are arranged in the first pad area, and a third pad row and a fourth pad row forming different pad rows are arranged in the second pad area.

[0021] The first connection circuit board connects the first pad area to the main circuit board and the first connection circuit board is electrically connected to the first pad row. The second connection circuit board connects the first pad area to the main circuit board, the second connection circuit board is electrically connected to the second pad row and is arranged above the first connection circuit board. The third connection circuit board connects the second pad area to the main circuit board and the third connection circuit board is electrically connected to the third pad row.

[0022] The fourth connection circuit board connects the second pad area to the main circuit board, the fourth connection circuit board is electrically connected to the fourth pad row and is arranged above the third connection circuit board. The first outer sealing member is arranged between the first connection circuit board and the second connection circuit board to seal the gap defined between the first connection circuit board and the first pad area. The second outer sealing member is arranged between the third connection circuit board and the fourth connection circuit board to seal the gap defined between the third connection circuit board and the second pad area.

[0023] In an exemplary embodiment, the first outer sealing member may be spaced apart from the second outer sealing member.The first outer sealing member and the second outer sealing member may be connected to each other to define an outer sealing member.

[0024] In an exemplary embodiment, a portion of the outer sealing member connecting the first outer sealing member to the second outer sealing member is defined as a connecting portion, and the connecting portion has a thickness greater than a thickness of the first outer sealing member.

[0025] In an exemplary embodiment, the display device may further include: a first inner sealing member sealing a gap between the second connection circuit board and the first pad area; and a second inner sealing member sealing a gap between the fourth connection circuit board and the second pad area.

[0026] In an exemplary embodiment, the first inner sealing member and the second inner sealing member may be connected to each other to define an inner sealing member.

[0027] In an exemplary embodiment, a portion of the inner sealing member connecting the first inner sealing member to the second inner sealing member is defined as a connecting portion, and the connecting portion has a thickness substantially the same as a thickness of the first inner sealing member.

[0028] In an exemplary embodiment, the display device may further include an anisotropic conductive film. Each anisotropic conductive film may be disposed between the first pad row and the first connection circuit board, between the second pad row and the second connection circuit board, between the third pad row and the third connection circuit board, and between the fourth pad row and the fourth connection circuit board.

[0029] In an exemplary embodiment, the display device may further include an anisotropic conductive film. The anisotropic conductive film may be disposed between the first pad row and the first connection circuit board and between the third pad row and the third connection circuit board.

[0030] In an exemplary embodiment of the inventive concept, a method for manufacturing a display device includes: providing a display panel including a pad area, in which a first pad and a second pad are arranged, and the first pad and the second pad are arranged on different pad rows from each other; electrically connecting a first connecting circuit board to the first pad, and the first pad is closer to an edge of the display panel than the second pad; and electrically connecting a second connecting circuit board to the second pad.

[0031] The electrically connecting the second connection circuit board to the second pad includes: arranging a conductive adhesive member between the second pad and a pad of the second connection circuit board corresponding to the second pad; arranging a preliminary sealing member between the first connection circuit board and the second connection circuit board; and pressing the conductive adhesive member and the preliminary sealing member onto the second connection circuit board by using a heating block.

[0032] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept. The accompanying drawings are included to provide a further understanding of the invention, and are incorporated in and constitute a part of this specification.

[0034] Figure 1A is a perspective view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0035] Figure 1B is a cross-sectional view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0036] Figure 2 is a plan view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0037] Figure 3A and Figure 3B is a cross-sectional view illustrating a display panel according to an exemplary embodiment of the inventive concept.

[0038] Figure 4A is an enlarged plan view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0039] Figure 4B is an enlarged plan view illustrating a display panel according to an exemplary embodiment of the inventive concept.

[0040] Figure 4C is a rear view illustrating a connection circuit board according to an exemplary embodiment of the inventive concept.

[0041] Figure 5A is a cross-sectional view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0042] Figure 5B is an enlarged plan view illustrating a coupling region of a display device according to an exemplary embodiment of the inventive concept.

[0043] Figure 5C and Figure 5D It is shown Figure 5A An enlarged cross-sectional view of area AA.

[0044] Figure 5E It is shown Figure 5A An enlarged cross-sectional view of area BB.

[0045] Fig. 5F and Figure 5G is an enlarged plan view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0046] Fig. 6A , Figure 6B , Figure 6C , Fig.6D and Fig. 6E is an enlarged plan view illustrating a coupling region of a display device according to an exemplary embodiment of the inventive concept.

[0047] Fig. 7A , Figure 7B , Figure 7C and Fig.7D is a cross-sectional view illustrating a manufacturing process of a display device according to an exemplary embodiment of the inventive concept.

[0048] Fig. 8A is a cross-sectional view illustrating a display device according to an exemplary embodiment of the inventive concept.

[0049] Figure 8B is an enlarged plan view illustrating a coupling region of a display device according to an exemplary embodiment of the inventive concept.

[0050] Figure 8C It is shown Fig. 8A An enlarged cross-sectional view of area CC. DETAILED DESCRIPTION

[0051] In the following description, for the purpose of explanation, many specific details are set forth in order to provide a thorough understanding of various exemplary embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of devices or methods using one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments can be implemented without these specific details or with one or more equivalent arrangements. In other cases, well-known structures and devices are shown in block diagram form to avoid unnecessarily obscuring various exemplary embodiments. In addition, various exemplary embodiments may be different, but not necessarily exclusive. For example, without departing from the inventive concept, the specific shape, configuration and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0052] Unless otherwise specified, the exemplary embodiments shown should be understood as providing exemplary features of different details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter individually or collectively referred to as "elements") of various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0053] Cross hatching and / or shading used in the drawings are generally provided to make the boundaries between adjacent elements clear. Thus, unless otherwise stated, the presence or absence of cross hatching or shading does not represent or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the illustrated elements, and / or any other characteristic, attribute, property, etc. In addition, in the drawings, the size and relative size of the elements may be exaggerated for the purpose of clarity and / or description. When the exemplary embodiments may be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0054] When an element, such as a layer, is referred to as being "on," "connected to," or "bonded to" another element or layer, it may be directly on, directly connected to, or directly bonded to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly bonded to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements. In addition, the DR1 axis, the DR2 axis, and the DR3 axis are not limited to the three axes of a rectangular coordinate system, such as the x-axis, the y-axis, and the z-axis, and may be interpreted in a broader sense. For example, the DR1 axis, the DR2 axis, and the DR3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ for example. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0055] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.

[0056] For descriptive purposes, spatially relative terms such as "under," "beneath," "lower," "above," "upper," "above," "higher," "side" (e.g., as in "sidewall"), etc. may be used herein and thereby describe the relationship of one element to other elements as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the figure is turned over, elements described as being "under" or "beneath" other elements or features will subsequently be positioned as being "above" the other elements or features. Thus, the exemplary term "under" can include both above and below orientations. In addition, the device can be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0057] The terms used here are for the purpose of describing specific embodiments, and are not intended to be restrictive. As used herein, the singular forms "one", "a (kind)" and "the (said)" are also intended to include plural forms, unless the context clearly states otherwise. In addition, the terms "include" and / or "comprise", when used in this specification, specify the existence of stated features, integers, steps, operations, elements, components and / or their groups, but do not exclude the existence or addition of one or more other features, integers, steps, operations, elements, components and / or their groups. It should also be noted that, as used herein, the terms "substantially", "approximately" and other similar terms are used as approximate terms rather than terms of degree, and are used to explain the inherent deviations in the measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0058] Various exemplary embodiments are described herein with reference to sectional views and / or exploded views, which are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, the exemplary embodiments disclosed herein should not necessarily be interpreted as being limited to the specifically illustrated regional shapes, but rather include deviations in shape due to, for example, manufacturing. In this manner, the regions shown in the drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and are therefore not necessarily intended to be limiting.

[0059] As is customary in the art, some exemplary embodiments are described and shown in the accompanying drawings in the form of functional blocks, units and / or modules. It will be appreciated by those skilled in the art that these blocks, units and / or modules are physically implemented by electronic (or optical) circuits such as logic circuits, discrete components, microprocessors, hard-wired circuits, memory elements, wiring connections, etc., which can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques. In the case where blocks, units and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can be selectively driven by firmware and / or software. It is also contemplated that each block, unit and / or module can be implemented by dedicated hardware, or as a combination of dedicated hardware that performs certain functions and processors (e.g., one or more programmed microprocessors and related circuits) that perform other functions. In addition, without departing from the scope of the inventive concept, each block, unit and / or module of some exemplary embodiments can be physically divided into two or more interactive and discrete blocks, units and / or modules. Furthermore, the blocks, units and / or modules of some exemplary embodiments may be physically combined into more complex blocks, units and / or modules without departing from the scope of the inventive concept.

[0060] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. Unless explicitly defined as such herein, terms, such as those defined in general dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense.

[0061] Figure 1A is a perspective view illustrating a display device DD according to an exemplary embodiment of the inventive concept. Figure 1B is a cross-sectional view illustrating a display device DD according to an exemplary embodiment of the inventive concept. Figure 2 is a plan view illustrating a display device DD according to an exemplary embodiment of the inventive concept.

[0062] Reference Figures 1A to 2 , the display device DD includes a display panel DP, a first connection circuit board FPCB1, a second connection circuit board FPCB2, and a main circuit board MPCB. Although the driving chip DC is mounted on the first connection circuit board FPCB1 and the second connection circuit board FPCB2 in the embodiment, the exemplary embodiments of the inventive concept are not limited thereto. For example, the driving chip DC may be mounted to the display panel DP or the main circuit board MPCB instead of the first connection circuit board FPCB1 and the second connection circuit board FPCB2.

[0063] Although not separately shown, the display device DD may further include a chassis member or a molding member, and may further include a backlight unit according to the kind of the display panel DP.

[0064] The display panel DP may be one of a liquid crystal display panel, a plasma display panel, an electrophoretic display panel, a micro-electromechanical system display panel, an electrowetting display panel, and an organic light emitting display panel. However, exemplary embodiments of the inventive concept are not limited thereto.

[0065] The display panel DP may include a first display substrate 100 and a second display substrate 200, the second display substrate 200 being spaced apart from the first display substrate 100 while facing the first display substrate 100. A predetermined cell gap may be defined between the first display substrate 100 and the second display substrate 200. The cell gap may be maintained by a sealant SLM coupling the first display substrate 100 to the second display substrate 200. A grayscale display layer may be provided between the first display substrate 100 and the second display substrate 200. According to the kind of the display panel, the grayscale display layer may include a liquid crystal layer, an organic light emitting layer, and an electrophoretic layer.

[0066] like Figure 1AAs shown, the display device DD can display an image through the display surface DP-IS. The display surface DP-IS is parallel to a plane defined by the first direction axis DR1 and the second direction axis DR2. The display surface DP-IS may include a display area DA and a non-display area NDA. The non-display area NDA is defined along the edge of the display surface DP-IS. The display area DA may be surrounded by the non-display area NDA. In an exemplary embodiment of the inventive concept, the non-display area NDA may be provided only on one side area adjacent to the first connection circuit board FPCB1 and the second connection circuit board FPCB2.

[0067] The normal direction of the display surface DP-IS, that is, the thickness direction of the display panel DP, represents the third directional axis DR3. In the following, the front surface (or top surface) and the rear surface (or bottom surface) of each component or unit are distinguished by the third directional axis DR3. However, the first directional axis DR1, the second directional axis DR2, and the third directional axis DR3 in the embodiment are exemplarily shown. In the following, the first direction, the second direction, and the third direction may be the directions indicated by the first directional axis DR1, the second directional axis DR2, and the third directional axis DR3, respectively, and are represented by the same reference numerals.

[0068] Although a display panel DP having a flat display surface is shown, exemplary embodiments of the inventive concept are not limited thereto. For example, the display device DD may include a curved display surface or a three-dimensional display surface. The three-dimensional display surface may include a plurality of display areas indicating different directions from each other.

[0069] The signal control unit SC may be mounted to the main circuit board MPCB. The signal control unit SC receives image data and control signals from an external graphic control unit (not shown). The signal control unit SC may provide a control signal to the display panel DP.

[0070] The first connection circuit board FPCB1 and the second connection circuit board FPCB2 may be electrically connected to each of the display panel DP and the main circuit board MPCB. The first connection circuit board FPCB1 and the second connection circuit board FPCB2 may transmit a signal from the main circuit board MPCB to the driving chip DC, and transmit a signal from the driving chip DC to the display panel DP. In an embodiment, the driving chip DC may be a data driving circuit. In an exemplary embodiment of the inventive concept, the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may transmit a signal from the signal control unit SC to the display panel DP.

[0071] The first connection circuit board FPCB1 and the second connection circuit board FPCB2 may be connected to each of the display panel DP and the main circuit board MPCB by a conductive adhesive member. The conductive adhesive member may include an anisotropic conductive film ACF. Hereinafter, the conductive adhesive member will be described as an anisotropic conductive film ACF.

[0072] In an embodiment, the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may include two circuit boards. The first connection circuit board FPCB1 and the second connection circuit board FPCB2 are respectively connected to different pad rows provided in one pad area PDA. Although the pad area PDA is provided on the first display substrate 100 in the exemplary embodiment, the exemplary embodiment of the inventive concept is not limited thereto. In an exemplary embodiment of the inventive concept, the pad area PDA may be provided on the second display substrate 200.

[0073] Figure 2 1 is a view showing a planar arrangement relationship between signal lines GL1 to GLn, DL1 to DLm, PL-G and PL-D and pixels PX11 to PXnm. The signal lines GL1 to GLn, DL1 to DLm, PL-G and PL-D may include a plurality of gate lines GL1 to GLn, a plurality of data lines DL1 to DLm, and auxiliary signal lines PL-G and PL-D.

[0074] A plurality of gate lines GL1 to GLn are arranged in the second direction DR2 while extending in the first direction DR1, and a plurality of data lines DL1 to DLm cross the plurality of gate lines GL1 to GLn in an insulating manner. The plurality of gate lines GL1 to GLn and the plurality of data lines DL1 to DLm overlap the display area DA. Auxiliary signal lines PL-G and PL-D overlap the non-display area NDA and are connected to the plurality of gate lines GL1 to GLn and the plurality of data lines DL1 to DLm.

[0075] The first auxiliary signal line PL-G connected to the plurality of gate lines GL1 to GLn may be arranged on the same layer as the plurality of gate lines GL1 to GLn to form an overall shape. Although the plurality of gate lines GL1 to GLn and the first auxiliary signal line PL-G are distinguished in the embodiment, the exemplary embodiments of the inventive concept are not limited thereto. For example, the gate line and the first auxiliary signal line connected to each other may be defined as one signal line. Here, the gate line and the first auxiliary signal line connected to each other may be defined as different parts of one signal line.

[0076] The second auxiliary signal line PL-D connected to the data lines DL1 to DLm may be arranged on a different layer from the plurality of data lines DL1 to DLm. The data lines DL1 to DLm may be electrically connected to corresponding signal lines of the second auxiliary signal line PL-D through contact holes CH, respectively. The contact holes CH pass through at least one insulating layer disposed between the data lines DL1 to DLm and the second auxiliary signal line PL-D. Figure 2 Two contact holes CH are exemplarily shown in FIG.

[0077] In an exemplary embodiment of the inventive concept, the contact hole CH may be omitted. The data lines DL1 to DLm and the second auxiliary signal line PL-D may be arranged on the same layer. Here, the data lines DL1 to DLm connected to the second auxiliary signal line PL-D and the second auxiliary signal line PL-D may be defined as one signal line. Here, the data line and the second auxiliary signal line connected to each other may be defined as different parts of one signal line.

[0078] The pixels PX11 to PXnm are respectively connected to corresponding gate lines of the plurality of gate lines GL1 to GLn and corresponding data lines of the plurality of data lines DL1 to DLm. Each of the pixels PX11 to PXnm may include a pixel driving circuit and a display element.

[0079] Although the pixels PX11 to PXnm in a matrix form are exemplarily shown, exemplary embodiments of the inventive concept are not limited thereto. For example, the pixels PX11 to PXnm may be arranged in a pentile form. In addition, the pixels PX11 to PXnm may be arranged in a rhombus form.

[0080] like Figure 2 As shown, two pad rows PD1 and PD2 are arranged in each pad area PDA. Each of the two pad rows PD1 and PD2 includes a plurality of pads arranged in a first direction DR1. The first pad row PD1 and the second pad row PD2 are spaced apart from each other in a direction crossing the first direction DR1. In the second direction DR2, the second pad row PD2 is also spaced apart from an edge E-DP of the display panel DP and is disposed closer to the display area DA than the first pad row PD1. The first pad row PD1 and the second pad row PD2 are respectively connected to the second auxiliary signal line PL-D.

[0081] The gate driving circuit GDC may be integrated into the display panel DP through an oxide silicon gate driver circuit (OSG) or an amorphous silicon gate driver circuit (ASG) process. The first auxiliary signal line PL-G receives a gate signal from the gate driving circuit GDC.

[0082] Figure 3A and Figure 3Bis a cross-sectional view illustrating a display area DA of a display panel DP according to an exemplary embodiment of the inventive concept. Figure 3A 1 shows a cross section corresponding to a pixel PX of a liquid crystal display panel, Figure 3B A cross section corresponding to a pixel PX of the organic light emitting display panel is shown.

[0083] The pixel PX of the liquid crystal display panel may include a transistor TR, a liquid crystal capacitor Clc, and a storage capacitor Cst.

[0084] The transistor TR includes a control electrode GE connected to a gate line, an activation portion AL overlapping the control electrode GE, an input electrode SE connected to a data line, and an output electrode DE spaced apart from the input electrode SE. The liquid crystal capacitor Clc includes a pixel electrode PE and a common electrode CE. The storage capacitor Cst includes the pixel electrode PE and a portion of the storage line STL overlapping the pixel electrode PE.

[0085] The gate electrode GE and the storage line STL are disposed on one surface of the first base substrate BS1. The first base substrate BS1 may be a glass substrate or a plastic substrate. A first insulating layer 10 covering the control electrode GE and the storage line STL is disposed on one surface of the first base substrate BS1. The first insulating layer 10 may include at least one of an inorganic material and an organic material. An activation portion AL overlapping the control electrode GE is disposed on the first insulating layer 10. The activation portion AL may include a semiconductor layer SCL and an ohmic contact layer OCL. The semiconductor layer SCL is disposed on the first insulating layer 10, and the ohmic contact layer OCL is disposed on the semiconductor layer SCL.

[0086] The semiconductor layer SCL may include amorphous silicon or polycrystalline silicon. Alternatively, the semiconductor layer SCL may include a metal oxide semiconductor. The ohmic contact layer OCL may include a dopant doped at a high density greater than that of the semiconductor layer SCL. The ohmic contact layer OCL may include two portions spaced apart from each other. In an exemplary embodiment of the inventive concept, the ohmic contact layer OCL may have an overall shape.

[0087] The output electrode DE and the input electrode SE are disposed on the activation portion AL. The output electrode DE and the input electrode SE are spaced apart from each other. The second insulating layer 20 covering the activation portion AL, the output electrode DE and the input electrode SE is disposed on the first insulating layer 10. The third insulating layer 30 is disposed on the second insulating layer 20. Each of the second insulating layer 20 and the third insulating layer 30 may contain at least one of an inorganic material and an organic material. The third insulating layer 30 may be a single-layer organic layer providing a flat surface. In an embodiment, the third insulating layer 30 may include a plurality of color filters. The fourth insulating layer 40 is disposed on the third insulating layer 30. The fourth insulating layer 40 may be an inorganic layer covering the color filter.

[0088] like Figure 3A As shown, the pixel electrode PE is disposed on the fourth insulating layer 40. The pixel electrode PE is connected to the output electrode DE through a contact hole CH10 passing through the second insulating layer 20, the third insulating layer 30 and the fourth insulating layer 40. An alignment layer (not shown) covering the pixel electrode PE may be disposed on the fourth insulating layer 40.

[0089] The second base substrate BS2 may be a glass substrate or a plastic substrate. A black matrix layer BM is disposed on the bottom surface of the second base substrate BS2. That is, an opening corresponding to a pixel area may be defined in the black matrix layer BM. The spacer CS may be disposed to overlap the black matrix layer BM.

[0090] An insulating layer covering the black matrix layer BM is disposed on the bottom surface of the second base substrate BS2. Figure 3A The fifth insulating layer 50 providing a flat surface is exemplarily shown in FIG. The fifth insulating layer 50 may include an organic material.

[0091] like Figure 3A As shown, the common electrode CE is disposed on the bottom surface of the second base substrate BS2. A common voltage is applied to the common electrode CE. The common voltage has a value different from that of the pixel voltage.

[0092] The cross section of the pixel PX is intended to be exemplified in Figure 3A The first display substrate 100 and the second display substrate 200 may be turned over in the third direction DR3. A color filter may be disposed on the second display substrate 200.

[0093] Reference Figure 3A Although a vertical alignment (VA) mode liquid crystal display panel is described exemplarily, an in-plane switching (IPS) mode, a fringe field switching (FFS) mode, a surface-to-line switching (PLS) mode, a super vertical alignment (SVA) mode, or a surface-stabilized vertical alignment (SS-VA) mode liquid crystal display panel may be applied to the exemplary embodiments of the inventive concept.

[0094] like Figure 3B As shown, a pixel PX of an organic light emitting display panel may include a switching transistor T1 , a driving transistor T2 , and a light emitting element OLED.

[0095] The organic light emitting display panel includes a display substrate 100 as a first display substrate and an encapsulation substrate 200 as a second display substrate. The display substrate 100 includes a first base substrate BS1, a circuit element layer DP-CL disposed on the first base substrate BS1, a display element layer DP-OLED disposed on the circuit element layer DP-CL, and a cover layer CL disposed on the display element layer DP-OLED. The encapsulation substrate 200 may include a second base substrate BS2, a black matrix layer BM disposed on the second base substrate BS2, and a color conversion layer CCL.

[0096] The first base substrate BS1 may include a synthetic resin substrate or a glass substrate. The circuit element layer DP-CL includes at least one insulating layer and a circuit element. The circuit element includes a signal line or a driving circuit of a pixel, etc. The circuit element layer DP-CL may be formed by a process of forming an insulating layer, a semiconductor layer, and a conductive layer by coating or deposition, and a process of patterning the insulating layer, the semiconductor layer, and the conductive layer by a photolithography process.

[0097] In an embodiment, the circuit element layer DP-CL may include a buffer layer BFL, a first insulating layer 10, a second insulating layer 20, and a third insulating layer 30. Each of the first insulating layer 10 and the second insulating layer 20 may be an inorganic layer, and the third insulating layer 30 may be an organic layer.

[0098] Figure 3B The arrangement relationship between the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, the first control electrode GE1, the second control electrode GE2, the first input electrode DE1, the first output electrode SE1, the second input electrode DE2, and the second output electrode SE2 constituting the switching transistor T1 and the driving transistor T2 is exemplarily shown. The first through hole CH1, the second through hole CH2, the third through hole CH3, and the fourth through hole CH4 are also exemplarily shown.

[0099] The display element layer DP-OLED may include a light emitting element OLED. The display element layer DP-OLED may include an organic light emitting diode as a light emitting element. The display element layer DP-OLED may include a pixel defining layer PDL. For example, the pixel defining layer PDL may be an organic layer.

[0100] The first electrode AE ​​is disposed on the third insulating layer 30. The first electrode AE ​​is connected to the second output electrode SE2 through a fifth contact hole CH5 passing through the third insulating layer 30. An opening OP is defined in the pixel defining layer PDL. The opening OP of the pixel defining layer PDL exposes at least a portion of the first electrode AE. The opening OP of the pixel defining layer PDL is referred to as a light emitting opening to be distinguished from other openings.

[0101] like Figure 3BAs shown, the display panel DP may include a light emitting region PXA and a non-light emitting region NPXA disposed adjacent to the light emitting region PXA. The non-light emitting region NPXA may surround the light emitting region PXA. In an embodiment, the light emitting region PXA is defined by a partial region of the first electrode AE ​​exposed by the light emitting opening OP.

[0102] The hole control layer HCL may be disposed in common in the light emitting region PXA and the non-light emitting region NPXA. The hole control layer HCL may include a hole transport layer and further include a hole injection layer. The light emitting layer EML is disposed on the hole control layer HCL. The light emitting layer EML may be disposed in common in the light emitting region PXA and the non-light emitting region NPXA. In an exemplary embodiment of the inventive concept, the light emitting layer EML may be disposed in the light emitting region PXA and may not be disposed in the non-light emitting region NPXA. The light emitting layer EML may include an organic material and / or an inorganic material. The light emitting layer EML may generate a predetermined first color light, such as blue light.

[0103] The electron control layer ECL is disposed on the light emitting layer EML. The electron control layer ECL may further include an electron transport layer and an electron injection layer. The hole control layer HCL and the electron control layer ECL may be disposed together in a plurality of pixels by using an open mask. The second electrode CE is disposed on the electron control layer ECL. The second electrode CE is disposed together in a plurality of pixels PX. A covering layer CL protecting the second electrode CE may be disposed on the second electrode CE. The covering layer CL may include an organic material or an inorganic material.

[0104] The second base substrate BS2 may be spaced apart from the cover layer CL. The second base substrate BS2 may include a synthetic resin substrate or a glass substrate. The color conversion layer CCL may transmit the first color light or convert the first color light into the second color light or the third color light according to the pixel PX. The color conversion layer CCL may include quantum dots.

[0105] In an exemplary embodiment of the inventive concept, the encapsulation substrate 200 may be replaced by a thin film encapsulation layer. Here, the black matrix layer BM and the color conversion layer CCL may be disposed on the thin film encapsulation layer.

[0106] Figure 4A is an enlarged plan view illustrating a display device DD according to an exemplary embodiment of the inventive concept. Figure 4B is an enlarged plan view illustrating a display panel DP according to an exemplary embodiment of the inventive concept. Figure 4C is a rear view illustrating a connection circuit board FPCB1 according to an exemplary embodiment of the inventive concept.

[0107] Hereinafter, the area where the pad area PDA of the display panel DP is electrically connected to the first and second connection circuit boards FPCB1 and FPCB2 is defined as the bonding area BDA of the display device DD. The output pads PO of the first and second connection circuit boards FPCB1 and FPCB2 overlap with the pad area PDA of the display panel DP.

[0108] like Figure 4A and Figure 4B As shown, a first pad row PD1 and a second pad row PD2 forming different rows are arranged in the pad area PDA. The first pad row PD1 includes a plurality of first pads PD1-P, and the second pad row PD2 includes a plurality of second pads PD2-P. The first connection circuit board FPCB1 is electrically connected to the first pad row PD1, and the second connection circuit board FPCB2 is electrically connected to the second pad row PD2.

[0109] Although sizes and shapes are partially different, the first connection circuit board FPCB1 and the second connection circuit board FPCB2 have extremely similar structures. Figure 4C The first connection circuit board FPCB1 is exemplarily shown. Each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2 includes an insulating layer (not shown), a plurality of pads CPD, PO and PI, and a plurality of signal lines SL-F. The plurality of pads CPD, PO and PI and the plurality of signal lines SL-F are disposed on the insulating layer. The insulating layer may include a polyimide layer.

[0110] The plurality of pads CPD, PO and PI may include: a connection pad CPD connected to a connection terminal of a driving chip DC; a first pad (PO, hereinafter referred to as an output pad) connected to a display panel DP; and a second pad (PI, hereinafter referred to as an input pad) connected to a main circuit board MPCB. A plurality of signal lines SL-F connect the connection pad CPD to the output pad PO, and connect the connection pad CPD to the input pad PI. When the driving chip DC is omitted, the signal line SL-F may connect the output pad PO to the input pad PI.

[0111] Each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may further include a solder resist layer. The solder resist layer exposes each of the plurality of pads CPD, PO and PI, while also covering the peripheral area of ​​each of the plurality of pads CPD, PO and PI. Openings corresponding to the plurality of pads CPD, PO and PI may be defined in the solder resist layer.

[0112] Each of the first connection circuit board FPCB1 and the second connection circuit board FPCB2 may include three parts distinguished according to the width in the first direction. The three parts may include: a first part P1, on which the output pad PO is arranged; a second part P2, in which the input pad PI is arranged; and a third part P3, which connects the first part P1 to the second part P2. The first part P1 may have a width greater than the width of the second part P2. The third part P3 may have a width that gradually decreases in the direction from the first part P1 to the second part P2. The driving chip DC may be mounted to the second part P2.

[0113] like Figure 4A As shown, the first part P1 of the first connection circuit board FPCB1 and the first part of the second connection circuit board FPCB2 may overlap each other. The second connection circuit board FPCB2 may have an area greater than that of the first connection circuit board FPCB1, and the first part P1 of the first connection circuit board FPCB1 may be arranged in the first part of the second connection circuit board FPCB2 on a plane. The second part P2 of the first connection circuit board FPCB1 may not overlap with the second part of the second connection circuit board FPCB2. Therefore, the second part P2 of the first connection circuit board FPCB1 connected to the main circuit board MPCB and the second part of the second connection circuit board FPCB2 are spaced apart from each other on a plane.

[0114] Figure 5A FIG. 2 is a diagram showing a display device DD according to an exemplary embodiment of the inventive concept. Figure 4A An enlarged cross-sectional view of the I-I' line. Figure 5B is an enlarged plan view illustrating a bonding area BDA of a display device DD according to an exemplary embodiment of the inventive concept. Figure 5C and Figure 5D It is shown Figure 5A An enlarged cross-sectional view of area AA. Figure 5E It is shown Figure 5A An enlarged cross-sectional view of area BB. Fig. 5F and Figure 5G is an enlarged plan view illustrating a bonding area BDA of a display device DD according to an exemplary embodiment of the inventive concept.

[0115] like Figure 5A As shown, the second connection circuit board FPCB2 is disposed above the first connection circuit board FPCB1. The first connection circuit board FPCB1 is connected to the first pad row PD1, and the second connection circuit board FPCB2 is connected to the second pad row PD2.

[0116] like Figure 5BAs shown, the first sealing member SM1 is disposed adjacent to the first pad row PD1. The first sealing member SM1 may overlap the first pad row PD1 on a plane. The first sealing member SM1 may cover an edge E-1 of the first connection circuit board FPCB1 on a plane. The covered edge may correspond to the first portion P1 (refer to Figure 4C ). A portion of an edge E-1 of the first portion P1 extending in the first direction DR1 may be completely covered. A portion of an edge E-1 of the first portion P1 extending in the second direction DR2 may be partially covered.

[0117] The second sealing member SM2 is disposed adjacent to the second pad row PD2. The second sealing member SM2 may overlap the second pad row PD2 on a plane. The second sealing member SM2 may cover an edge E-2 of the second connection circuit board FPCB2 on a plane. The covered edge may correspond to the first portion P1 (refer to Figure 4C ). A portion of an edge E-2 of the first portion P1 extending in the first direction DR1 may be completely covered. A portion of an edge E-2 of the first portion P1 extending in the second direction DR2 may be partially covered.

[0118] Figure 5C Shows about Figure 3A The first display substrate 100 of the liquid crystal display panel in FIG. The first pad PD1-P is connected to the auxiliary signal line PL-D through the contact hole CH-P passing through the first insulating layer 10 to the fourth insulating layer 40. The first pad PD1-P is exposed from the first insulating layer 10 to the fourth insulating layer 40. When the first pad PD1-P is omitted, one end of the auxiliary signal line PL-D may be exposed from the first insulating layer 10 to the fourth insulating layer 40.

[0119] exist Figure 5C , a first connection circuit board FPCB1 including an insulating layer IL-F, a signal line SL-F, a solder resist layer SR-F and an output pad PO is exemplarily shown. A second connection circuit board FPCB2 is simply shown. The output pad PO exposed from the solder resist layer SR-F is electrically connected to the first pad PD1-P through the anisotropic conductive film ACF.

[0120] like Figure 5C As shown, the first sealing member SM1 is disposed between the first connection circuit board FPCB1 and the second connection circuit board FPCB2 to seal the first gap GP1 between the first connection circuit board FPCB1 and the fourth insulating layer 40. A portion of the first sealing member SM1 may be filled into the first gap GP1. Figure 5CMoisture penetrating from the left side of the first sealing member SM1 toward the first pad PD1 -P may be blocked by the first sealing member SM1 . The first sealing member SM1 may attach the first connection circuit board FPCB1 to the fourth insulating layer 40 .

[0121] The first sealing member SM1 may include a synthetic resin. The first sealing member SM1 may include a silicone resin having excellent moisture resistance.

[0122] like Figure 5D As shown, the first sealing member SM1 may have a multi-layer structure. In an embodiment, the first sealing member SM1 may be a double-sided adhesive tape or a double-sided adhesive tape.

[0123] The first sealing member SM1 may include a first adhesive layer S-1 attached to the first connection circuit board FPCB1, a base layer S-2 disposed on the first adhesive layer S-1, and a second adhesive layer S-3 disposed on the base layer S-2 and attached to the second connection circuit board FPCB2. The base layer S-2 may be a typical synthetic resin layer, and the first adhesive layer S-1 and the second adhesive layer S-3 may include a typical adhesive. The base layer S-2 may include a silicon film having excellent moisture resistance. The base layer S-2 may include a polyethylene terephthalate (PET) film. In an exemplary embodiment of the inventive concept, one of the first adhesive layer S-1 and the second adhesive layer S-3 may be omitted.

[0124] In an exemplary embodiment of the inventive concept, the first sealing member SM1 may be an adhesive tape not including a base layer. The first sealing member SM1 may include a polymer adhesive layer and a low-molecular acrylic adhesive layer disposed on both surfaces of the polymer adhesive layer.

[0125] and Figure 5D Unlike the first sealing member SM1 simply shown in FIG. 1 , the boundaries between the first adhesive layer S- 1 , the base layer S- 2 , and the second adhesive layer S- 3 of the thermally deformed first sealing member SM1 may not be clear. A portion of the first sealing member SM1 may be filled into the first gap GP1 .

[0126] like Figure 5E As shown, the second pad PD2 -P is connected to the auxiliary signal line PL-D through a contact hole CH-P passing through the first insulating layer 10 to the fourth insulating layer 40 . Figure 5E The second connection circuit board FPCB2 is shown having a cross-sectional structure similar to that of the first connection circuit board FPCB1. The output pads PO exposed from the solder resist layer SR-F are electrically connected to the second pads PD2-P through the anisotropic conductive film ACF.

[0127] like Figure 5EAs shown, the second sealing member SM2 seals the second gap GP2 between the second connection circuit board FPCB2 and the fourth insulating layer 40. A portion of the second sealing member SM2 may be filled into the second gap GP2. Figure 5E , moisture penetrating from the left side of the second sealing member SM2 to the second pad PD2-P can be blocked by the second sealing member SM2. The second sealing member SM2 may include Figure 5C The second sealing member SM2 may include the same material as the first sealing member SM1. The second sealing member SM2 may include a synthetic resin. The second sealing member SM2 may include a silicone resin having excellent moisture resistance.

[0128] The second sealing member SM2 may have a thickness greater than that of the first sealing member SM1. Since the second sealing member SM2 is cured while being exposed to the outside, unlike the first sealing member SM1 compressed by the second connection circuit board FPCB2, the second sealing member SM2 has a greater thickness.

[0129] like Fig. 5F and Figure 5G As shown, the first sealing member SM1 can be variously changed in shape. Fig. 5F and Figure 5G As shown, the first sealing member SM1 may completely cover a region of the edge E- 1 of the first connection circuit board FPCB1 overlapping the first display substrate 100 .

[0130] Reference Fig. 5F and Figure 5G , moisture penetrating from the left side, right side, and top side of the first sealing member SM1 to the first pad PD1-P can be blocked by the first sealing member SM1. Fig. 5F As shown, the first sealing member SM1 may completely cover a partial area of ​​the first connection circuit board FPCB1 overlapping the first display substrate 100. Figure 5G As shown, the first sealing member SM1 may not cover a partial area of ​​the first connection circuit board FPCB1 overlapping the first display substrate 100 .

[0131] FIG. 6A to FIG. 6E FIG. 2 is an enlarged plan view showing a bonding area BDA of a display device DD according to an exemplary embodiment of the inventive concept. Referring to the two bonding areas BDA, FIG. 6A to FIG. 6E .

[0132] Fig. 6A and Figure 6B The shape of the anisotropic conductive film ACF is shown comparatively. Fig. 6AAs shown, the anisotropic conductive film ACF can be independently arranged on each of the first pad row PD1, the second pad row PD2, the third pad row PD3 and the fourth pad row PD4 of the first pad area PDA1 and the second pad area PDA2. The anisotropic conductive films ACF can be separated from each other. The first connection circuit board FPCB1 and the second connection circuit board FPCB2 are connected to the first pad area PDA1, and the third connection circuit board FPCB3 and the fourth connection circuit board FPCB4 are connected to the second pad area PDA2.

[0133] Reference Figure 6B , the first anisotropic conductive film ACF1 may be commonly disposed on the first pad row PD1 of the first pad area PDA1 and the third pad row PD3 of the second pad area PDA2. The second anisotropic conductive film ACF2 may be commonly disposed on the second pad row PD2 of the first pad area PDA1 and the fourth pad row PD4 of the second pad area PDA2. One of the first anisotropic conductive film ACF1 and the second anisotropic conductive film ACF2 may be disposed like Fig. 6A The anisotropic conductive film ACF in the film is deformed like this.

[0134] FIG. 6C to FIG. 6E The shapes of the sealing members are shown comparatively. Figure 5C The sealing member corresponding to the first sealing member SM1 is defined as an outer sealing member, and the sealing member corresponding to the second sealing member SM2 is defined as an inner sealing member.

[0135] like Figure 6C As shown, the first outer sealing member SM1-O1, the second outer sealing member SM1-O2, the first inner sealing member SM2-I1 and the second inner sealing member SM2-I2 may be arranged corresponding to the first pad row PD1 to the fourth pad row PD4. The first outer sealing member SM1-O1, the second outer sealing member SM1-O2, the first inner sealing member SM2-I1 and the second inner sealing member SM2-I2 may be spaced apart from each other.

[0136] like Fig.6D As shown, an external sealing member SM1-O can be disposed on the first pad row PD1 and the third pad row PD3, and an internal sealing member SM2-I can be disposed on the second pad row PD2 and the fourth pad row PD4. The external sealing member SM1-O can include a first portion SM1-OP1 and a second portion SM1-OP2 corresponding to the first external sealing member SM1-O1 and the second external sealing member SM1-O2, respectively.

[0137] The outer sealing member SM1-O may include a third portion SM1-OP3 (or connecting portion) connecting the first portion SM1-OP1 to the second portion SM1-OP2. The third portion SM1-OP3 may have a thickness greater than that of each of the first portion SM1-OP1 and the second portion SM1-OP2. Because the third portion SM1-OP3 is not pressed by the second connection circuit board FPCB2, the third portion SM1-OP3 may have a greater thickness.

[0138] The inner sealing member SM2-I can also be divided into three parts: a first part SM2-IP1, a second part SM2-IP2 and a third part SM2-IP3. Because the first part SM2-IP1, the second part SM2-IP2 and the third part SM2-IP3 are formed by the same process and are not compressed by external pressure, the first part SM2-IP1, the second part SM2-IP2 and the third part SM2-IP3 (or the connecting part) can have substantially the same thickness as each other.

[0139] like Fig. 6E As shown, the first external sealing member SM1-O1 and the second external sealing member SM1-O2 may be provided corresponding to the first pad row PD1 and the third pad row PD3, and one internal sealing member SM2-I may be provided corresponding to the second pad row PD2 and the fourth pad row PD4. Although not shown separately, one external sealing member may be provided corresponding to the first pad row PD1 and the third pad row PD3, and internal sealing members separated from each other may be provided corresponding to the second pad row PD2 and the fourth pad row PD4.

[0140] FIG. 7A to FIG. 7D is a cross-sectional view showing a manufacturing process of a display device DD according to an exemplary embodiment of the inventive concept. Figures 1A to 6E The components described are the same as the detailed descriptions of the components.

[0141] like Fig. 7A As shown, a display panel DP is provided. First, the first pad row PD1 and the first connection circuit board FPCB1 are electrically connected to each other. An anisotropic conductive film ACF is disposed between the first pad row PD1 and the first connection circuit board FPCB1. The anisotropic conductive film ACF may be connected to the output pads PO (refer to Figure 4C ) are stacked and attached to the first pad row PD1 or to the first connection circuit board FPCB1.

[0142] The first pad row PD1 and the output pad PO are aligned with each other, and then the first connection circuit board FPCB1 is pressed by the heating block HB. Although the heating block HB may be a heating pressure member, the exemplary embodiments of the inventive concept are not limited to the type of the heating block HB. The hot pressing anisotropic conductive film ACF electrically connects the first pad row PD1 to the output pad PO.

[0143] Afterwards, if Figure 7B and Figure 7C As shown, the second pad row PD2 and the second connection circuit board FPCB2 are electrically connected to each other.

[0144] First, if Figure 7B As shown, an anisotropic conductive film ACF, a preliminary sealing member SM1-P and a second connection circuit board FPCB2 are provided. The anisotropic conductive film ACF is disposed between the second pad row PD2 and the second connection circuit board FPCB2. The anisotropic conductive film ACF can be attached to the second pad row PD2 or to the second connection circuit board FPCB2 while overlapping the output pad PO of the second connection circuit board FPCB2.

[0145] will have Fig. 6A The anisotropic conductive film ACF having a shape in FIG. 1 is attached to the display panel DP or to the second connection circuit board FPCB2, and the anisotropic conductive film ACF having a shape in FIG. Figure 6B The anisotropic conductive film ACF of a shape in FIG. 5 is attached to the display panel DP.

[0146] In addition, a preliminary sealing member SM1-P is disposed between the first connection circuit board FPCB1 and the second connection circuit board FPCB2. Figure 6C In order to form a first sealing member SM1 having a shape in FIG. 1 , a double-sided adhesive tape may be attached to the top surface of the first connection circuit board FPCB1, or a synthetic resin layer may be formed on the top surface of the first connection circuit board FPCB1. Alternatively, a double-sided adhesive tape may be attached to the bottom surface of the second connection circuit board FPCB2, or a synthetic resin layer may be formed on the bottom surface of the second connection circuit board FPCB2. Fig.6D The first sealing member SM1 of the shape in FIG. 5 may be provided on the first connection circuit board FPCB1 and the display panel DP with a double-sided adhesive tape or a synthetic resin layer.

[0147] like Figure 7C As shown, the second pad row PD2 and the output pad PO are aligned with each other, and then the second connection circuit board FPCB2 is pressed by the heating block HB. The second pad row PD2 is electrically connected to the output pad PO by thermally pressing the anisotropic conductive film ACF.

[0148] The heating block HB presses the second connection circuit board FPCB2 to melt the preliminary sealing member SM1-P. The preliminary sealing member SM1-P pressed between the top surface of the first connection circuit board FPCB1 and the bottom surface of the second connection circuit board FPCB2 spreads around. The pressed preliminary sealing member SM1-P is spread to the top surface of the display panel DP (e.g., the pad area and / or the surroundings of the pad area). Thus, a reference Figure 5C and Figure 5D The first sealing member SM1 is described.

[0149] like Fig.7D As shown, a second sealing member SM2 may be formed. The sealant supplier SS may supply synthetic resin on the display panel DP by a printing method or an injection method. The synthetic resin may penetrate into the display panel DP by a capillary phenomenon. Figure 5E The synthetic resin may be cured to form a second sealing member SM2.

[0150] Fig. 8A is a cross-sectional view illustrating a display device DD according to an exemplary embodiment of the inventive concept. Figure 8B is an enlarged plan view illustrating a bonding area BDA of a display device DD according to an exemplary embodiment of the inventive concept. Figure 8C It is shown Fig. 8A In the following, the details of the cross-sectional view of the region CC will be omitted. FIG. 1A to FIG. 7D The components described are the same as the detailed descriptions of the components.

[0151] The display device DD according to the embodiment may further include a third sealing member SM3. The third sealing member SM3 is disposed closer to the edge E-DP of the display panel DP than the first pad row PD1.

[0152] The third sealing member SM3 is disposed between the first connection circuit board FPCB1 and the display panel DP in cross section. The third sealing member SM3 may bond the first connection circuit board FPCB1 to the display panel DP. The third sealing member SM3 may block moisture penetrating from the edge E-DP of the display panel DP to the first pad PD1-P. Figure 5C Similar to the first sealing member SM1 in the embodiment, the third sealing member SM3 may include a synthetic resin. The third sealing member SM3 may include a silicone resin having excellent moisture resistance. The third sealing member SM3 may have a Figure 5D The multi-layer structure shown.

[0153] In order to manufacture a display device DD according to an exemplary embodiment of the inventive concept, Fig. 7AThe preliminary sealing member SM1-P is prepared in the process of . The preliminary sealing member SM1-P is disposed between the first connection circuit board FPCB1 and the display panel DP. The preliminary sealing member SM1-P is pressed on the first connection circuit board FPCB1 by using a heating block HB. The third sealing member SM3 is formed by curing the pressed preliminary sealing member SM1-P.

[0154] As described above, moisture that penetrates from the outside of the sealing member to the bonding area can be blocked by the sealing member. Therefore, the first pad of the display panel and the first pad of the connection circuit board can be prevented from being oxidized.

[0155] The sealing member may attach the connection circuit board to the display panel. Since the bonding force between the connection circuit board and the display panel is increased, the anisotropic conductive film may be prevented from being delaminated.

[0156] Although specific exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to these embodiments, but rather to the broader scope of the appended claims and various obvious modifications and equivalent arrangements apparent to those of ordinary skill in the art.

Claims

1. A display device, wherein: The display device comprises: A display panel, comprising an insulating layer, a first pad and a second pad, the first pad being arranged in a first direction and exposed from the insulating layer, the second pad being spaced apart from the first pad in a second direction crossing the first direction, the second pad being arranged in the first direction and exposed from the insulating layer; Main circuit board; a first connecting circuit board, electrically connected to the first pad and the main circuit board; a second connection circuit board, electrically connected to the main circuit board and the second pad, and disposed above the first connection circuit board, the second pad being spaced farther from an edge of the display panel than the first pad; a first sealing member configured to seal a first gap defined between the first connection circuit board and the insulating layer; a second sealing member configured to seal a second gap defined between the second connection circuit board and the insulating layer; A first driver chip mounted on the first connecting circuit board; and a second driver chip mounted on the second connection circuit board, The first connecting circuit board includes: a first part, on which the output pad connected to the first pad is arranged; a second part, in which the input pad connected to the main circuit board is arranged; and a third part, which connects the first part to the second part. The second connection circuit board includes: a first part, on which the output pad connected to the second pad is arranged; a second part, in which the input pad connected to the main circuit board is arranged; and a third part, which connects the first part to the second part. The first portion of the first connection circuit board and the first portion of the second connection circuit board overlap each other, the second portion of the first connection circuit board does not overlap with the second portion of the second connection circuit board, the second portion of the first connection circuit board and the second portion of the second connection circuit board are spaced apart from each other on a plane, and the first driving chip is mounted on the second portion of the first connection circuit board. The second driving chip is mounted on the second part of the second connecting circuit board, The first driving chip mounted on the second portion of the first connecting circuit board and the second driving chip mounted on the second portion of the second connecting circuit board are spaced apart from each other in the first direction on the plane, The first sealing member comprises: a first adhesive layer attached to the first connection circuit board; a base layer disposed on the first adhesive layer; and A second adhesive layer is disposed on the base layer and attached to the second connection circuit board.

2. The display device according to claim 1, wherein: The second sealing member includes silicone.

3. The display device according to claim 1, wherein: The base layer includes silicone resin.

4. The display device according to claim 1, wherein: The first sealing member and the second sealing member include the same material as each other.

5. The display device according to claim 4, wherein: The second sealing member has a thickness greater than that of the first sealing member.

6. The display device according to claim 1, wherein: The first sealing member covers a region of an edge of the first connection circuit board overlapping the display panel.

7. The display device according to claim 1, wherein: A width of a portion of the first connection circuit board overlapping the first driving chip in the first direction is smaller than a width of a portion of the first connection circuit board overlapping the first pad in the first direction.

8. The display device according to claim 1, wherein: The display device further includes a third sealing member disposed between the first connection circuit board and the insulating layer and configured to bond the first connection circuit board to the insulating layer and disposed closer to the edge of the display panel than the first pad.

9. A display device, wherein: The display device comprises: A display substrate comprises a first pad area and a second pad area, wherein a first pad row and a second pad row forming different pad rows are arranged in the first pad area, and a third pad row and a fourth pad row forming different pad rows are arranged in the second pad area; Main circuit board; a first connection circuit board configured to connect the first pad area to the main circuit board and the first connection circuit board is electrically connected to the first pad row; a second connecting circuit board configured to connect the first pad area to the main circuit board, the second connecting circuit board being electrically connected to the second pad row and disposed above the first connecting circuit board; a third connection circuit board configured to connect the second pad area to the main circuit board and the third connection circuit board is electrically connected to the third pad row; a fourth connection circuit board, configured to connect the second pad area to the main circuit board, the fourth connection circuit board being electrically connected to the fourth pad row and disposed above the third connection circuit board; a first outer sealing member configured to seal a gap defined between the first connection circuit board and the first pad area; a second outer sealing member configured to seal a gap defined between the third connection circuit board and the second pad area; A first driver chip mounted on the first connecting circuit board; and a second driver chip mounted on the second connection circuit board, The first connecting circuit board includes: a first part, on which the output pads connected to the first pad row are arranged; a second part, in which the input pads connected to the main circuit board are arranged; and a third part, which connects the first part to the second part. The second connection circuit board includes: a first part, on which the output pads connected to the second pad row are arranged; a second part, in which the input pads connected to the main circuit board are arranged; and a third part, which connects the first part to the second part. The third connection circuit board includes: a first part, on which the output pads connected to the third pad row are arranged; a second part, in which the input pads connected to the main circuit board are arranged; and a third part, which connects the first part to the second part. The fourth connection circuit board includes: a first part, on which the output pads connected to the fourth pad row are arranged; a second part, in which the input pads connected to the main circuit board are arranged; and a third part, which connects the first part to the second part. The first portion of the first connection circuit board and the first portion of the second connection circuit board overlap each other, the second portion of the first connection circuit board does not overlap the second portion of the second connection circuit board, and the second portion of the first connection circuit board and the second portion of the second connection circuit board are spaced apart from each other on a plane, The first portion of the third connection circuit board and the first portion of the fourth connection circuit board overlap each other, the second portion of the third connection circuit board does not overlap with the second portion of the fourth connection circuit board, and the second portion of the third connection circuit board and the second portion of the fourth connection circuit board are spaced apart from each other on the plane, The first driving chip is mounted on the second portion of the first connecting circuit board, The second driving chip is mounted on the second part of the second connecting circuit board, The first driving chip mounted on the second portion of the first connecting circuit board and the second driving chip mounted on the second portion of the second connecting circuit board are spaced apart from each other in a first direction on the plane, The first outer sealing member and the second outer sealing member are connected to each other to define an outer sealing member, A portion of the outer sealing member connecting the first outer sealing member to the second outer sealing member is defined as a connecting portion, the connecting portion has a thickness greater than a thickness of the first outer sealing member, The first outer sealing member includes: a first adhesive layer attached to the first connection circuit board; a base layer provided on the first adhesive layer; and a second adhesive layer provided on the base layer and attached to the second connection circuit board, and The second outer sealing member includes: a first adhesive layer attached to the third connection circuit board; a base layer disposed on the first adhesive layer; and a second adhesive layer disposed on the base layer and attached to the fourth connection circuit board.

10. The display device according to claim 9, wherein: The display device further includes a first inner sealing member configured to seal a gap between the second connection circuit board and the first pad area; as well as The second inner sealing member is configured to seal a gap between the fourth connection circuit board and the second pad area.

11. The display device according to claim 10, wherein: The first inner sealing member and the second inner sealing member are connected to each other to define an inner sealing member.

12. The display device according to claim 11, wherein: A portion of the inner sealing member connecting the first inner sealing member to the second inner sealing member is defined as a connecting portion, and The connecting portion has the same thickness as that of the first inner sealing member.

13. The display device according to claim 9, wherein: The display device further includes an anisotropic conductive film, Among them, each of the anisotropic conductive films is arranged between the first pad row and the first connection circuit board, between the second pad row and the second connection circuit board, between the third pad row and the third connection circuit board, and between the fourth pad row and the fourth connection circuit board.

14. The display device according to claim 9, wherein: The display device further includes an anisotropic conductive film, The anisotropic conductive film is disposed between the first pad row and the first connection circuit board and between the third pad row and the third connection circuit board.

15. A method for manufacturing the display device according to claim 1, wherein: The method comprises: Provide a display panel including a pad area, in which a first pad and a second pad are arranged, and the first pad and the second pad are arranged on pad rows different from each other; electrically connecting a first connection circuit board to the first pad, the first pad being closer to an edge of the display panel than the second pad; and electrically connecting a second connection circuit board to the second pad, Wherein, electrically connecting the second connecting circuit board to the second pad comprises: disposing a conductive adhesive member between the second pad and a pad of the second connection circuit board corresponding to the second pad; disposing a preliminary sealing member between the first connection circuit board and the second connection circuit board; and The conductive adhesive member and the preliminary sealing member are pressed onto the second connection circuit board by using a heating block.

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