A frequency synthesizer

Abstract

The present invention belongs to the field of radio communication, and specifically relates to a frequency synthesizer, comprising a reference signal generating circuit, a main phase-locked loop, a local oscillator signal generating circuit and a first power divider, wherein the reference signal generating circuit is respectively connected to the main phase-locked loop and the local oscillator signal generating circuit through the first power divider, and the main phase-locked loop is connected to the local oscillator signal generating circuit. The present invention has the function of reducing phase noise while generating a high-frequency frequency source.

Description

Technical Field

[0001] The invention belongs to the field of radio communications, and in particular relates to a frequency synthesizer. Background Art

[0002] A phase-locked loop frequency synthesizer is an electronic device that converts an input high-stability, low-phase-noise reference signal into a different frequency and has a specific phase relationship with the reference signal. Generally, the frequency of the reference signal is between a few MHz and one or two hundred MHz. In various high-performance, large-dynamic-range frequency conversion, digital communication systems, and radar systems, phase noise is a major factor limiting the frequency of the reference signal. In the actual frequency conversion process, the sideband noise of the local oscillator signal will be directly converted into the sideband noise of the strongly interfering intermediate frequency signal and fall into the intermediate frequency bandwidth, thereby drowning out the useful intermediate frequency signal. This effect is very obvious in high-selectivity and large-dynamic-range receivers, because the sideband noise level of the local oscillator signal determines the performance of the receiver; in digital communication systems, the phase noise of the carrier signal also affects the carrier tracking accuracy and the bit error rate of the digital modulation system; in radar systems, the sideband noise of the transmitted signal will also interfere with the receiver. With the continuous increase in the operating frequency of 5G, satellite communications, and radars, the frequency of the required frequency source is also increasing. Commonly used high-frequency sources are all generated based on low-frequency crystal oscillators. Currently, the main methods of frequency synthesis are direct and indirect. Both direct and indirect methods will use a frequency multiplication scheme. However, the frequency multiplication scheme will deteriorate the phase noise, and its theoretical value is Where n is the frequency multiplication factor. In the microwave frequency band, the frequency multiplication factor often reaches 100 to 1000 or even larger. For crystal oscillators, frequency multiplication will deteriorate the phase noise by 40dB to 60dB. It can be seen that the frequency multiplication scheme is difficult to meet the requirements of applications with high phase noise requirements. Therefore, new methods other than frequency multiplication are needed to generate high-frequency frequency sources with low phase noise. Summary of the invention

[0003] In order to solve the above problems, the present invention provides a frequency synthesizer, which has the function of reducing phase noise while generating a high-frequency frequency source.

[0004] In order to achieve the above object, the present invention adopts the following technical solution:

[0005] A frequency synthesizer comprises a reference signal generating circuit, a main phase-locked loop, a local oscillator signal generating circuit and a first power divider. The reference signal generating circuit is respectively connected to the main phase-locked loop and the local oscillator signal generating circuit through the first power divider. The main phase-locked loop is connected to the local oscillator signal generating circuit.

[0006] Preferably, the reference signal generating circuit includes a first crystal oscillator, a second power divider, a first loop, a first bandpass filter, a first amplifier, a second loop, a third power divider, a third loop, a second amplifier and a second bandpass filter. The first crystal oscillator has two outputs after passing through the second power divider, one of which is connected to the third loop through the first loop, the first bandpass filter and the first amplifier, and the other is connected to the third loop through the second loop and the third power divider; the third loop is connected to the first power divider through the second amplifier and the second bandpass filter.

[0007] Preferably, the first loop includes a first mixer, a first loop filter and a second crystal oscillator, one output of the first mixer is connected to the second crystal oscillator via the first loop filter, and the second crystal oscillator is fed back to the first mixer; the first mixer is connected to the second power divider; and another output of the first mixer is connected to the first bandpass filter.

[0008] Preferably, the second loop includes a second mixer, a second loop filter and a third crystal oscillator. The second mixer is connected to the third crystal oscillator via the second loop filter, and the third crystal oscillator is fed back to the second mixer; the second mixer is connected to the second power divider; and the third crystal oscillator is connected to the third power divider.

[0009] Preferably, the third loop includes a third mixer, a third amplifier, a third bandpass filter, a fourth mixer, a third loop filter and a fourth crystal oscillator. The third mixer is connected to the fourth mixer via the third amplifier and the third bandpass filter. The fourth mixer is fed back to the third mixer via the third loop filter and the fourth crystal oscillator. The third mixer is connected to the third power divider. The fourth mixer is connected to the second amplifier.

[0010] Preferably, the main phase-locked loop includes a phase frequency detector, a fourth loop filter, a voltage-controlled oscillator, a fourth band-pass filter, a fifth mixer, a fifth band-pass filter, a fourth amplifier and a sixth band-pass filter; the phase frequency detector is connected to the fourth band-pass filter via the fourth loop filter and the voltage-controlled oscillator; the voltage-controlled oscillator is fed back to the phase frequency detector via the fifth mixer, the fifth band-pass filter, the fourth amplifier and the sixth band-pass filter; the phase frequency detector is connected to the first power divider; the fifth mixer is connected to the local oscillator signal generating circuit; and the fourth band-pass filter outputs a signal.

[0011] Preferably, the local oscillator signal generating circuit includes a frequency multiplier, a seventh bandpass filter, a fifth amplifier and an eighth bandpass filter. The frequency multiplier is connected to the eighth bandpass filter via the seventh bandpass filter and the fifth amplifier; the frequency multiplier is connected to the first power divider; and the eighth bandpass filter is connected to the main phase-locked loop.

[0012] Preferably, the third power divider is a power divider that outputs two paths with a phase difference of 90°.

[0013] Preferably, the frequency multiplier is a frequency multiplier with low 1 / f noise.

[0014] Preferably, the frequency multiplier is a Schottky barrier diode, a transistor or a field effect transistor.

[0015] Compared with the prior art, the present invention has the following beneficial effects:

[0016] 1) The output signal of the first crystal oscillator is used as the input signal of the reference signal generating circuit. It has two outputs through the second power divider. One is connected to the third loop through the first loop, the first bandpass filter and the first amplifier, and the other is connected to the third loop through the second loop and the third power divider. The third loop is connected to the first power divider through the second amplifier and the second bandpass filter. The output frequency of the first amplifier is twice the frequency of the first crystal oscillator. The output frequencies of the third crystal oscillator and the fourth crystal oscillator are the same as the first crystal oscillator. The frequency output from the reference signal generating circuit is 4 times that of the first crystal oscillator, instead of 20*log(4) when the frequency multiplication scheme is adopted. Its phase noise deteriorates by 10*log(4). Therefore, this connection can improve the phase noise by 10*log(4) while increasing the output frequency of the reference signal generating circuit. By analogy, when the N-frequency multiplication signal is generated by this method, its phase noise deteriorates by 10*log(N).

[0017] 2) The difference frequency signal output by the fourth mixer is a DC control signal, which is phase-related to the frequencies of the two input signals. Since the two input signals both adopt a phase-locked structure, the two signals are locked to the same reference crystal oscillator, ensuring that the frequencies of the second crystal oscillator, the third crystal oscillator and the fourth crystal oscillator are exactly the same as the frequency of the first crystal oscillator, thereby ensuring that no spurious signals are introduced at the near end of the final output signal due to mixing. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 is a general block diagram of the present invention;

[0019] Figure 2 A circuit for generating a reference signal;

[0020] Figure 3 A local oscillator signal generating circuit;

[0021] Figure 4 is the main phase-locked loop;

[0022] Among them, A-reference signal generating circuit, B-main phase-locked loop, C-local oscillator signal generating circuit, 1A-first loop, 2A-second loop, 3A-third loop, 01-first crystal oscillator, 02-second power divider, 03-second mixer, 04-first mixer, 05-first bandpass filter, 06-first amplifier, 07-first loop filter, 08-second crystal oscillator, 09-second loop filter, 10-third crystal oscillator, 11-third power divider, 12-third mixer, 13-third amplifier, 14 -third bandpass filter, 15-fourth crystal oscillator, 16-fourth mixer, 17-second amplifier, 18-second bandpass filter, 19-first power divider, 20-frequency detector, 21-fourth loop filter, 22-voltage controlled oscillator, 23-sixth bandpass filter, 24-fourth amplifier, 25-fifth bandpass filter, 26-fifth mixer, 27-frequency multiplier, 28-seventh bandpass filter, 29-fifth amplifier, 30-eighth bandpass filter, 31-fourth bandpass filter, 32-third loop filter. DETAILED DESCRIPTION

[0023] In order to make the purpose and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention.

[0024] Embodiment 1:

[0025] like Figure 1 As shown, the present invention proposes a frequency synthesizer based on phase-locked loop technology. The frequency synthesizer is composed of a reference signal generating circuit A, a main phase-locked loop B, a local oscillator signal generating circuit C and a first power divider 19. The reference signal generating circuit A is connected to the main phase-locked loop B and the local oscillator signal generating circuit C respectively through the first power divider 19, and the main phase-locked loop B is connected to the local oscillator signal generating circuit C. The output signal of the reference signal generating circuit A is used as the reference input of the main phase-locked loop B after passing through the first power divider 19, and is finally output from the main phase-locked loop B. Among them, the output signal of the reference signal generating circuit A is also used as the input signal of the local oscillator signal generating circuit C after passing through the first power divider 19, and this input signal is fed back to the main phase-locked loop (B).

[0026] Among them, the output signal of the first crystal oscillator 01 is used as the input signal of the reference signal generating circuit A. The output signal of the reference signal generating circuit A is 4 times the frequency of the first crystal oscillator 01, and its phase noise deteriorates by 10*log(4) instead of 20*log(4) when the frequency doubling scheme is adopted. This method can increase the reference signal frequency and improve the phase noise by 10*log(4).

[0027] For a phase-locked loop, the flat phase noise within the loop bandwidth is determined by the phase detector and can be determined by the following formula:

[0028]

[0029] Among them, Φ out (f out ) is the output signal frequency phase noise, Φ PLL-FOM is the normalized noise floor of the phase detector, f pfd is the phase detection frequency, f out is the output signal frequency. From the above formula, it can be seen that the ratio of the output signal frequency to the phase detection signal frequency has the greatest impact on the phase noise of the final output signal frequency. For the flat phase noise within the loop bandwidth of the phase-locked loop, the method to increase the output signal frequency phase noise is to increase the phase detection frequency and reduce the division ratio N (N = f out / f pfd ). For the same output frequency, if the phase detection frequency is doubled, the frequency division ratio is halved, and the phase noise is increased by 3dB.

[0030] The phase noise at the near end within the flat part of the loop is mainly determined by the phase noise of the reference signal, because the noise power spectrum density of the phase detector at the near end is much lower than the noise power of the crystal oscillator at the near end. The solution adopted by the present invention is not direct frequency doubling, but a mixing scheme is used to increase the reference signal frequency. This method doubles the reference frequency, and the phase noise deteriorates by 10*log(2)=3dB, which is 3dB better than the phase noise deterioration of 20*10log(2)=6dB due to frequency doubling. The deterioration of the phase noise is 10*log(f2 / f1), where f2 / f1 is the ratio of the output frequency to the input frequency. The invention has obvious improvements on the near-end phase noise in the flat part and within the flat part of the phase-locked loop.

[0031] like Figure 1As shown, the first crystal oscillator 01 is used as the main reference signal of the reference signal generating circuit A, and outputs two signals through the second power divider 02, one of which is used as the reference signal of the first loop 1A, and the other is used as the reference signal of the second loop 2A, so that the second crystal oscillator 08 and the third crystal oscillator 10 are respectively locked to the first crystal oscillator 01. The first mixer 04 plays the role of frequency detector and phase detector and mixer, and forms the first loop 1A with the first loop filter 07 and the second crystal oscillator 08, so that the second crystal oscillator 08 is locked and outputs the same frequency as the first crystal oscillator 01. Among them, the first mixer 04 outputs a difference frequency signal and a sum frequency signal. The difference frequency signal is amplified by the first loop filter 07 and acts on the second crystal oscillator 08; the sum frequency signal is amplified by the first bandpass filter 05 and the first amplifier 06 and enters the fourth mixer 16. The output frequency of the first amplifier 06 is twice the frequency of the first crystal oscillator 01. The 2 times frequency here is not achieved by the frequency doubling method, but is obtained by adding through the first mixer 04. At the same time, the noise power spectrum density of the output signal will also be added, and its phase noise deterioration is only 3dB, which is 3dB optimized compared with the 2 times frequency scheme. The function of the second loop 2A is to lock the third crystal oscillator 10 to the first crystal oscillator 01. The output signal of the third crystal oscillator 10 is used as the feedback signal of the second loop 2A, and the other way passes through the third power divider 11 as the input of the third mixer 12. The second mixer 03 is used as a frequency detector and phase detector, and the final output frequency of the third crystal oscillator 10 is the same as that of the first crystal oscillator 01. The signal output by the third power divider 11 enters the third mixer 12. The third power divider 11 here uses a power divider that outputs two paths with a phase difference of 90°. The other input signal of the third mixer 12 is generated by the fourth crystal oscillator 15. Specifically, a signal output from the fourth mixer 16 is fed back to the third mixer 12 through the third loop filter 32 and the fourth crystal oscillator 15. The frequency of the fourth crystal oscillator 15 is the same as the frequency of the first crystal oscillator 01. The output frequency of the third crystal oscillator 10 and the output frequency of the fourth crystal oscillator 15 are added after passing through the third mixer 12 to output a sum frequency signal. The frequency of this sum frequency signal is twice the frequency of the first crystal oscillator 01. This sum frequency signal enters the fourth mixer 16 after being amplified by the third amplifier 13 and filtered by the third bandpass filter 14. The fourth mixer 16 outputs a difference frequency signal and a sum frequency signal. The sum frequency signal is amplified by the second amplifier 17 and filtered by the second bandpass filter 18 and then output. This output frequency is 4 times the frequency of the first crystal oscillator 01. The difference frequency signal output by the fourth mixer 16 is fed back to the third mixer 12 after passing through the third loop filter 32 and the fourth crystal oscillator 15 .

[0032] Among them, the sum frequency signal output by the first mixer 04 and the second mixer 03 has a noise power addition, and the noise power spectrum density is also added, so relative to the first crystal oscillator 01, the phase noise of the sum frequency signal output by the first mixer 04 and the second mixer 03 increases by 3dB. Similarly, the sum frequency signal output by the fourth mixer 16 of the second stage also increases the noise power spectrum density by 3dB due to the addition of noise power. The final signal frequency output from the reference signal generating circuit A is 4 times the frequency of the first crystal oscillator 01. At the same time, the final phase noise increases by 6dB, which is 6dB better than the frequency doubling scheme. By analogy, the phase noise of the N-fold frequency signal generated by this method deteriorates by 10*log(N).

[0033] The difference frequency signal output by the fourth mixer 16 is a DC control signal, which is phase-related to the frequency of the two input signals. Since the two input signals are both phase-locked, the two signals are locked to the same reference crystal oscillator, ensuring that the frequencies of the second crystal oscillator 08, the third crystal oscillator 10 and the fourth crystal oscillator 15 are exactly the same as the frequency of the first crystal oscillator 01. This also ensures that there are no spurious signals introduced by mixing at the near end of the final output signal.

[0034] The signal of the reference signal generating circuit A passes through the power divider 19 and is output to the local oscillator signal generating circuit C to generate the local oscillator signal for the mixing in the loop. The signal is filtered by the frequency multiplier 27, the seventh bandpass filter 28, the fifth amplifier 29 and the eighth bandpass filter 30 and then input into the main phase-locked loop B. The frequency multiplier 27 here is a single-stage frequency multiplier with a filter amplifier circuit in the middle. The specific use is based on the actual frequency requirements for frequency planning. The frequency multiplier 27 should be selected to have good fundamental harmonic suppression. The general 2-frequency multiplier only suppresses the fundamental and third harmonics by 10dB to 20dB, and the low harmonic 2-frequency multiplier can suppress the fundamental harmonics by 20dB to 30dB, or even higher. In addition, select a frequency multiplier with low 1 / f noise, such as Schottky barrier diodes, crystal triodes, field effect transistors (FETs), etc. The noise floor of this type of frequency multiplier at 1KHz can reach -169dBc / Hz. The fifth amplifier 29 should also be a low phase noise amplifier with low additional phase noise, and a GaAs pHMET amplifier may be selected. The phase noise of this type of low phase noise amplifier can reach -145dBc / Hz or even lower when it deviates from the main frequency by 1KHz in the X-band.

[0035] The signal of the reference signal generating circuit A passes through the power divider 19, and the outputted reference signal is used as the input of the frequency detector 20, and enters the voltage-controlled oscillator 22 after passing through the fourth loop filter 21. The output signal of the voltage-controlled oscillator 22 and the signal generated by the local oscillator signal generating circuit enter the fifth mixer 26 for mixing, and then enters the RF port of the frequency detector 20 for phase detection after passing through the fifth band-pass filter 25, the fourth amplifier 24 and the sixth band-pass filter 23. The control signal output by the frequency detector 20 passes through the fourth loop filter 21, and the voltage-controlled oscillator 22 is tuned to generate the required frequency. The output signal of the voltage-controlled oscillator 22 is filtered by the fourth band-pass filter 31 and then output. The fourth band-pass filter 31 mainly filters out the harmonics of the voltage-controlled oscillator, the local oscillator signal leaked from the mixer, and the intermediate frequency leakage signal. The fifth bandpass filter 25 mainly filters out the intermodulation signal and local oscillator signal generated after mixing. The fourth amplifier 24 amplifies the signal after mixing and filtering to an appropriate power. The sixth bandpass filter 23 filters out the harmonics of the fourth amplifier 24 and the intermodulation generated by the fifth bandpass filter 25 and the fifth mixer 26 to prevent the phase-locked loop from being locked.

[0036] Embodiment 2:

[0037] Different from the first embodiment, the frequency multiplier 27 in this embodiment may also be a multi-stage frequency multiplier.

[0038] Embodiment 3:

[0039] Different from the first embodiment, the local oscillator signal generating circuit C in this embodiment can also use the same method as the reference signal generating circuit A.

[0040] For all the above embodiments, the improvement of phase noise by the invention is analyzed below. The output signal is 4GHz, the mixed local oscillator signal is 2.4GHz, and the first crystal oscillator 01, the second crystal oscillator 08, the third crystal oscillator 10 and the fourth crystal oscillator 15 are 100MHz respectively. The phase noise is: -132dBc / Hz@100Hz; -160dBc / Hz@1kHz; -175dBc / Hz@10kHz; -175dBc / Hz@100kHz; -175dBc / Hz@1MHz. The phase noise of the 400MHz signal input from the first power divider 19 to the frequency detector 20 is -126dBc / Hz@100Hz; -154dBc / Hz@1kHz; -169dBc / Hz@10kHz; -169dBc / Hz@100kHz; -169dBc / Hz@1MHz. The following table analyzes the phase detector, reference frequency, mixing local oscillator signal, and output signal phase noise one by one.

[0041] Table 1 Phase noise analysis of each part of the present invention

[0042]

[0043]

[0044] Table 2 Phase noise analysis of each part of the reference signal using the frequency doubling scheme

[0045]

[0046] Table 3 Phase noise analysis of each part of 100MHz reference

[0047]

[0048] From the data analysis, it can be seen that the method proposed in the present invention can significantly reduce the phase noise within the loop bandwidth of the phase-locked loop output signal, especially the phase noise within the near end 1kHz. Compared with the traditional phase-locked loop, the phase noise is improved by 10.5dB at 100Hz and 14dB from 1kHz to 100kHz. Compared with the reference signal generation circuit using the frequency doubling scheme, the phase noise is improved by 9dB at 100Hz and 5.5dB at 1kHz.

Claims

1. A frequency synthesizer, characterized in that: It comprises a reference signal generating circuit (A), a main phase-locked loop (B), a local oscillator signal generating circuit (C) and a first power divider (19), wherein the reference signal generating circuit (A) is respectively connected to the main phase-locked loop (B) and the local oscillator signal generating circuit (C) through the first power divider (19), and the main phase-locked loop (B) is connected to the local oscillator signal generating circuit (C); The reference signal generating circuit (A) comprises a first crystal oscillator (01), a second power divider (02), a first loop (1A), a first bandpass filter (05), a first amplifier (06), a second loop (2A), a third power divider (11), a third loop (3A), a second amplifier (17) and a second bandpass filter (18); the first crystal oscillator (01) has two outputs after passing through the second power divider (02); one output is connected to the third loop (3A) through the first loop (1A), the first bandpass filter (05) and the first amplifier (06); and the other output is connected to the third loop (3A) through the second loop (2A) and the third power divider (11); the third loop (3A) is connected to the first power divider (19) through the second amplifier (17) and the second bandpass filter (18); The output signal of the first crystal oscillator (01) is used as an input signal of the reference signal generating circuit (A), and the output signal of the reference signal generating circuit (A) is four times the frequency of the first crystal oscillator (01); The first loop (1A) comprises a first mixer (04), a first loop filter (07) and a second crystal oscillator (08); one output of the first mixer (04) is connected to the second crystal oscillator (08) via the first loop filter (07), and the second crystal oscillator (08) is fed back to the first mixer (04); the first mixer (04) is connected to the second power divider (02); another output of the first mixer (04) is connected to the first bandpass filter (05); The second loop (2A) comprises a second mixer (03), a second loop filter (09) and a third crystal oscillator (10); the second mixer (03) is connected to the third crystal oscillator (10) via the second loop filter (09), and the third crystal oscillator (10) feeds back to the second mixer (03); the second mixer (03) is connected to the second power divider (02); and the third crystal oscillator (10) is connected to the third power divider (11); The third loop (3A) comprises a third mixer (12), a third amplifier (13), a third band-pass filter (14), a fourth mixer (16), a third loop filter (32) and a fourth crystal oscillator (15); the third mixer (12) is connected to the fourth mixer (16) via the third amplifier (13) and the third band-pass filter (14); the fourth mixer (16) is fed back to the third mixer (12) via the third loop filter (32) and the fourth crystal oscillator (15); the third mixer (12) is connected to the third power divider (11); and the fourth mixer (16) is connected to the second amplifier (17).

2. The frequency synthesizer according to claim 1, wherein: The main phase-locked loop (B) comprises a phase frequency detector (20), a fourth loop filter (21), a voltage-controlled oscillator (22), a fourth band-pass filter (31), a fifth mixer (26), a fifth band-pass filter (25), a fourth amplifier (24) and a sixth band-pass filter (23); the phase frequency detector (20) is connected to the fourth band-pass filter (31) via the fourth loop filter (21) and the voltage-controlled oscillator (22); the voltage-controlled oscillator (22) is fed back to the phase frequency detector (20) via the fifth mixer (26), the fifth band-pass filter (25), the fourth amplifier (24) and the sixth band-pass filter (23); the phase frequency detector (20) is connected to the first power divider (19); the fifth mixer (26) is connected to the local oscillator signal generating circuit (C); and the fourth band-pass filter (31) outputs a signal.

3. The frequency synthesizer according to claim 1, wherein: The local oscillator signal generating circuit (C) comprises a frequency multiplier (27), a seventh bandpass filter (28), a fifth amplifier (29) and an eighth bandpass filter (30); the frequency multiplier (27) is connected to the eighth bandpass filter (30) via the seventh bandpass filter (28) and the fifth amplifier (29); the frequency multiplier (27) is connected to the first power divider (19); and the eighth bandpass filter (30) is connected to the main phase-locked loop (B).

4. The frequency synthesizer according to claim 3, wherein: The third power divider (11) is a power divider that outputs two paths with a phase difference of 90°.

5. The frequency synthesizer according to claim 4, characterized in that: The frequency multiplier (27) is a frequency multiplier with low 1 / f noise.

6. The frequency synthesizer according to claim 5, characterized in that: The frequency multiplier (27) is selected from Schottky barrier diodes, crystal triodes or field effect transistors.

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