Driver chip, LED lamp and LED display

Abstract

In order to overcome the problem of complicated wiring or color differences between LED lights in adjacent rows in the LED display screen in the prior art, the present invention provides a driver chip, an LED lamp and an LED display screen. On the one hand, the present invention provides an LED lamp, the LED lamp also includes a data direction judgment and switching module arranged in the driver chip or outside the driver chip and connected to the driver module; the LED lamp provided by the present invention, its two signal ports no longer distinguish the data direction, and can input and output data signals. The data signal direction of the first signal terminal and the second signal terminal is judged by the data direction judgment and switching module, and the port for inputting and the port for outputting the data signal are automatically switched, which greatly reduces the complexity of wiring. The LED lights between adjacent rows or columns will not produce color differences.

Description

Technical Field

[0001] The present application belongs to the field of LEDs, and in particular to LED lamps with built-in driver ICs. Background Art

[0002] LED display screens are well known to the public. They form a display screen by arranging LED lamps in an array. The most advanced method on the market is to use LED lamps with built-in driver ICs to form LED display screens. Figure 1 As shown, it includes a driver IC 2', which is provided with several signal ports and power ports; the power port includes a positive port and a negative port, which is connected to an external power supply to form a power loop to provide power for the driver IC 2' and the light-emitting chip; the signal port includes a signal input terminal and a signal output terminal; the control signal enters the signal input terminal from the control module of the LED display or the upper LED lamp 100', and the control signal is transmitted to the next LED lamp 100' from the signal output terminal. It is provided with a control port (not marked in the figure) inside, which is connected to three light-emitting chips 1' (blue light-emitting chip, green light-emitting chip and red light-emitting chip), and the three light-emitting chips 1' share a common anode (or a common cathode).

[0003] At present, when the LED lamps 100' are arranged in an array to form an LED display screen 1000', since the signal port has a signal input end and a signal output end, it is required that the control signal always enters from the signal input end and is output from the signal output end; Figure 2 As shown, if the lamp beads of all LED lamps 100' are arranged in the same way, taking the control signal as an example of horizontal transmission (it can also be vertical transmission in columns), the signal lines of LED lamps 100' in the same row are transmitted in sequence, and the LED lamps 100' between adjacent rows are connected end to end through the signal lines. Specifically, the LED lamps 100' in each row are connected in series from left to right, and when it comes to the last LED lamp in each row, the signal output end of the last LED lamp 100' is connected in series with the signal input end of the next row through the signal line, and the transmission starts again. The disadvantage of this method is that the signal lines between the adjacent rows of LED lamps 100' have to be wound for a long distance, which increases the complexity of wiring. In particular, in the field of transparent LED display screens 1000', the requirements for circuit design are very simple. Winding from the beginning will increase the complexity of circuit design and make it difficult to arrange other functions such as conductive circuits.

[0004] In order to make wiring easier, the applicant rotated the adjacent rows of LED lamps 100' by 180 degrees and installed them in reverse, and connected the adjacent rows in series at the head or tail. For example, the odd rows are installed in the forward direction, and the even rows are installed in the reverse direction; the signal input end of the odd rows is on the left, the signal output end is on the right, and the control signal is transmitted from left to right; the even rows are on the contrary, the signal input end is on the right, the signal output end is on the left, and the control signal is transmitted from right to left; however, this method has the following problems: the arrangement directions of the three light-emitting chips inside the adjacent rows of LED lamps 100' are just opposite, which will cause the color of the adjacent rows of LED lamps 100' to be different from the left and right viewing angles after the LED display screen 1000' is formed. Summary of the invention

[0005] In order to overcome the problems of complicated wiring or color differences between adjacent rows of LED lights in the LED display screen in the prior art, the present invention provides a driving chip, an LED light and an LED display screen.

[0006] A first aspect of the present invention provides a driver chip, wherein a driver module is provided in the driver chip, and the driver chip is connected to a signal port and a power port; the power port is used to provide power to the driver chip; and the signal port is used to input and output data signals;

[0007] The driving chip also includes a data direction judgment and switching module connected to the driving module;

[0008] The signal port includes a first signal port and a second signal port;

[0009] The data direction judgment and switching module is connected to the first signal port and the second signal port, and is used to judge the data signal input direction of the first signal port and the second signal port, automatically switch the data signal input signal port and the output signal port, import and transmit the data signal from the input signal port to the driving module, receive the data signal returned from the driving module, and then output the data signal from the data output signal port.

[0010] The driver chip provided by the present invention has a signal port connected thereto that no longer distinguishes the data direction, and can input and output data signals. The data signal direction of the first signal terminal and the second signal terminal is determined by a data direction determination and switching module, the port for inputting the data signal and the port for outputting the data signal are identified, the data signal is input from the port for inputting the data, outputted to the driver module, the data signal returned from the driver module is received, and the data signal is outputted from the port for outputting the data. When it is used in devices such as LED display screens, it is no longer necessary to specially design the arrangement or wiring of each LED lamp. Without changing the arrangement direction of the LED lamps between rows (or between columns), the LED lamps between adjacent rows (or adjacent columns) are connected in series at the head or tail, avoiding the need for the original wiring to be connected head to tail for winding layout, greatly reducing the complexity of the wiring. The LED lamps between adjacent rows or columns will not produce color differences.

[0011] Further, the driving module includes a data input port and a data output port;

[0012] The data direction judgment and switching module includes a data input circuit, a data output circuit and a watchdog;

[0013] The data input circuit comprises two input branches connected to the data input port, and the two input branches are respectively connected to the first signal terminal and the second signal terminal;

[0014] The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal and the second signal terminal;

[0015] The watchdog is used to determine the input direction of the data signal in the first signal terminal and the second signal terminal, and to control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port.

[0016] Further, the data input circuit includes a data direction selector; the data direction selector is respectively connected to the first signal end, the second signal end, the watchdog and the data input port of the driving module; the data direction selector is connected to the first signal end and the second signal end to form two input branches, which is used to switch the signal port connected to the data signal input according to the control signal sent by the watchdog, select the input branch, and output the data signal from the data direction selector to the data input port of the driving module;

[0017] The data output circuit is connected to the data output port of the driving module and comprises two output branches provided with switch devices, respectively connected to the first signal port and the second signal port, wherein the two switch devices always operate in an anti-phase state;

[0018] The watchdog is directly or indirectly connected to the data input port, data output port, data direction selector and the switch device on the data output circuit, and is used to collect signals from the data input port and data output port, identify the signal port for data signal input and the signal port for output; and send a control signal to the data direction selector and the two switch devices on the data output circuit, and an inverter is selectively set on one of the lines between the two switch devices and the watchdog.

[0019] Further, the data direction selector includes a first signal port, a second signal port, a data output port and a selection port;

[0020] The first signal terminal is connected to the first signal port through a first diode, and the second signal terminal is connected to the second signal port through a second diode; the data output port is connected to the data input port of the driving module;

[0021] The data output port of the driving module is connected to the first signal terminal through a first switch device, and is connected to the second signal terminal through a second switch device;

[0022] The watchdog includes an input signal acquisition port, an output signal acquisition port and a control port;

[0023] The input signal acquisition port is connected to the first signal port of the data direction selector; the output signal acquisition port is connected to the data output port of the driving module; the control port is respectively connected to the selection port of the data direction selector, the control end of the first switch device and the second switch device, and an inverter is set on the control port and the control end of the second switch device; or

[0024] The input signal acquisition port is connected to the second signal port of the data direction selector; the output signal acquisition port is connected to the data output port of the driving module; the control port is respectively connected to the selection port of the data direction selector, the control end of the first switch device and the second switch device, and an inverter is set on the control port and the control end of the first switch device.

[0025] Further, the watchdog includes a signal monitoring module and a counter;

[0026] The signal monitoring module is connected to the input signal acquisition port and the output signal acquisition port, and is provided with a monitoring output port; it performs logical judgment according to the signals collected by the input signal acquisition port and the output signal acquisition port, and outputs a monitoring signal from the monitoring output port; if a specific logic is met, the monitoring signal output to the counter is a low level 0, so that the counter is reset; otherwise, the monitoring signal output to the counter is a high level 1, so that the counter counts;

[0027] The counter is used to count within a preset time. If the count reaches or exceeds a preset value, the output control signal is determined to be a high level 1, otherwise the output control signal is a low level 0.

[0028] Furthermore, the signal monitoring module logic judgment rules are as follows: when the signals collected by the input signal acquisition port and the output signal acquisition port are not equal, and the signal collected by the input signal acquisition port is a low level 0, and the signal collected by the output signal acquisition port is a high level 1, the monitoring output port outputs a monitoring signal of a low level 0; otherwise, the monitoring output port outputs a monitoring signal of a high level 1.

[0029] Furthermore, the frequency of the signal collected by the signal monitoring module is much greater than the frequency of the data signal;

[0030] The data signal is input and output from the driving module using a first-in first-out rule; the preset time is greater than the time for the data signal to be input and output from the driving module.

[0031] Furthermore, the driving module includes a logic circuit module and an analog circuit module;

[0032] The logic circuit module is used to receive the data signal input from the data input port, extract the control signal from the data signal and transmit it to the analog circuit module, and output the data signal from the data output port;

[0033] The analog circuit module is used to generate a plurality of driving signals corresponding to the number of light-emitting chips according to the data signal, and drive the corresponding light-emitting chips.

[0034] Further, the data input circuit includes a first AND gate, a second AND gate and an OR gate; wherein the first signal terminal is connected to an input terminal of the first AND gate through a fourth diode to form a first input branch; the second signal terminal is connected to an input terminal of the second AND gate through a fifth diode to form a second input branch; the output terminals of the first AND gate and the second AND gate are connected to the input terminal of the OR gate, and the output terminal of the OR gate is connected to the data input port;

[0035] The data output circuit comprises a first output branch and a second output branch, wherein the first output branch is connected between the first signal terminal and the data output port through the third switch device; and the second output branch is connected between the second signal terminal and the data output port through the fourth switch device;

[0036] The watchdog includes a control input port and a control output port, wherein the control input port is connected to the output end of a third AND gate, one input end of the third AND gate is connected to the data output port, and the other input end is connected to the first signal end through a second NOT gate; the control output port is connected to the other input end of the second AND gate and the control end of the third switch device, and is connected to the other input end of the first AND gate and the control end of the fourth switch device through a first NOT gate.

[0037] The second aspect of the present invention provides an LED lamp, comprising a driver chip, a light emitting chip, a signal port and a power port, wherein the driver chip is provided with a driver module; the power port is used to provide power to the circuit in the LED lamp; the signal port is used to input and output data signals; the light emitting chip is connected to the driver chip and driven by the driver module;

[0038] The signal port includes a first signal terminal and a second signal terminal;

[0039] The LED lamp further comprises a data direction determination and switching module which is arranged inside or outside the driving chip and connected to the driving module;

[0040] The data direction determination and switching module is connected to the first signal terminal and the second signal terminal, and is used to determine the data signal input direction of the first signal terminal and the second signal terminal, start switching the data signal input signal port and the output signal port, import and transmit the data signal from the input signal port to the driving module, receive the data signal returned from the driving module, and then output the data signal from the data output signal port.

[0041] The LED lamp provided by the present invention has two signal ports that no longer distinguish data directions, and both can input and output data signals. The data signal directions of the first signal terminal and the second signal terminal are determined by a data direction determination and switching module, the data signal input port and the data signal output port are identified, the data signal is input from the data input port, output to the driving module, the data signal returned from the driving module is received, and the data signal is output from the data output port. When it is used in devices such as LED display screens, it is no longer necessary to specially design the arrangement or wiring of each LED lamp. Without changing the arrangement direction of the LED lamps between rows (or columns), the LED lamps between adjacent rows (or adjacent columns) are connected in series at the head or tail, avoiding the original wiring method that requires head-to-tail connection for winding layout, greatly reducing the complexity of wiring. The LED lamps between adjacent rows or columns will not produce color differences.

[0042] Furthermore, the data direction determination and switching module is arranged in the driving chip.

[0043] Further, the driving module includes a data input port and a data output port;

[0044] The data direction judgment and switching module includes a data input circuit, a data output circuit and a watchdog;

[0045] The data input circuit comprises two input branches connected to the data input port, and the two input branches are respectively connected to the first signal terminal and the second signal terminal;

[0046] The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal and the second signal terminal;

[0047] The watchdog is used to determine the input direction of the data signal in the first signal terminal and the second signal terminal, and to control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port.

[0048] Further, the data input circuit includes a data direction selector; the data direction selector is respectively connected to the first signal end, the second signal end, the watchdog and the data input port of the driving module; the data direction selector is connected to the first signal end and the second signal end to form two input branches, which is used to switch the signal port connected to the data signal input according to the control signal sent by the watchdog, select the input branch, and output the data signal from the data direction selector to the data input port of the driving module;

[0049] The data output circuit is connected to the data output port of the driving module and comprises two output branches provided with switch devices, respectively connected to the first signal port and the second signal port, wherein the two switch devices always operate in an anti-phase state;

[0050] The watchdog is directly or indirectly connected to the data input port, data output port, data direction selector and the switch device on the data output circuit, and is used to collect signals from the data input port and data output port, identify the signal port for data signal input and the signal port for output; and send a control signal to the data direction selector and the two switch devices on the data output circuit, and an inverter is selectively set on one of the lines between the two switch devices and the watchdog.

[0051] Further, the watchdog includes a signal monitoring module and a counter;

[0052] The signal monitoring module is connected to the input signal acquisition port and the output signal acquisition port, and is provided with a monitoring output port; it performs logical judgment according to the signals collected by the input signal acquisition port and the output signal acquisition port, and outputs a monitoring signal from the monitoring output port; if a specific logic is met, the monitoring signal output to the counter is a low level 0, so that the counter is reset; otherwise, the monitoring signal output to the counter is a high level 1, so that the counter counts;

[0053] The counter is used to count within a preset time. If the count reaches or exceeds a preset value, the output control signal is determined to be a high level 1, otherwise the output control signal is a low level 0.

[0054] Furthermore, the signal monitoring module logic judgment rules are as follows: when the signals collected by the input signal acquisition port and the output signal acquisition port are not equal, and the signal collected by the input signal acquisition port is a low level 0, and the signal collected by the output signal acquisition port is a high level 1, the monitoring output port outputs a monitoring signal of a low level 0; otherwise, the monitoring output port outputs a monitoring signal of a high level 1.

[0055] Furthermore, the frequency of the signal collected by the signal monitoring module is much greater than the frequency of the data signal;

[0056] The data signal is input and output from the driving module using a first-in first-out rule; the preset time is greater than the time for the data signal to be input and output from the driving module.

[0057] Furthermore, the driving module includes a logic circuit module and an analog circuit module;

[0058] The logic circuit module is used to receive the data signal input from the data input port, extract the control signal from the data signal and transmit it to the analog circuit module, and output the data signal from the data output port;

[0059] The analog circuit module is used to generate a plurality of driving signals corresponding to the number of light-emitting chips according to the data signal, and drive the corresponding light-emitting chips.

[0060] Further, the data input circuit includes a first AND gate, a second AND gate and an OR gate; wherein the first signal terminal is connected to an input terminal of the first AND gate through a fourth diode to form a first input branch; the second signal terminal is connected to an input terminal of the second AND gate through a fifth diode to form a second input branch; the output terminals of the first AND gate and the second AND gate are connected to the input terminal of the OR gate, and the output terminal of the OR gate is connected to the data input port;

[0061] The data output circuit comprises a first output branch and a second output branch, wherein the first output branch is connected between the first signal terminal and the data output port through the third switch device; and the second output branch is connected between the second signal terminal and the data output port through the fourth switch device;

[0062] The watchdog includes a control input port and a control output port, wherein the control input port is connected to the output end of a third AND gate, one input end of the third AND gate is connected to the data output port, and the other input end is connected to the first signal end through a second NOT gate; the control output port is connected to the other input end of the second AND gate and the control end of the third switch device, and is connected to the other input end of the first AND gate and the control end of the fourth switch device through a first NOT gate.

[0063] A third aspect of the present invention provides an LED display screen, the above-mentioned LED lamp.

[0064] The LED display screen provided by the present invention has an array of LED lamps improved and innovated by the present application, so there is no need to specially design the arrangement or wiring of each LED lamp. Without changing the arrangement direction of LED lamps between rows (or columns), the heads of adjacent rows (or columns) are connected in series or the tails are connected in series, which avoids the need for the original wiring to be connected head to tail for winding layout, greatly reducing the complexity of wiring. LED lamps between adjacent rows or columns will not produce color differences.

[0065] Furthermore, the LED lamps form an LED array, and the LED array is arranged in an array in the same direction.

[0066] Furthermore, it also includes a data control module;

[0067] The data control module is provided with a plurality of first data ports and second data ports; some LED lamps of the LED array are serially connected between the first data ports and the second data ports.

[0068] Furthermore, the array of LED lamps serially connected between the first data port and the second data port is divided into multiple rows or multiple columns, and the LED lamps in adjacent rows or adjacent columns are connected at the head or the tail.

[0069] Furthermore, the data control module includes two physical network ports, an FPGA and a memory;

[0070] The FPGA includes a data acquisition and transmission module, a first output module, a second output module and a circuit breaker monitoring module;

[0071] The data acquisition and transmission module is connected to the two physical network ports and the memory, and is used to collect data packets and send data packets, and obtain data signals from the data packets and store them in the memory;

[0072] The first output module is used to call the data signal stored in the memory and send it to the corresponding serially connected LED lamp through the first data port;

[0073] The second output module is used to reversely call the data signal stored in the memory as a backup signal, and send the backup signal to the corresponding serially connected LED lamp through the second data port;

[0074] A backup switch device is provided between the second output module and the second data port, and the backup switch device is used to control the on and off of the second output module sending a backup signal outward;

[0075] The circuit breaker monitoring module is connected to the control end of the backup switch device and is connected to the second data port through a third diode, and is used to collect data from the second data port and output a backup control signal to the control end of the backup switch device.

[0076] By setting the first output module, the second output module and the circuit break detection module in the FPGA in the data control module, the data signal can be inputted positively to the corresponding LED lamp group connected in series through the first output module. When an LED lamp in the series lamp group fails and causes a circuit break, the circuit break monitoring module can monitor the state of the second data port and judge that no data signal is received; at this time, it can control the backup switch device to conduct, so that it sends a reverse backup signal outward through the second output module. It is ensured that the LED lamps behind the failed LED lamp can still work normally. BRIEF DESCRIPTION OF THE DRAWINGS

[0077] Figure 1It is a schematic diagram of the circuit framework of an LED lamp provided in the prior art;

[0078] Figure 2 It is a schematic diagram of a circuit framework of an LED display screen provided in the prior art;

[0079] Figure 3 It is another LED display circuit framework schematic diagram provided in the prior art;

[0080] Figure 4 is a schematic diagram of the packaging structure of an LED lamp provided in a specific embodiment of the present invention;

[0081] Figure 5 It is a schematic diagram of a LED lamp circuit framework provided in a specific embodiment of the present invention;

[0082] Figure 6a It is a further detailed schematic diagram of the LED lamp circuit framework provided in a specific embodiment of the present invention;

[0083] Figure 6b is another further detailed schematic diagram of the LED lamp circuit framework provided in a specific embodiment of the present invention;

[0084] Figure 7 It is a waveform diagram when there is no signal at the two signal terminals;

[0085] Figure 8 It is a schematic diagram of signal waveform when there are signals input in two signal terminals;

[0086] Fig. 9 This is a schematic diagram of the acquisition clock of the two signal acquisition ports in the watchdog;

[0087] Fig.10 This is a schematic diagram of the internal circuit framework of the watchdog;

[0088] Fig.11 It is the truth table of the signal monitoring module in the watchdog;

[0089] Fig.12 It is a schematic diagram of the counting of the counter in the watchdog;

[0090] Fig.13 This is a schematic diagram of the watchdog counter when the count exceeds the set value;

[0091] Fig.14 It is a schematic diagram of a circuit framework of an LED display screen provided in a specific embodiment of the present invention;

[0092] Fig.15 It is a schematic diagram of a control signal output by a watchdog when the LED display screen is powered on for less than 200 microseconds after initialization provided in a specific embodiment of the present invention;

[0093] Fig.16 It is a schematic diagram of the control signal output by the watchdog in each LED lamp after the LED display screen is powered on for more than a preset time (200 microseconds) provided in a specific embodiment of the present invention;

[0094] Fig.17 It is a schematic diagram of the control signal output by the watchdog in each LED lamp after the LED display screen starts to input data from the left side of the first row provided in a specific embodiment of the present invention;

[0095] Fig.18 This is a control schematic diagram of an LED display screen provided in a specific embodiment of the present invention;

[0096] Fig.19 yes Fig.18 A specific schematic diagram of the data control module provided in .

[0097] Among them, the accompanying drawings in the background technology are marked as follows:

[0098] 1′, light-emitting chip; 2′, driver IC; 100′, LED light; 1000′, LED display;

[0099] The accompanying drawings in the specific implementation manner of the present invention are as follows:

[0100] 1000, LED display;

[0101] 100, LED lamp; 100a, first signal terminal; 100b, second signal terminal; 100c, first power terminal; 100d, second power terminal;

[0102] 1. Light-emitting chip; 2. Driver chip;

[0103] 21. Driving module; 20. Data direction judgment and switching module;

[0104] 210. logic circuit module; 211. analog circuit module;

[0105] 200, watchdog; 201, control port; 202, output signal acquisition port; 203, input signal acquisition port; 204, inverter; 205, data direction selector; 206, first diode; 207, first switch device; 208, second diode; 209, second switch device; DI, data input port; DO, data output port;

[0106] 2001, signal monitoring module; 2002, counter; 2003, monitoring output port;

[0107] 300, data control module; 300a, first data port; 300b, second data port; 301, FPGA; 302, SDRAM; 303, first physical network port; 304, second physical network port; 3011, first output module; 3012, second output module; 3013, data acquisition and transmission module; 3014, backup switch device; 3015, circuit break monitoring module; 3016, third diode;

[0108] 401, fourth diode; 402, third switch device; 403, first AND gate; 404, OR gate; 405, second AND gate; 406, first NOT gate; 407, second NOT gate; 408, third AND gate; 409, fifth diode; 410, fourth switch device; 222, control output port; 333, control input port. DETAILED DESCRIPTION

[0109] In order to make the technical problems, technical solutions and beneficial effects solved by the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0110] In the description of the present invention, it should be understood that the terms "longitudinal", "radial", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present invention. In the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0111] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0112] Example 1

[0113] This example will specifically explain the improvement of the LED lamp 100 and the driver chip 2 disclosed in the present invention. The driver chip 2 can be protected as a separate protection body, and it is specifically explained in combination with the LED lamp 100 in this example, but it does not mean that only the LED lamp 100 is protected without protecting the driver chip 2. The description in this example is also sufficient to provide support for the technical solution of the driver chip.

[0114] The mechanical structure of the LED lamp 100 disclosed in this example is as follows: Figure 4 As shown, it includes a driving chip 2 (Driving IC), a light-emitting chip 1, a signal port and a power port; usually, if it is prepared into a lamp bead, it usually needs to be packaged through a bracket, but in this example, in actual application, it is not necessarily necessary to package it. It can also be directly used in the LED display screen 1000 through COB (English name: Chip On Board, Chinese name: Chip on Board Package) or COG (English name: Chip On Glass; Chinese name: Glass Surface Chip Package). Therefore, as long as there are the core components of the driving chip 2, the light-emitting chip 1 and the improved and innovative data direction judgment and switching module 20 in this application, the inventive concept of this application can be realized. In this application, the LED lamp 100 does not need to be packaged into the form of a lamp bead. The basic structure of the LED lamp 100 is known to the public, so the basic structure in the LED lamp 100 is not described in detail, but only how to add a new data direction judgment and switching module 20 in the driving chip 2 (or also outside the driving chip 2 in the LED lamp 100) in this application is explained.

[0115] The power port is used to provide power to the circuit in the LED lamp 100, that is, to provide power to the driver chip 2 and the light-emitting chip 1; the signal port is used to input and output data signals; in this example, the signal port includes a first signal terminal 100a and a second signal terminal 100b; the power port includes a first power terminal 100c and a second power terminal 100d; in this example, for ease of explanation, the first signal terminal 100a is placed on the left and the second signal terminal 100b is placed on the right; the data signal can be input from the first signal terminal 100a and output from the second signal terminal 100b. In this case, the first signal terminal 100a is used as a signal port for data signal input, and the second signal terminal 100b is used as a signal port for data signal output. Of course, the data signal can also be input from the second signal terminal 100b and output from the first signal terminal 100a. In this case, the second signal terminal 100b is used as a signal port for data signal input, and the first signal terminal 100a is used as a signal port for data signal output. In this example, the first power terminal 100c is a negative electrode (or ground terminal) VSS, and the second power terminal 100d is a positive electrode (VDD).

[0116] like Figure 5 As shown, the driving chip 2 is provided with a driving module 21 (DM for short); the light emitting chip 1 is connected to the driving chip 2 and driven by the driving module 21; in this example, the LED lamp 100 also includes a data direction judgment and switching module 20 disposed in the driving chip 2 and connected to the driving module 21; as an alternative, it is also possible to consider arranging the data direction judgment and switching module 20 outside the driving chip 2. Of course, as a preferred method, the data direction judgment and switching module 20 connected to the driving module 21 is integrated into the driving chip 2 to further reduce the size of the LED lamp 100, which is a better solution. If the data direction judgment and switching module 20 is disposed outside the driving chip 2 and its function is realized by an analog circuit, the advantage is that there is no need to change the driving chip 2, but it has new requirements for the LED lamp 100, and it is necessary to arrange an analog circuit outside the driving chip 2 to realize its function, which makes the structure more complicated and may also increase the size of the LED lamp 100.

[0117] The data direction judgment and switching module 20 (Data Direction Judgment&Switch Module, DDJSM for short) is connected to the first signal terminal 100a and the second signal terminal 100b, and is used to judge the data input direction of the first signal terminal 100a and the second signal terminal 100b, automatically switch the signal port for data signal input and the signal port for output, import the data signal from the input signal port and transmit it to the driving module 21, receive the data signal returned from the driving module 21, and output the data signal from the data output signal port.

[0118] The specific form of the data direction judgment and switching module 20 is not particularly limited. As long as the data input direction can be judged, the signal port from which the data signal is input can be identified, and the data signal is input from the identified data input signal port, and then output from the data output port in the data direction judgment and switching module 20 after passing through the driving module 21.

[0119] As a preferred method, this example provides a preferred implementation method of the LED lamp 100 data direction judgment and switching module 20 and the driving module 21, such as Figure 6aAs shown, the driving module 21 includes a data input port DI (DataInput) and a data output port DO (Data Output), and includes a logic circuit module 210 (Logic Circuit Module) and an analog circuit module 211 (Analog Circuit Module); the logic circuit module 210 is used to receive the data signal input by the data input port DI, extract the control signal from the data signal and transmit it to the analog circuit module 211, and output the data signal from the data output port; the analog circuit module 211 is used to generate a plurality of driving currents corresponding to the number of light-emitting chips 1 according to the data signal, drive the corresponding light-emitting chips 1, and the three light-emitting chips 1 are connected to a common cathode.

[0120] In this example, the light emitting chips 1 include three, namely a blue light emitting chip (B), a green light emitting chip (G) and a red light emitting chip (R).

[0121] In this example, the data direction determination and switching module 20 includes a data input circuit, a data output circuit and a watchdog 200 (Watching Dog, abbreviated as: WD);

[0122] The data input circuit comprises two input branches connected to the data input port DI, and the two input branches are respectively connected to the first signal terminal 100a and the second signal terminal 100b;

[0123] The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal 100a and the second signal terminal 100b;

[0124] The watchdog 200 is used to determine the input direction of the data signal in the first signal terminal 100a and the second signal terminal 100b, and control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port.

[0125] The logic of the above switch device is that when the control terminal or the enable terminal inputs 0, the signal cannot pass through, and when the control terminal or the enable terminal inputs 1, the signal can pass through (some switch devices can also be set to allow the signal to pass when the input is 0, and the signal cannot pass when the input is 1). For example, the switch device can be a three-state gate. The three-state means that its output can be either a normal high level (logic 1) or a low level (logic 0) of a general binary logic circuit, and can also maintain a unique high impedance state (Hi-Z). When in a high impedance state, the output resistance is very large, which is equivalent to an open circuit, and there is no logic control function. The three-state gate has a control enable terminal (referred to as the control terminal in this example) to control the on and off of the gate circuit. Devices that can have these three states are called three-state gates (or three-state devices). When the control terminal input is valid, the three-state gate presents a normal "0" or "1" output; when the control terminal input is invalid, the three-state gate gives a high impedance output.

[0126] Specifically, the data input circuit includes a data direction selector 205, and the data direction selector 205 is respectively connected to the first signal terminal 100a, the second signal terminal 100b, the watchdog 200 and the data input port DI of the driving module 21, forming two input branches connected to the data input port DI of the driving module 21, and is used to switch the data signal input port according to the control signal sent by the watchdog 200, and output the data signal from the selector to the data input port DI of the driving module 21. Specifically, for the sake of distinction, the input branch connecting the first signal terminal 100a and the data direction selector 205 is called the first input branch; the output branch connecting the second signal terminal 100b and the data direction selector 205 is called the second output branch;

[0127] The data output circuit is connected to the data output port DO of the driving module 21, and includes two output branches provided with switch devices, which are respectively connected to the first signal terminal 100a and the second signal terminal 100b. For the sake of distinction, the output branch connected to the first signal terminal 100a is called the first output branch; the output branch connected to the second signal terminal 100b is called the second output branch; the two switch devices always work in the anti-phase state; in this example, the two switch devices are respectively named as the first switch device 207 and the second switch device 209. Among them, the switch device connected to the first signal terminal 100a is the first switch device 207, and the switch device connected to the second signal terminal 100b is the second switch device 209. Since the above two switch devices always work in the anti-phase state, the two output branches always select one for output.

[0128] The watchdog 200 is connected to the data input port DI, the data output port DO, the data direction selector 205 and the switch device on the data output circuit, and is used to collect signals from the data input port DI and the data output port DO, identify the port for data signal input and the port for data signal output; and send a control signal to the data direction selector 205 and the two switch devices on the data output circuit; an inverter 204 is selectively set on the line between the two switch devices and the watchdog 200.

[0129] The above-mentioned input branch and output branch are always set so that the data signal is input from the input branch connected to one of the ports and output from the output branch connected to the other port. That is, if the data signal is input from the first input branch connected to the first signal terminal 100a to the data input port DI of the driving module 21, the data signal output from the data output port DO of the driving module 21 is output from the second output branch connected to the second signal terminal 100b. Conversely, if the data signal is input from the second input branch connected to the second signal terminal 100b to the data input port DI of the driving module 21, the data signal output from the data output port DO of the driving module 21 is output from the first output branch connected to the first signal terminal 100a.

[0130] Further, the data direction selector 205 includes a first signal port, a second signal port, a data output port DO and a selection port;

[0131] The first signal terminal 100a is connected to the first signal port through a first diode 206, that is, the first input branch is provided with a first diode 206, the second signal terminal 100b is connected to the second signal port through a second diode 208, that is, the second input branch is provided with a second diode 208; the data output port DO is connected to the data input port DI of the driving module 21;

[0132] The data output port of the driving module 21 is connected to the first signal terminal 100a through a first switch device 207, and is connected to the second signal terminal 100b through a second switch device 209; that is, the first output branch is provided with a first switch device 207; and the second output branch is provided with a second switch device 209;

[0133] The watchdog 200 includes an input signal acquisition port 203, an output signal acquisition port 202 and a control port 201;

[0134] The input signal acquisition port 203 is connected to the first signal port of the data direction selector 205; the output signal acquisition port 202 is connected to the data output port of the driving module 21; the control port 201 is respectively connected to the selection port of the data direction selector 205, the control end of the first switch device 207 and the second switch device 209, and an inverter 204 is set on the control port 201 and the control end of the second switch device 209.

[0135] The inverter 204 is arranged on the second switch device 209 because the input signal acquisition port 203 is connected to the first input branch. If the input signal acquisition port 203 is connected to the second input branch, the inverter 204 may be arranged on the first switch device 207. That is, the input signal acquisition port 203 is connected to the second signal port of the data direction selector 205; the output signal acquisition port 202 is connected to the data output port of the driving module 21; the control port 201 is respectively connected to the selection port of the data direction selector 205, the first switch device 207 and the control end of the second switch device 209, and an inverter 204 is arranged on the control port 201 and the control end of the first switch device 207.

[0136] The purpose of such a design is to ensure that the input and output of the data signal conform to the following results: when the data signal is input from the first input branch, it is output from the second output branch; or when the data signal is input from the second input branch, it is output from the first output branch.

[0137] In order to explain the working principle of the watchdog 200 in the present application, the data signal in the present application and the principle of data collection by the watchdog are first explained.

[0138] like Figure 7 As shown in the figure, it is a waveform diagram of the first signal terminal 100a and the second signal terminal 100b when there is no signal input; because the first signal terminal 100a and the second signal terminal 100b are provided with pull-up resistors (not shown in the figure), the first signal terminal 100a and the second signal terminal 100b always output a high level 1 when there is no signal input.

[0139] like Figure 8As shown, the figure shows a waveform diagram when a data signal is input or output in the first signal terminal 100a and the second signal terminal 100b. In the field of LED display, the frequency of the data signal is commonly used to be 1.6 MHz (Hz), that is, the signal period is T = 625ns (Chinese name: nanosecond; English name: nanosecond). In the waveform diagram, a period always starts with a high level and ends with a low level. If the duty cycle in a signal period is 70% (about 438ns), it means that the signal represented in a signal period is a high level 1, that is, the data of the data bit is 1. If the duty cycle in a signal period is 30% (about 187ns), it means that the signal represented in a signal period is a low level 0, that is, the data of the data bit is 0. The data signal is shifted into the data input port DI of the driving module 21 in a first-in first-out queue (English abbreviation: FIFO; English full name: First Input First Output) and is shifted and output from the data output port DO.

[0140] However, when the watchdog 200 collects signals, the clock of the collected signals is as follows: Figure 8 As shown, it is set to have a collection frequency much greater than the frequency of the above-mentioned data signal, and its collection frequency is 100MHz, which is much greater than the frequency of the data signal. At this time, the clock period of signal collection is T0=10ns, and T=62.5T0. This means that within a signal period of a data signal, the watchdog 200 will collect 62.5 times. If there is no signal transmission in the first signal terminal 100a or the second signal terminal 100b, the data collected by the watchdog 200 will always be high level 1. If a data signal begins to flow, the collection signal collected by the watchdog 200 will definitely include some high level 1s and some low level 0s within a signal period. Since the input signal collection port 203 and the output signal collection port 202 collect input data signals and output data signals respectively, due to the first-in-first-out queue method used during data transmission, the input signal collection port 203 and the output signal collection port 202 are not necessarily equal. In this way, as long as the low level 0 is collected from the input signal collection port 203, it means that data has begun to be input.

[0141] Specifically, Fig.10 As shown, an implementation of the watchdog 200 is explained below. The watchdog 200 includes a signal monitoring module 2001 (Signal Detection Module) and a counter 2002 (Counter);

[0142] The signal monitoring module 2001 is connected to the input signal acquisition port 203 and the output signal acquisition port 202, and is provided with a monitoring output port 2003; it performs logical judgment according to the signals collected by the input signal acquisition port 203 and the output signal acquisition port 202, and outputs a monitoring signal from the monitoring output port 2003; if a specific logic is met, the monitoring signal output to the counter 2002 is a low level 0, so that the counter 2002 is reset; otherwise, the monitoring signal output to the counter 2002 is a high level 1, so that the counter 2002 counts;

[0143] The counter 2002 is used to count within a preset time. If the count reaches or exceeds a preset value, the output control signal is determined to be a high level 1, otherwise the output control signal is a low level 0.

[0144] When the watchdog 200 is working, the counter 2002 will continue to accumulate. For example, when the default setting time is 200 μS (microseconds), the counter 2002 will accumulate to a preset value "a". When the cumulative count of the counter 2002 reaches a, it continues to accumulate to a. At the same time, the control signal output of the watchdog 200 is a high level 1. However, when the value of the counter 2002 is less than a, the control signal output of the watchdog 200 (WD) is a low level 0.

[0145] like Fig.11 As shown in the table, the logic judgment rules of the signal monitoring module 2001 are as follows: The logic judgment rules of the signal monitoring module 2001 are as follows: When the signals collected by the input signal acquisition port 203 and the output signal acquisition port 202 are not equal, and the signal collected by the input signal acquisition port 203 is a low level 0, and the signal collected by the output signal acquisition port 202 is a high level 1, the monitoring output port 2003 outputs a monitoring signal of a low level 0; otherwise, the monitoring output port 2003 outputs a monitoring signal of a high level 1.

[0146] That is, when the input signal acquisition port 203 is 0 and the output signal acquisition port 202 outputs 1, the monitoring output port 2003 outputs a low level 0; when the input signal acquisition port 203 is 1 and the output signal acquisition port 202 outputs 1, the monitoring output port 2003 outputs a low level 1; when the input signal acquisition port 203 is 0 and the output signal acquisition port 202 outputs 0, the monitoring output port 2003 outputs a low level 1; when the input signal acquisition port 203 is 1 and the output signal acquisition port 202 outputs 0, the monitoring output port 2003 outputs a low level 1.

[0147] like Fig.12As shown, the counter 2002 always counts within a preset time, and the preset time is greater than the time for the data signal to be input and output from the driving module 21, that is, the number of bits of the data signal. In this example, the data signal includes 48 bits, that is, the time from input to output in the driving module 21 is 30 microseconds (μs). In this example, the preset time is set to 200 microseconds, which is much longer than the length of the data signal. As can be seen from the figure, as long as the input signal acquisition port 203 is 0 and the output signal acquisition port 202 outputs 1, the monitoring output port 2003 will output a low level 0 to the counter 2002, so that the counter 2002 is reset and counts again, and the control port 201 outputs a low level 0. At this time, the selection port of the data direction selector 205 receives the control signal 0, selects the first input branch, closes the second input branch, and inputs the data signal from the first signal terminal 100a; because the control port 201 outputs a low level to the control terminal of the first switch device 207, the first switch device 207 is closed and the first output branch is closed; because the low level output by the control port 201 is inverted by the inverter 204 and becomes a high level and is output to the second switch device 209, the second switch device 209 is turned on and the second output branch is turned on; the data signal is output from the second signal terminal 100b. That is, the data signal is input from the first signal terminal 100a on the left and output from the second signal terminal 100b on the right.

[0148] like Fig.13 As shown, only when the input signal acquisition port 203 is not 0 and the output signal acquisition port 202 is 1 within the preset time of 200 microseconds, the monitoring output port 2003 will continue to output 1, so that the counter 2002 continues to count, and when it reaches or exceeds the preset value a, the control port 201 will output a high level 1. That is, the selection port of the data direction selector 205 receives the control signal 1, selects the second input branch, closes the first input branch, and inputs the data signal from the second signal terminal 100b; because the control port 201 outputs a high level to the control terminal of the first switch device 207, the first switch device 207 is turned on, and the first output branch is turned on; because the high level output by the control port 201 is inverted by the inverter 204 and becomes a low level and is output to the second switch device 209, the second switch device 209 is turned off, and the second output branch is turned off; the data signal is output from the first signal terminal 100a. At the same time, since the data signal output from the data output port passes through the first switch device 207 and then passes through the first diode 206 and is collected by the input signal collection port 203, at this time, the signals collected by the input signal collection port 203 and the output signal collection port 202 are always equal, so the control port 201 will be maintained to output a high level 1. The data signal is input from the second signal terminal 100b on the right and output from the first signal terminal 100a on the left.

[0149] As another method, this example provides another implementation method of the LED lamp 100 data direction judgment and switching module 20 and the driving module 21, such as Figure 6b As shown, the data direction determination and switching module 20 also includes a data input circuit, a data output circuit and a watchdog 200 (Watching Dog, abbreviated as: WD);

[0150] The data input circuit comprises two input branches connected to the data input port DI, and the two input branches are respectively connected to the first signal terminal 100a and the second signal terminal 100b;

[0151] The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal 100a and the second signal terminal 100b;

[0152] The watchdog 200 is used to determine the input direction of the data signal in the first signal terminal 100a and the second signal terminal 100b, and control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port.

[0153] The data input circuit includes a first AND gate 403, a second AND gate 405 and an OR gate 404; wherein the first signal terminal 100a is connected to an input terminal of the first AND gate 403 through a fourth diode 401 to form a first input branch; the second signal terminal 100b is connected to an input terminal of the second AND gate 405 through a fifth diode 409 to form a second input branch; the output terminals of the first AND gate 403 and the second AND gate 405 are connected to the input terminal of the OR gate 404, and the output terminal of the OR gate 404 is connected to the data input port DI.

[0154] The data output circuit includes a first output branch and a second output branch. The first output branch is connected between the first signal terminal 100a and the data output port DO through the third switch device 402; the second output branch is connected between the second signal terminal 100b and the data output port DO through the fourth switch device 410.

[0155] The watchdog 200 includes a control input port 333 and a control output port 222, wherein the control input port 333 is connected to the output end of a third AND gate 408, one input end of the third AND gate 408 is connected to the data output port DO, and the other input end is connected to the first signal terminal 100a through a second NOT gate 407; the control output port 222 is connected to the other input end of the second AND gate 405 and the control end of the third switch device 402, and is connected to the other input end of the first AND gate 403 and the control end of the fourth switch device 410 through a first NOT gate 406.

[0156] This data direction determination and switching module 20 also makes the input and output of the data signal conform to the following results: when the data signal is input from the first input branch, it is output from the second output branch; or when the data signal is input from the second input branch, it is output from the first output branch.

[0157] Its working process is described as follows: according to the system setting, when the control input port 333 of the watchdog 200 receives an input signal of 1, the counter inside the watchdog 200 is cleared and reset. Before the counter reaches the set value a (if it keeps counting, it will reach the set value a in 200 microseconds), the output of the control signal 222 is 0. When the control input port 333 receives an input signal of 0, the counter inside the watchdog 200 continues to count until it reaches the value a (that is, after 200 microseconds), and then the control output port 222 outputs 1.

[0158] After power-on, before there is a data signal, the counter in the watchdog 200 starts counting. Within 200 microseconds, before the counter reaches the set value a, the value output by the watchdog 200 control output port 222 is 0, and after passing through the first NOT gate 406, it is 1. At this time, if there is a data signal input from the first signal terminal 100a, it must contain 0 and 1 level signals, so the signal level after passing through the first AND gate 403 is always kept consistent with the signal level input from the first signal terminal 100b (because the level from the first NOT gate 406 is 1), and then passes through the OR gate 404. The OR gate 404 simultaneously receives a signal from the second AND gate 405, and the signal from the fifth diode 409 of the second AND gate 405 is a high level 1, and the signal from the control output port 222 is 0, then the signal output to the OR gate 404 through the second AND gate 405 must be 0, then the signal through the OR gate 404 remains input to the data input port DI as it is, and then output from the data output port DO. At this time, the control signal of the third switch 402 is 0 level (from the control output port 222), so it will not be output from the third switch device 402, but only from the fourth switch device 410 (the control signal of the fourth switch device 410 is 1 after passing through the reverse level of the first NOT gate 406).

[0159] If the signal is continuously input from the first signal terminal 100a, the level after passing through the fourth diode 401 will always include the level signal 0, and the level signal 0 will become the level signal 1 after passing through the second NOT gate 407. The third AND gate 408 also receives the data signal from the data output port DO. Whether the data signal is signal 1 or signal 0, it contains at least 30% of high-level signals. Under the clock condition of 100MHz, each signal will be detected 62.5 times within 625ns. Therefore, there is enough time within 200 microseconds to detect the input signals that are simultaneously 1. The third AND gate 408 will output the level signal 1 to the control input port 333, so that the clock inside the watchdog 200 is continuously reset within 200 microseconds, and the control output port 222 always outputs the control signal 0, thereby ensuring that the data is input from the first signal terminal 100a and output from the second signal terminal 100b.

[0160] If no signal is input from the first signal terminal 100a, the output signal of the fourth diode 401 is 1, which becomes 0 after passing through the second NOT gate 407, and the level signal input to the control input port 333 after being transmitted to the third AND gate 408 is 0, then the counter of the watchdog 200 keeps counting until it reaches the value a, then the control output port 222 controls the signal output to be 1, and the signal output to the first AND gate 403 and the fourth switch device 410 after passing through the first NOT gate 406 is 0, then the first AND gate 403 always outputs the signal 0 to the OR gate 404. At this time, if a signal is input from the second signal terminal 100b, it is input to the second AND gate 405 after passing through the fifth diode 409. Because the signal given to the second AND gate 405 through the control output port 222 is 1, the signal from the fifth diode 409 is still 0 after passing through the second AND gate 405. Keep consistent, the signal after passing through the OR gate 404 is also consistent, and is always input to the data input port DI, and then output from the data output port DO. Because the control signal of the fourth switch device 410 is 0, it will not be output from the fourth switch device 410, but output to the first signal terminal 100b through the third switch device 402. At the same time, the signal passing through the third switch device 402 will also return from the fourth diode 401 to the second NOT gate 407, and then output to the third AND gate 408. The signal received by the third AND gate 408 is always the opposite state of 0 and 1, and the signal received by the control input port 333 is always 0. Therefore, the control output port 222 always keeps outputting a 1 signal, and maintains the signal input from the second signal terminal 100b to the first signal terminal 100a.

[0161] The LED lamp 100 provided in this example has two signal ports that no longer distinguish data directions, and both can input and output data signals. The data direction judgment and switching module 20 judges the data signal directions of the first signal terminal 100a and the second signal terminal 100b, automatically switches the data signal input port and the output port, inputs the data signal from the data input signal port, outputs it to the driving module 21, receives the data signal returned from the driving module 21, and outputs the data signal from the data output signal port. When it is used in a device such as an LED display screen 1000, it is no longer necessary to specially design the arrangement or wiring of each LED lamp 100. Without changing the arrangement direction of the LED lamp 100 between rows (or columns), the LED lamps 100 between adjacent rows (or adjacent columns) are connected in series at the head or tail, avoiding the original wiring method of connecting the head and tail for winding layout, which greatly reduces the complexity of wiring. The LED lamps 100 between adjacent rows or columns will not produce color differences.

[0162] Example 2

[0163] This example will specifically explain the LED display screen 1000 disclosed in the present invention. In this example, the LED lamp shown in FIG. 6a is used as an example to manufacture the LED display screen 1000.

[0164] like Fig.14 As shown, in this example, an LED display screen 1000 is provided, comprising an LED array, wherein the LED array comprises the LED lamps 100 described in Example 1 and arranged in an array in the same direction.

[0165] Among them, Fig.18 As shown, the LED display screen 1000 also includes a data control module 300 (Data Control Module, referred to as DCM); the data control module 300 is provided with a plurality of first data ports 300a and second data ports 300b; some LED lamps 100 of the LED array are connected in groups in series between the first data ports 300a and the second data ports 300b. The data signal is transmitted from the first data port 300a to the LED lamp 100 and then to the second data port 300b.

[0166] The array group of LED lamps 100 connected in series between the first data port 300a and the second data port 300b is divided into multiple rows or multiple columns connected in series, and the LED lamps 100 in adjacent rows or adjacent columns are connected at the head or the tail.

[0167] In this example, in the LED display screen 1000 in array display, all LED lights 100 in one display screen can be connected in series to form a light group, or can be divided into light groups formed by connecting several LEDs in series. When connected in series, they can be connected in series in rows (or columns), and taking row connection as an example, when connected in series, it is preferred that the head or tail of adjacent rows are connected in series.

[0168] Specifically, the so-called head-to-head connection or tail-to-head connection means that the LED lamps 100 in each row are connected in series, and the LED lamps 100 at the tail of the row are connected to the LED lamps 100 at the tail of the adjacent row, or the LED lamps 100 at the head of the row are connected to the LED lamps 100 at the head of the adjacent row, so that the LED lamps 100 in the series form a snake shape with head-to-head connection and tail-to-tail connection. Fig.14 Taking the figure as an example, a certain lamp group in the LED display screen 1000 includes 4 rows of LED lamps 100; the LED lamps 100 in the lamp group are placed in the same direction, so that the signal ports on the left are all the first signal ports 100a, and the ports on the right are all the second signal ports 100b; it can be seen that, except for the first and last ports in each row, each adjacent LED lamp 100 in the row has the first signal port 100a of the next LED lamp 100 connected to the second signal port 100b of the previous LED lamp 100. The head and tail of each row are connected in series or in series, that is, the first signal end 100a of the first LED lamp 100 (or the head LED lamp or the head LED lamp) in the first row is connected to the first data port 300a of the data control module 300, the LED lamp 100 at the tail of the first row is connected to the LED lamp 100 at the tail of the second row, the LED lamp 100 at the head of the second row is connected to the LED lamp 100 at the head of the third row; the LED lamp 100 at the tail of the third row is connected to the LED lamp 100 at the tail of the fourth row; the LED lamp 100 at the head of the fourth row is connected to the second data interface.

[0169] The working process is described as follows:

[0170] like Fig.15 As shown, when the system is powered on, no data signal is input to the first signal terminal 100a and the second signal terminal 100b. The first signal terminal 100a and the second signal terminal 100b are pulled high due to the pull-up resistors after power-on, and a high level is continuously output by default. The counter 2002 of the watchdog 200 starts working, and before 200 microseconds are reached, the control signal output by the control port 201 of the watchdog 200 is 0.

[0171] like Fig.16As shown, if the LED display screen is powered on for more than 200 microseconds without data signal input, then the control signal outputted from the control port 201 of the watchdog 200 of each LED lamp is 1. The data signal is allowed to enter the second input branch from the second signal terminal 100b, and the data signal is input to the data input port DI of the driving module 21 through the data direction selector 205, and then output from the data output port of the driving module 21, and output from the first signal terminal 100a through the first output branch. However, at this time, there is no data signal input.

[0172] like Fig.17 As shown, if the system starts to send data signals from the left, when the signal is input from the left, the input signal of the input signal acquisition port 203 will definitely contain a low-level 0 signal within 200 microseconds, and the data signal of the output signal acquisition port 202 will definitely contain a high-level 1 signal. The counter 2002 of the watchdog 200 will remain in a reset state within 200 microseconds, and the control signal output by the control port 201 of the watchdog 200 to the data direction selector 205 will continue to be low-level 0, so as to ensure that the signal is always turned on from the first signal terminal 100a on the left to the second signal terminal 100b on the right. When the data direction selector 205 receives the signal 0, the first switch device 207 is turned off, and the second switch device 209 is turned on, so that the first input branch and the second output branch form a path, and the data signal input from the first signal terminal 100a is input to the data input port DI of the driving module 21 through the data direction selector 205, and then output from the data output port of the driving module 21, and output to the next LED lamp through the second switch device 209 to the second signal terminal 100b.

[0173] For the rightmost LED lamp 100 in the second row, the signal comes from the rightmost LED lamp 100 in the first row, and the data signal is transmitted from the second signal terminal 100b to the first signal terminal 100a, so there must be no signal input from the first signal terminal 100a within 200 microseconds, then the watchdog 200 keeps counting within 200 microseconds, and after reaching 200 microseconds, the counter 2002 of the watchdog 200 reaches the set value, then the control signal 201 output by the control port 201 will be output as 1, then at this time the data direction selector 205 will receive a high level 1, and select the second input path; at the same time, the first switch device 207 is turned on, and the second switch device 209 is turned off, and the first output branch is selected; the data signal is transmitted from the second signal terminal 100b through the second input path through the data direction selector 205 to the data input port DI of the driving module 21, and then output from the data output port DO, and transmitted to the direction of the first signal terminal 100a through the first output branch. At this time, the output signal of the data output port DO is input to the output signal acquisition port 202 and is also transmitted back to the input signal acquisition port 203 through the first switch device 207 and the first diode 206. Then the acquisition signals of the input signal acquisition port 203 and the output signal acquisition port 202 always maintain the same input signal 0 or 1. At this time, the watchdog 200 does not perform any action, and the control port 201 maintains the output high level 1. Therefore, as long as the signal of the second signal terminal 100b continues, it can be transmitted to the first signal terminal 100a.

[0174] For the LED lamps 100 in the third row, the signals are input from the left, and the data signal of the leftmost LED lamp 100 comes from the leftmost LED lamp 100 in the second row. The data signals of the LED lamps 100 in the third row are all input from the first signal terminal 100a and output from the second signal terminal 100b. The input signal of the input signal acquisition port 203 must contain a low-level 0 signal within 200 microseconds, and the data signal of the output signal acquisition port 202 must also contain a high-level 1 signal. The counter 2002 of the watchdog 200 remains in a reset state within 200 microseconds, and the control port 201 of the watchdog 200 outputs a control signal to the data direction selector 205 that is continuously at a low level 0, ensuring that the signal is turned on from the first signal terminal 100a on the left to the second signal terminal 100b on the right. When the data direction selector 205 receives the signal 0, the first switch device 207 is closed and the second switch device 209 is turned on, so that the first input branch and the second output branch form a path, and the data signal input from the first signal terminal 100a is input to the data input port DI of the driving module 21 through the data direction selector 205, and then output from the data output port of the driving module 21, and output to the next LED lamp through the second switch device 209 to the second signal terminal 100b.

[0175] The signal data transmission direction and control logic of the LED lamps 100 in the fourth row are the same as those in the second row, and will not be described in detail.

[0176] The LED display screen 1000 provided in this example has an array of LED lamps 100 improved and innovated by the present application, so there is no need to specially design the arrangement or wiring of each LED lamp 100. Without changing the arrangement direction of the LED lamps 100 between rows (or columns), the heads of adjacent rows (or columns) are connected in series or the tails are connected in series, which avoids the need for the original wiring to be connected head to tail for winding layout, greatly reducing the complexity of wiring. There will be no color difference between the LED lamps 100 in adjacent rows or columns.

[0177] Example 3

[0178] During the research and development process, the applicant discovered that the signal data of the existing LED display screen 1000 is always transmitted in one direction, requiring the data signal to always enter from the signal input end and output from the signal output end; at this time, when any one of the LED lamps fails and the signal is interrupted, the data signal can no longer continue to be transmitted downward, and the faulty LED lamp 100 and its subsequent normal LED lamp 100 cannot work normally.

[0179] like Fig.18 As shown, even if the LED display screen 1000 in the improved embodiment 2 of the present application adopts a one-way transmission mode, if an LED lamp 100 fails, the data signal can no longer be transmitted. For example, if an LED lamp in the middle of the second row is damaged, the transmitted data signal is interrupted at the position of this LED lamp, and all the remaining LED lamps 100 connected in series to the left of this LED lamp will be interrupted, resulting in display failure.

[0180] As an improvement, the applicant has improved the data control module 300, such as Fig.19 As shown, the data control module 300 includes two physical network ports (PHY1, PHY2), FPGA301 and a memory; in this example, the memory is SDRAM (Chinese name: Synchronous Dynamic Random-Access Memory, English name: Synchronous Dynamic Random-Access Memory) 302.

[0181] The FPGA 301 includes a data collection and transmission module 3013 (Data Collection & Transmit Module), a first output module 3011 (First Output Module), a second output module 3012 (Second Output Module) and a break monitoring module 3015 (Break-off Monitoring Module);

[0182] The data acquisition and transmission module 3013 is connected to the two physical network ports and the memory, and is used to collect data packets and send data packets, and obtain data signals from the data packets and store them in the memory; specifically, the two physical network ports include a first physical network port 303 (PHY1) and a second physical network port 304 (PHY2); the data acquisition and transmission module 3013 receives data packets from the first physical network port 303, and sends data packets through the second physical network port 304. The data signals used by the data control module 300 to control the corresponding LED array are obtained from the collected data packets.

[0183] The first output module 3011 is used to call the data signal stored in the memory ( Fig.18 , Fig.19 The data signal is transmitted from the first to the last LED lamp 100 in the series. Each LED lamp 100 obtains its corresponding driving signal from the first LED lamp 100 to drive the light emitting chip 1 in each LED lamp 100 to emit light.

[0184] The second output module 3012 is used to call the reverse signal of the data signal stored in the memory as a backup signal ( Fig.18 , Fig.19 The backup signal is sent to the corresponding light group formed by the serially connected LED lights 100 through the second data port 300b; that is, the backup signal is transmitted from the last LED light 100 in reverse to the first LED light 100.

[0185] A backup switch device 3014 is provided between the second output module 3012 and the second data port 300b, and the backup switch device 3014 is used to control the on and off of the second output module 3012 sending a backup signal outward;

[0186] The circuit breaker monitoring module 3015 is respectively connected to the control end of the backup switch device 3014 and connected to the second data port 300b through the third diode 3016, and is used to collect data from the second data port 300b and output a backup control signal to the control end of the backup switch device 3014.

[0187] The working process is described as follows:

[0188] by Figure 6a Taking the data direction judgment and switching module 20 in FIG. 1 as an example, in normal operation, the first output module 3011 calls the data signal stored in the memory and sends it to the LED lamps 100 connected in series between the first data port 300a and the second data port 300b starting from the LED lamp 100 on the left side of the first row through the first data port 300a. When a faulty LED lamp 100 appears in the second row, all LED lamps 100 starting from the left side of the faulty LED lamp will have their data signals interrupted, and the signals collected by the input signal collection port 203 and the output signal collection port 202 of the watchdog 200 of the LED lamps 100 after the faulty LED lamp 100 are all 1. After this situation lasts for 200 microseconds, the disconnection monitoring module 3015 of the data control module 300 detects that the data signal input from the third diode 3016 on the second data port 300b is interrupted for more than 200 microseconds. At this time, the disconnection monitoring module 3015 will send a control signal to turn on the backup switch device 3014, so that the backup signal Data 1' of the data control module 300 is sent. Therefore, the leftmost LED lamp in the last row will receive the backup signal Data 1'. The data sequence of the backup signal Data 1' is inversely related to the data signal Data 1. Therefore, the signal can be transmitted from the leftmost LED lamp in the last row to the LED lamp to the left of the damaged LED lamp in the second row, and the image is guaranteed to be consistent with the original. In this way, the entire LED matrix can work normally except for the damaged LED lamp.

[0189] At the same time, another one or more LED light groups can be driven in the same way, and the images of different LED light groups can be spliced ​​into a complete image.

[0190] By setting the first output module 3011, the second output module 3012 and the circuit breaking detection module in the FPGA 301 in the data control module 300, the data signal can be positively input to the lamp group of the corresponding LED lamp 100 connected in series through the first output module 3011. When an LED lamp 100 in the lamp group connected in series fails and causes a circuit breaking, the circuit breaking monitoring module 3015 can monitor the state of the second data port 300b and judge that no data signal is received; at this time, it can control the backup switch device 3014 to conduct, so that it sends a reverse backup signal to the outside through the second output module 3012. It is ensured that the LED lamps 100 behind the failed LED lamp 100 can still work normally.

[0191] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A driver chip, used to be built into an LED lamp bead, wherein a driver module is provided in the driver chip, and the driver chip is connected to a signal port and a power port; the power port is used to provide power for the driver chip; and the signal port is used to input and output data signals; It is characterized in that The signal port includes a first signal port and a second signal port; the driving module includes a data input port and a data output port; the driving chip also includes a data direction judgment and switching module connected to the driving module; the data direction judgment and switching module is connected to the first signal port and the second signal port, and is used to judge the data signal input direction of the first signal port and the second signal port, automatically switch the data signal input signal port and the output signal port, import the data signal from the input signal port and transmit it to the driving module through the data input port, receive the data signal returned from the driving module through the data output port, and then output the data signal from the data output signal port; The data direction judgment and switching module includes a data input circuit, a data output circuit and a watchdog; The data input circuit comprises two input branches connected to the data input port, and the two input branches are respectively connected to the first signal terminal and the second signal terminal; The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal and the second signal terminal; The watchdog is used to determine the input direction of the data signal in the first signal terminal and the second signal terminal, and control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port; The data input circuit comprises a data direction selector; the data direction selector is respectively connected to the first signal terminal, the second signal terminal, the watchdog and the data input port of the driving module; The data direction selector is connected to the first signal end and the second signal end to form two input branches, and is used to switch the signal port connected to the data signal input according to the control signal sent by the watchdog, select the input branch, and output the data signal from the data direction selector to the data input port of the driving module; The data output circuit is connected to the data output port of the driving module and includes two output branches provided with switch devices, which are respectively connected to the first signal terminal and the second signal terminal, and the two switch devices always work in an anti-phase state; The watchdog is directly or indirectly connected to the data input port, data output port, data direction selector and the switch device on the data output circuit, and is used to collect signals from the first signal terminal and the data output port, identify the signal port of the data signal input and the signal port of the output, and send a control signal to the data direction selector and the two switch devices on the data output circuit. An inverter is selectively set on the line between the two switch devices and the watchdog.

2. The driver chip according to claim 1, characterized in that: The data direction selector comprises a first signal port, a second signal port, a data output port and a selection port; The first signal terminal is connected to the first signal port through a first diode, and the second signal terminal is connected to the second signal port through a second diode; the data output port is connected to the data input port of the driving module; The data output port of the driving module is connected to the first signal terminal through a first switch device, and is connected to the second signal terminal through a second switch device; The watchdog includes an input signal acquisition port, an output signal acquisition port and a control port; The input signal acquisition port is connected to the first signal port of the data direction selector; the output signal acquisition port is connected to the data output port of the driving module; the control port is respectively connected to the selection port of the data direction selector, the control end of the first switch device and the second switch device, and an inverter is set on the control port and the control end of the second switch device; or The input signal acquisition port is connected to the second signal port of the data direction selector; the output signal acquisition port is connected to the data output port of the driving module; the control port is respectively connected to the selection port of the data direction selector, the control end of the first switch device and the second switch device, and an inverter is set on the control port and the control end of the first switch device.

3. The driver chip according to claim 2, characterized in that: The watchdog includes a signal monitoring module and a counter; The signal monitoring module is connected to the input signal acquisition port and the output signal acquisition port, and is provided with a monitoring output port; it performs logical judgment according to the signals collected by the input signal acquisition port and the output signal acquisition port, and outputs a monitoring signal from the monitoring output port; if a specific logic is met, the monitoring signal output to the counter is a low level 0, so that the counter is reset; otherwise, the monitoring signal output to the counter is a high level 1, so that the counter counts; The counter is used to count within a preset time. If the count reaches or exceeds a preset value, the output control signal is determined to be a high level 1, otherwise the output control signal is a low level 0.

4. The driver chip according to claim 3, characterized in that: The signal monitoring module logic judgment rules are as follows: when the signals collected by the input signal acquisition port and the output signal acquisition port are not equal, and the signal collected by the input signal acquisition port is a low level 0, and the signal collected by the output signal acquisition port is a high level 1, the monitoring output port outputs a monitoring signal of a low level 0; otherwise, the monitoring output port outputs a monitoring signal of a high level 1.

5. The driver chip according to claim 4, characterized in that: The frequency of the signal collected by the signal monitoring module is much greater than the frequency of the data signal; The data signal is input and output from the driving module using a first-in first-out rule; the preset time is greater than the time for the data signal to be input and output from the driving module.

6. The driver chip according to claim 1, characterized in that: The driving module includes a logic circuit module and an analog circuit module; The logic circuit module is used to receive the data signal input from the data input port, extract the control signal from the data signal and transmit it to the analog circuit module, and output the data signal from the data output port; The analog circuit module is used to generate a plurality of driving signals corresponding to the number of light-emitting chips according to the data signal, and drive the corresponding light-emitting chips.

7. A driver chip, used to be built into an LED lamp bead, wherein a driver module is provided in the driver chip, and the driver chip is connected to a signal port and a power port; the power port is used to provide power for the driver chip; and the signal port is used to input and output data signals; It is characterized in that The signal port includes a first signal port and a second signal port; the driving module includes a data input port and a data output port; the driving chip also includes a data direction judgment and switching module connected to the driving module; the data direction judgment and switching module is connected to the first signal port and the second signal port, and is used to judge the data signal input direction of the first signal port and the second signal port, automatically switch the data signal input signal port and the output signal port, import the data signal from the input signal port and transmit it to the driving module through the data input port, receive the data signal returned from the driving module through the data output port, and then output the data signal from the data output signal port; The data direction judgment and switching module includes a data input circuit, a data output circuit and a watchdog; The data input circuit comprises two input branches connected to the data input port, and the two input branches are respectively connected to the first signal terminal and the second signal terminal; The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal and the second signal terminal; The watchdog is used to determine the input direction of the data signal in the first signal terminal and the second signal terminal, and control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port; Wherein, the data input circuit comprises a first AND gate, a second AND gate and an OR gate; wherein the first signal terminal is connected to an input terminal of the first AND gate through a fourth diode to form a first input branch; the second signal terminal is connected to an input terminal of the second AND gate through a fifth diode to form a second input branch; the output terminals of the first AND gate and the second AND gate are connected to the input terminal of the OR gate, and the output terminal of the OR gate is connected to the data input port; The data output circuit comprises a first output branch and a second output branch, wherein the first output branch is connected between the first signal terminal and the data output port through a third switch device; and the second output branch is connected between the second signal terminal and the data output port through a fourth switch device; The watchdog includes a control input port and a control output port, wherein the control input port is connected to the output end of a third AND gate, one input end of the third AND gate is connected to the data output port, and the other input end is connected to the first signal end through a second NOT gate; the control output port is connected to the other input end of the second AND gate and the control end of the third switch device, and is connected to the other input end of the first AND gate and the control end of the fourth switch device through a first NOT gate.

8. An LED lamp, comprising a driver chip, a light emitting chip, a signal port and a power port, wherein the driver chip is provided with a driver module; the power port is used to provide power to the circuit in the LED lamp; the signal port is used to input and output data signals; the light emitting chip is connected to the driver chip and driven by the driver module; It is characterized in that The signal port includes a first signal port and a second signal port; the driving module includes a data input port and a data output port; The LED lamp further comprises a data direction determination and switching module disposed in the driving chip and connected to the driving module; The data direction determination and switching module is connected to the first signal terminal and the second signal terminal, and is used to determine the data signal input direction of the first signal terminal and the second signal terminal, automatically switch the data signal input signal port and the output signal port, import the data signal from the input signal port and transmit it to the driving module through the data input port, receive the data signal returned from the driving module through the data output port, and then output the data signal from the data output signal port; The data direction judgment and switching module includes a data input circuit, a data output circuit and a watchdog; The data input circuit comprises two input branches connected to the data input port, and the two input branches are respectively connected to the first signal terminal and the second signal terminal; The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal and the second signal terminal; The watchdog is used to determine the input direction of the data signal in the first signal terminal and the second signal terminal, and control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port; The data input circuit comprises a data direction selector; the data direction selector is respectively connected to the first signal terminal, the second signal terminal, the watchdog and the data input port of the driving module; The data direction selector is connected to the first signal end and the second signal end to form two input branches, and is used to switch the signal port connected to the data signal input according to the control signal sent by the watchdog, select the input branch, and output the data signal from the data direction selector to the data input port of the driving module; The data output circuit is connected to the data output port of the driving module and includes two output branches provided with switch devices, which are respectively connected to the first signal terminal and the second signal terminal, and the two switch devices always work in an anti-phase state; The watchdog is directly or indirectly connected to the data input port, data output port, data direction selector and the switch device on the data output circuit, and is used to collect signals from the first signal terminal and the data output port, identify the signal port of the data signal input and the signal port of the output, and send a control signal to the data direction selector and the two switch devices on the data output circuit. An inverter is selectively set on the line between the two switch devices and the watchdog.

9. The LED lamp according to claim 8, characterized in that: The data direction selector comprises a first signal port, a second signal port, a data output port and a selection port; The first signal terminal is connected to the first signal port through a first diode, and the second signal terminal is connected to the second signal port through a second diode; the data output port is connected to the data input port of the driving module; The data output port of the driving module is connected to the first signal terminal through a first switch device, and is connected to the second signal terminal through a second switch device; The watchdog includes an input signal acquisition port, an output signal acquisition port and a control port; The input signal acquisition port is connected to the first signal port of the data direction selector; the output signal acquisition port is connected to the data output port of the driving module; the control port is respectively connected to the selection port of the data direction selector, the control end of the first switch device and the second switch device, and an inverter is set on the control port and the control end of the second switch device; or The input signal acquisition port is connected to the second signal port of the data direction selector; the output signal acquisition port is connected to the data output port of the driving module; the control port is respectively connected to the selection port of the data direction selector, the control end of the first switch device and the second switch device, and an inverter is set on the control port and the control end of the first switch device.

10. The LED lamp according to claim 9, characterized in that: The watchdog includes a signal monitoring module and a counter; The signal monitoring module is connected to the input signal acquisition port and the output signal acquisition port, and is provided with a monitoring output port; it performs logical judgment according to the signals collected by the input signal acquisition port and the output signal acquisition port, and outputs a monitoring signal from the monitoring output port; if a specific logic is met, the monitoring signal output to the counter is a low level 0, so that the counter is reset; otherwise, the monitoring signal output to the counter is a high level 1, so that the counter counts; The counter is used to count within a preset time. If the count reaches or exceeds a preset value, the output control signal is determined to be a high level 1, otherwise the output control signal is a low level 0.

11. The LED lamp according to claim 10, characterized in that: The signal monitoring module logic judgment rules are as follows: when the signals collected by the input signal acquisition port and the output signal acquisition port are not equal, and the signal collected by the input signal acquisition port is a low level 0, and the signal collected by the output signal acquisition port is a high level 1, the monitoring output port outputs a monitoring signal of a low level 0; otherwise, the monitoring output port outputs a monitoring signal of a high level 1.

12. The LED lamp according to claim 11, characterized in that: The frequency of the signal collected by the signal monitoring module is much greater than the frequency of the data signal; The data signal is input and output from the driving module using a first-in first-out rule; the preset time is greater than the time for the data signal to be input and output from the driving module.

13. The LED lamp according to claim 8, characterized in that: The driving module includes a logic circuit module and an analog circuit module; The logic circuit module is used to receive the data signal input from the data input port, extract the control signal from the data signal and transmit it to the analog circuit module, and output the data signal from the data output port; The analog circuit module is used to generate a plurality of driving signals corresponding to the number of light-emitting chips according to the data signal, and drive the corresponding light-emitting chips.

14. An LED lamp, comprising a driver chip, a light emitting chip, a signal port and a power port, wherein the driver chip is provided with a driver module; the power port is used to provide power to the circuit in the LED lamp; the signal port is used to input and output data signals; the light emitting chip is connected to the driver chip and driven by the driver module; It is characterized in that The signal port includes a first signal port and a second signal port; the driving module includes a data input port and a data output port; The LED lamp further comprises a data direction determination and switching module disposed in the driving chip and connected to the driving module; The data direction determination and switching module is connected to the first signal terminal and the second signal terminal, and is used to determine the data signal input direction of the first signal terminal and the second signal terminal, automatically switch the data signal input signal port and the output signal port, import the data signal from the input signal port and transmit it to the driving module through the data input port, receive the data signal returned from the driving module through the data output port, and then output the data signal from the data output signal port; The data direction judgment and switching module includes a data input circuit, a data output circuit and a watchdog; The data input circuit comprises two input branches connected to the data input port, and the two input branches are respectively connected to the first signal terminal and the second signal terminal; The data output circuit comprises two output branches connected to the data output port, and the two output branches are respectively connected to the first signal terminal and the second signal terminal; The watchdog is used to determine the input direction of the data signal in the first signal terminal and the second signal terminal, and control the selection of the input branch from the data input circuit and the output branch from the data output circuit, so that the data signal is always input from one of the signal ports and output from the other signal port; Wherein, the data input circuit comprises a first AND gate, a second AND gate and an OR gate; wherein the first signal terminal is connected to an input terminal of the first AND gate through a fourth diode to form a first input branch; the second signal terminal is connected to an input terminal of the second AND gate through a fifth diode to form a second input branch; the output terminals of the first AND gate and the second AND gate are connected to the input terminal of the OR gate, and the output terminal of the OR gate is connected to the data input port; The data output circuit comprises a first output branch and a second output branch, wherein the first output branch is connected between the first signal terminal and the data output port through a third switch device; and the second output branch is connected between the second signal terminal and the data output port through a fourth switch device; The watchdog includes a control input port and a control output port, wherein the control input port is connected to the output end of a third AND gate, one input end of the third AND gate is connected to the data output port, and the other input end is connected to the first signal end through a second NOT gate; the control output port is connected to the other input end of the second AND gate and the control end of the third switch device, and is connected to the other input end of the first AND gate and the control end of the fourth switch device through a first NOT gate.

15. An LED display screen, characterized in that: The LED lamp comprises any one of claims 8-14.

16. The LED display screen according to claim 15, characterized in that: The LED lamps form an LED array, and the LED array is arranged in an array in the same direction.

17. The LED display screen according to claim 16, characterized in that: Also includes a data control module; The data control module is provided with a plurality of first data ports and second data ports; some LED lamps of the LED array are serially connected between the first data ports and the second data ports.

18. The LED display screen according to claim 17, characterized in that: The array of LED lamps connected in series between the first data port and the second data port is divided into multiple rows or multiple columns connected in series, and the LED lamps in adjacent rows or adjacent columns are connected at the head or the tail.

19. The LED display screen according to claim 18, characterized in that: The data control module includes two physical network ports, FPGA and memory; The FPGA includes a data acquisition and transmission module, a first output module, a second output module and a circuit breaker monitoring module; The data acquisition and transmission module is connected to the two physical network ports and the memory, and is used to collect data packets and send data packets, and obtain data signals from the data packets and store them in the memory; The first output module is used to call the data signal stored in the memory and send it to the corresponding serially connected LED lamp through the first data port; The second output module is used to reversely call the data signal stored in the memory as a backup signal, and send the backup signal to the corresponding serially connected LED lamp through the second data port; A backup switch device is provided between the second output module and the second data port, and the backup switch device is used to control the on and off of the second output module sending a backup signal outward; The circuit breaker monitoring module is connected to the control end of the backup switch device and is connected to the second data port through a third diode, and is used to collect data from the second data port and output a backup control signal to the control end of the backup switch device.

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